Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 09/29] drm/i915/dp_mst: Enable FEC early once it's known DSC is needed
Date: Tue, 24 Oct 2023 20:27:14 +0300	[thread overview]
Message-ID: <ZTf+T2qf1GJmN/+e@intel.com> (raw)
In-Reply-To: <20231024010925.3949910-10-imre.deak@intel.com>

On Tue, Oct 24, 2023 at 04:09:05AM +0300, Imre Deak wrote:
> Enable FEC in crtc_state, as soon as it's known it will be needed by
> DSC. This fixes the calculation of BW allocation overhead, in case DSC
> is enabled by falling back to it during the encoder compute config
> phase (vs. enabling FEC due to DSC being enabled on other streams).
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     | 6 +++---
>  drivers/gpu/drm/i915/display/intel_dp.h     | 5 +++++
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 7 +++++++
>  3 files changed, 15 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 1891c0cc187d1..2048649b420b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1369,9 +1369,9 @@ static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
>  	return false;
>  }
>  
> -static bool intel_dp_supports_fec(struct intel_dp *intel_dp,
> -				  const struct intel_connector *connector,
> -				  const struct intel_crtc_state *pipe_config)
> +bool intel_dp_supports_fec(struct intel_dp *intel_dp,
> +			   const struct intel_connector *connector,
> +			   const struct intel_crtc_state *pipe_config)
>  {
>  	return intel_dp_source_supports_fec(intel_dp, pipe_config) &&
>  		drm_dp_sink_supports_fec(connector->dp.fec_capability);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 484aea215a251..0258580a6aadc 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -137,6 +137,11 @@ static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
>  }
>  
>  u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
> +
> +bool intel_dp_supports_fec(struct intel_dp *intel_dp,
> +			   const struct intel_connector *connector,
> +			   const struct intel_crtc_state *pipe_config);
> +
>  u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp);
>  
>  void intel_ddi_update_pipe(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 80b3df6d51fc8..98d775d862ac4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -338,6 +338,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
>  	struct intel_dp *intel_dp = &intel_mst->primary->dp;
> +	const struct intel_connector *connector =
> +		to_intel_connector(conn_state->connector);
>  	const struct drm_display_mode *adjusted_mode =
>  		&pipe_config->hw.adjusted_mode;
>  	struct link_config_limits limits;
> @@ -380,6 +382,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  							&limits))
>  			return -EINVAL;
>  
> +		if (!intel_dp_supports_fec(intel_dp, connector, pipe_config))
> +			return -EINVAL;
> +
> +		pipe_config->fec_enable = !intel_dp_is_uhbr(pipe_config);
> +
>  		/*
>  		 * FIXME: As bpc is hardcoded to 8, as mentioned above,
>  		 * WARN and ignore the debug flag force_dsc_bpc for now.
> -- 
> 2.39.2
> 

  reply	other threads:[~2023-10-24 17:27 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-24  1:08 [Intel-gfx] [PATCH 00/29] drm/i915: Improve BW management on MST links Imre Deak
2023-10-24  1:08 ` [Intel-gfx] [PATCH 01/29] drm/dp_mst: Fix fractional DSC bpp handling Imre Deak
2023-10-24  1:08 ` [Intel-gfx] [PATCH 02/29] drm/dp_mst: Add helper to determine if an MST port is downstream of another port Imre Deak
2023-10-24  1:08 ` [Intel-gfx] [PATCH 03/29] drm/dp_mst: Factor out a helper to check the atomic state of a topology manager Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 04/29] drm/dp_mst: Swap the order of checking root vs. non-root port BW limitations Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 05/29] drm/dp_mst: Allow DSC in any Synaptics last branch device Imre Deak
2023-10-27  9:21   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 06/29] drm/dp: Add DP_HBLANK_EXPANSION_CAPABLE and DSC_PASSTHROUGH_EN DPCD flags Imre Deak
2023-10-27  9:22   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 07/29] drm/dp_mst: Add HBLANK expansion quirk for Synaptics MST hubs Imre Deak
2023-10-24 10:22   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-10-27  9:23   ` [Intel-gfx] [PATCH " Lisovskiy, Stanislav
2023-10-27 12:22   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 08/29] drm/dp: Add helpers to calculate the link BW overhead Imre Deak
2023-10-24  2:47   ` kernel test robot
2023-10-24 10:22   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-10-27 12:21     ` Lisovskiy, Stanislav
2023-10-24 12:34   ` [Intel-gfx] [PATCH " kernel test robot
2023-10-25 15:47   ` kernel test robot
2023-10-24  1:09 ` [Intel-gfx] [PATCH 09/29] drm/i915/dp_mst: Enable FEC early once it's known DSC is needed Imre Deak
2023-10-24 17:27   ` Lisovskiy, Stanislav [this message]
2023-10-30  8:38   ` Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 10/29] drm/i915/dp: Specify the FEC overhead as an increment vs. a remainder Imre Deak
2023-10-25 15:27   ` Ville Syrjälä
2023-10-25 15:37     ` Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 11/29] drm/i915/dp: Pass actual BW overhead to m_n calculation Imre Deak
2023-10-24 17:28   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 12/29] drm/i915/dp_mst: Account for FEC and DSC overhead during BW allocation Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 13/29] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 14/29] drm/i915/dp_mst: Program the DSC PPS SDP for each stream Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 15/29] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 16/29] drm/i915/dp_mst: Add missing DSC compression disabling Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 17/29] drm/i915/dp: Rename intel_ddi_disable_fec_state() to intel_ddi_disable_fec() Imre Deak
2023-10-25  7:58   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 18/29] drm/i915/dp: Wait for FEC detected status in the sink Imre Deak
2023-10-24 17:25   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 19/29] drm/i915/dp: Disable FEC ready flag " Imre Deak
2023-10-25  8:01   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 20/29] drm/i915/dp_mst: Handle the Synaptics HBlank expansion quirk Imre Deak
2023-10-27  7:59   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 21/29] drm/i915/dp_mst: Enable decompression in the sink from the MST encoder hooks Imre Deak
2023-10-27 12:24   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 22/29] drm/i915/dp: Enable DSC via the connector decompression AUX Imre Deak
2023-10-24 10:22   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-10-27 12:27     ` Lisovskiy, Stanislav
2023-10-25  8:30   ` [Intel-gfx] [PATCH " Lisovskiy, Stanislav
2023-10-27 12:25   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 23/29] drm/i915/dp_mst: Enable DSC passthrough Imre Deak
2023-10-24 10:22   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-10-27 12:26     ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 24/29] drm/i915/dp_mst: Enable MST DSC decompression for all streams Imre Deak
     [not found]   ` <ZTvNCgO9NF/rl1t+@intel.com>
     [not found]     ` <ZTvO3VK+sMksD69l@ideak-desk.fi.intel.com>
2023-10-30  7:29       ` Lisovskiy, Stanislav
2023-10-30  8:09         ` Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 25/29] drm/i915: Factor out function to clear pipe update flags Imre Deak
     [not found]   ` <ZTvaXNT3C3VZGOel@intel.com>
2023-10-27 16:39     ` Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 26/29] drm/i915/dp_mst: Force modeset CRTC if DSC toggling requires it Imre Deak
2023-10-27  9:08   ` Lisovskiy, Stanislav
2023-10-24  1:09 ` [Intel-gfx] [PATCH 27/29] drm/i915/dp_mst: Improve BW sharing between MST streams Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 28/29] drm/i915/dp_mst: Check BW limitations only after all streams are computed Imre Deak
2023-10-24  1:09 ` [Intel-gfx] [PATCH 29/29] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Imre Deak
2023-10-30  4:17   ` Nautiyal, Ankit K
2023-10-30  5:29   ` Murthy, Arun R
2023-10-24 22:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on MST links (rev5) Patchwork
2023-10-24 22:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-24 22:32 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-25  7:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-26 12:18 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-10-27 22:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on MST links (rev7) Patchwork
2023-10-27 22:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-27 23:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-30 21:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZTf+T2qf1GJmN/+e@intel.com \
    --to=stanislav.lisovskiy@intel.com \
    --cc=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox