Re: [PATCH 1/7] drm/i915: Set clear color block size to 0x0

[Imre Deak <imre.deak@intel.com>]

On Wed, Sep 18, 2024 at 05:44:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We don't use the block size information for the clear color
> plane. Technically the entire fb is the single block for the
> single 64B clear color surface, so there is just no way to
> delcare that as a constant since the fb size can be anything.
> 
> Define the clear color block size as 0x0 to make things less
> confusing. We already declared that cpp/chars_per_block=0 for
> the clear color as well. That also causes the drm core code
> to mostly ignore the clear color plane, which is exactly
> what we want since that code doesn't know how to deal with
> the clear color plane.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Yes, not sure what the 2x1 dimension would mean for a fixed size data
item and didn't think of this when gen12_flat_ccs_cc_formats was added
(which in turn was copied from gen12_flat_ccs_cc_formats). Looks ok to
change W/H to 0:

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fb.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index d2ff21e98545..bcf0d016f499 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -102,31 +102,31 @@ static const struct drm_format_info gen12_ccs_formats[] = {
>   */
>  static const struct drm_format_info gen12_ccs_cc_formats[] = {
>  	{ .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 3,
> -	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 2 }, .block_h = { 1, 1, 1 },
> +	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
>  	  .hsub = 1, .vsub = 1, },
>  	{ .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 3,
> -	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 2 }, .block_h = { 1, 1, 1 },
> +	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
>  	  .hsub = 1, .vsub = 1, },
>  	{ .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 3,
> -	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 2 }, .block_h = { 1, 1, 1 },
> +	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
>  	  .hsub = 1, .vsub = 1, .has_alpha = true },
>  	{ .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 3,
> -	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 2 }, .block_h = { 1, 1, 1 },
> +	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
>  	  .hsub = 1, .vsub = 1, .has_alpha = true },
>  };
>  
>  static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
>  	{ .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 2,
> -	  .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
>  	  .hsub = 1, .vsub = 1, },
>  	{ .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 2,
> -	  .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
>  	  .hsub = 1, .vsub = 1, },
>  	{ .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 2,
> -	  .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
>  	  .hsub = 1, .vsub = 1, .has_alpha = true },
>  	{ .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2,
> -	  .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
>  	  .hsub = 1, .vsub = 1, .has_alpha = true },
>  };
>  
> -- 
> 2.44.2
>