Re: [PATCH 3/7] drm/i915: Enable 10bpc + CCS on TGL+

[Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>]

On 18.9.2024 17.44, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> TGL+ support 10bpc compressed scanout. Enable it.
> 
> v2: Set .depth=30 for all variants to match drm_fourcc.c
>      Set clear color block size to 0x0
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_fb.c       | 36 +++++++++++++++++++
>   .../drm/i915/display/skl_universal_plane.c    |  8 ++---
>   2 files changed, 40 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index bcf0d016f499..9b9da4f71f73 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -67,6 +67,18 @@ static const struct drm_format_info gen12_ccs_formats[] = {
>   	{ .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2,
>   	  .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
>   	  .hsub = 1, .vsub = 1, .has_alpha = true },
> +	{ .format = DRM_FORMAT_XRGB2101010, .depth = 30, .num_planes = 2,
> +	  .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .hsub = 1, .vsub = 1, },
> +	{ .format = DRM_FORMAT_XBGR2101010, .depth = 30, .num_planes = 2,
> +	  .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .hsub = 1, .vsub = 1, },
> +	{ .format = DRM_FORMAT_ARGB2101010, .depth = 30, .num_planes = 2,

Is that comment about depth=30 for all variants because of these alpha 
formats? Why is that? Here on other formats alpha is taken as part of 
depth, like in above "DRM_FORMAT_ABGR8888, .depth = 32"


> +	  .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .hsub = 1, .vsub = 1, .has_alpha = true },
> +	{ .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 2,
> +	  .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .hsub = 1, .vsub = 1, .has_alpha = true },
>   	{ .format = DRM_FORMAT_YUYV, .num_planes = 2,
>   	  .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
>   	  .hsub = 2, .vsub = 1, .is_yuv = true },
> @@ -113,6 +125,18 @@ static const struct drm_format_info gen12_ccs_cc_formats[] = {
>   	{ .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 3,
>   	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
>   	  .hsub = 1, .vsub = 1, .has_alpha = true },
> +	{ .format = DRM_FORMAT_XRGB2101010, .depth = 30, .num_planes = 3,
> +	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
> +	  .hsub = 1, .vsub = 1, },
> +	{ .format = DRM_FORMAT_XBGR2101010, .depth = 30, .num_planes = 3,
> +	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
> +	  .hsub = 1, .vsub = 1, },
> +	{ .format = DRM_FORMAT_ARGB2101010, .depth = 30, .num_planes = 3,
> +	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
> +	  .hsub = 1, .vsub = 1, .has_alpha = true },
> +	{ .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 3,
> +	  .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
> +	  .hsub = 1, .vsub = 1, .has_alpha = true },
>   };
>   
>   static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
> @@ -128,6 +152,18 @@ static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
>   	{ .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2,
>   	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
>   	  .hsub = 1, .vsub = 1, .has_alpha = true },
> +	{ .format = DRM_FORMAT_XRGB2101010, .depth = 30, .num_planes = 2,
> +	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
> +	  .hsub = 1, .vsub = 1, },
> +	{ .format = DRM_FORMAT_XBGR2101010, .depth = 30, .num_planes = 2,
> +	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
> +	  .hsub = 1, .vsub = 1, },
> +	{ .format = DRM_FORMAT_ARGB2101010, .depth = 30, .num_planes = 2,
> +	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
> +	  .hsub = 1, .vsub = 1, .has_alpha = true },
> +	{ .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 2,
> +	  .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
> +	  .hsub = 1, .vsub = 1, .has_alpha = true },
>   };
>   
>   struct intel_modifier_desc {
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 17d4c880ecc4..9f34df60b112 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2315,6 +2315,10 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
>   	case DRM_FORMAT_XBGR8888:
>   	case DRM_FORMAT_ARGB8888:
>   	case DRM_FORMAT_ABGR8888:
> +	case DRM_FORMAT_XRGB2101010:
> +	case DRM_FORMAT_XBGR2101010:
> +	case DRM_FORMAT_ARGB2101010:
> +	case DRM_FORMAT_ABGR2101010:
>   		if (intel_fb_is_ccs_modifier(modifier))
>   			return true;
>   		fallthrough;
> @@ -2331,10 +2335,6 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
>   			return true;
>   		fallthrough;
>   	case DRM_FORMAT_RGB565:
> -	case DRM_FORMAT_XRGB2101010:
> -	case DRM_FORMAT_XBGR2101010:
> -	case DRM_FORMAT_ARGB2101010:
> -	case DRM_FORMAT_ABGR2101010:
>   	case DRM_FORMAT_XVYU2101010:
>   	case DRM_FORMAT_C8:
>   	case DRM_FORMAT_XBGR16161616F: