* Re: [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs [not found] ` <20200716172106.2656-2-ville.syrjala@linux.intel.com> @ 2020-09-23 23:46 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-23 23:46 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs > > From: Alexei Podtelezhnikov <apodtele@gmail.com> > > Reclassify 0x0426 as GT3 (GT2+) according to specifications and the second > least significant digit. > > Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com> > [vsyrjala: s/GT2/GT3/ in the comment] > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 8e7ae30ebcbb..51831c6f603c 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -221,7 +221,6 @@ > INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ > INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ > INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ > - INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ > INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ > INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */ > > @@ -246,6 +245,7 @@ > INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ > INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ > + INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \ > INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ > INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ > > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-4-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT [not found] ` <20200716172106.2656-4-ville.syrjala@linux.intel.com> @ 2020-09-24 0:32 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:32 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and > 0x1927 as ULT > > From: Alexei Podtelezhnikov <apodtele@gmail.com> > > Reclassify 0x1923, 0x1927 according to specifications. Of note, the second to > last digit seems to correspond to GT#. IMO we don’t need to specify the above. > Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com> > [vsyrjala: Split separate changes into separate patches, > Sort the IDs] > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > d4c054e3b95f..9df3697f074d 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -357,12 +357,12 @@ > INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ > > #define INTEL_SKL_ULT_GT3_IDS(info) \ > - INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3 */ > + INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \ > + INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \ > + INTEL_VGA_DEVICE(0x1927, info) /* ULT GT3 */ > > #define INTEL_SKL_GT3_IDS(info) \ > INTEL_SKL_ULT_GT3_IDS(info), \ > - INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \ > - INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \ > INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \ > INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ > INTEL_VGA_DEVICE(0x192D, info) /* SRV GT3 */ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-5-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs [not found] ` <20200716172106.2656-5-ville.syrjala@linux.intel.com> @ 2020-09-24 0:37 ` Srivatsa, Anusha 2020-09-24 10:46 ` Ville Syrjälä 0 siblings, 1 reply; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:37 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs > > From: Alexei Podtelezhnikov <apodtele@gmail.com> > > Add three new devices 0x1913, 0x1915, and 0x1917 also known as > iSKLULTGT15, iSKLULXGT15, and iSKLDTGT15. > > Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com> > [vsyrjala: Split separate changes into separate patchs, > Sort the IDs] The above comment appears in every patch. If this is v2 of the patches then it goes right after the commit message as: V2: Split separate changes into separate patches, sort the IDs (Ville) > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> The code changes itself look good. Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 9df3697f074d..c906088ccffe 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -329,17 +329,20 @@ > INTEL_VGA_DEVICE(0x22b3, info) > > #define INTEL_SKL_ULT_GT1_IDS(info) \ > - INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */ > + INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \ > + INTEL_VGA_DEVICE(0x1913, info) /* ULT GT1.5 */ > > #define INTEL_SKL_ULX_GT1_IDS(info) \ > - INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */ > + INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \ > + INTEL_VGA_DEVICE(0x1915, info) /* ULX GT1.5 */ > > #define INTEL_SKL_GT1_IDS(info) \ > INTEL_SKL_ULT_GT1_IDS(info), \ > INTEL_SKL_ULX_GT1_IDS(info), \ > INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ > INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ > - INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */ > + INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \ > + INTEL_VGA_DEVICE(0x1917, info) /* DT GT1.5 */ > > #define INTEL_SKL_ULT_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs 2020-09-24 0:37 ` [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs Srivatsa, Anusha @ 2020-09-24 10:46 ` Ville Syrjälä 2020-09-24 17:54 ` Srivatsa, Anusha 0 siblings, 1 reply; 17+ messages in thread From: Ville Syrjälä @ 2020-09-24 10:46 UTC (permalink / raw) To: Srivatsa, Anusha; +Cc: intel-gfx@lists.freedesktop.org On Thu, Sep 24, 2020 at 12:37:47AM +0000, Srivatsa, Anusha wrote: > > > > -----Original Message----- > > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > > Syrjala > > Sent: Thursday, July 16, 2020 10:21 AM > > To: intel-gfx@lists.freedesktop.org > > Subject: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs > > > > From: Alexei Podtelezhnikov <apodtele@gmail.com> > > > > Add three new devices 0x1913, 0x1915, and 0x1917 also known as > > iSKLULTGT15, iSKLULXGT15, and iSKLDTGT15. > > > > Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com> > > [vsyrjala: Split separate changes into separate patchs, > > Sort the IDs] > The above comment appears in every patch. If this is v2 of the patches then it goes right after the commit message as: > > V2: Split separate changes into separate patches, sort the IDs (Ville) No. I use the [vsyrjala: blah] notation to indicate I modified the original patch which was authored by someone else. > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > The code changes itself look good. > > Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > > > --- > > include/drm/i915_pciids.h | 9 ++++++--- > > 1 file changed, 6 insertions(+), 3 deletions(-) > > > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > > 9df3697f074d..c906088ccffe 100644 > > --- a/include/drm/i915_pciids.h > > +++ b/include/drm/i915_pciids.h > > @@ -329,17 +329,20 @@ > > INTEL_VGA_DEVICE(0x22b3, info) > > > > #define INTEL_SKL_ULT_GT1_IDS(info) \ > > - INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */ > > + INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \ > > + INTEL_VGA_DEVICE(0x1913, info) /* ULT GT1.5 */ > > > > #define INTEL_SKL_ULX_GT1_IDS(info) \ > > - INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */ > > + INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \ > > + INTEL_VGA_DEVICE(0x1915, info) /* ULX GT1.5 */ > > > > #define INTEL_SKL_GT1_IDS(info) \ > > INTEL_SKL_ULT_GT1_IDS(info), \ > > INTEL_SKL_ULX_GT1_IDS(info), \ > > INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ > > INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ > > - INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */ > > + INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \ > > + INTEL_VGA_DEVICE(0x1917, info) /* DT GT1.5 */ > > > > #define INTEL_SKL_ULT_GT2_IDS(info) \ > > INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ > > -- > > 2.26.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs 2020-09-24 10:46 ` Ville Syrjälä @ 2020-09-24 17:54 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 17:54 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > Sent: Thursday, September 24, 2020 3:46 AM > To: Srivatsa, Anusha <anusha.srivatsa@intel.com> > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs > > On Thu, Sep 24, 2020 at 12:37:47AM +0000, Srivatsa, Anusha wrote: > > > > > > > -----Original Message----- > > > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf > > > Of Ville Syrjala > > > Sent: Thursday, July 16, 2020 10:21 AM > > > To: intel-gfx@lists.freedesktop.org > > > Subject: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs > > > > > > From: Alexei Podtelezhnikov <apodtele@gmail.com> > > > > > > Add three new devices 0x1913, 0x1915, and 0x1917 also known as > > > iSKLULTGT15, iSKLULXGT15, and iSKLDTGT15. > > > > > > Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com> > > > [vsyrjala: Split separate changes into separate patchs, > > > Sort the IDs] > > The above comment appears in every patch. If this is v2 of the patches > then it goes right after the commit message as: > > > > V2: Split separate changes into separate patches, sort the IDs > > (Ville) > > No. I use the [vsyrjala: blah] notation to indicate I modified the original > patch which was authored by someone else. > > > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The code changes itself look good. Ah. Ok. Makes sense Anusha > > Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > > > > > --- > > > include/drm/i915_pciids.h | 9 ++++++--- > > > 1 file changed, 6 insertions(+), 3 deletions(-) > > > > > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h > > > index 9df3697f074d..c906088ccffe 100644 > > > --- a/include/drm/i915_pciids.h > > > +++ b/include/drm/i915_pciids.h > > > @@ -329,17 +329,20 @@ > > > INTEL_VGA_DEVICE(0x22b3, info) > > > > > > #define INTEL_SKL_ULT_GT1_IDS(info) \ > > > - INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */ > > > + INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \ > > > + INTEL_VGA_DEVICE(0x1913, info) /* ULT GT1.5 */ > > > > > > #define INTEL_SKL_ULX_GT1_IDS(info) \ > > > - INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */ > > > + INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \ > > > + INTEL_VGA_DEVICE(0x1915, info) /* ULX GT1.5 */ > > > > > > #define INTEL_SKL_GT1_IDS(info) \ > > > INTEL_SKL_ULT_GT1_IDS(info), \ > > > INTEL_SKL_ULX_GT1_IDS(info), \ > > > INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ > > > INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ > > > - INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */ > > > + INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \ > > > + INTEL_VGA_DEVICE(0x1917, info) /* DT GT1.5 */ > > > > > > #define INTEL_SKL_ULT_GT2_IDS(info) \ > > > INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ > > > -- > > > 2.26.2 > > > > > > _______________________________________________ > > > Intel-gfx mailing list > > > Intel-gfx@lists.freedesktop.org > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-6-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments [not found] ` <20200716172106.2656-6-ville.syrjala@linux.intel.com> @ 2020-09-24 0:40 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:40 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. > GT3e/4e comments > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Bunch of the SKL SKUs currently documented as GT3/4 seem to actually be > GT3e/4e. Fix up the comments. > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > c906088ccffe..3792ab5f20ff 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -361,19 +361,19 @@ > > #define INTEL_SKL_ULT_GT3_IDS(info) \ > INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \ > - INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \ > - INTEL_VGA_DEVICE(0x1927, info) /* ULT GT3 */ > + INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3e */ \ > + INTEL_VGA_DEVICE(0x1927, info) /* ULT GT3e */ > > #define INTEL_SKL_GT3_IDS(info) \ > INTEL_SKL_ULT_GT3_IDS(info), \ > INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \ > - INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ > - INTEL_VGA_DEVICE(0x192D, info) /* SRV GT3 */ > + INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3e */ \ > + INTEL_VGA_DEVICE(0x192D, info) /* SRV GT3e */ > > #define INTEL_SKL_GT4_IDS(info) \ > INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \ > - INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4 */ \ > - INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4 */ \ > + INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \ > + INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \ > INTEL_VGA_DEVICE(0x193A, info) /* SRV GT4e */ > > #define INTEL_SKL_IDS(info) \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-7-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers [not found] ` <20200716172106.2656-7-ville.syrjala@linux.intel.com> @ 2020-09-24 0:42 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:42 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex > numbers > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Most of the HSW PCI IDs are upper case hex numbers, but a few are lower > case. Make it consistent so these don't stick out like a sore thumb. > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 3792ab5f20ff..026db4d496e9 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -181,7 +181,7 @@ > INTEL_HSW_ULT_GT1_IDS(info), \ > INTEL_HSW_ULX_GT1_IDS(info), \ > INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ > - INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ > + INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \ > INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ > INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ > INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ @@ - > 209,7 +209,7 @@ > INTEL_HSW_ULT_GT2_IDS(info), \ > INTEL_HSW_ULX_GT2_IDS(info), \ > INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ > - INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ > + INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \ > INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ > INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ > INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ @@ - > 234,7 +234,7 @@ #define INTEL_HSW_GT3_IDS(info) \ > INTEL_HSW_ULT_GT3_IDS(info), \ > INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ > - INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ > + INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \ > INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ > INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-8-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs [not found] ` <20200716172106.2656-8-ville.syrjala@linux.intel.com> @ 2020-09-24 0:44 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:44 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Sort the HSW PCI IDs numerically. Some order seems better than > randomness. I think the sorting, OCD-ness with hex and reclassifying can be combined in one patch. Anusha > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > include/drm/i915_pciids.h | 34 +++++++++++++++++----------------- > 1 file changed, 17 insertions(+), 17 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 026db4d496e9..4870c3c9f9b2 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -170,9 +170,9 @@ > > #define INTEL_HSW_ULT_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ > + INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ > INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ > - INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x0A06, info) /* ULT GT1 mobile */ > + INTEL_VGA_DEVICE(0x0A0B, info) /* ULT GT1 reserved */ > > #define INTEL_HSW_ULX_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */ @@ -181,26 > +181,26 @@ > INTEL_HSW_ULT_GT1_IDS(info), \ > INTEL_HSW_ULX_GT1_IDS(info), \ > INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ > + INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ > INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \ > INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ > INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ > INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ > + INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ > INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ > INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ > INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ > INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ > + INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ > INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ > INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ > - INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ > - INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ > - INTEL_VGA_DEVICE(0x0D06, info) /* CRW GT1 mobile */ > + INTEL_VGA_DEVICE(0x0D0E, info) /* CRW GT1 reserved */ > > #define INTEL_HSW_ULT_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ > + INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ > INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ > - INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x0A16, info) /* ULT GT2 mobile */ > + INTEL_VGA_DEVICE(0x0A1B, info) /* ULT GT2 reserved */ \ > > #define INTEL_HSW_ULX_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \ @@ - > 209,45 +209,45 @@ > INTEL_HSW_ULT_GT2_IDS(info), \ > INTEL_HSW_ULX_GT2_IDS(info), \ > INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ > + INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ > INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \ > INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ > INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ > INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ > + INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ > INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ > INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ > INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ > INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ > + INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ > INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ > INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ > - INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ > - INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ > - INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */ > + INTEL_VGA_DEVICE(0x0D1E, info) /* CRW GT2 reserved */ > > #define INTEL_HSW_ULT_GT3_IDS(info) \ > INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ > + INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ > INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ > INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ > - INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ > INTEL_VGA_DEVICE(0x0A2E, info) /* ULT GT3 reserved */ > > #define INTEL_HSW_GT3_IDS(info) \ > INTEL_HSW_ULT_GT3_IDS(info), \ > INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ > + INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \ > INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \ > INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ > INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ > + INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ > INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ > INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ > INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ > + INTEL_VGA_DEVICE(0x0D26, info), /* CRW GT3 mobile */ \ > INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ > INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ > - INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ > - INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \ > - INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ > - INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ > + INTEL_VGA_DEVICE(0x0D2E, info) /* CRW GT3 reserved */ > > #define INTEL_HSW_IDS(info) \ > INTEL_HSW_GT1_IDS(info), \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-9-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs [not found] ` <20200716172106.2656-9-ville.syrjala@linux.intel.com> @ 2020-09-24 0:49 ` Srivatsa, Anusha 2020-09-24 10:50 ` Ville Syrjälä 0 siblings, 1 reply; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:49 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Sort the SKL PCI IDs numerically. Some order seems better than > randomness. There are 2 patches - patch 2 and 3 in the series that are reclassifying some PCI IDs and there is patch 4 that adds a missing ID. All of those with this patch can be combined to a single patch OR patch 2, 3 and 4 can be squashed as one solitary patch. Anusha > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > include/drm/i915_pciids.h | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 4870c3c9f9b2..5185ac789038 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -340,8 +340,8 @@ > INTEL_SKL_ULT_GT1_IDS(info), \ > INTEL_SKL_ULX_GT1_IDS(info), \ > INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ > - INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ > INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \ > + INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ > INTEL_VGA_DEVICE(0x1917, info) /* DT GT1.5 */ > > #define INTEL_SKL_ULT_GT2_IDS(info) \ > @@ -355,8 +355,8 @@ > INTEL_SKL_ULT_GT2_IDS(info), \ > INTEL_SKL_ULX_GT2_IDS(info), \ > INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \ > - INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ > INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \ > + INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ > INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ > > #define INTEL_SKL_ULT_GT3_IDS(info) \ > @@ -372,9 +372,9 @@ > > #define INTEL_SKL_GT4_IDS(info) \ > INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \ > + INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \ > INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \ > - INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \ > - INTEL_VGA_DEVICE(0x193A, info) /* SRV GT4e */ > + INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */ > > #define INTEL_SKL_IDS(info) \ > INTEL_SKL_GT1_IDS(info), \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs 2020-09-24 0:49 ` [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL " Srivatsa, Anusha @ 2020-09-24 10:50 ` Ville Syrjälä 0 siblings, 0 replies; 17+ messages in thread From: Ville Syrjälä @ 2020-09-24 10:50 UTC (permalink / raw) To: Srivatsa, Anusha; +Cc: intel-gfx@lists.freedesktop.org On Thu, Sep 24, 2020 at 12:49:13AM +0000, Srivatsa, Anusha wrote: > > > > -----Original Message----- > > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > > Syrjala > > Sent: Thursday, July 16, 2020 10:21 AM > > To: intel-gfx@lists.freedesktop.org > > Subject: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Sort the SKL PCI IDs numerically. Some order seems better than > > randomness. > > There are 2 patches - patch 2 and 3 in the series that are reclassifying some PCI IDs and there is patch 4 that adds a missing ID. All of those with this patch can be combined to a single patch OR patch 2, 3 and 4 can be squashed as one solitary patch. The original patch from Alexei was a single patch. I split it up for a reason; easier to revert things if/when necessary, and it's also easier to review. If your commit message is of the form "do A and B" it's generally a good indication that it should be split into two patches. > > Anusha > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > --- > > include/drm/i915_pciids.h | 8 ++++---- > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > > 4870c3c9f9b2..5185ac789038 100644 > > --- a/include/drm/i915_pciids.h > > +++ b/include/drm/i915_pciids.h > > @@ -340,8 +340,8 @@ > > INTEL_SKL_ULT_GT1_IDS(info), \ > > INTEL_SKL_ULX_GT1_IDS(info), \ > > INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ > > - INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ > > INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \ > > + INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ > > INTEL_VGA_DEVICE(0x1917, info) /* DT GT1.5 */ > > > > #define INTEL_SKL_ULT_GT2_IDS(info) \ > > @@ -355,8 +355,8 @@ > > INTEL_SKL_ULT_GT2_IDS(info), \ > > INTEL_SKL_ULX_GT2_IDS(info), \ > > INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \ > > - INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ > > INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \ > > + INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ > > INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ > > > > #define INTEL_SKL_ULT_GT3_IDS(info) \ > > @@ -372,9 +372,9 @@ > > > > #define INTEL_SKL_GT4_IDS(info) \ > > INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \ > > + INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \ > > INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \ > > - INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \ > > - INTEL_VGA_DEVICE(0x193A, info) /* SRV GT4e */ > > + INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */ > > > > #define INTEL_SKL_IDS(info) \ > > INTEL_SKL_GT1_IDS(info), \ > > -- > > 2.26.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-10-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL PCI IDs [not found] ` <20200716172106.2656-10-ville.syrjala@linux.intel.com> @ 2020-09-24 0:50 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:50 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL PCI IDs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Sort the KBL PCI IDs numerically. Some order seems better than > randomness. > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 5185ac789038..db409171d9c3 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -406,8 +406,8 @@ > INTEL_KBL_ULX_GT1_IDS(info), \ > INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \ > INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \ > - INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \ > - INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */ > + INTEL_VGA_DEVICE(0x590A, info), /* SRV GT1 */ \ > + INTEL_VGA_DEVICE(0x590B, info) /* Halo GT1 */ > > #define INTEL_KBL_ULT_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ @@ -419,10 > +419,10 @@ > #define INTEL_KBL_GT2_IDS(info) \ > INTEL_KBL_ULT_GT2_IDS(info), \ > INTEL_KBL_ULX_GT2_IDS(info), \ > - INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ > INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \ > - INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \ > + INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ > INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \ > + INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \ > INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */ > > #define INTEL_KBL_ULT_GT3_IDS(info) \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-11-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML PCI IDs [not found] ` <20200716172106.2656-11-ville.syrjala@linux.intel.com> @ 2020-09-24 0:53 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:53 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML PCI IDs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Sort the CML PCI IDs numerically. Some order seems better than > randomness. > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > db409171d9c3..2d36cbce0ac0 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -447,10 +447,10 @@ > > /* CML GT1 */ > #define INTEL_CML_GT1_IDS(info) \ > - INTEL_VGA_DEVICE(0x9BA5, info), \ > - INTEL_VGA_DEVICE(0x9BA8, info), \ > + INTEL_VGA_DEVICE(0x9BA2, info), \ > INTEL_VGA_DEVICE(0x9BA4, info), \ > - INTEL_VGA_DEVICE(0x9BA2, info) > + INTEL_VGA_DEVICE(0x9BA5, info), \ > + INTEL_VGA_DEVICE(0x9BA8, info) > > #define INTEL_CML_U_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x9B21, info), \ > @@ -459,11 +459,11 @@ > > /* CML GT2 */ > #define INTEL_CML_GT2_IDS(info) \ > - INTEL_VGA_DEVICE(0x9BC5, info), \ > - INTEL_VGA_DEVICE(0x9BC8, info), \ > - INTEL_VGA_DEVICE(0x9BC4, info), \ > INTEL_VGA_DEVICE(0x9BC2, info), \ > + INTEL_VGA_DEVICE(0x9BC4, info), \ > + INTEL_VGA_DEVICE(0x9BC5, info), \ > INTEL_VGA_DEVICE(0x9BC6, info), \ > + INTEL_VGA_DEVICE(0x9BC8, info), \ > INTEL_VGA_DEVICE(0x9BE6, info), \ > INTEL_VGA_DEVICE(0x9BF6, info) > > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-12-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL PCI IDs [not found] ` <20200716172106.2656-12-ville.syrjala@linux.intel.com> @ 2020-09-24 0:55 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:55 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL PCI IDs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Sort the CFL PCI IDs numerically. Some order seems better than > randomness. > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 2d36cbce0ac0..c48c2b76aa7d 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -497,8 +497,8 @@ > INTEL_VGA_DEVICE(0x3E9C, info) > > #define INTEL_CFL_H_GT2_IDS(info) \ > - INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \ > - INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */ > + INTEL_VGA_DEVICE(0x3E94, info), /* Halo GT2 */ \ > + INTEL_VGA_DEVICE(0x3E9B, info) /* Halo GT2 */ > > /* CFL U GT2 */ > #define INTEL_CFL_U_GT2_IDS(info) \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-13-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL PCI IDs [not found] ` <20200716172106.2656-13-ville.syrjala@linux.intel.com> @ 2020-09-24 0:59 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 0:59 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL PCI IDs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Sort the CNL PCI IDs numerically. Some order seems better than > randomness. > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 18 +++++++++--------- > 1 file changed, 9 insertions(+), 9 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > c48c2b76aa7d..33a72e6eadd8 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -543,23 +543,23 @@ > > /* CNL */ > #define INTEL_CNL_PORT_F_IDS(info) \ > - INTEL_VGA_DEVICE(0x5A54, info), \ > - INTEL_VGA_DEVICE(0x5A5C, info), \ > INTEL_VGA_DEVICE(0x5A44, info), \ > - INTEL_VGA_DEVICE(0x5A4C, info) > + INTEL_VGA_DEVICE(0x5A4C, info), \ > + INTEL_VGA_DEVICE(0x5A54, info), \ > + INTEL_VGA_DEVICE(0x5A5C, info) > > #define INTEL_CNL_IDS(info) \ > INTEL_CNL_PORT_F_IDS(info), \ > - INTEL_VGA_DEVICE(0x5A51, info), \ > - INTEL_VGA_DEVICE(0x5A59, info), \ > + INTEL_VGA_DEVICE(0x5A40, info), \ > INTEL_VGA_DEVICE(0x5A41, info), \ > - INTEL_VGA_DEVICE(0x5A49, info), \ > - INTEL_VGA_DEVICE(0x5A52, info), \ > - INTEL_VGA_DEVICE(0x5A5A, info), \ > INTEL_VGA_DEVICE(0x5A42, info), \ > + INTEL_VGA_DEVICE(0x5A49, info), \ > INTEL_VGA_DEVICE(0x5A4A, info), \ > INTEL_VGA_DEVICE(0x5A50, info), \ > - INTEL_VGA_DEVICE(0x5A40, info) > + INTEL_VGA_DEVICE(0x5A51, info), \ > + INTEL_VGA_DEVICE(0x5A52, info), \ > + INTEL_VGA_DEVICE(0x5A59, info), \ > + INTEL_VGA_DEVICE(0x5A5A, info) > > /* ICL */ > #define INTEL_ICL_PORT_F_IDS(info) \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-15-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL PCI IDs [not found] ` <20200716172106.2656-15-ville.syrjala@linux.intel.com> @ 2020-09-24 1:04 ` Srivatsa, Anusha 0 siblings, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 1:04 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL PCI IDs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Sort the EHL/JSL PCI IDs numerically. Some order seems better than > randomness. > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > include/drm/i915_pciids.h | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 45da1b45c01e..880ffe8571e8 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -585,16 +585,16 @@ > /* EHL/JSL */ > #define INTEL_EHL_IDS(info) \ > INTEL_VGA_DEVICE(0x4500, info), \ > - INTEL_VGA_DEVICE(0x4571, info), \ > - INTEL_VGA_DEVICE(0x4551, info), \ > INTEL_VGA_DEVICE(0x4541, info), \ > - INTEL_VGA_DEVICE(0x4E71, info), \ > - INTEL_VGA_DEVICE(0x4557, info), \ > + INTEL_VGA_DEVICE(0x4551, info), \ > INTEL_VGA_DEVICE(0x4555, info), \ > - INTEL_VGA_DEVICE(0x4E61, info), \ > - INTEL_VGA_DEVICE(0x4E57, info), \ > + INTEL_VGA_DEVICE(0x4557, info), \ > + INTEL_VGA_DEVICE(0x4571, info), \ > + INTEL_VGA_DEVICE(0x4E51, info), \ > INTEL_VGA_DEVICE(0x4E55, info), \ > - INTEL_VGA_DEVICE(0x4E51, info) > + INTEL_VGA_DEVICE(0x4E57, info), \ > + INTEL_VGA_DEVICE(0x4E61, info), \ > + INTEL_VGA_DEVICE(0x4E71, info) > > /* TGL */ > #define INTEL_TGL_12_IDS(info) \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
[parent not found: <20200716172106.2656-14-ville.syrjala@linux.intel.com>]
* Re: [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL PCI IDs [not found] ` <20200716172106.2656-14-ville.syrjala@linux.intel.com> @ 2020-09-24 1:01 ` Srivatsa, Anusha 2020-10-23 23:55 ` Lucas De Marchi 1 sibling, 0 replies; 17+ messages in thread From: Srivatsa, Anusha @ 2020-09-24 1:01 UTC (permalink / raw) To: Ville Syrjala, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL PCI IDs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Sort the ICL PCI IDs numerically. Some order seems better than randomness. > > Cc: Alexei Podtelezhnikov <apodtele@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivats@intel.com> > --- > include/drm/i915_pciids.h | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > 33a72e6eadd8..45da1b45c01e 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -564,18 +564,18 @@ > /* ICL */ > #define INTEL_ICL_PORT_F_IDS(info) \ > INTEL_VGA_DEVICE(0x8A50, info), \ > - INTEL_VGA_DEVICE(0x8A5C, info), \ > - INTEL_VGA_DEVICE(0x8A59, info), \ > - INTEL_VGA_DEVICE(0x8A58, info), \ > INTEL_VGA_DEVICE(0x8A52, info), \ > + INTEL_VGA_DEVICE(0x8A53, info), \ > + INTEL_VGA_DEVICE(0x8A54, info), \ > + INTEL_VGA_DEVICE(0x8A56, info), \ > + INTEL_VGA_DEVICE(0x8A57, info), \ > + INTEL_VGA_DEVICE(0x8A58, info), \ > + INTEL_VGA_DEVICE(0x8A59, info), \ > INTEL_VGA_DEVICE(0x8A5A, info), \ > INTEL_VGA_DEVICE(0x8A5B, info), \ > - INTEL_VGA_DEVICE(0x8A57, info), \ > - INTEL_VGA_DEVICE(0x8A56, info), \ > - INTEL_VGA_DEVICE(0x8A71, info), \ > + INTEL_VGA_DEVICE(0x8A5C, info), \ > INTEL_VGA_DEVICE(0x8A70, info), \ > - INTEL_VGA_DEVICE(0x8A53, info), \ > - INTEL_VGA_DEVICE(0x8A54, info) > + INTEL_VGA_DEVICE(0x8A71, info) > > #define INTEL_ICL_11_IDS(info) \ > INTEL_ICL_PORT_F_IDS(info), \ > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL PCI IDs [not found] ` <20200716172106.2656-14-ville.syrjala@linux.intel.com> 2020-09-24 1:01 ` [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL " Srivatsa, Anusha @ 2020-10-23 23:55 ` Lucas De Marchi 1 sibling, 0 replies; 17+ messages in thread From: Lucas De Marchi @ 2020-10-23 23:55 UTC (permalink / raw) To: Ville Syrjala; +Cc: intel-gfx On Thu, Jul 16, 2020 at 08:21:05PM +0300, Ville Syrjälä wrote: >From: Ville Syrjälä <ville.syrjala@linux.intel.com> > >Sort the ICL PCI IDs numerically. Some order seems better than >randomness. At one point there was actually logic in the order: it followed whatever order the spec had, so "updating the IDs" was basically rewriting those defines or quickly scan through the spec and what we had in the driver. Of course, that doesn't work so well, because a) the order may change in the spec and in fact it did; b) with the split between variants of the same platform it adds randomness to it; c) not everybody understands what order was supposed to be and just appends to the end So, I think a comment on top saying the PCI IDs should be lowercase and numerically sorted would be appropriate to avoid having to fix this again soon. Lucas De Marchi > >Cc: Alexei Podtelezhnikov <apodtele@gmail.com> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> >--- > include/drm/i915_pciids.h | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > >diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h >index 33a72e6eadd8..45da1b45c01e 100644 >--- a/include/drm/i915_pciids.h >+++ b/include/drm/i915_pciids.h >@@ -564,18 +564,18 @@ > /* ICL */ > #define INTEL_ICL_PORT_F_IDS(info) \ > INTEL_VGA_DEVICE(0x8A50, info), \ >- INTEL_VGA_DEVICE(0x8A5C, info), \ >- INTEL_VGA_DEVICE(0x8A59, info), \ >- INTEL_VGA_DEVICE(0x8A58, info), \ > INTEL_VGA_DEVICE(0x8A52, info), \ >+ INTEL_VGA_DEVICE(0x8A53, info), \ >+ INTEL_VGA_DEVICE(0x8A54, info), \ >+ INTEL_VGA_DEVICE(0x8A56, info), \ >+ INTEL_VGA_DEVICE(0x8A57, info), \ >+ INTEL_VGA_DEVICE(0x8A58, info), \ >+ INTEL_VGA_DEVICE(0x8A59, info), \ > INTEL_VGA_DEVICE(0x8A5A, info), \ > INTEL_VGA_DEVICE(0x8A5B, info), \ >- INTEL_VGA_DEVICE(0x8A57, info), \ >- INTEL_VGA_DEVICE(0x8A56, info), \ >- INTEL_VGA_DEVICE(0x8A71, info), \ >+ INTEL_VGA_DEVICE(0x8A5C, info), \ > INTEL_VGA_DEVICE(0x8A70, info), \ >- INTEL_VGA_DEVICE(0x8A53, info), \ >- INTEL_VGA_DEVICE(0x8A54, info) >+ INTEL_VGA_DEVICE(0x8A71, info) > > #define INTEL_ICL_11_IDS(info) \ > INTEL_ICL_PORT_F_IDS(info), \ >-- >2.26.2 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 17+ messages in thread
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[not found] ` <20200716172106.2656-2-ville.syrjala@linux.intel.com>
2020-09-23 23:46 ` [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs Srivatsa, Anusha
[not found] ` <20200716172106.2656-4-ville.syrjala@linux.intel.com>
2020-09-24 0:32 ` [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT Srivatsa, Anusha
[not found] ` <20200716172106.2656-5-ville.syrjala@linux.intel.com>
2020-09-24 0:37 ` [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs Srivatsa, Anusha
2020-09-24 10:46 ` Ville Syrjälä
2020-09-24 17:54 ` Srivatsa, Anusha
[not found] ` <20200716172106.2656-6-ville.syrjala@linux.intel.com>
2020-09-24 0:40 ` [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments Srivatsa, Anusha
[not found] ` <20200716172106.2656-7-ville.syrjala@linux.intel.com>
2020-09-24 0:42 ` [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers Srivatsa, Anusha
[not found] ` <20200716172106.2656-8-ville.syrjala@linux.intel.com>
2020-09-24 0:44 ` [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs Srivatsa, Anusha
[not found] ` <20200716172106.2656-9-ville.syrjala@linux.intel.com>
2020-09-24 0:49 ` [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL " Srivatsa, Anusha
2020-09-24 10:50 ` Ville Syrjälä
[not found] ` <20200716172106.2656-10-ville.syrjala@linux.intel.com>
2020-09-24 0:50 ` [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL " Srivatsa, Anusha
[not found] ` <20200716172106.2656-11-ville.syrjala@linux.intel.com>
2020-09-24 0:53 ` [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML " Srivatsa, Anusha
[not found] ` <20200716172106.2656-12-ville.syrjala@linux.intel.com>
2020-09-24 0:55 ` [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL " Srivatsa, Anusha
[not found] ` <20200716172106.2656-13-ville.syrjala@linux.intel.com>
2020-09-24 0:59 ` [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL " Srivatsa, Anusha
[not found] ` <20200716172106.2656-15-ville.syrjala@linux.intel.com>
2020-09-24 1:04 ` [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL " Srivatsa, Anusha
[not found] ` <20200716172106.2656-14-ville.syrjala@linux.intel.com>
2020-09-24 1:01 ` [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL " Srivatsa, Anusha
2020-10-23 23:55 ` Lucas De Marchi
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