* [PATCH] drm/i915: limit PM related interrupt enable to those we handle
@ 2011-08-09 16:29 Jesse Barnes
2011-08-09 17:02 ` Keith Packard
0 siblings, 1 reply; 4+ messages in thread
From: Jesse Barnes @ 2011-08-09 16:29 UTC (permalink / raw)
To: intel-gfx
Set both the PM core interrupt regs and the PM specific interrupt maks
to only allow interrupts we handle. This prevents spurious interrupts
and just makes more sense.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
drivers/gpu/drm/i915/intel_display.c | 12 ++++--------
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d1331f7..7caeb14 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3447,6 +3447,12 @@
#define GEN6_RC6p_THRESHOLD 0xA0BC
#define GEN6_RC6pp_THRESHOLD 0xA0C0
#define GEN6_PMINTRMSK 0xA168
+#define GEN6_PMINTR_RP_UP_THRESHOLD (1<<5)
+#define GEN6_PMINTR_RP_DOWN_THRESHOLD (1<<4)
+#define GEN6_PMINTR_RP_DOWN_EI_EXPIRED (1<<1)
+#define GEN6_PMINTR_DEFERRED_EVENTS (GEN6_PMINTR_RP_UP_THRESHOLD | \
+ GEN6_PMINTR_RP_DOWN_THRESHOLD | \
+ GEN6_PMINTR_RP_DOWN_EI_EXPIRED)
#define GEN6_PMISR 0x44020
#define GEN6_PMIMR 0x44024 /* rps_lock */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 35364e6..f98631a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7605,19 +7605,15 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
/* requires MSI enabled */
I915_WRITE(GEN6_PMIER,
- GEN6_PM_MBOX_EVENT |
- GEN6_PM_THERMAL_EVENT |
GEN6_PM_RP_DOWN_TIMEOUT |
GEN6_PM_RP_UP_THRESHOLD |
- GEN6_PM_RP_DOWN_THRESHOLD |
- GEN6_PM_RP_UP_EI_EXPIRED |
- GEN6_PM_RP_DOWN_EI_EXPIRED);
+ GEN6_PM_RP_DOWN_THRESHOLD);
spin_lock_irq(&dev_priv->rps_lock);
WARN_ON(dev_priv->pm_iir != 0);
- I915_WRITE(GEN6_PMIMR, 0);
+ I915_WRITE(GEN6_PMIMR, ~GEN6_PM_DEFERRED_EVENTS);
spin_unlock_irq(&dev_priv->rps_lock);
- /* enable all PM interrupts */
- I915_WRITE(GEN6_PMINTRMSK, 0);
+ /* Enable only those we respond to in the deferred work handler */
+ I915_WRITE(GEN6_PMINTRMSK, GEN6_PMINTR_DEFERRED_EVENTS);
gen6_gt_force_wake_put(dev_priv);
mutex_unlock(&dev_priv->dev->struct_mutex);
--
1.7.4.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: limit PM related interrupt enable to those we handle
2011-08-09 16:29 [PATCH] drm/i915: limit PM related interrupt enable to those we handle Jesse Barnes
@ 2011-08-09 17:02 ` Keith Packard
2011-08-09 17:11 ` Jesse Barnes
0 siblings, 1 reply; 4+ messages in thread
From: Keith Packard @ 2011-08-09 17:02 UTC (permalink / raw)
To: Jesse Barnes, intel-gfx
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On Tue, 9 Aug 2011 09:29:20 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> - I915_WRITE(GEN6_PMIMR, 0);
> + I915_WRITE(GEN6_PMIMR, ~GEN6_PM_DEFERRED_EVENTS);
> spin_unlock_irq(&dev_priv->rps_lock);
> - /* enable all PM interrupts */
> - I915_WRITE(GEN6_PMINTRMSK, 0);
> + /* Enable only those we respond to in the deferred work handler */
> + I915_WRITE(GEN6_PMINTRMSK, GEN6_PMINTR_DEFERRED_EVENTS);
I think this is supposed to only enable the DEFERRED_EVENTS, right? In
which case, I think you want to invert that (as 0 enables and 1 disables):
+ I915_WRITE(GEN6_PMINTRMSK, ~GEN6_PMINTR_DEFERRED_EVENTS);
just like you did for the PMIMR register?
--
keith.packard@intel.com
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: limit PM related interrupt enable to those we handle
2011-08-09 17:02 ` Keith Packard
@ 2011-08-09 17:11 ` Jesse Barnes
0 siblings, 0 replies; 4+ messages in thread
From: Jesse Barnes @ 2011-08-09 17:11 UTC (permalink / raw)
To: Keith Packard; +Cc: intel-gfx
On Tue, 09 Aug 2011 10:02:54 -0700
Keith Packard <keithp@keithp.com> wrote:
> On Tue, 9 Aug 2011 09:29:20 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>
> > - I915_WRITE(GEN6_PMIMR, 0);
> > + I915_WRITE(GEN6_PMIMR, ~GEN6_PM_DEFERRED_EVENTS);
> > spin_unlock_irq(&dev_priv->rps_lock);
> > - /* enable all PM interrupts */
> > - I915_WRITE(GEN6_PMINTRMSK, 0);
> > + /* Enable only those we respond to in the deferred work handler */
> > + I915_WRITE(GEN6_PMINTRMSK, GEN6_PMINTR_DEFERRED_EVENTS);
>
> I think this is supposed to only enable the DEFERRED_EVENTS, right? In
> which case, I think you want to invert that (as 0 enables and 1 disables):
>
> + I915_WRITE(GEN6_PMINTRMSK, ~GEN6_PMINTR_DEFERRED_EVENTS);
>
> just like you did for the PMIMR register?
Yeah it went from 0 to just a few bits, but it should have been the ~
of that, you're right. Will fix & test and resend.
--
Jesse Barnes, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] drm/i915: limit PM related interrupt enable to those we handle
@ 2011-08-11 20:24 Jesse Barnes
0 siblings, 0 replies; 4+ messages in thread
From: Jesse Barnes @ 2011-08-11 20:24 UTC (permalink / raw)
To: intel-gfx
Set both the PM core interrupt regs and the PM specific interrupt maks
to only allow interrupts we handle. This prevents spurious interrupts
and just makes more sense.
v2: use a mask for the mask reg
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
drivers/gpu/drm/i915/intel_display.c | 12 ++++--------
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5baaef4..7033e01 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3442,6 +3442,12 @@
#define GEN6_RC6p_THRESHOLD 0xA0BC
#define GEN6_RC6pp_THRESHOLD 0xA0C0
#define GEN6_PMINTRMSK 0xA168
+#define GEN6_PMINTR_RP_UP_THRESHOLD (1<<5)
+#define GEN6_PMINTR_RP_DOWN_THRESHOLD (1<<4)
+#define GEN6_PMINTR_RP_DOWN_EI_EXPIRED (1<<1)
+#define GEN6_PMINTR_DEFERRED_EVENTS (GEN6_PMINTR_RP_UP_THRESHOLD | \
+ GEN6_PMINTR_RP_DOWN_THRESHOLD | \
+ GEN6_PMINTR_RP_DOWN_EI_EXPIRED)
#define GEN6_PMISR 0x44020
#define GEN6_PMIMR 0x44024 /* rps_lock */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f6f18c7..00f04b7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7653,19 +7653,15 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
/* requires MSI enabled */
I915_WRITE(GEN6_PMIER,
- GEN6_PM_MBOX_EVENT |
- GEN6_PM_THERMAL_EVENT |
GEN6_PM_RP_DOWN_TIMEOUT |
GEN6_PM_RP_UP_THRESHOLD |
- GEN6_PM_RP_DOWN_THRESHOLD |
- GEN6_PM_RP_UP_EI_EXPIRED |
- GEN6_PM_RP_DOWN_EI_EXPIRED);
+ GEN6_PM_RP_DOWN_THRESHOLD);
spin_lock_irq(&dev_priv->rps_lock);
WARN_ON(dev_priv->pm_iir != 0);
- I915_WRITE(GEN6_PMIMR, 0);
+ I915_WRITE(GEN6_PMIMR, ~GEN6_PM_DEFERRED_EVENTS);
spin_unlock_irq(&dev_priv->rps_lock);
- /* enable all PM interrupts */
- I915_WRITE(GEN6_PMINTRMSK, 0);
+ /* Enable only those we respond to in the deferred work handler */
+ I915_WRITE(GEN6_PMINTRMSK, ~GEN6_PMINTR_DEFERRED_EVENTS);
gen6_gt_force_wake_put(dev_priv);
mutex_unlock(&dev_priv->dev->struct_mutex);
--
1.7.4.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
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2011-08-09 16:29 [PATCH] drm/i915: limit PM related interrupt enable to those we handle Jesse Barnes
2011-08-09 17:02 ` Keith Packard
2011-08-09 17:11 ` Jesse Barnes
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