[PATCH 0/7] Prepare GVT for display modularization

[PATCH 0/7] Prepare GVT for display modularization

[Ankit Nautiyal]

GVT currently relies on display internals through register macros and
helpers like for_each_pipe(). This tight coupling makes modularization
difficult because GVT should not access struct intel_display directly.
Add an API for GVT code to expose DISPLAY_RUNTIME_INFO()->pipe_mask.
This series introduces changes to make GVT independent of display internals
while keeping existing macros usable:

- Abstract offset calculations in display using
  INTEL_DISPLAY_DEVICE_*_OFFSET() macros.
- Add APIs for GVT to compute offsets and pipe mask via functions.
- Update GVT to use these APIs by overriding helper macros and
  for_each_pipe().

Rev2:
- Remove conflicting headers and get rid of #ifdefs/#undefs in last
  patch.
- Wrap macro arguments in paranthesis.
- Rename for_each_pipe to gvt_for_each_pipe.

PS: I have not yet addressed the question about whether we need to start
    using _MMIO_TRANS2() instead of_MMIO_PIPE2() in TRANSCONF() macro.
    That likely needs a separate patch and discussion.
    For now, I have kept the patch#4 to deal with the
    -Werror=enum-conversion:
     - drm/i915/gvt/display_helpers: Cast argument to enum pipe for
       pipe-offset macro

Ankit Nautiyal (7):
  drm/i915/display: Abstract pipe/trans/cursor offset calculation
  drm/i915/display: Add APIs to be used by gvt to get the register
    offsets
  drm/i915/gvt: Add header to use display offset functions in macros
  drm/i915/gvt/display_helpers: Cast argument to enum pipe for
    pipe-offset macro
  drm/i915/gvt: Change for_each_pipe to use pipe_valid API
  drm/i915/gvt: Use the appropriate header for the DPLL macro
  drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs

 drivers/gpu/drm/i915/Makefile                 |  1 +
 .../drm/i915/display/intel_display_device.h   | 17 +++++++
 .../drm/i915/display/intel_display_limits.c   |  0
 .../drm/i915/display/intel_display_reg_defs.h | 15 ++-----
 drivers/gpu/drm/i915/display/intel_gvt_api.c  | 45 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_gvt_api.h  | 21 +++++++++
 drivers/gpu/drm/i915/gvt/cmd_parser.c         |  2 +-
 drivers/gpu/drm/i915/gvt/display.c            |  9 ++--
 drivers/gpu/drm/i915/gvt/display_helpers.h    | 27 +++++++++++
 drivers/gpu/drm/i915/gvt/fb_decoder.c         |  2 +-
 drivers/gpu/drm/i915/gvt/handlers.c           |  2 +-
 11 files changed, 123 insertions(+), 18 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
 create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h

-- 
2.45.2

[PATCH 1/7] drm/i915/display: Abstract pipe/trans/cursor offset calculation

[Ankit Nautiyal]

Introduce INTEL_DISPLAY_DEVICE_*_OFFSET() macros to compute absolute
MMIO offsets for pipe, transcoder, and cursor registers.

Update _MMIO_PIPE2/_MMIO_TRANS2/_MMIO_CURSOR2 to use these macros
for cleaner abstraction and to prepare for external API usage (e.g. GVT).

Also move DISPLAY_MMIO_BASE() to intel_display_device.h so it can be
abstracted in GVT, allowing register macros to resolve via
exported helpers rather than peeking into struct intel_display.

v2: Wrap the macro argument usages in parenthesis. (Jani)

Suggested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_device.h | 17 +++++++++++++++++
 .../drm/i915/display/intel_display_reg_defs.h   | 15 ++++-----------
 2 files changed, 21 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 50b2e9ae2c18..13b6616bc496 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -260,6 +260,23 @@ struct intel_display_platforms {
 	 ((id) == ARLS_HOST_BRIDGE_PCI_ID3) || \
 	 ((id) == ARLS_HOST_BRIDGE_PCI_ID4))
 
+#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
+	(DISPLAY_INFO((display))->pipe_offsets[(pipe)] - \
+	 DISPLAY_INFO((display))->pipe_offsets[PIPE_A] + \
+	 DISPLAY_MMIO_BASE((display)))
+
+#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
+	(DISPLAY_INFO((display))->trans_offsets[(trans)] - \
+	 DISPLAY_INFO((display))->trans_offsets[TRANSCODER_A] + \
+	 DISPLAY_MMIO_BASE((display)))
+
+#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
+	(DISPLAY_INFO((display))->cursor_offsets[(pipe)] - \
+	 DISPLAY_INFO((display))->cursor_offsets[PIPE_A] + \
+	 DISPLAY_MMIO_BASE((display)))
+
+#define DISPLAY_MMIO_BASE(display)	(DISPLAY_INFO((display))->mmio_offset)
+
 struct intel_display_runtime_info {
 	struct intel_display_ip_ver {
 		u16 ver;
diff --git a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
index b83ad06f2ea7..175334b41bba 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
@@ -8,8 +8,6 @@
 
 #include "i915_reg_defs.h"
 
-#define DISPLAY_MMIO_BASE(dev_priv)	(DISPLAY_INFO(dev_priv)->mmio_offset)
-
 #define VLV_DISPLAY_BASE		0x180000
 
 /*
@@ -36,14 +34,9 @@
  * Device info offset array based helpers for groups of registers with unevenly
  * spaced base offsets.
  */
-#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \
-						      DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \
-						      DISPLAY_MMIO_BASE(display) + (reg))
-#define _MMIO_TRANS2(display, tran, reg)	_MMIO(DISPLAY_INFO(display)->trans_offsets[(tran)] - \
-						      DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \
-						      DISPLAY_MMIO_BASE(display) + (reg))
-#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \
-						      DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \
-						      DISPLAY_MMIO_BASE(display) + (reg))
+
+#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(INTEL_DISPLAY_DEVICE_PIPE_OFFSET((display), (pipe)) + (reg))
+#define _MMIO_TRANS2(display, trans, reg)	_MMIO(INTEL_DISPLAY_DEVICE_TRANS_OFFSET((display), (trans)) + (reg))
+#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(INTEL_DISPLAY_DEVICE_CURSOR_OFFSET((display), (pipe)) + (reg))
 
 #endif /* __INTEL_DISPLAY_REG_DEFS_H__ */
-- 
2.45.2

[PATCH 2/7] drm/i915/display: Add APIs to be used by gvt to get the register offsets

[Ankit Nautiyal]

GVT code uses macros for register offsets that require display internal
structures. This makes clean separation of display code and
modularization difficult.

Introduce APIs to abstract offset calculations:
- intel_display_device_pipe_offset()
- intel_display_device_trans_offset()
- intel_display_device_cursor_offset()
- intel_display_device_mmio_base()

These APIs return absolute base offsets for the respective register
groups, allowing GVT to compute MMIO addresses without using internal
macros or struct fields. This prepares the path to separate
display-dependent code from i915/gvt/*.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile                 |  1 +
 .../drm/i915/display/intel_display_limits.c   |  0
 drivers/gpu/drm/i915/display/intel_gvt_api.c  | 34 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_gvt_api.h  | 20 +++++++++++
 4 files changed, 55 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f01b5d8a07c7..7974f017f263 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -360,6 +360,7 @@ i915-y += \
 	display/intel_dvo.o \
 	display/intel_encoder.o \
 	display/intel_gmbus.o \
+	display/intel_gvt_api.o \
 	display/intel_hdmi.o \
 	display/intel_lspcon.o \
 	display/intel_lt_phy.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.c b/drivers/gpu/drm/i915/display/intel_display_limits.c
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
new file mode 100644
index 000000000000..8abea318fbc2
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/types.h>
+
+#include "intel_display_core.h"
+#include "intel_display_regs.h"
+#include "intel_gvt_api.h"
+
+u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe)
+{
+	return INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe);
+}
+EXPORT_SYMBOL_GPL(intel_display_device_pipe_offset);
+
+u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans)
+{
+	return INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans);
+}
+EXPORT_SYMBOL_GPL(intel_display_device_trans_offset);
+
+u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe)
+{
+	return INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe);
+}
+EXPORT_SYMBOL_GPL(intel_display_device_cursor_offset);
+
+u32 intel_display_device_mmio_base(struct intel_display *display)
+{
+	return DISPLAY_MMIO_BASE(display);
+}
+EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
new file mode 100644
index 000000000000..e9a1122a988d
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef __INTEL_GVT_API_H__
+#define __INTEL_GVT_API_H__
+
+#include <linux/types.h>
+
+enum pipe;
+enum transcoder;
+struct intel_display;
+
+u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe);
+u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
+u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
+u32 intel_display_device_mmio_base(struct intel_display *display);
+
+#endif /* __INTEL_GVT_API_H__ */
-- 
2.45.2

[PATCH 3/7] drm/i915/gvt: Add header to use display offset functions in macros

[Ankit Nautiyal]

Introduce gvt/display_helpers.h to make DISPLAY_MMIO_BASE and
INTEL_DISPLAY_DEVICE_*_OFFSET macros call exported display functions.
This lets GVT keep using existing register macros (e.g.,
TRANSCONF(display, pipe)) while ensuring offset calculations happen
through functions instead of accessing display internals.

Ideally, we would remove the display headers that define these macros,
but some macros in GVT still depend on them and have not yet been
ported. Keeping those headers leads to build conflicts, so as a
stopgap, we use temporary ifdef/undef blocks to override the macros
with API-backed versions. These will be removed once all dependent
macros are ported and the conflicting headers can be safely dropped.

v2:
 - Remove prefix `gvt/` while including the header file. (Jani)
 - Explain the rationale behind temporary ifdef/undefs and plan to drop
   them. (Jani).

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/gvt/cmd_parser.c      |  1 +
 drivers/gpu/drm/i915/gvt/display.c         |  1 +
 drivers/gpu/drm/i915/gvt/display_helpers.h | 35 ++++++++++++++++++++++
 drivers/gpu/drm/i915/gvt/fb_decoder.c      |  1 +
 drivers/gpu/drm/i915/gvt/handlers.c        |  1 +
 5 files changed, 39 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h

diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index df04e4ead8ea..fbc8a5e28576 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -58,6 +58,7 @@
 #include "gem/i915_gem_context.h"
 #include "gem/i915_gem_pm.h"
 #include "gt/intel_context.h"
+#include "display_helpers.h"
 
 #define INVALID_OP    (~0U)
 
diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index 06517d1f07a2..9d6b22b2e4d0 100644
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -46,6 +46,7 @@
 #include "display/intel_cursor_regs.h"
 #include "display/intel_display.h"
 #include "display/intel_display_core.h"
+#include "display_helpers.h"
 #include "display/intel_dpio_phy.h"
 #include "display/intel_sprite_regs.h"
 
diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
new file mode 100644
index 000000000000..97ebc92768fc
--- /dev/null
+++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef __DISPLAY_HELPERS_H__
+#define __DISPLAY_HELPERS_H__
+
+#include "display/intel_gvt_api.h"
+
+#ifdef DISPLAY_MMIO_BASE
+#undef DISPLAY_MMIO_BASE
+#endif
+#define DISPLAY_MMIO_BASE(display) \
+	intel_display_device_mmio_base((display))
+
+#ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
+#undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
+#endif
+#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
+	intel_display_device_pipe_offset((display), (pipe))
+
+#ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
+#undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
+#endif
+#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
+	intel_display_device_trans_offset((display), (trans))
+
+#ifdef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
+#undef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
+#endif
+#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
+	intel_display_device_cursor_offset((display), (pipe))
+
+#endif /* __DISPLAY_HELPERS_H__ */
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index a8079cfa8e1d..c402f3b5a0ab 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -46,6 +46,7 @@
 #include "display/intel_display_core.h"
 #include "display/intel_sprite_regs.h"
 #include "display/skl_universal_plane_regs.h"
+#include "display_helpers.h"
 
 #define PRIMARY_FORMAT_NUM	16
 struct pixel_format {
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 36ea12ade849..9ada97d01b6c 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -66,6 +66,7 @@
 #include "display/vlv_dsi_pll_regs.h"
 #include "gt/intel_gt_regs.h"
 #include <linux/vmalloc.h>
+#include "display_helpers.h"
 
 /* XXX FIXME i915 has changed PP_XXX definition */
 #define PCH_PP_STATUS  _MMIO(0xc7200)
-- 
2.45.2

[PATCH 4/7] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro

[Ankit Nautiyal]

TRANSCONF() expands via _MMIO_PIPE2, i.e., it uses pipe-based addressing.
In GVT, some call sites pass an enum transcoder to TRANSCONF(), which now
routes through INTEL_DISPLAY_DEVICE_PIPE_OFFSET() and ultimately calls
intel_display_device_pipe_offset(), whose parameter type is enum pipe.

This results in -Werror=enum-conversion.

To address this, cast the index to enum pipe in the GVT-side macro
override.

This works for all cases as TRANSCODER_{A,B,C,D} all have 1:1 mapping to
PIPE_{A,B,C,D} except for TRANSCODER_EDP.

There is one place which uses TRANSCONF() with TRANSCODER_EDP, which
appears to be incorrect. In any case, the cast preserves the previous
behaviour.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/gvt/display_helpers.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
index 97ebc92768fc..3af878e3d78e 100644
--- a/drivers/gpu/drm/i915/gvt/display_helpers.h
+++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
@@ -17,8 +17,8 @@
 #ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
 #undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
 #endif
-#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
-	intel_display_device_pipe_offset((display), (pipe))
+#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
+	intel_display_device_pipe_offset((display), (enum pipe)(idx))
 
 #ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
 #undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
-- 
2.45.2

[PATCH 5/7] drm/i915/gvt: Change for_each_pipe to use pipe_valid API

[Ankit Nautiyal]

Add a new API to check if a given pipe is valid using
DISPLAY_RUNTIME_INFO() for GVT.

Update GVT to use this API instead of accessing
`DISPLAY_RUNTIME_INFO->pipe_mask` directly in the `for_each_pipe` macro.

Since `for_each_pipe` is defined in i915/display/intel_display.h, which
also contains other macros used by gvt/display.c, we cannot drop the
intel_display.h header yet. This causes a build error because
`for_each_pipe` is included from both i915/display/intel_display.h and
gvt/display_helpers.h.

To resolve this, rename the GVT macro to `gvt_for_each_pipe` and make it
call the new API. This avoids exposing display internals and prepares for
display modularization.

v2:
 - Expose API to check if pipe is valid rather than the runtime info
   pipe mask. (Jani)
 - Rename the macro to `gvt_for_each_pipe` to resolve build error.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_gvt_api.c | 11 +++++++++++
 drivers/gpu/drm/i915/display/intel_gvt_api.h |  1 +
 drivers/gpu/drm/i915/gvt/display.c           |  6 +++---
 drivers/gpu/drm/i915/gvt/display_helpers.h   |  4 ++++
 4 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
index 8abea318fbc2..45f12f239a2d 100644
--- a/drivers/gpu/drm/i915/display/intel_gvt_api.c
+++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
@@ -32,3 +32,14 @@ u32 intel_display_device_mmio_base(struct intel_display *display)
 	return DISPLAY_MMIO_BASE(display);
 }
 EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
+
+bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe)
+{
+	u8 pipe_mask = DISPLAY_RUNTIME_INFO(display)->pipe_mask;
+
+	if (pipe < PIPE_A || pipe >= I915_MAX_PIPES)
+		return false;
+
+	return !!(pipe_mask & BIT(pipe));
+}
+EXPORT_SYMBOL_GPL(intel_display_device_pipe_valid);
diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
index e9a1122a988d..a53687f7d934 100644
--- a/drivers/gpu/drm/i915/display/intel_gvt_api.h
+++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
@@ -16,5 +16,6 @@ u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pi
 u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
 u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
 u32 intel_display_device_mmio_base(struct intel_display *display);
+bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe);
 
 #endif /* __INTEL_GVT_API_H__ */
diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index 9d6b22b2e4d0..11855c71e05e 100644
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -200,7 +200,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
 			  GEN8_DE_PORT_HOTPLUG(HPD_PORT_B) |
 			  GEN8_DE_PORT_HOTPLUG(HPD_PORT_C));
 
-		for_each_pipe(display, pipe) {
+		gvt_for_each_pipe(display, pipe) {
 			vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &=
 				~(TRANSCONF_ENABLE | TRANSCONF_STATE_ENABLE);
 			vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
@@ -516,7 +516,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
 		vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
 
 	/* Disable Primary/Sprite/Cursor plane */
-	for_each_pipe(display, pipe) {
+	gvt_for_each_pipe(display, pipe) {
 		vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
 		vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
 		vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) &= ~MCURSOR_MODE_MASK;
@@ -672,7 +672,7 @@ void intel_vgpu_emulate_vblank(struct intel_vgpu *vgpu)
 	int pipe;
 
 	mutex_lock(&vgpu->vgpu_lock);
-	for_each_pipe(display, pipe)
+	gvt_for_each_pipe(display, pipe)
 		emulate_vblank_on_pipe(vgpu, pipe);
 	mutex_unlock(&vgpu->vgpu_lock);
 }
diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
index 3af878e3d78e..a910f8b8833d 100644
--- a/drivers/gpu/drm/i915/gvt/display_helpers.h
+++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
@@ -32,4 +32,8 @@
 #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
 	intel_display_device_cursor_offset((display), (pipe))
 
+#define gvt_for_each_pipe(display, __p) \
+	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
+		for_each_if(intel_display_device_pipe_valid((display), (enum pipe)(__p)))
+
 #endif /* __DISPLAY_HELPERS_H__ */
-- 
2.45.2

[PATCH 6/7] drm/i915/gvt: Use the appropriate header for the DPLL macro

[Ankit Nautiyal]

The macro `DPLL_ID_SKL_DPLL0` is defined in
display/intel_dpll_mgr.h. Previously, GVT included the header
display/intel_display_core.h` because other macros also depended on it.
After porting those macros to use the new APIs, the only remaining
dependency was for the DPLL macro.

Replace the indirect include with the correct header and drop
intel_display_core.h to reduce unnecessary dependencies.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/gvt/display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index 11855c71e05e..6e034ab15d44 100644
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -45,9 +45,9 @@
 #include "display/intel_crt_regs.h"
 #include "display/intel_cursor_regs.h"
 #include "display/intel_display.h"
-#include "display/intel_display_core.h"
 #include "display_helpers.h"
 #include "display/intel_dpio_phy.h"
+#include "display/intel_dpll_mgr.h"
 #include "display/intel_sprite_regs.h"
 
 static int get_edp_pipe(struct intel_vgpu *vgpu)
-- 
2.45.2

[PATCH 7/7] drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs

[Ankit Nautiyal]

Now that i915/display macros have been substituted with wrappers that call
the new display-device helpers, we can drop the conflicting includes from
GVT and remove the temporary #ifdef/#undef macro overrides.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/gvt/cmd_parser.c      |  1 -
 drivers/gpu/drm/i915/gvt/display_helpers.h | 12 ------------
 drivers/gpu/drm/i915/gvt/fb_decoder.c      |  1 -
 drivers/gpu/drm/i915/gvt/handlers.c        |  1 -
 4 files changed, 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index fbc8a5e28576..e5301733f4e4 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -53,7 +53,6 @@
 #include "trace.h"
 
 #include "display/i9xx_plane_regs.h"
-#include "display/intel_display_core.h"
 #include "display/intel_sprite_regs.h"
 #include "gem/i915_gem_context.h"
 #include "gem/i915_gem_pm.h"
diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
index a910f8b8833d..f365e02a71fb 100644
--- a/drivers/gpu/drm/i915/gvt/display_helpers.h
+++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
@@ -8,27 +8,15 @@
 
 #include "display/intel_gvt_api.h"
 
-#ifdef DISPLAY_MMIO_BASE
-#undef DISPLAY_MMIO_BASE
-#endif
 #define DISPLAY_MMIO_BASE(display) \
 	intel_display_device_mmio_base((display))
 
-#ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
-#undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
-#endif
 #define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
 	intel_display_device_pipe_offset((display), (enum pipe)(idx))
 
-#ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
-#undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
-#endif
 #define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
 	intel_display_device_trans_offset((display), (trans))
 
-#ifdef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
-#undef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
-#endif
 #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
 	intel_display_device_cursor_offset((display), (pipe))
 
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index c402f3b5a0ab..3d1a7e5c8cd3 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -43,7 +43,6 @@
 
 #include "display/i9xx_plane_regs.h"
 #include "display/intel_cursor_regs.h"
-#include "display/intel_display_core.h"
 #include "display/intel_sprite_regs.h"
 #include "display/skl_universal_plane_regs.h"
 #include "display_helpers.h"
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 9ada97d01b6c..7063d3c77562 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -49,7 +49,6 @@
 #include "display/i9xx_plane_regs.h"
 #include "display/intel_crt_regs.h"
 #include "display/intel_cursor_regs.h"
-#include "display/intel_display_core.h"
 #include "display/intel_display_types.h"
 #include "display/intel_dmc_regs.h"
 #include "display/intel_dp_aux_regs.h"
-- 
2.45.2

✗ CI.checkpatch: warning for Prepare GVT for display modularization (rev2)

[Patchwork]

== Series Details ==

Series: Prepare GVT for display modularization (rev2)
URL   : https://patchwork.freedesktop.org/series/159008/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
5f54f403acc61a45ad2b4d68dfd74b336dce1968
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d384f744d1933b6ecba013d9753d890ba94d3149
Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Date:   Thu Dec 18 13:53:00 2025 +0530

    drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs
    
    Now that i915/display macros have been substituted with wrappers that call
    the new display-device helpers, we can drop the conflicting includes from
    GVT and remove the temporary #ifdef/#undef macro overrides.
    
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
+ /mt/dim checkpatch 44ada578e636e19936ed69ea73683ca275f4f0a7 drm-intel
a47014299652 drm/i915/display: Abstract pipe/trans/cursor offset calculation
-:31: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#31: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:263:
+#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
+	(DISPLAY_INFO((display))->pipe_offsets[(pipe)] - \
+	 DISPLAY_INFO((display))->pipe_offsets[PIPE_A] + \
+	 DISPLAY_MMIO_BASE((display)))

-:36: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#36: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:268:
+#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
+	(DISPLAY_INFO((display))->trans_offsets[(trans)] - \
+	 DISPLAY_INFO((display))->trans_offsets[TRANSCODER_A] + \
+	 DISPLAY_MMIO_BASE((display)))

-:41: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#41: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:273:
+#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
+	(DISPLAY_INFO((display))->cursor_offsets[(pipe)] - \
+	 DISPLAY_INFO((display))->cursor_offsets[PIPE_A] + \
+	 DISPLAY_MMIO_BASE((display)))

-:78: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#78: FILE: drivers/gpu/drm/i915/display/intel_display_reg_defs.h:38:
+#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(INTEL_DISPLAY_DEVICE_PIPE_OFFSET((display), (pipe)) + (reg))

-:79: WARNING:LONG_LINE: line length of 116 exceeds 100 columns
#79: FILE: drivers/gpu/drm/i915/display/intel_display_reg_defs.h:39:
+#define _MMIO_TRANS2(display, trans, reg)	_MMIO(INTEL_DISPLAY_DEVICE_TRANS_OFFSET((display), (trans)) + (reg))

-:80: WARNING:LONG_LINE: line length of 116 exceeds 100 columns
#80: FILE: drivers/gpu/drm/i915/display/intel_display_reg_defs.h:40:
+#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(INTEL_DISPLAY_DEVICE_CURSOR_OFFSET((display), (pipe)) + (reg))

total: 0 errors, 3 warnings, 3 checks, 49 lines checked
718248dd57ec drm/i915/display: Add APIs to be used by gvt to get the register offsets
-:38: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

-:86: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/i915/display/intel_gvt_api.h', please use '/*' instead
#86: FILE: drivers/gpu/drm/i915/display/intel_gvt_api.h:1:
+// SPDX-License-Identifier: MIT

-:86: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#86: FILE: drivers/gpu/drm/i915/display/intel_gvt_api.h:1:
+// SPDX-License-Identifier: MIT

total: 0 errors, 3 warnings, 0 checks, 61 lines checked
0e1ba9e25180 drm/i915/gvt: Add header to use display offset functions in macros
-:52: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#52: 
new file mode 100644

-:57: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/i915/gvt/display_helpers.h', please use '/*' instead
#57: FILE: drivers/gpu/drm/i915/gvt/display_helpers.h:1:
+// SPDX-License-Identifier: MIT

-:57: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#57: FILE: drivers/gpu/drm/i915/gvt/display_helpers.h:1:
+// SPDX-License-Identifier: MIT

total: 0 errors, 3 warnings, 0 checks, 63 lines checked
100526a3b4cf drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro
a4b8b9d17335 drm/i915/gvt: Change for_each_pipe to use pipe_valid API
-:98: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__p' - possible side-effects?
#98: FILE: drivers/gpu/drm/i915/gvt/display_helpers.h:35:
+#define gvt_for_each_pipe(display, __p) \
+	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
+		for_each_if(intel_display_device_pipe_valid((display), (enum pipe)(__p)))

total: 0 errors, 0 warnings, 1 checks, 52 lines checked
37f90e8f8c46 drm/i915/gvt: Use the appropriate header for the DPLL macro
d384f744d193 drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs

✓ CI.KUnit: success for Prepare GVT for display modularization (rev2)

[Patchwork]

== Series Details ==

Series: Prepare GVT for display modularization (rev2)
URL   : https://patchwork.freedesktop.org/series/159008/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:43:35] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:43:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:44:11] Starting KUnit Kernel (1/1)...
[08:44:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:44:11] ================== guc_buf (11 subtests) ===================
[08:44:11] [PASSED] test_smallest
[08:44:11] [PASSED] test_largest
[08:44:11] [PASSED] test_granular
[08:44:11] [PASSED] test_unique
[08:44:11] [PASSED] test_overlap
[08:44:11] [PASSED] test_reusable
[08:44:11] [PASSED] test_too_big
[08:44:11] [PASSED] test_flush
[08:44:11] [PASSED] test_lookup
[08:44:11] [PASSED] test_data
[08:44:11] [PASSED] test_class
[08:44:11] ===================== [PASSED] guc_buf =====================
[08:44:11] =================== guc_dbm (7 subtests) ===================
[08:44:11] [PASSED] test_empty
[08:44:11] [PASSED] test_default
[08:44:11] ======================== test_size  ========================
[08:44:11] [PASSED] 4
[08:44:11] [PASSED] 8
[08:44:11] [PASSED] 32
[08:44:11] [PASSED] 256
[08:44:11] ==================== [PASSED] test_size ====================
[08:44:11] ======================= test_reuse  ========================
[08:44:11] [PASSED] 4
[08:44:11] [PASSED] 8
[08:44:11] [PASSED] 32
[08:44:11] [PASSED] 256
[08:44:11] =================== [PASSED] test_reuse ====================
[08:44:11] =================== test_range_overlap  ====================
[08:44:11] [PASSED] 4
[08:44:11] [PASSED] 8
[08:44:11] [PASSED] 32
[08:44:11] [PASSED] 256
[08:44:11] =============== [PASSED] test_range_overlap ================
[08:44:11] =================== test_range_compact  ====================
[08:44:11] [PASSED] 4
[08:44:11] [PASSED] 8
[08:44:11] [PASSED] 32
[08:44:11] [PASSED] 256
[08:44:11] =============== [PASSED] test_range_compact ================
[08:44:11] ==================== test_range_spare  =====================
[08:44:11] [PASSED] 4
[08:44:11] [PASSED] 8
[08:44:11] [PASSED] 32
[08:44:11] [PASSED] 256
[08:44:11] ================ [PASSED] test_range_spare =================
[08:44:11] ===================== [PASSED] guc_dbm =====================
[08:44:11] =================== guc_idm (6 subtests) ===================
[08:44:11] [PASSED] bad_init
[08:44:11] [PASSED] no_init
[08:44:11] [PASSED] init_fini
[08:44:11] [PASSED] check_used
[08:44:11] [PASSED] check_quota
[08:44:11] [PASSED] check_all
[08:44:11] ===================== [PASSED] guc_idm =====================
[08:44:11] ================== no_relay (3 subtests) ===================
[08:44:11] [PASSED] xe_drops_guc2pf_if_not_ready
[08:44:11] [PASSED] xe_drops_guc2vf_if_not_ready
[08:44:11] [PASSED] xe_rejects_send_if_not_ready
[08:44:11] ==================== [PASSED] no_relay =====================
[08:44:11] ================== pf_relay (14 subtests) ==================
[08:44:11] [PASSED] pf_rejects_guc2pf_too_short
[08:44:11] [PASSED] pf_rejects_guc2pf_too_long
[08:44:11] [PASSED] pf_rejects_guc2pf_no_payload
[08:44:11] [PASSED] pf_fails_no_payload
[08:44:11] [PASSED] pf_fails_bad_origin
[08:44:11] [PASSED] pf_fails_bad_type
[08:44:11] [PASSED] pf_txn_reports_error
[08:44:11] [PASSED] pf_txn_sends_pf2guc
[08:44:11] [PASSED] pf_sends_pf2guc
[08:44:11] [SKIPPED] pf_loopback_nop
[08:44:11] [SKIPPED] pf_loopback_echo
[08:44:11] [SKIPPED] pf_loopback_fail
[08:44:11] [SKIPPED] pf_loopback_busy
[08:44:11] [SKIPPED] pf_loopback_retry
[08:44:11] ==================== [PASSED] pf_relay =====================
[08:44:11] ================== vf_relay (3 subtests) ===================
[08:44:11] [PASSED] vf_rejects_guc2vf_too_short
[08:44:11] [PASSED] vf_rejects_guc2vf_too_long
[08:44:11] [PASSED] vf_rejects_guc2vf_no_payload
[08:44:11] ==================== [PASSED] vf_relay =====================
[08:44:11] ================ pf_gt_config (6 subtests) =================
[08:44:11] [PASSED] fair_contexts_1vf
[08:44:11] [PASSED] fair_doorbells_1vf
[08:44:11] [PASSED] fair_ggtt_1vf
[08:44:11] ====================== fair_contexts  ======================
[08:44:11] [PASSED] 1 VF
[08:44:11] [PASSED] 2 VFs
[08:44:11] [PASSED] 3 VFs
[08:44:11] [PASSED] 4 VFs
[08:44:11] [PASSED] 5 VFs
[08:44:11] [PASSED] 6 VFs
[08:44:11] [PASSED] 7 VFs
[08:44:11] [PASSED] 8 VFs
[08:44:11] [PASSED] 9 VFs
[08:44:11] [PASSED] 10 VFs
[08:44:11] [PASSED] 11 VFs
[08:44:11] [PASSED] 12 VFs
[08:44:11] [PASSED] 13 VFs
[08:44:11] [PASSED] 14 VFs
[08:44:11] [PASSED] 15 VFs
[08:44:11] [PASSED] 16 VFs
[08:44:11] [PASSED] 17 VFs
[08:44:11] [PASSED] 18 VFs
[08:44:11] [PASSED] 19 VFs
[08:44:11] [PASSED] 20 VFs
[08:44:11] [PASSED] 21 VFs
[08:44:11] [PASSED] 22 VFs
[08:44:11] [PASSED] 23 VFs
[08:44:11] [PASSED] 24 VFs
[08:44:11] [PASSED] 25 VFs
[08:44:11] [PASSED] 26 VFs
[08:44:11] [PASSED] 27 VFs
[08:44:11] [PASSED] 28 VFs
[08:44:11] [PASSED] 29 VFs
[08:44:11] [PASSED] 30 VFs
[08:44:11] [PASSED] 31 VFs
[08:44:11] [PASSED] 32 VFs
[08:44:11] [PASSED] 33 VFs
[08:44:11] [PASSED] 34 VFs
[08:44:11] [PASSED] 35 VFs
[08:44:11] [PASSED] 36 VFs
[08:44:11] [PASSED] 37 VFs
[08:44:11] [PASSED] 38 VFs
[08:44:11] [PASSED] 39 VFs
[08:44:11] [PASSED] 40 VFs
[08:44:11] [PASSED] 41 VFs
[08:44:11] [PASSED] 42 VFs
[08:44:11] [PASSED] 43 VFs
[08:44:11] [PASSED] 44 VFs
[08:44:11] [PASSED] 45 VFs
[08:44:11] [PASSED] 46 VFs
[08:44:11] [PASSED] 47 VFs
[08:44:11] [PASSED] 48 VFs
[08:44:11] [PASSED] 49 VFs
[08:44:11] [PASSED] 50 VFs
[08:44:11] [PASSED] 51 VFs
[08:44:11] [PASSED] 52 VFs
[08:44:11] [PASSED] 53 VFs
[08:44:11] [PASSED] 54 VFs
[08:44:11] [PASSED] 55 VFs
[08:44:11] [PASSED] 56 VFs
[08:44:11] [PASSED] 57 VFs
[08:44:11] [PASSED] 58 VFs
[08:44:11] [PASSED] 59 VFs
[08:44:11] [PASSED] 60 VFs
[08:44:11] [PASSED] 61 VFs
[08:44:11] [PASSED] 62 VFs
[08:44:11] [PASSED] 63 VFs
[08:44:11] ================== [PASSED] fair_contexts ==================
[08:44:11] ===================== fair_doorbells  ======================
[08:44:11] [PASSED] 1 VF
[08:44:11] [PASSED] 2 VFs
[08:44:11] [PASSED] 3 VFs
[08:44:11] [PASSED] 4 VFs
[08:44:11] [PASSED] 5 VFs
[08:44:11] [PASSED] 6 VFs
[08:44:11] [PASSED] 7 VFs
[08:44:11] [PASSED] 8 VFs
[08:44:11] [PASSED] 9 VFs
[08:44:11] [PASSED] 10 VFs
[08:44:11] [PASSED] 11 VFs
[08:44:11] [PASSED] 12 VFs
[08:44:11] [PASSED] 13 VFs
[08:44:11] [PASSED] 14 VFs
[08:44:11] [PASSED] 15 VFs
[08:44:11] [PASSED] 16 VFs
[08:44:11] [PASSED] 17 VFs
[08:44:11] [PASSED] 18 VFs
[08:44:11] [PASSED] 19 VFs
[08:44:11] [PASSED] 20 VFs
[08:44:11] [PASSED] 21 VFs
[08:44:11] [PASSED] 22 VFs
[08:44:11] [PASSED] 23 VFs
[08:44:11] [PASSED] 24 VFs
[08:44:11] [PASSED] 25 VFs
[08:44:11] [PASSED] 26 VFs
[08:44:11] [PASSED] 27 VFs
[08:44:11] [PASSED] 28 VFs
[08:44:11] [PASSED] 29 VFs
[08:44:11] [PASSED] 30 VFs
[08:44:11] [PASSED] 31 VFs
[08:44:11] [PASSED] 32 VFs
[08:44:11] [PASSED] 33 VFs
[08:44:11] [PASSED] 34 VFs
[08:44:11] [PASSED] 35 VFs
[08:44:11] [PASSED] 36 VFs
[08:44:11] [PASSED] 37 VFs
[08:44:11] [PASSED] 38 VFs
[08:44:11] [PASSED] 39 VFs
[08:44:11] [PASSED] 40 VFs
[08:44:11] [PASSED] 41 VFs
[08:44:11] [PASSED] 42 VFs
[08:44:11] [PASSED] 43 VFs
[08:44:11] [PASSED] 44 VFs
[08:44:11] [PASSED] 45 VFs
[08:44:11] [PASSED] 46 VFs
[08:44:11] [PASSED] 47 VFs
[08:44:11] [PASSED] 48 VFs
[08:44:11] [PASSED] 49 VFs
[08:44:11] [PASSED] 50 VFs
[08:44:11] [PASSED] 51 VFs
[08:44:11] [PASSED] 52 VFs
[08:44:11] [PASSED] 53 VFs
[08:44:11] [PASSED] 54 VFs
[08:44:11] [PASSED] 55 VFs
[08:44:11] [PASSED] 56 VFs
[08:44:11] [PASSED] 57 VFs
[08:44:11] [PASSED] 58 VFs
[08:44:11] [PASSED] 59 VFs
[08:44:11] [PASSED] 60 VFs
[08:44:11] [PASSED] 61 VFs
[08:44:11] [PASSED] 62 VFs
[08:44:11] [PASSED] 63 VFs
[08:44:11] ================= [PASSED] fair_doorbells ==================
[08:44:11] ======================== fair_ggtt  ========================
[08:44:11] [PASSED] 1 VF
[08:44:11] [PASSED] 2 VFs
[08:44:11] [PASSED] 3 VFs
[08:44:11] [PASSED] 4 VFs
[08:44:11] [PASSED] 5 VFs
[08:44:11] [PASSED] 6 VFs
[08:44:11] [PASSED] 7 VFs
[08:44:11] [PASSED] 8 VFs
[08:44:11] [PASSED] 9 VFs
[08:44:11] [PASSED] 10 VFs
[08:44:11] [PASSED] 11 VFs
[08:44:11] [PASSED] 12 VFs
[08:44:11] [PASSED] 13 VFs
[08:44:11] [PASSED] 14 VFs
[08:44:11] [PASSED] 15 VFs
[08:44:11] [PASSED] 16 VFs
[08:44:11] [PASSED] 17 VFs
[08:44:11] [PASSED] 18 VFs
[08:44:11] [PASSED] 19 VFs
[08:44:11] [PASSED] 20 VFs
[08:44:11] [PASSED] 21 VFs
[08:44:11] [PASSED] 22 VFs
[08:44:11] [PASSED] 23 VFs
[08:44:11] [PASSED] 24 VFs
[08:44:11] [PASSED] 25 VFs
[08:44:11] [PASSED] 26 VFs
[08:44:11] [PASSED] 27 VFs
[08:44:11] [PASSED] 28 VFs
[08:44:11] [PASSED] 29 VFs
[08:44:11] [PASSED] 30 VFs
[08:44:11] [PASSED] 31 VFs
[08:44:11] [PASSED] 32 VFs
[08:44:11] [PASSED] 33 VFs
[08:44:11] [PASSED] 34 VFs
[08:44:11] [PASSED] 35 VFs
[08:44:11] [PASSED] 36 VFs
[08:44:11] [PASSED] 37 VFs
[08:44:11] [PASSED] 38 VFs
[08:44:11] [PASSED] 39 VFs
[08:44:11] [PASSED] 40 VFs
[08:44:11] [PASSED] 41 VFs
[08:44:11] [PASSED] 42 VFs
[08:44:11] [PASSED] 43 VFs
[08:44:11] [PASSED] 44 VFs
[08:44:11] [PASSED] 45 VFs
[08:44:11] [PASSED] 46 VFs
[08:44:11] [PASSED] 47 VFs
[08:44:11] [PASSED] 48 VFs
[08:44:11] [PASSED] 49 VFs
[08:44:11] [PASSED] 50 VFs
[08:44:11] [PASSED] 51 VFs
[08:44:11] [PASSED] 52 VFs
[08:44:11] [PASSED] 53 VFs
[08:44:11] [PASSED] 54 VFs
[08:44:11] [PASSED] 55 VFs
[08:44:11] [PASSED] 56 VFs
[08:44:11] [PASSED] 57 VFs
[08:44:11] [PASSED] 58 VFs
[08:44:11] [PASSED] 59 VFs
[08:44:11] [PASSED] 60 VFs
[08:44:11] [PASSED] 61 VFs
[08:44:11] [PASSED] 62 VFs
[08:44:11] [PASSED] 63 VFs
[08:44:11] ==================== [PASSED] fair_ggtt ====================
[08:44:11] ================== [PASSED] pf_gt_config ===================
[08:44:11] ===================== lmtt (1 subtest) =====================
[08:44:11] ======================== test_ops  =========================
[08:44:11] [PASSED] 2-level
[08:44:11] [PASSED] multi-level
[08:44:11] ==================== [PASSED] test_ops =====================
[08:44:11] ====================== [PASSED] lmtt =======================
[08:44:11] ================= pf_service (11 subtests) =================
[08:44:11] [PASSED] pf_negotiate_any
[08:44:11] [PASSED] pf_negotiate_base_match
[08:44:11] [PASSED] pf_negotiate_base_newer
[08:44:11] [PASSED] pf_negotiate_base_next
[08:44:11] [SKIPPED] pf_negotiate_base_older
[08:44:11] [PASSED] pf_negotiate_base_prev
[08:44:11] [PASSED] pf_negotiate_latest_match
[08:44:11] [PASSED] pf_negotiate_latest_newer
[08:44:11] [PASSED] pf_negotiate_latest_next
[08:44:11] [SKIPPED] pf_negotiate_latest_older
[08:44:11] [SKIPPED] pf_negotiate_latest_prev
[08:44:11] =================== [PASSED] pf_service ====================
[08:44:11] ================= xe_guc_g2g (2 subtests) ==================
[08:44:11] ============== xe_live_guc_g2g_kunit_default  ==============
[08:44:11] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[08:44:11] ============== xe_live_guc_g2g_kunit_allmem  ===============
[08:44:11] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[08:44:11] =================== [SKIPPED] xe_guc_g2g ===================
[08:44:11] =================== xe_mocs (2 subtests) ===================
[08:44:11] ================ xe_live_mocs_kernel_kunit  ================
[08:44:11] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:44:11] ================ xe_live_mocs_reset_kunit  =================
[08:44:11] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:44:11] ==================== [SKIPPED] xe_mocs =====================
[08:44:11] ================= xe_migrate (2 subtests) ==================
[08:44:11] ================= xe_migrate_sanity_kunit  =================
[08:44:11] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:44:11] ================== xe_validate_ccs_kunit  ==================
[08:44:11] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:44:11] =================== [SKIPPED] xe_migrate ===================
[08:44:11] ================== xe_dma_buf (1 subtest) ==================
[08:44:11] ==================== xe_dma_buf_kunit  =====================
[08:44:11] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:44:11] =================== [SKIPPED] xe_dma_buf ===================
[08:44:11] ================= xe_bo_shrink (1 subtest) =================
[08:44:11] =================== xe_bo_shrink_kunit  ====================
[08:44:11] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:44:11] ================== [SKIPPED] xe_bo_shrink ==================
[08:44:11] ==================== xe_bo (2 subtests) ====================
[08:44:11] ================== xe_ccs_migrate_kunit  ===================
[08:44:11] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:44:11] ==================== xe_bo_evict_kunit  ====================
[08:44:11] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:44:11] ===================== [SKIPPED] xe_bo ======================
[08:44:11] ==================== args (13 subtests) ====================
[08:44:11] [PASSED] count_args_test
[08:44:11] [PASSED] call_args_example
[08:44:11] [PASSED] call_args_test
[08:44:11] [PASSED] drop_first_arg_example
[08:44:11] [PASSED] drop_first_arg_test
[08:44:11] [PASSED] first_arg_example
[08:44:11] [PASSED] first_arg_test
[08:44:11] [PASSED] last_arg_example
[08:44:11] [PASSED] last_arg_test
[08:44:11] [PASSED] pick_arg_example
[08:44:11] [PASSED] if_args_example
[08:44:11] [PASSED] if_args_test
[08:44:11] [PASSED] sep_comma_example
[08:44:11] ====================== [PASSED] args =======================
[08:44:11] =================== xe_pci (3 subtests) ====================
[08:44:11] ==================== check_graphics_ip  ====================
[08:44:11] [PASSED] 12.00 Xe_LP
[08:44:11] [PASSED] 12.10 Xe_LP+
[08:44:11] [PASSED] 12.55 Xe_HPG
[08:44:11] [PASSED] 12.60 Xe_HPC
[08:44:11] [PASSED] 12.70 Xe_LPG
[08:44:11] [PASSED] 12.71 Xe_LPG
[08:44:11] [PASSED] 12.74 Xe_LPG+
[08:44:11] [PASSED] 20.01 Xe2_HPG
[08:44:11] [PASSED] 20.02 Xe2_HPG
[08:44:11] [PASSED] 20.04 Xe2_LPG
[08:44:11] [PASSED] 30.00 Xe3_LPG
[08:44:11] [PASSED] 30.01 Xe3_LPG
[08:44:11] [PASSED] 30.03 Xe3_LPG
[08:44:11] [PASSED] 30.04 Xe3_LPG
[08:44:11] [PASSED] 30.05 Xe3_LPG
[08:44:11] [PASSED] 35.11 Xe3p_XPC
[08:44:11] ================ [PASSED] check_graphics_ip ================
[08:44:11] ===================== check_media_ip  ======================
[08:44:11] [PASSED] 12.00 Xe_M
[08:44:11] [PASSED] 12.55 Xe_HPM
[08:44:11] [PASSED] 13.00 Xe_LPM+
[08:44:11] [PASSED] 13.01 Xe2_HPM
[08:44:11] [PASSED] 20.00 Xe2_LPM
[08:44:11] [PASSED] 30.00 Xe3_LPM
[08:44:11] [PASSED] 30.02 Xe3_LPM
[08:44:11] [PASSED] 35.00 Xe3p_LPM
[08:44:11] [PASSED] 35.03 Xe3p_HPM
[08:44:11] ================= [PASSED] check_media_ip ==================
[08:44:11] =================== check_platform_desc  ===================
[08:44:11] [PASSED] 0x9A60 (TIGERLAKE)
[08:44:11] [PASSED] 0x9A68 (TIGERLAKE)
[08:44:11] [PASSED] 0x9A70 (TIGERLAKE)
[08:44:11] [PASSED] 0x9A40 (TIGERLAKE)
[08:44:11] [PASSED] 0x9A49 (TIGERLAKE)
[08:44:11] [PASSED] 0x9A59 (TIGERLAKE)
[08:44:11] [PASSED] 0x9A78 (TIGERLAKE)
[08:44:11] [PASSED] 0x9AC0 (TIGERLAKE)
[08:44:11] [PASSED] 0x9AC9 (TIGERLAKE)
[08:44:11] [PASSED] 0x9AD9 (TIGERLAKE)
[08:44:11] [PASSED] 0x9AF8 (TIGERLAKE)
[08:44:11] [PASSED] 0x4C80 (ROCKETLAKE)
[08:44:11] [PASSED] 0x4C8A (ROCKETLAKE)
[08:44:11] [PASSED] 0x4C8B (ROCKETLAKE)
[08:44:11] [PASSED] 0x4C8C (ROCKETLAKE)
[08:44:11] [PASSED] 0x4C90 (ROCKETLAKE)
[08:44:11] [PASSED] 0x4C9A (ROCKETLAKE)
[08:44:11] [PASSED] 0x4680 (ALDERLAKE_S)
[08:44:11] [PASSED] 0x4682 (ALDERLAKE_S)
[08:44:11] [PASSED] 0x4688 (ALDERLAKE_S)
[08:44:11] [PASSED] 0x468A (ALDERLAKE_S)
[08:44:11] [PASSED] 0x468B (ALDERLAKE_S)
[08:44:11] [PASSED] 0x4690 (ALDERLAKE_S)
[08:44:11] [PASSED] 0x4692 (ALDERLAKE_S)
[08:44:11] [PASSED] 0x4693 (ALDERLAKE_S)
[08:44:11] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46AA (ALDERLAKE_P)
[08:44:11] [PASSED] 0x462A (ALDERLAKE_P)
[08:44:11] [PASSED] 0x4626 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[08:44:11] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:44:11] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:44:11] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:44:11] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:44:11] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:44:11] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:44:11] [PASSED] 0xA721 (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA720 (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:44:11] [PASSED] 0xA780 (ALDERLAKE_S)
[08:44:11] [PASSED] 0xA781 (ALDERLAKE_S)
[08:44:11] [PASSED] 0xA782 (ALDERLAKE_S)
[08:44:11] [PASSED] 0xA783 (ALDERLAKE_S)
[08:44:11] [PASSED] 0xA788 (ALDERLAKE_S)
[08:44:11] [PASSED] 0xA789 (ALDERLAKE_S)
[08:44:11] [PASSED] 0xA78A (ALDERLAKE_S)
[08:44:11] [PASSED] 0xA78B (ALDERLAKE_S)
[08:44:11] [PASSED] 0x4905 (DG1)
[08:44:11] [PASSED] 0x4906 (DG1)
[08:44:11] [PASSED] 0x4907 (DG1)
[08:44:11] [PASSED] 0x4908 (DG1)
[08:44:11] [PASSED] 0x4909 (DG1)
[08:44:11] [PASSED] 0x56C0 (DG2)
[08:44:11] [PASSED] 0x56C2 (DG2)
[08:44:11] [PASSED] 0x56C1 (DG2)
[08:44:11] [PASSED] 0x7D51 (METEORLAKE)
[08:44:11] [PASSED] 0x7DD1 (METEORLAKE)
[08:44:11] [PASSED] 0x7D41 (METEORLAKE)
[08:44:11] [PASSED] 0x7D67 (METEORLAKE)
[08:44:11] [PASSED] 0xB640 (METEORLAKE)
[08:44:11] [PASSED] 0x56A0 (DG2)
[08:44:11] [PASSED] 0x56A1 (DG2)
[08:44:11] [PASSED] 0x56A2 (DG2)
[08:44:11] [PASSED] 0x56BE (DG2)
[08:44:11] [PASSED] 0x56BF (DG2)
[08:44:11] [PASSED] 0x5690 (DG2)
[08:44:11] [PASSED] 0x5691 (DG2)
[08:44:11] [PASSED] 0x5692 (DG2)
[08:44:11] [PASSED] 0x56A5 (DG2)
[08:44:11] [PASSED] 0x56A6 (DG2)
[08:44:11] [PASSED] 0x56B0 (DG2)
[08:44:11] [PASSED] 0x56B1 (DG2)
[08:44:11] [PASSED] 0x56BA (DG2)
[08:44:11] [PASSED] 0x56BB (DG2)
[08:44:11] [PASSED] 0x56BC (DG2)
[08:44:11] [PASSED] 0x56BD (DG2)
[08:44:11] [PASSED] 0x5693 (DG2)
[08:44:11] [PASSED] 0x5694 (DG2)
[08:44:11] [PASSED] 0x5695 (DG2)
[08:44:11] [PASSED] 0x56A3 (DG2)
[08:44:11] [PASSED] 0x56A4 (DG2)
[08:44:11] [PASSED] 0x56B2 (DG2)
[08:44:11] [PASSED] 0x56B3 (DG2)
[08:44:11] [PASSED] 0x5696 (DG2)
[08:44:11] [PASSED] 0x5697 (DG2)
[08:44:11] [PASSED] 0xB69 (PVC)
[08:44:11] [PASSED] 0xB6E (PVC)
[08:44:11] [PASSED] 0xBD4 (PVC)
[08:44:11] [PASSED] 0xBD5 (PVC)
[08:44:11] [PASSED] 0xBD6 (PVC)
[08:44:11] [PASSED] 0xBD7 (PVC)
[08:44:11] [PASSED] 0xBD8 (PVC)
[08:44:11] [PASSED] 0xBD9 (PVC)
[08:44:11] [PASSED] 0xBDA (PVC)
[08:44:11] [PASSED] 0xBDB (PVC)
[08:44:11] [PASSED] 0xBE0 (PVC)
[08:44:11] [PASSED] 0xBE1 (PVC)
[08:44:11] [PASSED] 0xBE5 (PVC)
[08:44:11] [PASSED] 0x7D40 (METEORLAKE)
[08:44:11] [PASSED] 0x7D45 (METEORLAKE)
[08:44:11] [PASSED] 0x7D55 (METEORLAKE)
[08:44:11] [PASSED] 0x7D60 (METEORLAKE)
[08:44:11] [PASSED] 0x7DD5 (METEORLAKE)
[08:44:11] [PASSED] 0x6420 (LUNARLAKE)
[08:44:11] [PASSED] 0x64A0 (LUNARLAKE)
[08:44:11] [PASSED] 0x64B0 (LUNARLAKE)
[08:44:11] [PASSED] 0xE202 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE209 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE20B (BATTLEMAGE)
[08:44:11] [PASSED] 0xE20C (BATTLEMAGE)
[08:44:11] [PASSED] 0xE20D (BATTLEMAGE)
[08:44:11] [PASSED] 0xE210 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE211 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE212 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE216 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE220 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE221 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE222 (BATTLEMAGE)
[08:44:11] [PASSED] 0xE223 (BATTLEMAGE)
[08:44:11] [PASSED] 0xB080 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB081 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB082 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB083 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB084 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB085 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB086 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB087 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB08F (PANTHERLAKE)
[08:44:11] [PASSED] 0xB090 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:44:11] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:44:11] [PASSED] 0xFD80 (PANTHERLAKE)
[08:44:11] [PASSED] 0xFD81 (PANTHERLAKE)
[08:44:11] [PASSED] 0xD740 (NOVALAKE_S)
[08:44:11] [PASSED] 0xD741 (NOVALAKE_S)
[08:44:11] [PASSED] 0xD742 (NOVALAKE_S)
[08:44:11] [PASSED] 0xD743 (NOVALAKE_S)
[08:44:11] [PASSED] 0xD744 (NOVALAKE_S)
[08:44:11] [PASSED] 0xD745 (NOVALAKE_S)
[08:44:11] [PASSED] 0x674C (CRESCENTISLAND)
[08:44:11] =============== [PASSED] check_platform_desc ===============
[08:44:11] ===================== [PASSED] xe_pci ======================
[08:44:11] =================== xe_rtp (2 subtests) ====================
[08:44:11] =============== xe_rtp_process_to_sr_tests  ================
[08:44:11] [PASSED] coalesce-same-reg
[08:44:11] [PASSED] no-match-no-add
[08:44:11] [PASSED] match-or
[08:44:11] [PASSED] match-or-xfail
[08:44:11] [PASSED] no-match-no-add-multiple-rules
[08:44:11] [PASSED] two-regs-two-entries
[08:44:11] [PASSED] clr-one-set-other
[08:44:11] [PASSED] set-field
[08:44:11] [PASSED] conflict-duplicate
[08:44:11] [PASSED] conflict-not-disjoint
[08:44:11] [PASSED] conflict-reg-type
[08:44:11] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:44:11] ================== xe_rtp_process_tests  ===================
[08:44:11] [PASSED] active1
[08:44:11] [PASSED] active2
[08:44:11] [PASSED] active-inactive
[08:44:11] [PASSED] inactive-active
[08:44:11] [PASSED] inactive-1st_or_active-inactive
[08:44:11] [PASSED] inactive-2nd_or_active-inactive
[08:44:11] [PASSED] inactive-last_or_active-inactive
[08:44:11] [PASSED] inactive-no_or_active-inactive
[08:44:11] ============== [PASSED] xe_rtp_process_tests ===============
[08:44:11] ===================== [PASSED] xe_rtp ======================
[08:44:11] ==================== xe_wa (1 subtest) =====================
[08:44:11] ======================== xe_wa_gt  =========================
[08:44:11] [PASSED] TIGERLAKE B0
[08:44:11] [PASSED] DG1 A0
[08:44:11] [PASSED] DG1 B0
[08:44:11] [PASSED] ALDERLAKE_S A0
[08:44:11] [PASSED] ALDERLAKE_S B0
[08:44:11] [PASSED] ALDERLAKE_S C0
[08:44:11] [PASSED] ALDERLAKE_S D0
[08:44:11] [PASSED] ALDERLAKE_P A0
[08:44:11] [PASSED] ALDERLAKE_P B0
[08:44:11] [PASSED] ALDERLAKE_P C0
[08:44:11] [PASSED] ALDERLAKE_S RPLS D0
[08:44:11] [PASSED] ALDERLAKE_P RPLU E0
[08:44:11] [PASSED] DG2 G10 C0
[08:44:11] [PASSED] DG2 G11 B1
[08:44:11] [PASSED] DG2 G12 A1
[08:44:11] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:44:11] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:44:11] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[08:44:11] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[08:44:11] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[08:44:11] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[08:44:11] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[08:44:11] ==================== [PASSED] xe_wa_gt =====================
[08:44:11] ====================== [PASSED] xe_wa ======================
[08:44:11] ============================================================
[08:44:11] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[08:44:11] Elapsed time: 36.187s total, 4.194s configuring, 31.521s building, 0.462s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:44:11] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:44:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:44:38] Starting KUnit Kernel (1/1)...
[08:44:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:44:38] ============ drm_test_pick_cmdline (2 subtests) ============
[08:44:38] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[08:44:38] =============== drm_test_pick_cmdline_named  ===============
[08:44:38] [PASSED] NTSC
[08:44:38] [PASSED] NTSC-J
[08:44:38] [PASSED] PAL
[08:44:38] [PASSED] PAL-M
[08:44:38] =========== [PASSED] drm_test_pick_cmdline_named ===========
[08:44:38] ============== [PASSED] drm_test_pick_cmdline ==============
[08:44:38] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:44:38] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:44:38] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:44:38] =========== drm_validate_clone_mode (2 subtests) ===========
[08:44:38] ============== drm_test_check_in_clone_mode  ===============
[08:44:38] [PASSED] in_clone_mode
[08:44:38] [PASSED] not_in_clone_mode
[08:44:38] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:44:38] =============== drm_test_check_valid_clones  ===============
[08:44:38] [PASSED] not_in_clone_mode
[08:44:38] [PASSED] valid_clone
[08:44:38] [PASSED] invalid_clone
[08:44:38] =========== [PASSED] drm_test_check_valid_clones ===========
[08:44:38] ============= [PASSED] drm_validate_clone_mode =============
[08:44:38] ============= drm_validate_modeset (1 subtest) =============
[08:44:38] [PASSED] drm_test_check_connector_changed_modeset
[08:44:38] ============== [PASSED] drm_validate_modeset ===============
[08:44:38] ====== drm_test_bridge_get_current_state (2 subtests) ======
[08:44:38] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:44:38] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[08:44:38] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:44:38] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:44:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:44:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:44:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[08:44:38] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:44:38] ============== drm_bridge_alloc (2 subtests) ===============
[08:44:38] [PASSED] drm_test_drm_bridge_alloc_basic
[08:44:38] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:44:38] ================ [PASSED] drm_bridge_alloc =================
[08:44:38] ================== drm_buddy (8 subtests) ==================
[08:44:38] [PASSED] drm_test_buddy_alloc_limit
[08:44:38] [PASSED] drm_test_buddy_alloc_optimistic
[08:44:38] [PASSED] drm_test_buddy_alloc_pessimistic
[08:44:38] [PASSED] drm_test_buddy_alloc_pathological
[08:44:38] [PASSED] drm_test_buddy_alloc_contiguous
[08:44:38] [PASSED] drm_test_buddy_alloc_clear
[08:44:38] [PASSED] drm_test_buddy_alloc_range_bias
[08:44:38] [PASSED] drm_test_buddy_fragmentation_performance
[08:44:38] ==================== [PASSED] drm_buddy ====================
[08:44:38] ============= drm_cmdline_parser (40 subtests) =============
[08:44:38] [PASSED] drm_test_cmdline_force_d_only
[08:44:38] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:44:38] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:44:38] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:44:38] [PASSED] drm_test_cmdline_force_e_only
[08:44:38] [PASSED] drm_test_cmdline_res
[08:44:38] [PASSED] drm_test_cmdline_res_vesa
[08:44:38] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:44:38] [PASSED] drm_test_cmdline_res_rblank
[08:44:38] [PASSED] drm_test_cmdline_res_bpp
[08:44:38] [PASSED] drm_test_cmdline_res_refresh
[08:44:38] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:44:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:44:38] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:44:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:44:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:44:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:44:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:44:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:44:38] [PASSED] drm_test_cmdline_res_margins_force_on
[08:44:38] [PASSED] drm_test_cmdline_res_vesa_margins
[08:44:38] [PASSED] drm_test_cmdline_name
[08:44:38] [PASSED] drm_test_cmdline_name_bpp
[08:44:38] [PASSED] drm_test_cmdline_name_option
[08:44:38] [PASSED] drm_test_cmdline_name_bpp_option
[08:44:38] [PASSED] drm_test_cmdline_rotate_0
[08:44:38] [PASSED] drm_test_cmdline_rotate_90
[08:44:38] [PASSED] drm_test_cmdline_rotate_180
[08:44:38] [PASSED] drm_test_cmdline_rotate_270
[08:44:38] [PASSED] drm_test_cmdline_hmirror
[08:44:38] [PASSED] drm_test_cmdline_vmirror
[08:44:38] [PASSED] drm_test_cmdline_margin_options
[08:44:38] [PASSED] drm_test_cmdline_multiple_options
[08:44:38] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:44:38] [PASSED] drm_test_cmdline_extra_and_option
[08:44:38] [PASSED] drm_test_cmdline_freestanding_options
[08:44:38] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:44:38] [PASSED] drm_test_cmdline_panel_orientation
[08:44:38] ================ drm_test_cmdline_invalid  =================
[08:44:38] [PASSED] margin_only
[08:44:38] [PASSED] interlace_only
[08:44:38] [PASSED] res_missing_x
[08:44:38] [PASSED] res_missing_y
[08:44:38] [PASSED] res_bad_y
[08:44:38] [PASSED] res_missing_y_bpp
[08:44:38] [PASSED] res_bad_bpp
[08:44:38] [PASSED] res_bad_refresh
[08:44:38] [PASSED] res_bpp_refresh_force_on_off
[08:44:38] [PASSED] res_invalid_mode
[08:44:38] [PASSED] res_bpp_wrong_place_mode
[08:44:38] [PASSED] name_bpp_refresh
[08:44:38] [PASSED] name_refresh
[08:44:38] [PASSED] name_refresh_wrong_mode
[08:44:38] [PASSED] name_refresh_invalid_mode
[08:44:38] [PASSED] rotate_multiple
[08:44:38] [PASSED] rotate_invalid_val
[08:44:38] [PASSED] rotate_truncated
[08:44:38] [PASSED] invalid_option
[08:44:38] [PASSED] invalid_tv_option
[08:44:38] [PASSED] truncated_tv_option
[08:44:38] ============ [PASSED] drm_test_cmdline_invalid =============
[08:44:38] =============== drm_test_cmdline_tv_options  ===============
[08:44:38] [PASSED] NTSC
[08:44:38] [PASSED] NTSC_443
[08:44:38] [PASSED] NTSC_J
[08:44:38] [PASSED] PAL
[08:44:38] [PASSED] PAL_M
[08:44:38] [PASSED] PAL_N
[08:44:38] [PASSED] SECAM
[08:44:38] [PASSED] MONO_525
[08:44:38] [PASSED] MONO_625
[08:44:38] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:44:38] =============== [PASSED] drm_cmdline_parser ================
[08:44:38] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:44:38] [PASSED] drm_test_connector_hdmi_init_valid
[08:44:38] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:44:38] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:44:38] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:44:38] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:44:38] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:44:38] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:44:38] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:44:38] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[08:44:38] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:44:38] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:44:38] [PASSED] supported_formats=0x3 yuv420_allowed=1
[08:44:38] [PASSED] supported_formats=0x3 yuv420_allowed=0
[08:44:38] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:44:38] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:44:38] [PASSED] drm_test_connector_hdmi_init_null_product
[08:44:38] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:44:38] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:44:38] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:44:38] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:44:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:44:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:44:38] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:44:38] ========= drm_test_connector_hdmi_init_type_valid  =========
[08:44:38] [PASSED] HDMI-A
[08:44:38] [PASSED] HDMI-B
[08:44:38] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:44:38] ======== drm_test_connector_hdmi_init_type_invalid  ========
[08:44:38] [PASSED] Unknown
[08:44:38] [PASSED] VGA
[08:44:38] [PASSED] DVI-I
[08:44:38] [PASSED] DVI-D
[08:44:38] [PASSED] DVI-A
[08:44:38] [PASSED] Composite
[08:44:38] [PASSED] SVIDEO
[08:44:38] [PASSED] LVDS
[08:44:38] [PASSED] Component
[08:44:38] [PASSED] DIN
[08:44:38] [PASSED] DP
[08:44:38] [PASSED] TV
[08:44:38] [PASSED] eDP
[08:44:38] [PASSED] Virtual
[08:44:38] [PASSED] DSI
[08:44:38] [PASSED] DPI
[08:44:38] [PASSED] Writeback
[08:44:38] [PASSED] SPI
[08:44:38] [PASSED] USB
[08:44:38] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:44:38] ============ [PASSED] drmm_connector_hdmi_init =============
[08:44:38] ============= drmm_connector_init (3 subtests) =============
[08:44:38] [PASSED] drm_test_drmm_connector_init
[08:44:38] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:44:38] ========= drm_test_drmm_connector_init_type_valid  =========
[08:44:38] [PASSED] Unknown
[08:44:38] [PASSED] VGA
[08:44:38] [PASSED] DVI-I
[08:44:38] [PASSED] DVI-D
[08:44:38] [PASSED] DVI-A
[08:44:38] [PASSED] Composite
[08:44:38] [PASSED] SVIDEO
[08:44:38] [PASSED] LVDS
[08:44:38] [PASSED] Component
[08:44:38] [PASSED] DIN
[08:44:38] [PASSED] DP
[08:44:38] [PASSED] HDMI-A
[08:44:38] [PASSED] HDMI-B
[08:44:38] [PASSED] TV
[08:44:38] [PASSED] eDP
[08:44:38] [PASSED] Virtual
[08:44:38] [PASSED] DSI
[08:44:38] [PASSED] DPI
[08:44:38] [PASSED] Writeback
[08:44:38] [PASSED] SPI
[08:44:38] [PASSED] USB
[08:44:38] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:44:38] =============== [PASSED] drmm_connector_init ===============
[08:44:38] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_init
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:44:38] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[08:44:38] [PASSED] Unknown
[08:44:38] [PASSED] VGA
[08:44:38] [PASSED] DVI-I
[08:44:38] [PASSED] DVI-D
[08:44:38] [PASSED] DVI-A
[08:44:38] [PASSED] Composite
[08:44:38] [PASSED] SVIDEO
[08:44:38] [PASSED] LVDS
[08:44:38] [PASSED] Component
[08:44:38] [PASSED] DIN
[08:44:38] [PASSED] DP
[08:44:38] [PASSED] HDMI-A
[08:44:38] [PASSED] HDMI-B
[08:44:38] [PASSED] TV
[08:44:38] [PASSED] eDP
[08:44:38] [PASSED] Virtual
[08:44:38] [PASSED] DSI
[08:44:38] [PASSED] DPI
[08:44:38] [PASSED] Writeback
[08:44:38] [PASSED] SPI
[08:44:38] [PASSED] USB
[08:44:38] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:44:38] ======== drm_test_drm_connector_dynamic_init_name  =========
[08:44:38] [PASSED] Unknown
[08:44:38] [PASSED] VGA
[08:44:38] [PASSED] DVI-I
[08:44:38] [PASSED] DVI-D
[08:44:38] [PASSED] DVI-A
[08:44:38] [PASSED] Composite
[08:44:38] [PASSED] SVIDEO
[08:44:38] [PASSED] LVDS
[08:44:38] [PASSED] Component
[08:44:38] [PASSED] DIN
[08:44:38] [PASSED] DP
[08:44:38] [PASSED] HDMI-A
[08:44:38] [PASSED] HDMI-B
[08:44:38] [PASSED] TV
[08:44:38] [PASSED] eDP
[08:44:38] [PASSED] Virtual
[08:44:38] [PASSED] DSI
[08:44:38] [PASSED] DPI
[08:44:38] [PASSED] Writeback
[08:44:38] [PASSED] SPI
[08:44:38] [PASSED] USB
[08:44:38] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:44:38] =========== [PASSED] drm_connector_dynamic_init ============
[08:44:38] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:44:38] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:44:38] ======= drm_connector_dynamic_register (7 subtests) ========
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:44:38] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:44:38] ========= [PASSED] drm_connector_dynamic_register ==========
[08:44:38] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:44:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:44:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:44:38] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:44:38] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:44:38] ========== drm_test_get_tv_mode_from_name_valid  ===========
[08:44:38] [PASSED] NTSC
[08:44:38] [PASSED] NTSC-443
[08:44:38] [PASSED] NTSC-J
[08:44:38] [PASSED] PAL
[08:44:38] [PASSED] PAL-M
[08:44:38] [PASSED] PAL-N
[08:44:38] [PASSED] SECAM
[08:44:38] [PASSED] Mono
[08:44:38] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:44:38] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:44:38] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:44:38] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:44:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:44:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:44:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:44:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:44:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:44:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:44:38] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[08:44:38] [PASSED] VIC 96
[08:44:38] [PASSED] VIC 97
[08:44:38] [PASSED] VIC 101
[08:44:38] [PASSED] VIC 102
[08:44:38] [PASSED] VIC 106
[08:44:38] [PASSED] VIC 107
[08:44:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:44:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:44:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:44:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:44:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:44:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:44:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:44:38] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:44:38] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[08:44:38] [PASSED] Automatic
[08:44:38] [PASSED] Full
[08:44:38] [PASSED] Limited 16:235
[08:44:38] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:44:38] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:44:38] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:44:38] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:44:38] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[08:44:38] [PASSED] RGB
[08:44:38] [PASSED] YUV 4:2:0
[08:44:38] [PASSED] YUV 4:2:2
[08:44:38] [PASSED] YUV 4:4:4
[08:44:38] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:44:38] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:44:38] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:44:38] ============= drm_damage_helper (21 subtests) ==============
[08:44:38] [PASSED] drm_test_damage_iter_no_damage
[08:44:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:44:38] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:44:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:44:38] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:44:38] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:44:38] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:44:38] [PASSED] drm_test_damage_iter_simple_damage
[08:44:38] [PASSED] drm_test_damage_iter_single_damage
[08:44:38] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:44:38] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:44:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:44:38] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:44:38] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:44:38] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:44:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:44:38] [PASSED] drm_test_damage_iter_damage
[08:44:38] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:44:38] [PASSED] drm_test_damage_iter_damage_one_outside
[08:44:38] [PASSED] drm_test_damage_iter_damage_src_moved
[08:44:38] [PASSED] drm_test_damage_iter_damage_not_visible
[08:44:38] ================ [PASSED] drm_damage_helper ================
[08:44:38] ============== drm_dp_mst_helper (3 subtests) ==============
[08:44:38] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[08:44:38] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:44:38] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:44:38] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:44:38] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:44:38] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:44:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:44:38] ============== drm_test_dp_mst_calc_pbn_div  ===============
[08:44:38] [PASSED] Link rate 2000000 lane count 4
[08:44:38] [PASSED] Link rate 2000000 lane count 2
[08:44:38] [PASSED] Link rate 2000000 lane count 1
[08:44:38] [PASSED] Link rate 1350000 lane count 4
[08:44:38] [PASSED] Link rate 1350000 lane count 2
[08:44:38] [PASSED] Link rate 1350000 lane count 1
[08:44:38] [PASSED] Link rate 1000000 lane count 4
[08:44:38] [PASSED] Link rate 1000000 lane count 2
[08:44:38] [PASSED] Link rate 1000000 lane count 1
[08:44:38] [PASSED] Link rate 810000 lane count 4
[08:44:38] [PASSED] Link rate 810000 lane count 2
[08:44:38] [PASSED] Link rate 810000 lane count 1
[08:44:38] [PASSED] Link rate 540000 lane count 4
[08:44:38] [PASSED] Link rate 540000 lane count 2
[08:44:38] [PASSED] Link rate 540000 lane count 1
[08:44:38] [PASSED] Link rate 270000 lane count 4
[08:44:38] [PASSED] Link rate 270000 lane count 2
[08:44:38] [PASSED] Link rate 270000 lane count 1
[08:44:38] [PASSED] Link rate 162000 lane count 4
[08:44:38] [PASSED] Link rate 162000 lane count 2
[08:44:38] [PASSED] Link rate 162000 lane count 1
[08:44:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:44:38] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[08:44:38] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:44:38] [PASSED] DP_POWER_UP_PHY with port number
[08:44:38] [PASSED] DP_POWER_DOWN_PHY with port number
[08:44:38] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:44:38] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:44:38] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:44:38] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:44:38] [PASSED] DP_QUERY_PAYLOAD with port number
[08:44:38] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:44:38] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:44:38] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:44:38] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:44:38] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:44:38] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:44:38] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:44:38] [PASSED] DP_REMOTE_I2C_READ with port number
[08:44:38] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:44:38] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:44:38] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:44:38] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:44:38] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:44:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:44:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:44:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:44:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:44:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:44:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:44:38] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:44:38] ================ [PASSED] drm_dp_mst_helper ================
[08:44:38] ================== drm_exec (7 subtests) ===================
[08:44:38] [PASSED] sanitycheck
[08:44:38] [PASSED] test_lock
[08:44:38] [PASSED] test_lock_unlock
[08:44:38] [PASSED] test_duplicates
[08:44:38] [PASSED] test_prepare
[08:44:38] [PASSED] test_prepare_array
[08:44:38] [PASSED] test_multiple_loops
[08:44:38] ==================== [PASSED] drm_exec =====================
[08:44:38] =========== drm_format_helper_test (17 subtests) ===========
[08:44:38] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:44:38] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:44:38] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:44:38] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:44:38] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:44:38] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:44:38] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:44:38] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:44:38] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:44:38] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:44:38] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:44:38] ============== drm_test_fb_xrgb8888_to_mono  ===============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:44:38] ==================== drm_test_fb_swab  =====================
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ================ [PASSED] drm_test_fb_swab =================
[08:44:38] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:44:38] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[08:44:38] [PASSED] single_pixel_source_buffer
[08:44:38] [PASSED] single_pixel_clip_rectangle
[08:44:38] [PASSED] well_known_colors
[08:44:38] [PASSED] destination_pitch
[08:44:38] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:44:38] ================= drm_test_fb_clip_offset  =================
[08:44:38] [PASSED] pass through
[08:44:38] [PASSED] horizontal offset
[08:44:38] [PASSED] vertical offset
[08:44:38] [PASSED] horizontal and vertical offset
[08:44:38] [PASSED] horizontal offset (custom pitch)
[08:44:38] [PASSED] vertical offset (custom pitch)
[08:44:38] [PASSED] horizontal and vertical offset (custom pitch)
[08:44:38] ============= [PASSED] drm_test_fb_clip_offset =============
[08:44:38] =================== drm_test_fb_memcpy  ====================
[08:44:38] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:44:38] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:44:38] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:44:38] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:44:38] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:44:38] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:44:38] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:44:38] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:44:38] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:44:38] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:44:38] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:44:38] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:44:38] =============== [PASSED] drm_test_fb_memcpy ================
[08:44:38] ============= [PASSED] drm_format_helper_test ==============
[08:44:38] ================= drm_format (18 subtests) =================
[08:44:38] [PASSED] drm_test_format_block_width_invalid
[08:44:38] [PASSED] drm_test_format_block_width_one_plane
[08:44:38] [PASSED] drm_test_format_block_width_two_plane
[08:44:38] [PASSED] drm_test_format_block_width_three_plane
[08:44:38] [PASSED] drm_test_format_block_width_tiled
[08:44:38] [PASSED] drm_test_format_block_height_invalid
[08:44:38] [PASSED] drm_test_format_block_height_one_plane
[08:44:38] [PASSED] drm_test_format_block_height_two_plane
[08:44:38] [PASSED] drm_test_format_block_height_three_plane
[08:44:38] [PASSED] drm_test_format_block_height_tiled
[08:44:38] [PASSED] drm_test_format_min_pitch_invalid
[08:44:38] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:44:38] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:44:38] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:44:38] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:44:38] [PASSED] drm_test_format_min_pitch_two_plane
[08:44:38] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:44:38] [PASSED] drm_test_format_min_pitch_tiled
[08:44:38] =================== [PASSED] drm_format ====================
[08:44:38] ============== drm_framebuffer (10 subtests) ===============
[08:44:38] ========== drm_test_framebuffer_check_src_coords  ==========
[08:44:38] [PASSED] Success: source fits into fb
[08:44:38] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:44:38] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:44:38] [PASSED] Fail: overflowing fb with source width
[08:44:38] [PASSED] Fail: overflowing fb with source height
[08:44:38] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:44:38] [PASSED] drm_test_framebuffer_cleanup
[08:44:38] =============== drm_test_framebuffer_create  ===============
[08:44:38] [PASSED] ABGR8888 normal sizes
[08:44:38] [PASSED] ABGR8888 max sizes
[08:44:38] [PASSED] ABGR8888 pitch greater than min required
[08:44:38] [PASSED] ABGR8888 pitch less than min required
[08:44:38] [PASSED] ABGR8888 Invalid width
[08:44:38] [PASSED] ABGR8888 Invalid buffer handle
[08:44:38] [PASSED] No pixel format
[08:44:38] [PASSED] ABGR8888 Width 0
[08:44:38] [PASSED] ABGR8888 Height 0
[08:44:38] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:44:38] [PASSED] ABGR8888 Large buffer offset
[08:44:38] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:44:38] [PASSED] ABGR8888 Invalid flag
[08:44:38] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:44:38] [PASSED] ABGR8888 Valid buffer modifier
[08:44:38] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:44:38] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:44:38] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:44:38] [PASSED] NV12 Normal sizes
[08:44:38] [PASSED] NV12 Max sizes
[08:44:38] [PASSED] NV12 Invalid pitch
[08:44:38] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:44:38] [PASSED] NV12 different  modifier per-plane
[08:44:38] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:44:38] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:44:38] [PASSED] NV12 Modifier for inexistent plane
[08:44:38] [PASSED] NV12 Handle for inexistent plane
[08:44:38] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:44:38] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:44:38] [PASSED] YVU420 Normal sizes
[08:44:38] [PASSED] YVU420 Max sizes
[08:44:38] [PASSED] YVU420 Invalid pitch
[08:44:38] [PASSED] YVU420 Different pitches
[08:44:38] [PASSED] YVU420 Different buffer offsets/pitches
[08:44:38] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:44:38] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:44:38] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:44:38] [PASSED] YVU420 Valid modifier
[08:44:38] [PASSED] YVU420 Different modifiers per plane
[08:44:38] [PASSED] YVU420 Modifier for inexistent plane
[08:44:38] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:44:38] [PASSED] X0L2 Normal sizes
[08:44:38] [PASSED] X0L2 Max sizes
[08:44:38] [PASSED] X0L2 Invalid pitch
[08:44:38] [PASSED] X0L2 Pitch greater than minimum required
[08:44:38] [PASSED] X0L2 Handle for inexistent plane
[08:44:38] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:44:38] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:44:38] [PASSED] X0L2 Valid modifier
[08:44:38] [PASSED] X0L2 Modifier for inexistent plane
[08:44:38] =========== [PASSED] drm_test_framebuffer_create ===========
[08:44:38] [PASSED] drm_test_framebuffer_free
[08:44:38] [PASSED] drm_test_framebuffer_init
[08:44:38] [PASSED] drm_test_framebuffer_init_bad_format
[08:44:38] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:44:38] [PASSED] drm_test_framebuffer_lookup
[08:44:38] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:44:38] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:44:38] ================= [PASSED] drm_framebuffer =================
[08:44:38] ================ drm_gem_shmem (8 subtests) ================
[08:44:38] [PASSED] drm_gem_shmem_test_obj_create
[08:44:38] [PASSED] drm_gem_shmem_test_obj_create_private
[08:44:38] [PASSED] drm_gem_shmem_test_pin_pages
[08:44:38] [PASSED] drm_gem_shmem_test_vmap
[08:44:38] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:44:38] [PASSED] drm_gem_shmem_test_get_sg_table
[08:44:38] [PASSED] drm_gem_shmem_test_madvise
[08:44:38] [PASSED] drm_gem_shmem_test_purge
[08:44:38] ================== [PASSED] drm_gem_shmem ==================
[08:44:38] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:44:38] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[08:44:38] [PASSED] Automatic
[08:44:38] [PASSED] Full
[08:44:38] [PASSED] Limited 16:235
[08:44:38] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:44:38] [PASSED] drm_test_check_disable_connector
[08:44:38] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:44:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:44:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:44:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:44:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:44:38] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:44:38] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:44:38] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:44:38] [PASSED] drm_test_check_output_bpc_dvi
[08:44:38] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:44:38] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:44:38] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:44:38] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:44:38] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:44:38] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:44:38] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:44:38] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:44:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:44:38] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:44:38] [PASSED] drm_test_check_broadcast_rgb_value
[08:44:38] [PASSED] drm_test_check_bpc_8_value
[08:44:38] [PASSED] drm_test_check_bpc_10_value
[08:44:38] [PASSED] drm_test_check_bpc_12_value
[08:44:38] [PASSED] drm_test_check_format_value
[08:44:38] [PASSED] drm_test_check_tmds_char_value
[08:44:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:44:38] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[08:44:38] [PASSED] drm_test_check_mode_valid
[08:44:38] [PASSED] drm_test_check_mode_valid_reject
[08:44:38] [PASSED] drm_test_check_mode_valid_reject_rate
[08:44:38] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:44:38] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:44:38] ================= drm_managed (2 subtests) =================
[08:44:38] [PASSED] drm_test_managed_release_action
[08:44:38] [PASSED] drm_test_managed_run_action
[08:44:38] =================== [PASSED] drm_managed ===================
[08:44:38] =================== drm_mm (6 subtests) ====================
[08:44:38] [PASSED] drm_test_mm_init
[08:44:38] [PASSED] drm_test_mm_debug
[08:44:38] [PASSED] drm_test_mm_align32
[08:44:38] [PASSED] drm_test_mm_align64
[08:44:38] [PASSED] drm_test_mm_lowest
[08:44:38] [PASSED] drm_test_mm_highest
[08:44:38] ===================== [PASSED] drm_mm ======================
[08:44:38] ============= drm_modes_analog_tv (5 subtests) =============
[08:44:38] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:44:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:44:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:44:38] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:44:38] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:44:38] =============== [PASSED] drm_modes_analog_tv ===============
[08:44:38] ============== drm_plane_helper (2 subtests) ===============
[08:44:38] =============== drm_test_check_plane_state  ================
[08:44:38] [PASSED] clipping_simple
[08:44:38] [PASSED] clipping_rotate_reflect
[08:44:38] [PASSED] positioning_simple
[08:44:38] [PASSED] upscaling
[08:44:38] [PASSED] downscaling
[08:44:38] [PASSED] rounding1
[08:44:38] [PASSED] rounding2
[08:44:38] [PASSED] rounding3
[08:44:38] [PASSED] rounding4
[08:44:38] =========== [PASSED] drm_test_check_plane_state ============
[08:44:38] =========== drm_test_check_invalid_plane_state  ============
[08:44:38] [PASSED] positioning_invalid
[08:44:38] [PASSED] upscaling_invalid
[08:44:38] [PASSED] downscaling_invalid
[08:44:38] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:44:38] ================ [PASSED] drm_plane_helper =================
[08:44:38] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:44:38] ====== drm_test_connector_helper_tv_get_modes_check  =======
[08:44:38] [PASSED] None
[08:44:38] [PASSED] PAL
[08:44:38] [PASSED] NTSC
[08:44:38] [PASSED] Both, NTSC Default
[08:44:38] [PASSED] Both, PAL Default
[08:44:38] [PASSED] Both, NTSC Default, with PAL on command-line
[08:44:38] [PASSED] Both, PAL Default, with NTSC on command-line
[08:44:38] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:44:38] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:44:38] ================== drm_rect (9 subtests) ===================
[08:44:38] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:44:38] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:44:38] [PASSED] drm_test_rect_clip_scaled_clipped
[08:44:38] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:44:38] ================= drm_test_rect_intersect  =================
[08:44:38] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:44:38] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:44:38] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:44:38] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:44:38] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:44:38] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:44:38] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:44:38] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:44:38] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:44:38] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:44:38] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:44:38] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:44:38] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:44:38] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:44:38] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:44:38] ============= [PASSED] drm_test_rect_intersect =============
[08:44:38] ================ drm_test_rect_calc_hscale  ================
[08:44:38] [PASSED] normal use
[08:44:38] [PASSED] out of max range
[08:44:38] [PASSED] out of min range
[08:44:38] [PASSED] zero dst
[08:44:38] [PASSED] negative src
[08:44:38] [PASSED] negative dst
[08:44:38] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:44:38] ================ drm_test_rect_calc_vscale  ================
[08:44:38] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[08:44:38] [PASSED] out of max range
[08:44:38] [PASSED] out of min range
[08:44:38] [PASSED] zero dst
[08:44:38] [PASSED] negative src
[08:44:38] [PASSED] negative dst
[08:44:38] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:44:38] ================== drm_test_rect_rotate  ===================
[08:44:38] [PASSED] reflect-x
[08:44:38] [PASSED] reflect-y
[08:44:38] [PASSED] rotate-0
[08:44:38] [PASSED] rotate-90
[08:44:38] [PASSED] rotate-180
[08:44:38] [PASSED] rotate-270
[08:44:38] ============== [PASSED] drm_test_rect_rotate ===============
[08:44:38] ================ drm_test_rect_rotate_inv  =================
[08:44:38] [PASSED] reflect-x
[08:44:38] [PASSED] reflect-y
[08:44:38] [PASSED] rotate-0
[08:44:38] [PASSED] rotate-90
[08:44:38] [PASSED] rotate-180
[08:44:38] [PASSED] rotate-270
[08:44:38] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:44:38] ==================== [PASSED] drm_rect =====================
[08:44:38] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:44:38] ============ drm_test_sysfb_build_fourcc_list  =============
[08:44:38] [PASSED] no native formats
[08:44:38] [PASSED] XRGB8888 as native format
[08:44:38] [PASSED] remove duplicates
[08:44:38] [PASSED] convert alpha formats
[08:44:38] [PASSED] random formats
[08:44:38] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:44:38] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:44:38] ================== drm_fixp (2 subtests) ===================
[08:44:38] [PASSED] drm_test_int2fixp
[08:44:38] [PASSED] drm_test_sm2fixp
[08:44:38] ==================== [PASSED] drm_fixp =====================
[08:44:38] ============================================================
[08:44:38] Testing complete. Ran 624 tests: passed: 624
[08:44:38] Elapsed time: 27.047s total, 1.624s configuring, 25.002s building, 0.375s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:44:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:44:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:44:50] Starting KUnit Kernel (1/1)...
[08:44:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:44:50] ================= ttm_device (5 subtests) ==================
[08:44:50] [PASSED] ttm_device_init_basic
[08:44:50] [PASSED] ttm_device_init_multiple
[08:44:50] [PASSED] ttm_device_fini_basic
[08:44:50] [PASSED] ttm_device_init_no_vma_man
[08:44:50] ================== ttm_device_init_pools  ==================
[08:44:50] [PASSED] No DMA allocations, no DMA32 required
[08:44:50] [PASSED] DMA allocations, DMA32 required
[08:44:50] [PASSED] No DMA allocations, DMA32 required
[08:44:50] [PASSED] DMA allocations, no DMA32 required
[08:44:50] ============== [PASSED] ttm_device_init_pools ==============
[08:44:50] =================== [PASSED] ttm_device ====================
[08:44:50] ================== ttm_pool (8 subtests) ===================
[08:44:50] ================== ttm_pool_alloc_basic  ===================
[08:44:50] [PASSED] One page
[08:44:50] [PASSED] More than one page
[08:44:50] [PASSED] Above the allocation limit
[08:44:50] [PASSED] One page, with coherent DMA mappings enabled
[08:44:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:44:50] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:44:50] ============== ttm_pool_alloc_basic_dma_addr  ==============
[08:44:50] [PASSED] One page
[08:44:50] [PASSED] More than one page
[08:44:50] [PASSED] Above the allocation limit
[08:44:50] [PASSED] One page, with coherent DMA mappings enabled
[08:44:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:44:50] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:44:50] [PASSED] ttm_pool_alloc_order_caching_match
[08:44:50] [PASSED] ttm_pool_alloc_caching_mismatch
[08:44:50] [PASSED] ttm_pool_alloc_order_mismatch
[08:44:50] [PASSED] ttm_pool_free_dma_alloc
[08:44:50] [PASSED] ttm_pool_free_no_dma_alloc
[08:44:50] [PASSED] ttm_pool_fini_basic
[08:44:50] ==================== [PASSED] ttm_pool =====================
[08:44:50] ================ ttm_resource (8 subtests) =================
[08:44:50] ================= ttm_resource_init_basic  =================
[08:44:50] [PASSED] Init resource in TTM_PL_SYSTEM
[08:44:50] [PASSED] Init resource in TTM_PL_VRAM
[08:44:50] [PASSED] Init resource in a private placement
[08:44:50] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:44:50] ============= [PASSED] ttm_resource_init_basic =============
[08:44:50] [PASSED] ttm_resource_init_pinned
[08:44:50] [PASSED] ttm_resource_fini_basic
[08:44:50] [PASSED] ttm_resource_manager_init_basic
[08:44:50] [PASSED] ttm_resource_manager_usage_basic
[08:44:50] [PASSED] ttm_resource_manager_set_used_basic
[08:44:50] [PASSED] ttm_sys_man_alloc_basic
[08:44:50] [PASSED] ttm_sys_man_free_basic
[08:44:50] ================== [PASSED] ttm_resource ===================
[08:44:50] =================== ttm_tt (15 subtests) ===================
[08:44:50] ==================== ttm_tt_init_basic  ====================
[08:44:50] [PASSED] Page-aligned size
[08:44:50] [PASSED] Extra pages requested
[08:44:50] ================ [PASSED] ttm_tt_init_basic ================
[08:44:50] [PASSED] ttm_tt_init_misaligned
[08:44:50] [PASSED] ttm_tt_fini_basic
[08:44:50] [PASSED] ttm_tt_fini_sg
[08:44:50] [PASSED] ttm_tt_fini_shmem
[08:44:50] [PASSED] ttm_tt_create_basic
[08:44:50] [PASSED] ttm_tt_create_invalid_bo_type
[08:44:50] [PASSED] ttm_tt_create_ttm_exists
[08:44:50] [PASSED] ttm_tt_create_failed
[08:44:50] [PASSED] ttm_tt_destroy_basic
[08:44:50] [PASSED] ttm_tt_populate_null_ttm
[08:44:50] [PASSED] ttm_tt_populate_populated_ttm
[08:44:50] [PASSED] ttm_tt_unpopulate_basic
[08:44:50] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:44:50] [PASSED] ttm_tt_swapin_basic
[08:44:50] ===================== [PASSED] ttm_tt ======================
[08:44:50] =================== ttm_bo (14 subtests) ===================
[08:44:50] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[08:44:50] [PASSED] Cannot be interrupted and sleeps
[08:44:50] [PASSED] Cannot be interrupted, locks straight away
[08:44:50] [PASSED] Can be interrupted, sleeps
[08:44:50] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:44:50] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:44:50] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:44:50] [PASSED] ttm_bo_reserve_double_resv
[08:44:50] [PASSED] ttm_bo_reserve_interrupted
[08:44:50] [PASSED] ttm_bo_reserve_deadlock
[08:44:50] [PASSED] ttm_bo_unreserve_basic
[08:44:50] [PASSED] ttm_bo_unreserve_pinned
[08:44:50] [PASSED] ttm_bo_unreserve_bulk
[08:44:50] [PASSED] ttm_bo_fini_basic
[08:44:50] [PASSED] ttm_bo_fini_shared_resv
[08:44:50] [PASSED] ttm_bo_pin_basic
[08:44:50] [PASSED] ttm_bo_pin_unpin_resource
[08:44:50] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:44:50] ===================== [PASSED] ttm_bo ======================
[08:44:50] ============== ttm_bo_validate (21 subtests) ===============
[08:44:50] ============== ttm_bo_init_reserved_sys_man  ===============
[08:44:50] [PASSED] Buffer object for userspace
[08:44:50] [PASSED] Kernel buffer object
[08:44:50] [PASSED] Shared buffer object
[08:44:50] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:44:50] ============== ttm_bo_init_reserved_mock_man  ==============
[08:44:50] [PASSED] Buffer object for userspace
[08:44:50] [PASSED] Kernel buffer object
[08:44:50] [PASSED] Shared buffer object
[08:44:50] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:44:50] [PASSED] ttm_bo_init_reserved_resv
[08:44:50] ================== ttm_bo_validate_basic  ==================
[08:44:50] [PASSED] Buffer object for userspace
[08:44:50] [PASSED] Kernel buffer object
[08:44:50] [PASSED] Shared buffer object
[08:44:50] ============== [PASSED] ttm_bo_validate_basic ==============
[08:44:50] [PASSED] ttm_bo_validate_invalid_placement
[08:44:50] ============= ttm_bo_validate_same_placement  ==============
[08:44:50] [PASSED] System manager
[08:44:50] [PASSED] VRAM manager
[08:44:50] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:44:50] [PASSED] ttm_bo_validate_failed_alloc
[08:44:50] [PASSED] ttm_bo_validate_pinned
[08:44:50] [PASSED] ttm_bo_validate_busy_placement
[08:44:50] ================ ttm_bo_validate_multihop  =================
[08:44:50] [PASSED] Buffer object for userspace
[08:44:50] [PASSED] Kernel buffer object
[08:44:50] [PASSED] Shared buffer object
[08:44:50] ============ [PASSED] ttm_bo_validate_multihop =============
[08:44:50] ========== ttm_bo_validate_no_placement_signaled  ==========
[08:44:50] [PASSED] Buffer object in system domain, no page vector
[08:44:50] [PASSED] Buffer object in system domain with an existing page vector
[08:44:50] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:44:50] ======== ttm_bo_validate_no_placement_not_signaled  ========
[08:44:50] [PASSED] Buffer object for userspace
[08:44:50] [PASSED] Kernel buffer object
[08:44:50] [PASSED] Shared buffer object
[08:44:50] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:44:50] [PASSED] ttm_bo_validate_move_fence_signaled
[08:44:50] ========= ttm_bo_validate_move_fence_not_signaled  =========
[08:44:50] [PASSED] Waits for GPU
[08:44:50] [PASSED] Tries to lock straight away
[08:44:50] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:44:50] [PASSED] ttm_bo_validate_happy_evict
[08:44:50] [PASSED] ttm_bo_validate_all_pinned_evict
[08:44:50] [PASSED] ttm_bo_validate_allowed_only_evict
[08:44:50] [PASSED] ttm_bo_validate_deleted_evict
[08:44:50] [PASSED] ttm_bo_validate_busy_domain_evict
[08:44:50] [PASSED] ttm_bo_validate_evict_gutting
[08:44:50] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[08:44:50] ================= [PASSED] ttm_bo_validate =================
[08:44:50] ============================================================
[08:44:50] Testing complete. Ran 101 tests: passed: 101
[08:44:50] Elapsed time: 11.209s total, 1.644s configuring, 9.350s building, 0.186s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for Prepare GVT for display modularization (rev2)

[Patchwork]

== Series Details ==

Series: Prepare GVT for display modularization (rev2)
URL   : https://patchwork.freedesktop.org/series/159008/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 44ada578e636e19936ed69ea73683ca275f4f0a7
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/g4x_dp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/g4x_hdmi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/hsw_ips.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/i9xx_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/i9xx_wm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/icl_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_dsi.h):
+drivers/gpu/drm/i915/display/intel_acpi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_atomic.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_audio.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_backlight.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_bios.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_casf.c:147:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_casf.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_color.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_color_pipeline.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_colorop.h):
+drivers/gpu/drm/i915/display/intel_combo_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_connector.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_crtc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_crt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_crtc_state_dump.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cursor.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cx0_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dbuf_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_debugfs.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_device.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_driver.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_irq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_display_power.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_power_map.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_power_well.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_reset.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_rps.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dmc.c:131:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:134:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:137:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:140:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:143:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:146:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:149:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:153:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:154:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:157:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:160:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:163:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:166:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:170:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:174:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:178:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:182:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:186:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_aux.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_hdcp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpio_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_link_training.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpll.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpll_mgr.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_mst.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpt_common.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_test.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_drrs.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsb.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_dsi.h):
+drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsi_vbt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dvo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_encoder.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fb_bo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fbc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_fb.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fb_pin.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fdi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fifo_underrun.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_flipq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_frontbuffer.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_global_state.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_gmbus.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdmi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hotplug_irq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_link_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_load_detect.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lspcon.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lt_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lvds.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_modeset_setup.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_modeset_verify.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_opregion.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_overlay.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_panel.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_pch_display.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pch_refclk.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pfit.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pipe_crc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_colorop.h):
+drivers/gpu/drm/i915/display/intel_plane_initial.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pmdemand.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_quirks.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sdvo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_snps_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sprite.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sprite_uapi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_tc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_tv.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vblank.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vdsc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vga.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vrr.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_wm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_prefill.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_scaler.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/skl_universal_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_watermark.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_clock.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_dsi_pll.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_sideband.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/gt/intel_reset.c:1569:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:193:1: error: bad constant expression
+drivers/gpu/drm/i915/i915_gpu_error.c:692:3: warning: symbol 'guc_hw_reg_state' was not declared. Should it be static?
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1932:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1933:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1999:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2000:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2021:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2022:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Prepare GVT for display modularization (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1828 bytes --]

== Series Details ==

Series: Prepare GVT for display modularization (rev2)
URL   : https://patchwork.freedesktop.org/series/159008/
State : success

== Summary ==

CI Bug Log - changes from xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48_BAT -> xe-pw-159008v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-159008v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_module_load@load:
    - bat-bmg-1:          [PASS][1] -> [ABORT][2] ([Intel XE#6818])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/bat-bmg-1/igt@xe_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/bat-bmg-1/igt@xe_module_load@load.html

  * igt@xe_waitfence@abstime:
    - bat-dg2-oem2:       [PASS][3] -> [TIMEOUT][4] ([Intel XE#6506])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/bat-dg2-oem2/igt@xe_waitfence@abstime.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/bat-dg2-oem2/igt@xe_waitfence@abstime.html

  
  [Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
  [Intel XE#6818]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6818


Build changes
-------------

  * Linux: xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48 -> xe-pw-159008v2

  IGT_8671: 8671
  xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48: c84dc8f40d4f4462990de0437ebb2425c9f82b48
  xe-pw-159008v2: 159008v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/index.html

[-- Attachment #2: Type: text/html, Size: 2427 bytes --]

Re: [PATCH 4/7] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro

[Jani Nikula]

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> TRANSCONF() expands via _MMIO_PIPE2, i.e., it uses pipe-based addressing.
> In GVT, some call sites pass an enum transcoder to TRANSCONF(), which now
> routes through INTEL_DISPLAY_DEVICE_PIPE_OFFSET() and ultimately calls
> intel_display_device_pipe_offset(), whose parameter type is enum pipe.
>
> This results in -Werror=enum-conversion.

And that's really why this should be squashed to the previous patch,
with explanation in the commit message, as otherwise the previous one
fails to build.

I don't know, maybe could also add a FIXME comment about the cast?
*shrug*

BR,
Jani.

>
> To address this, cast the index to enum pipe in the GVT-side macro
> override.
>
> This works for all cases as TRANSCODER_{A,B,C,D} all have 1:1 mapping to
> PIPE_{A,B,C,D} except for TRANSCODER_EDP.
>
> There is one place which uses TRANSCONF() with TRANSCODER_EDP, which
> appears to be incorrect. In any case, the cast preserves the previous
> behaviour.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/display_helpers.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
> index 97ebc92768fc..3af878e3d78e 100644
> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
> @@ -17,8 +17,8 @@
>  #ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>  #undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>  #endif
> -#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
> -	intel_display_device_pipe_offset((display), (pipe))
> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
> +	intel_display_device_pipe_offset((display), (enum pipe)(idx))
>  
>  #ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
>  #undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET

-- 
Jani Nikula, Intel

Re: [PATCH 3/7] drm/i915/gvt: Add header to use display offset functions in macros

[Jani Nikula]

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Introduce gvt/display_helpers.h to make DISPLAY_MMIO_BASE and
> INTEL_DISPLAY_DEVICE_*_OFFSET macros call exported display functions.
> This lets GVT keep using existing register macros (e.g.,
> TRANSCONF(display, pipe)) while ensuring offset calculations happen
> through functions instead of accessing display internals.
>
> Ideally, we would remove the display headers that define these macros,
> but some macros in GVT still depend on them and have not yet been
> ported. Keeping those headers leads to build conflicts, so as a
> stopgap, we use temporary ifdef/undef blocks to override the macros
> with API-backed versions. These will be removed once all dependent
> macros are ported and the conflicting headers can be safely dropped.
>
> v2:
>  - Remove prefix `gvt/` while including the header file. (Jani)
>  - Explain the rationale behind temporary ifdef/undefs and plan to drop
>    them. (Jani).
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

See my reply to the next patch, with that incorporated,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/gvt/cmd_parser.c      |  1 +
>  drivers/gpu/drm/i915/gvt/display.c         |  1 +
>  drivers/gpu/drm/i915/gvt/display_helpers.h | 35 ++++++++++++++++++++++
>  drivers/gpu/drm/i915/gvt/fb_decoder.c      |  1 +
>  drivers/gpu/drm/i915/gvt/handlers.c        |  1 +
>  5 files changed, 39 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h
>
> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> index df04e4ead8ea..fbc8a5e28576 100644
> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> @@ -58,6 +58,7 @@
>  #include "gem/i915_gem_context.h"
>  #include "gem/i915_gem_pm.h"
>  #include "gt/intel_context.h"
> +#include "display_helpers.h"
>  
>  #define INVALID_OP    (~0U)
>  
> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
> index 06517d1f07a2..9d6b22b2e4d0 100644
> --- a/drivers/gpu/drm/i915/gvt/display.c
> +++ b/drivers/gpu/drm/i915/gvt/display.c
> @@ -46,6 +46,7 @@
>  #include "display/intel_cursor_regs.h"
>  #include "display/intel_display.h"
>  #include "display/intel_display_core.h"
> +#include "display_helpers.h"
>  #include "display/intel_dpio_phy.h"
>  #include "display/intel_sprite_regs.h"
>  
> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
> new file mode 100644
> index 000000000000..97ebc92768fc
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
> @@ -0,0 +1,35 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef __DISPLAY_HELPERS_H__
> +#define __DISPLAY_HELPERS_H__
> +
> +#include "display/intel_gvt_api.h"
> +
> +#ifdef DISPLAY_MMIO_BASE
> +#undef DISPLAY_MMIO_BASE
> +#endif
> +#define DISPLAY_MMIO_BASE(display) \
> +	intel_display_device_mmio_base((display))
> +
> +#ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
> +#undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
> +#endif
> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
> +	intel_display_device_pipe_offset((display), (pipe))
> +
> +#ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
> +#undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
> +#endif
> +#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
> +	intel_display_device_trans_offset((display), (trans))
> +
> +#ifdef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
> +#undef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
> +#endif
> +#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
> +	intel_display_device_cursor_offset((display), (pipe))
> +
> +#endif /* __DISPLAY_HELPERS_H__ */
> diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
> index a8079cfa8e1d..c402f3b5a0ab 100644
> --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
> +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
> @@ -46,6 +46,7 @@
>  #include "display/intel_display_core.h"
>  #include "display/intel_sprite_regs.h"
>  #include "display/skl_universal_plane_regs.h"
> +#include "display_helpers.h"
>  
>  #define PRIMARY_FORMAT_NUM	16
>  struct pixel_format {
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 36ea12ade849..9ada97d01b6c 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -66,6 +66,7 @@
>  #include "display/vlv_dsi_pll_regs.h"
>  #include "gt/intel_gt_regs.h"
>  #include <linux/vmalloc.h>
> +#include "display_helpers.h"
>  
>  /* XXX FIXME i915 has changed PP_XXX definition */
>  #define PCH_PP_STATUS  _MMIO(0xc7200)

-- 
Jani Nikula, Intel

Re: [PATCH 2/7] drm/i915/display: Add APIs to be used by gvt to get the register offsets

[Jani Nikula]

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> GVT code uses macros for register offsets that require display internal
> structures. This makes clean separation of display code and
> modularization difficult.
>
> Introduce APIs to abstract offset calculations:
> - intel_display_device_pipe_offset()
> - intel_display_device_trans_offset()
> - intel_display_device_cursor_offset()
> - intel_display_device_mmio_base()
>
> These APIs return absolute base offsets for the respective register
> groups, allowing GVT to compute MMIO addresses without using internal
> macros or struct fields. This prepares the path to separate
> display-dependent code from i915/gvt/*.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                 |  1 +
>  .../drm/i915/display/intel_display_limits.c   |  0
>  drivers/gpu/drm/i915/display/intel_gvt_api.c  | 34 +++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_gvt_api.h  | 20 +++++++++++
>  4 files changed, 55 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index f01b5d8a07c7..7974f017f263 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -360,6 +360,7 @@ i915-y += \
>  	display/intel_dvo.o \
>  	display/intel_encoder.o \
>  	display/intel_gmbus.o \
> +	display/intel_gvt_api.o \

Actually, this should be:

i915-$(CONFIG_DRM_I915_GVT) += \
	display/intel_gvt_api.o

i.e. let's not add this stuff unless GVT is actually enabled.

>  	display/intel_hdmi.o \
>  	display/intel_lspcon.o \
>  	display/intel_lt_phy.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.c b/drivers/gpu/drm/i915/display/intel_display_limits.c
> new file mode 100644
> index 000000000000..e69de29bb2d1
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> new file mode 100644
> index 000000000000..8abea318fbc2
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> @@ -0,0 +1,34 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#include <linux/types.h>
> +
> +#include "intel_display_core.h"
> +#include "intel_display_regs.h"
> +#include "intel_gvt_api.h"
> +
> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe)
> +{
> +	return INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_pipe_offset);

And the exports should be

EXPORT_SYMBOL_NS_GPL(..., "I915_GVT");

to limit the exposure.

Sorry for not catching this earlier.

BR,
Jani.

> +
> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans)
> +{
> +	return INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_trans_offset);
> +
> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe)
> +{
> +	return INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_cursor_offset);
> +
> +u32 intel_display_device_mmio_base(struct intel_display *display)
> +{
> +	return DISPLAY_MMIO_BASE(display);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> new file mode 100644
> index 000000000000..e9a1122a988d
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef __INTEL_GVT_API_H__
> +#define __INTEL_GVT_API_H__
> +
> +#include <linux/types.h>
> +
> +enum pipe;
> +enum transcoder;
> +struct intel_display;
> +
> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe);
> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
> +u32 intel_display_device_mmio_base(struct intel_display *display);
> +
> +#endif /* __INTEL_GVT_API_H__ */

-- 
Jani Nikula, Intel

Re: [PATCH 5/7] drm/i915/gvt: Change for_each_pipe to use pipe_valid API

[Jani Nikula]

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Add a new API to check if a given pipe is valid using
> DISPLAY_RUNTIME_INFO() for GVT.
>
> Update GVT to use this API instead of accessing
> `DISPLAY_RUNTIME_INFO->pipe_mask` directly in the `for_each_pipe` macro.
>
> Since `for_each_pipe` is defined in i915/display/intel_display.h, which
> also contains other macros used by gvt/display.c, we cannot drop the
> intel_display.h header yet. This causes a build error because
> `for_each_pipe` is included from both i915/display/intel_display.h and
> gvt/display_helpers.h.
>
> To resolve this, rename the GVT macro to `gvt_for_each_pipe` and make it
> call the new API. This avoids exposing display internals and prepares for
> display modularization.
>
> v2:
>  - Expose API to check if pipe is valid rather than the runtime info
>    pipe mask. (Jani)
>  - Rename the macro to `gvt_for_each_pipe` to resolve build error.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_gvt_api.c | 11 +++++++++++
>  drivers/gpu/drm/i915/display/intel_gvt_api.h |  1 +
>  drivers/gpu/drm/i915/gvt/display.c           |  6 +++---
>  drivers/gpu/drm/i915/gvt/display_helpers.h   |  4 ++++
>  4 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> index 8abea318fbc2..45f12f239a2d 100644
> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.c
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> @@ -32,3 +32,14 @@ u32 intel_display_device_mmio_base(struct intel_display *display)
>  	return DISPLAY_MMIO_BASE(display);
>  }
>  EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
> +
> +bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe)
> +{
> +	u8 pipe_mask = DISPLAY_RUNTIME_INFO(display)->pipe_mask;
> +
> +	if (pipe < PIPE_A || pipe >= I915_MAX_PIPES)
> +		return false;
> +
> +	return !!(pipe_mask & BIT(pipe));

Nitpick, return pipe_mask & BIT(pipe); is sufficient, the !! is
superfluous.

> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_pipe_valid);

EXPORT_SYMBOL_NS_GPL(..., "I915_GVT");

> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> index e9a1122a988d..a53687f7d934 100644
> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.h
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> @@ -16,5 +16,6 @@ u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pi
>  u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
>  u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
>  u32 intel_display_device_mmio_base(struct intel_display *display);
> +bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe);
>  
>  #endif /* __INTEL_GVT_API_H__ */
> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
> index 9d6b22b2e4d0..11855c71e05e 100644
> --- a/drivers/gpu/drm/i915/gvt/display.c
> +++ b/drivers/gpu/drm/i915/gvt/display.c
> @@ -200,7 +200,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
>  			  GEN8_DE_PORT_HOTPLUG(HPD_PORT_B) |
>  			  GEN8_DE_PORT_HOTPLUG(HPD_PORT_C));
>  
> -		for_each_pipe(display, pipe) {
> +		gvt_for_each_pipe(display, pipe) {
>  			vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &=
>  				~(TRANSCONF_ENABLE | TRANSCONF_STATE_ENABLE);
>  			vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
> @@ -516,7 +516,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
>  		vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
>  
>  	/* Disable Primary/Sprite/Cursor plane */
> -	for_each_pipe(display, pipe) {
> +	gvt_for_each_pipe(display, pipe) {
>  		vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
>  		vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
>  		vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) &= ~MCURSOR_MODE_MASK;
> @@ -672,7 +672,7 @@ void intel_vgpu_emulate_vblank(struct intel_vgpu *vgpu)
>  	int pipe;
>  
>  	mutex_lock(&vgpu->vgpu_lock);
> -	for_each_pipe(display, pipe)
> +	gvt_for_each_pipe(display, pipe)
>  		emulate_vblank_on_pipe(vgpu, pipe);
>  	mutex_unlock(&vgpu->vgpu_lock);
>  }
> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
> index 3af878e3d78e..a910f8b8833d 100644
> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
> @@ -32,4 +32,8 @@
>  #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
>  	intel_display_device_cursor_offset((display), (pipe))
>  
> +#define gvt_for_each_pipe(display, __p) \
> +	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
> +		for_each_if(intel_display_device_pipe_valid((display), (enum pipe)(__p)))

I think the caller should use enum pipe instead of int pipe and casting
here.

BR,
Jani.

> +
>  #endif /* __DISPLAY_HELPERS_H__ */

-- 
Jani Nikula, Intel

Re: [PATCH 6/7] drm/i915/gvt: Use the appropriate header for the DPLL macro

[Jani Nikula]

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> The macro `DPLL_ID_SKL_DPLL0` is defined in
> display/intel_dpll_mgr.h. Previously, GVT included the header
> display/intel_display_core.h` because other macros also depended on it.
> After porting those macros to use the new APIs, the only remaining
> dependency was for the DPLL macro.
>
> Replace the indirect include with the correct header and drop
> intel_display_core.h to reduce unnecessary dependencies.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/gvt/display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
> index 11855c71e05e..6e034ab15d44 100644
> --- a/drivers/gpu/drm/i915/gvt/display.c
> +++ b/drivers/gpu/drm/i915/gvt/display.c
> @@ -45,9 +45,9 @@
>  #include "display/intel_crt_regs.h"
>  #include "display/intel_cursor_regs.h"
>  #include "display/intel_display.h"
> -#include "display/intel_display_core.h"
>  #include "display_helpers.h"
>  #include "display/intel_dpio_phy.h"
> +#include "display/intel_dpll_mgr.h"
>  #include "display/intel_sprite_regs.h"
>  
>  static int get_edp_pipe(struct intel_vgpu *vgpu)

-- 
Jani Nikula, Intel

Re: [PATCH 7/7] drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs

[Jani Nikula]

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Now that i915/display macros have been substituted with wrappers that call
> the new display-device helpers, we can drop the conflicting includes from
> GVT and remove the temporary #ifdef/#undef macro overrides.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/gvt/cmd_parser.c      |  1 -
>  drivers/gpu/drm/i915/gvt/display_helpers.h | 12 ------------
>  drivers/gpu/drm/i915/gvt/fb_decoder.c      |  1 -
>  drivers/gpu/drm/i915/gvt/handlers.c        |  1 -
>  4 files changed, 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> index fbc8a5e28576..e5301733f4e4 100644
> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> @@ -53,7 +53,6 @@
>  #include "trace.h"
>  
>  #include "display/i9xx_plane_regs.h"
> -#include "display/intel_display_core.h"
>  #include "display/intel_sprite_regs.h"
>  #include "gem/i915_gem_context.h"
>  #include "gem/i915_gem_pm.h"
> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
> index a910f8b8833d..f365e02a71fb 100644
> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
> @@ -8,27 +8,15 @@
>  
>  #include "display/intel_gvt_api.h"
>  
> -#ifdef DISPLAY_MMIO_BASE
> -#undef DISPLAY_MMIO_BASE
> -#endif
>  #define DISPLAY_MMIO_BASE(display) \
>  	intel_display_device_mmio_base((display))
>  
> -#ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
> -#undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
> -#endif
>  #define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
>  	intel_display_device_pipe_offset((display), (enum pipe)(idx))
>  
> -#ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
> -#undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
> -#endif
>  #define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
>  	intel_display_device_trans_offset((display), (trans))
>  
> -#ifdef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
> -#undef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
> -#endif
>  #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
>  	intel_display_device_cursor_offset((display), (pipe))
>  
> diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
> index c402f3b5a0ab..3d1a7e5c8cd3 100644
> --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
> +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
> @@ -43,7 +43,6 @@
>  
>  #include "display/i9xx_plane_regs.h"
>  #include "display/intel_cursor_regs.h"
> -#include "display/intel_display_core.h"
>  #include "display/intel_sprite_regs.h"
>  #include "display/skl_universal_plane_regs.h"
>  #include "display_helpers.h"
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 9ada97d01b6c..7063d3c77562 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -49,7 +49,6 @@
>  #include "display/i9xx_plane_regs.h"
>  #include "display/intel_crt_regs.h"
>  #include "display/intel_cursor_regs.h"
> -#include "display/intel_display_core.h"
>  #include "display/intel_display_types.h"
>  #include "display/intel_dmc_regs.h"
>  #include "display/intel_dp_aux_regs.h"

-- 
Jani Nikula, Intel

Re: [PATCH 0/7] Prepare GVT for display modularization

[Jani Nikula]

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> GVT currently relies on display internals through register macros and
> helpers like for_each_pipe(). This tight coupling makes modularization
> difficult because GVT should not access struct intel_display directly.
> Add an API for GVT code to expose DISPLAY_RUNTIME_INFO()->pipe_mask.
> This series introduces changes to make GVT independent of display internals
> while keeping existing macros usable:
>
> - Abstract offset calculations in display using
>   INTEL_DISPLAY_DEVICE_*_OFFSET() macros.
> - Add APIs for GVT to compute offsets and pipe mask via functions.
> - Update GVT to use these APIs by overriding helper macros and
>   for_each_pipe().

Oh, this doesn't handle intel_gvt_mmio_table.c, which is part of i915.

That can be a follow-up, I guess, but still needs to be addressed.

BR,
Jani.

>
> Rev2:
> - Remove conflicting headers and get rid of #ifdefs/#undefs in last
>   patch.
> - Wrap macro arguments in paranthesis.
> - Rename for_each_pipe to gvt_for_each_pipe.
>
> PS: I have not yet addressed the question about whether we need to start
>     using _MMIO_TRANS2() instead of_MMIO_PIPE2() in TRANSCONF() macro.
>     That likely needs a separate patch and discussion.
>     For now, I have kept the patch#4 to deal with the
>     -Werror=enum-conversion:
>      - drm/i915/gvt/display_helpers: Cast argument to enum pipe for
>        pipe-offset macro
>
> Ankit Nautiyal (7):
>   drm/i915/display: Abstract pipe/trans/cursor offset calculation
>   drm/i915/display: Add APIs to be used by gvt to get the register
>     offsets
>   drm/i915/gvt: Add header to use display offset functions in macros
>   drm/i915/gvt/display_helpers: Cast argument to enum pipe for
>     pipe-offset macro
>   drm/i915/gvt: Change for_each_pipe to use pipe_valid API
>   drm/i915/gvt: Use the appropriate header for the DPLL macro
>   drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs
>
>  drivers/gpu/drm/i915/Makefile                 |  1 +
>  .../drm/i915/display/intel_display_device.h   | 17 +++++++
>  .../drm/i915/display/intel_display_limits.c   |  0
>  .../drm/i915/display/intel_display_reg_defs.h | 15 ++-----
>  drivers/gpu/drm/i915/display/intel_gvt_api.c  | 45 +++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_gvt_api.h  | 21 +++++++++
>  drivers/gpu/drm/i915/gvt/cmd_parser.c         |  2 +-
>  drivers/gpu/drm/i915/gvt/display.c            |  9 ++--
>  drivers/gpu/drm/i915/gvt/display_helpers.h    | 27 +++++++++++
>  drivers/gpu/drm/i915/gvt/fb_decoder.c         |  2 +-
>  drivers/gpu/drm/i915/gvt/handlers.c           |  2 +-
>  11 files changed, 123 insertions(+), 18 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
>  create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h

-- 
Jani Nikula, Intel

Re: [PATCH 5/7] drm/i915/gvt: Change for_each_pipe to use pipe_valid API

[Nautiyal, Ankit K]

On 12/18/2025 4:06 PM, Jani Nikula wrote:
> On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Add a new API to check if a given pipe is valid using
>> DISPLAY_RUNTIME_INFO() for GVT.
>>
>> Update GVT to use this API instead of accessing
>> `DISPLAY_RUNTIME_INFO->pipe_mask` directly in the `for_each_pipe` macro.
>>
>> Since `for_each_pipe` is defined in i915/display/intel_display.h, which
>> also contains other macros used by gvt/display.c, we cannot drop the
>> intel_display.h header yet. This causes a build error because
>> `for_each_pipe` is included from both i915/display/intel_display.h and
>> gvt/display_helpers.h.
>>
>> To resolve this, rename the GVT macro to `gvt_for_each_pipe` and make it
>> call the new API. This avoids exposing display internals and prepares for
>> display modularization.
>>
>> v2:
>>   - Expose API to check if pipe is valid rather than the runtime info
>>     pipe mask. (Jani)
>>   - Rename the macro to `gvt_for_each_pipe` to resolve build error.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_gvt_api.c | 11 +++++++++++
>>   drivers/gpu/drm/i915/display/intel_gvt_api.h |  1 +
>>   drivers/gpu/drm/i915/gvt/display.c           |  6 +++---
>>   drivers/gpu/drm/i915/gvt/display_helpers.h   |  4 ++++
>>   4 files changed, 19 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> index 8abea318fbc2..45f12f239a2d 100644
>> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> @@ -32,3 +32,14 @@ u32 intel_display_device_mmio_base(struct intel_display *display)
>>   	return DISPLAY_MMIO_BASE(display);
>>   }
>>   EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
>> +
>> +bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe)
>> +{
>> +	u8 pipe_mask = DISPLAY_RUNTIME_INFO(display)->pipe_mask;
>> +
>> +	if (pipe < PIPE_A || pipe >= I915_MAX_PIPES)
>> +		return false;
>> +
>> +	return !!(pipe_mask & BIT(pipe));
> Nitpick, return pipe_mask & BIT(pipe); is sufficient, the !! is
> superfluous.

Ok sure, will drop this.


>
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_pipe_valid);
> EXPORT_SYMBOL_NS_GPL(..., "I915_GVT");

Will change this as suggested.


>
>> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> index e9a1122a988d..a53687f7d934 100644
>> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> @@ -16,5 +16,6 @@ u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pi
>>   u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
>>   u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
>>   u32 intel_display_device_mmio_base(struct intel_display *display);
>> +bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe);
>>   
>>   #endif /* __INTEL_GVT_API_H__ */
>> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
>> index 9d6b22b2e4d0..11855c71e05e 100644
>> --- a/drivers/gpu/drm/i915/gvt/display.c
>> +++ b/drivers/gpu/drm/i915/gvt/display.c
>> @@ -200,7 +200,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
>>   			  GEN8_DE_PORT_HOTPLUG(HPD_PORT_B) |
>>   			  GEN8_DE_PORT_HOTPLUG(HPD_PORT_C));
>>   
>> -		for_each_pipe(display, pipe) {
>> +		gvt_for_each_pipe(display, pipe) {
>>   			vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &=
>>   				~(TRANSCONF_ENABLE | TRANSCONF_STATE_ENABLE);
>>   			vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
>> @@ -516,7 +516,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
>>   		vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
>>   
>>   	/* Disable Primary/Sprite/Cursor plane */
>> -	for_each_pipe(display, pipe) {
>> +	gvt_for_each_pipe(display, pipe) {
>>   		vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
>>   		vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
>>   		vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) &= ~MCURSOR_MODE_MASK;
>> @@ -672,7 +672,7 @@ void intel_vgpu_emulate_vblank(struct intel_vgpu *vgpu)
>>   	int pipe;
>>   
>>   	mutex_lock(&vgpu->vgpu_lock);
>> -	for_each_pipe(display, pipe)
>> +	gvt_for_each_pipe(display, pipe)
>>   		emulate_vblank_on_pipe(vgpu, pipe);
>>   	mutex_unlock(&vgpu->vgpu_lock);
>>   }
>> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> index 3af878e3d78e..a910f8b8833d 100644
>> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
>> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> @@ -32,4 +32,8 @@
>>   #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
>>   	intel_display_device_cursor_offset((display), (pipe))
>>   
>> +#define gvt_for_each_pipe(display, __p) \
>> +	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
>> +		for_each_if(intel_display_device_pipe_valid((display), (enum pipe)(__p)))
> I think the caller should use enum pipe instead of int pipe and casting
> here.

Hmm.. ok will change this in the caller.

Besides this, does the rename of macro to gvt_for_each_pipe() makes 
sense? Or can there be any way we can retain for_each_pipe without using 
the #ifdefs/#undefs?

Thanks again for the comments and suggestions.


Regards,

Ankit

>
> BR,
> Jani.
>
>> +
>>   #endif /* __DISPLAY_HELPERS_H__ */

Re: [PATCH 0/7] Prepare GVT for display modularization

[Nautiyal, Ankit K]

On 12/18/2025 4:27 PM, Jani Nikula wrote:
> On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> GVT currently relies on display internals through register macros and
>> helpers like for_each_pipe(). This tight coupling makes modularization
>> difficult because GVT should not access struct intel_display directly.
>> Add an API for GVT code to expose DISPLAY_RUNTIME_INFO()->pipe_mask.
>> This series introduces changes to make GVT independent of display internals
>> while keeping existing macros usable:
>>
>> - Abstract offset calculations in display using
>>    INTEL_DISPLAY_DEVICE_*_OFFSET() macros.
>> - Add APIs for GVT to compute offsets and pipe mask via functions.
>> - Update GVT to use these APIs by overriding helper macros and
>>    for_each_pipe().
> Oh, this doesn't handle intel_gvt_mmio_table.c, which is part of i915.
>
> That can be a follow-up, I guess, but still needs to be addressed.

Ohh yeah, I had looked into it earlier, but completely missed it after I 
returned from my leave.

Will look into that after this series.

Regards,

Ankit

> BR,
> Jani.
>
>> Rev2:
>> - Remove conflicting headers and get rid of #ifdefs/#undefs in last
>>    patch.
>> - Wrap macro arguments in paranthesis.
>> - Rename for_each_pipe to gvt_for_each_pipe.
>>
>> PS: I have not yet addressed the question about whether we need to start
>>      using _MMIO_TRANS2() instead of_MMIO_PIPE2() in TRANSCONF() macro.
>>      That likely needs a separate patch and discussion.
>>      For now, I have kept the patch#4 to deal with the
>>      -Werror=enum-conversion:
>>       - drm/i915/gvt/display_helpers: Cast argument to enum pipe for
>>         pipe-offset macro
>>
>> Ankit Nautiyal (7):
>>    drm/i915/display: Abstract pipe/trans/cursor offset calculation
>>    drm/i915/display: Add APIs to be used by gvt to get the register
>>      offsets
>>    drm/i915/gvt: Add header to use display offset functions in macros
>>    drm/i915/gvt/display_helpers: Cast argument to enum pipe for
>>      pipe-offset macro
>>    drm/i915/gvt: Change for_each_pipe to use pipe_valid API
>>    drm/i915/gvt: Use the appropriate header for the DPLL macro
>>    drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs
>>
>>   drivers/gpu/drm/i915/Makefile                 |  1 +
>>   .../drm/i915/display/intel_display_device.h   | 17 +++++++
>>   .../drm/i915/display/intel_display_limits.c   |  0
>>   .../drm/i915/display/intel_display_reg_defs.h | 15 ++-----
>>   drivers/gpu/drm/i915/display/intel_gvt_api.c  | 45 +++++++++++++++++++
>>   drivers/gpu/drm/i915/display/intel_gvt_api.h  | 21 +++++++++
>>   drivers/gpu/drm/i915/gvt/cmd_parser.c         |  2 +-
>>   drivers/gpu/drm/i915/gvt/display.c            |  9 ++--
>>   drivers/gpu/drm/i915/gvt/display_helpers.h    | 27 +++++++++++
>>   drivers/gpu/drm/i915/gvt/fb_decoder.c         |  2 +-
>>   drivers/gpu/drm/i915/gvt/handlers.c           |  2 +-
>>   11 files changed, 123 insertions(+), 18 deletions(-)
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
>>   create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h

Re: [PATCH 4/7] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro

[Nautiyal, Ankit K]

On 12/18/2025 3:55 PM, Jani Nikula wrote:
> On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> TRANSCONF() expands via _MMIO_PIPE2, i.e., it uses pipe-based addressing.
>> In GVT, some call sites pass an enum transcoder to TRANSCONF(), which now
>> routes through INTEL_DISPLAY_DEVICE_PIPE_OFFSET() and ultimately calls
>> intel_display_device_pipe_offset(), whose parameter type is enum pipe.
>>
>> This results in -Werror=enum-conversion.
> And that's really why this should be squashed to the previous patch,
> with explanation in the commit message, as otherwise the previous one
> fails to build.
>
> I don't know, maybe could also add a FIXME comment about the cast?
> *shrug*

Alright, will add a fix me and merge this with the previous patch.

Regards,

Ankit

>
> BR,
> Jani.
>
>> To address this, cast the index to enum pipe in the GVT-side macro
>> override.
>>
>> This works for all cases as TRANSCODER_{A,B,C,D} all have 1:1 mapping to
>> PIPE_{A,B,C,D} except for TRANSCODER_EDP.
>>
>> There is one place which uses TRANSCONF() with TRANSCODER_EDP, which
>> appears to be incorrect. In any case, the cast preserves the previous
>> behaviour.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gvt/display_helpers.h | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> index 97ebc92768fc..3af878e3d78e 100644
>> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
>> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> @@ -17,8 +17,8 @@
>>   #ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>>   #undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>>   #endif
>> -#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
>> -	intel_display_device_pipe_offset((display), (pipe))
>> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
>> +	intel_display_device_pipe_offset((display), (enum pipe)(idx))
>>   
>>   #ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
>>   #undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET

Re: [PATCH 2/7] drm/i915/display: Add APIs to be used by gvt to get the register offsets

[Nautiyal, Ankit K]

On 12/18/2025 4:02 PM, Jani Nikula wrote:
> On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> GVT code uses macros for register offsets that require display internal
>> structures. This makes clean separation of display code and
>> modularization difficult.
>>
>> Introduce APIs to abstract offset calculations:
>> - intel_display_device_pipe_offset()
>> - intel_display_device_trans_offset()
>> - intel_display_device_cursor_offset()
>> - intel_display_device_mmio_base()
>>
>> These APIs return absolute base offsets for the respective register
>> groups, allowing GVT to compute MMIO addresses without using internal
>> macros or struct fields. This prepares the path to separate
>> display-dependent code from i915/gvt/*.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>   drivers/gpu/drm/i915/Makefile                 |  1 +
>>   .../drm/i915/display/intel_display_limits.c   |  0
>>   drivers/gpu/drm/i915/display/intel_gvt_api.c  | 34 +++++++++++++++++++
>>   drivers/gpu/drm/i915/display/intel_gvt_api.h  | 20 +++++++++++
>>   4 files changed, 55 insertions(+)
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
>>
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index f01b5d8a07c7..7974f017f263 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -360,6 +360,7 @@ i915-y += \
>>   	display/intel_dvo.o \
>>   	display/intel_encoder.o \
>>   	display/intel_gmbus.o \
>> +	display/intel_gvt_api.o \
> Actually, this should be:
>
> i915-$(CONFIG_DRM_I915_GVT) += \
> 	display/intel_gvt_api.o
>
> i.e. let's not add this stuff unless GVT is actually enabled.


Got it. Will fix this.


>
>>   	display/intel_hdmi.o \
>>   	display/intel_lspcon.o \
>>   	display/intel_lt_phy.o \
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.c b/drivers/gpu/drm/i915/display/intel_display_limits.c
>> new file mode 100644
>> index 000000000000..e69de29bb2d1
>> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> new file mode 100644
>> index 000000000000..8abea318fbc2
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> @@ -0,0 +1,34 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#include <linux/types.h>
>> +
>> +#include "intel_display_core.h"
>> +#include "intel_display_regs.h"
>> +#include "intel_gvt_api.h"
>> +
>> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe)
>> +{
>> +	return INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe);
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_pipe_offset);
> And the exports should be
>
> EXPORT_SYMBOL_NS_GPL(..., "I915_GVT");
>
> to limit the exposure.

Will take care of this in next version.


Thanks & Regards,

Ankit

>
> Sorry for not catching this earlier.
>
> BR,
> Jani.
>
>> +
>> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans)
>> +{
>> +	return INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans);
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_trans_offset);
>> +
>> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe)
>> +{
>> +	return INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe);
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_cursor_offset);
>> +
>> +u32 intel_display_device_mmio_base(struct intel_display *display)
>> +{
>> +	return DISPLAY_MMIO_BASE(display);
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
>> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> new file mode 100644
>> index 000000000000..e9a1122a988d
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> @@ -0,0 +1,20 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#ifndef __INTEL_GVT_API_H__
>> +#define __INTEL_GVT_API_H__
>> +
>> +#include <linux/types.h>
>> +
>> +enum pipe;
>> +enum transcoder;
>> +struct intel_display;
>> +
>> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe);
>> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
>> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
>> +u32 intel_display_device_mmio_base(struct intel_display *display);
>> +
>> +#endif /* __INTEL_GVT_API_H__ */

✗ Xe.CI.Full: failure for Prepare GVT for display modularization (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 83443 bytes --]

== Series Details ==

Series: Prepare GVT for display modularization (rev2)
URL   : https://patchwork.freedesktop.org/series/159008/
State : failure

== Summary ==

CI Bug Log - changes from xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48_FULL -> xe-pw-159008v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-159008v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-159008v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-159008v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@core_getversion@basic:
    - shard-bmg:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@core_getversion@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@core_getversion@basic.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-lnl:          NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@xe_module_load@many-reload:
    - shard-bmg:          NOTRUN -> [FAIL][4]
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_module_load@many-reload.html

  
#### Warnings ####

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-bmg:          [SKIP][5] ([Intel XE#6703]) -> [SKIP][6] +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  
Known issues
------------

  Here are the changes found in xe-pw-159008v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@unplug-rescan:
    - shard-bmg:          [PASS][7] -> [SKIP][8] ([Intel XE#6779])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@core_hotunplug@unplug-rescan.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@core_hotunplug@unplug-rescan.html

  * igt@fbdev@write:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2134])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@fbdev@write.html

  * igt@intel_hwmon@hwmon-write:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#1125])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@intel_hwmon@hwmon-write.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-bmg:          [PASS][11] -> [DMESG-FAIL][12] ([Intel XE#5545]) +1 other test dmesg-fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@kms_atomic_transition@plane-all-modeset-transition.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#1407])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2327])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#1124]) +3 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#1124]) +3 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#367]) +4 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#2887]) +2 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#3432])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2887]) +7 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#2669]) +3 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2325]) +2 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_frames@hdmi-cmp-planes-random:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2252])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_chamelium_frames@hdmi-cmp-planes-random.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2390])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@suspend-resume@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][26] ([Intel XE#1178]) +2 other tests fail
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_content_protection@suspend-resume@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2320]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_cursor_crc@cursor-random-32x10:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#1424]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_cursor_crc@cursor-random-32x10.html

  * igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][29] ([Intel XE#5354])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2286])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#1508]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_fb_coherency@memset-crc@mmap-offset-wc:
    - shard-bmg:          NOTRUN -> [CRASH][32] ([Intel XE#6706])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@kms_fb_coherency@memset-crc@mmap-offset-wc.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#4156])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#776])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2293]) +5 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#1401] / [Intel XE#1745])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#1401])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-default-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-pgflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#651])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#4141]) +7 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#656]) +9 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#2311]) +17 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2313]) +16 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2:
    - shard-bmg:          [PASS][44] -> [ABORT][45] ([Intel XE#6740]) +1 other test abort
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-10/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-1/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#6901])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#599])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#870])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#3309])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#1439] / [Intel XE#3141])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@drm-resources-equal:
    - shard-bmg:          [PASS][51] -> [SKIP][52] ([Intel XE#6693])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_pm_rpm@drm-resources-equal.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_pm_rpm@drm-resources-equal.html

  * igt@kms_pm_rpm@legacy-planes-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#6693])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_pm_rpm@legacy-planes-dpms.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#1406] / [Intel XE#2893])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#1406] / [Intel XE#4608]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr@fbc-pr-suspend:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#1406])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@kms_psr@fbc-pr-suspend.html

  * igt@kms_psr@fbc-psr2-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#1406] / [Intel XE#6703]) +3 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_psr@fbc-psr2-primary-page-flip.html

  * igt@kms_psr@psr2-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +7 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_psr@psr2-primary-page-flip.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#3414] / [Intel XE#3904])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#2413])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_sharpness_filter@filter-formats:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#6503])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@kms_sharpness_filter@filter-formats.html

  * igt@kms_vrr@max-min:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#1499])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_vrr@max-min.html

  * igt@kms_vrr@max-min@pipe-a-edp-1:
    - shard-lnl:          [PASS][65] -> [FAIL][66] ([Intel XE#4227]) +1 other test fail
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-lnl-8/igt@kms_vrr@max-min@pipe-a-edp-1.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-2/igt@kms_vrr@max-min@pipe-a-edp-1.html

  * igt@xe_eudebug@basic-vm-bind-ufence-reconnect:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#6557] / [Intel XE#6703]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html

  * igt@xe_eudebug@basic-vms:
    - shard-lnl:          NOTRUN -> [SKIP][68] ([Intel XE#4837])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@xe_eudebug@basic-vms.html

  * igt@xe_eudebug@discovery-race-vmbind:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#4837]) +5 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_eudebug@discovery-race-vmbind.html

  * igt@xe_eudebug_online@single-step-one:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#4837] / [Intel XE#6665]) +6 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_eudebug_online@single-step-one.html

  * igt@xe_evict@evict-beng-cm-threads-small:
    - shard-lnl:          NOTRUN -> [SKIP][71] ([Intel XE#688]) +1 other test skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@xe_evict@evict-beng-cm-threads-small.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#1392]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html

  * igt@xe_exec_basic@multigpu-once-null-defer-mmap:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#2322]) +7 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@xe_exec_basic@multigpu-once-null-defer-mmap.html

  * igt@xe_exec_multi_queue@max-queues-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#6874]) +3 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@xe_exec_multi_queue@max-queues-userptr.html

  * igt@xe_exec_multi_queue@two-queues-priority:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#6874]) +17 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_exec_multi_queue@two-queues-priority.html

  * igt@xe_exec_system_allocator@madvise-split-vma-with-mapping:
    - shard-lnl:          NOTRUN -> [WARN][76] ([Intel XE#5786]) +1 other test warn
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@xe_exec_system_allocator@madvise-split-vma-with-mapping.html

  * igt@xe_exec_system_allocator@many-64k-mmap-huge:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#5007])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@xe_exec_system_allocator@many-64k-mmap-huge.html

  * igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-new-huge:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#4943]) +9 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-new-huge.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc-madvise:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#6703]) +203 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc-madvise.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-huge:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#4943]) +4 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-huge.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104]) -> ([PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [SKIP][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130]) ([Intel XE#2457])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-7/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-7/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-8/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-10/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-7/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-10/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-10/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-8/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-2/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@xe_module_load@load.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-4/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-2/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-1/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_module_load@load.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@xe_module_load@load.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@xe_module_load@load.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@xe_module_load@load.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-10/igt@xe_module_load@load.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-10/igt@xe_module_load@load.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-1/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-1/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_module_load@load.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@xe_module_load@load.html

  * igt@xe_pm@d3hot-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][131] ([Intel XE#5742])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pmu@engine-activity-accuracy-90:
    - shard-lnl:          NOTRUN -> [FAIL][132] ([Intel XE#6251]) +3 other tests fail
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90.html

  * igt@xe_query@multigpu-query-engines:
    - shard-bmg:          NOTRUN -> [SKIP][133] ([Intel XE#944])
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_query@multigpu-query-engines.html

  * igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout:
    - shard-bmg:          [PASS][134] -> [SKIP][135] ([Intel XE#6703]) +330 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html

  * igt@xe_vm@large-userptr-split-misaligned-binds-268435456:
    - shard-bmg:          [PASS][136] -> [SKIP][137] ([Intel XE#6557] / [Intel XE#6703]) +2 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_vm@large-userptr-split-misaligned-binds-268435456.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_vm@large-userptr-split-misaligned-binds-268435456.html

  
#### Possible fixes ####

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-bmg:          [SKIP][138] ([Intel XE#2316]) -> [PASS][139]
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-4/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-10/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@2x-flip-vs-wf_vblank:
    - shard-bmg:          [SKIP][140] ([Intel XE#6557] / [Intel XE#6703]) -> [PASS][141] +4 other tests pass
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_flip@2x-flip-vs-wf_vblank.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_flip@2x-flip-vs-wf_vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][142] ([Intel XE#301]) -> [PASS][143] +1 other test pass
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_hdr@bpc-switch@pipe-a-dp-2:
    - shard-bmg:          [ABORT][144] ([Intel XE#6740]) -> [PASS][145] +1 other test pass
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-7/igt@kms_hdr@bpc-switch@pipe-a-dp-2.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_hdr@bpc-switch@pipe-a-dp-2.html

  * igt@kms_pm_rpm@modeset-stress-extra-wait:
    - shard-bmg:          [SKIP][146] ([Intel XE#6693]) -> [PASS][147] +1 other test pass
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_pm_rpm@modeset-stress-extra-wait.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_pm_rpm@modeset-stress-extra-wait.html

  * igt@xe_exec_system_allocator@process-many-new-nomemset:
    - shard-bmg:          [SKIP][148] ([Intel XE#6703]) -> [PASS][149] +317 other tests pass
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_exec_system_allocator@process-many-new-nomemset.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@xe_exec_system_allocator@process-many-new-nomemset.html

  * igt@xe_exec_system_allocator@processes-evict-malloc:
    - shard-bmg:          [ABORT][150] -> [PASS][151]
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-10/igt@xe_exec_system_allocator@processes-evict-malloc.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-4/igt@xe_exec_system_allocator@processes-evict-malloc.html

  * igt@xe_live_ktest@xe_bo:
    - shard-bmg:          [SKIP][152] ([Intel XE#2229]) -> [PASS][153] +1 other test pass
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_live_ktest@xe_bo.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@xe_live_ktest@xe_bo.html

  * igt@xe_module_load@reload:
    - shard-bmg:          [FAIL][154] -> [PASS][155]
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_module_load@reload.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@xe_module_load@reload.html

  * igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_decode0:
    - shard-lnl:          [FAIL][156] ([Intel XE#6251]) -> [PASS][157]
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_decode0.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-lnl-2/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_decode0.html

  
#### Warnings ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-bmg:          [SKIP][158] ([Intel XE#6703]) -> [SKIP][159] ([Intel XE#2370])
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-bmg:          [SKIP][160] ([Intel XE#6703]) -> [SKIP][161] ([Intel XE#2327])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_big_fb@linear-32bpp-rotate-270.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-bmg:          [SKIP][162] ([Intel XE#2327]) -> [SKIP][163] ([Intel XE#6703])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_big_fb@linear-64bpp-rotate-90.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-bmg:          [SKIP][164] ([Intel XE#1124]) -> [SKIP][165] ([Intel XE#6703]) +6 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-bmg:          [SKIP][166] ([Intel XE#6703]) -> [SKIP][167] ([Intel XE#1124]) +4 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-bmg:          [SKIP][168] ([Intel XE#6703]) -> [SKIP][169] ([Intel XE#607]) +1 other test skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p:
    - shard-bmg:          [SKIP][170] ([Intel XE#2314] / [Intel XE#2894]) -> [SKIP][171] ([Intel XE#6703])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-3-displays-1920x1080p:
    - shard-bmg:          [SKIP][172] ([Intel XE#6703]) -> [SKIP][173] ([Intel XE#367]) +1 other test skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs:
    - shard-bmg:          [SKIP][174] ([Intel XE#6557] / [Intel XE#6703]) -> [SKIP][175] ([Intel XE#2887])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs:
    - shard-bmg:          [SKIP][176] ([Intel XE#6703]) -> [SKIP][177] ([Intel XE#2887]) +9 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          [SKIP][178] ([Intel XE#6703]) -> [SKIP][179] ([Intel XE#3432])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-bmg:          [SKIP][180] ([Intel XE#3432]) -> [SKIP][181] ([Intel XE#6703])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs:
    - shard-bmg:          [SKIP][182] ([Intel XE#2887]) -> [SKIP][183] ([Intel XE#6703]) +8 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-bmg:          [SKIP][184] ([Intel XE#2325]) -> [SKIP][185] ([Intel XE#6703])
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_chamelium_color@ctm-0-75.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_edid@dp-edid-resolution-list:
    - shard-bmg:          [SKIP][186] ([Intel XE#2252]) -> [SKIP][187] ([Intel XE#6703]) +6 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_chamelium_edid@dp-edid-resolution-list.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_chamelium_edid@dp-edid-resolution-list.html

  * igt@kms_chamelium_frames@hdmi-aspect-ratio:
    - shard-bmg:          [SKIP][188] ([Intel XE#6703]) -> [SKIP][189] ([Intel XE#2252]) +5 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_chamelium_frames@hdmi-aspect-ratio.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@kms_chamelium_frames@hdmi-aspect-ratio.html

  * igt@kms_chamelium_sharpness_filter@filter-basic:
    - shard-bmg:          [SKIP][190] ([Intel XE#6703]) -> [SKIP][191] ([Intel XE#6507])
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_chamelium_sharpness_filter@filter-basic.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@kms_chamelium_sharpness_filter@filter-basic.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          [SKIP][192] ([Intel XE#2341]) -> [SKIP][193] ([Intel XE#6703])
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_content_protection@content-type-change.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@srm:
    - shard-bmg:          [SKIP][194] ([Intel XE#6703]) -> [FAIL][195] ([Intel XE#1178])
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_content_protection@srm.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [FAIL][196] ([Intel XE#6707]) -> [SKIP][197] ([Intel XE#6703])
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_content_protection@uevent.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-bmg:          [SKIP][198] ([Intel XE#6703]) -> [SKIP][199] ([Intel XE#2321]) +1 other test skip
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-bmg:          [SKIP][200] ([Intel XE#2321]) -> [SKIP][201] ([Intel XE#6703]) +2 other tests skip
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-512x512.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-onscreen-max-size:
    - shard-bmg:          [SKIP][202] ([Intel XE#2320]) -> [SKIP][203] ([Intel XE#6703])
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_cursor_crc@cursor-onscreen-max-size.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-max-size.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-bmg:          [SKIP][204] ([Intel XE#6703]) -> [SKIP][205] ([Intel XE#2320]) +1 other test skip
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_cursor_crc@cursor-sliding-max-size.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [FAIL][206] ([Intel XE#6715]) -> [SKIP][207] ([Intel XE#6703])
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-bmg:          [SKIP][208] ([Intel XE#6703]) -> [SKIP][209] ([Intel XE#4354])
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_dp_link_training@non-uhbr-mst.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-bmg:          [SKIP][210] ([Intel XE#2244]) -> [SKIP][211] ([Intel XE#6703])
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_fb_coherency@memset-crc:
    - shard-bmg:          [SKIP][212] ([Intel XE#6703]) -> [CRASH][213] ([Intel XE#6706])
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_fb_coherency@memset-crc.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@kms_fb_coherency@memset-crc.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-bmg:          [SKIP][214] ([Intel XE#6703]) -> [SKIP][215] ([Intel XE#4156])
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_fbcon_fbt@fbc-suspend.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_feature_discovery@display-4x:
    - shard-bmg:          [SKIP][216] ([Intel XE#1138]) -> [SKIP][217] ([Intel XE#6703])
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_feature_discovery@display-4x.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-bmg:          [SKIP][218] ([Intel XE#6703]) -> [SKIP][219] ([Intel XE#2375])
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_feature_discovery@dp-mst.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-bmg:          [SKIP][220] ([Intel XE#2293] / [Intel XE#2380]) -> [SKIP][221] ([Intel XE#6703]) +3 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-bmg:          [SKIP][222] ([Intel XE#6703]) -> [SKIP][223] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          [SKIP][224] ([Intel XE#6703]) -> [SKIP][225] ([Intel XE#2311]) +11 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render:
    - shard-bmg:          [SKIP][226] ([Intel XE#2311]) -> [SKIP][227] ([Intel XE#6703]) +16 other tests skip
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render:
    - shard-bmg:          [SKIP][228] ([Intel XE#6703]) -> [SKIP][229] ([Intel XE#4141]) +7 other tests skip
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][230] ([Intel XE#4141]) -> [SKIP][231] ([Intel XE#6703]) +7 other tests skip
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          [SKIP][232] ([Intel XE#4141]) -> [SKIP][233] ([Intel XE#6557] / [Intel XE#6703])
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][234] ([Intel XE#2312]) -> [SKIP][235] ([Intel XE#2311]) +1 other test skip
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][236] ([Intel XE#6557] / [Intel XE#6703]) -> [SKIP][237] ([Intel XE#2311])
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          [SKIP][238] ([Intel XE#2352]) -> [SKIP][239] ([Intel XE#6703])
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][240] ([Intel XE#2313]) -> [SKIP][241] ([Intel XE#6703]) +18 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          [SKIP][242] ([Intel XE#6703]) -> [SKIP][243] ([Intel XE#2313]) +16 other tests skip
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][244] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][245] ([Intel XE#6703])
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [ABORT][246] ([Intel XE#6740]) -> [SKIP][247] ([Intel XE#1503])
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-9/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-bmg:          [SKIP][248] -> [SKIP][249] ([Intel XE#6703]) +1 other test skip
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_joiner@basic-force-ultra-joiner.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          [SKIP][250] ([Intel XE#6703]) -> [SKIP][251] ([Intel XE#2501])
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_panel_fitting@legacy:
    - shard-bmg:          [SKIP][252] ([Intel XE#2486]) -> [SKIP][253] ([Intel XE#6703])
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_panel_fitting@legacy.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_panel_fitting@legacy.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-bmg:          [SKIP][254] ([Intel XE#4329]) -> [SKIP][255] ([Intel XE#6703])
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          [SKIP][256] ([Intel XE#6703]) -> [SKIP][257] ([Intel XE#5021])
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-y.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-bmg:          [SKIP][258] ([Intel XE#6886]) -> [SKIP][259] ([Intel XE#6703]) +1 other test skip
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-bmg:          [SKIP][260] ([Intel XE#6703]) -> [SKIP][261] ([Intel XE#2505])
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_pm_dc@deep-pkgc.html
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-bmg:          [SKIP][262] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) -> [SKIP][263] ([Intel XE#6693])
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
    - shard-bmg:          [SKIP][264] ([Intel XE#1406] / [Intel XE#1489]) -> [SKIP][265] ([Intel XE#1406] / [Intel XE#6703]) +3 other tests skip
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area:
    - shard-bmg:          [SKIP][266] ([Intel XE#1406] / [Intel XE#6703]) -> [SKIP][267] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          [SKIP][268] ([Intel XE#1406] / [Intel XE#2387]) -> [SKIP][269] ([Intel XE#1406] / [Intel XE#6703])
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_psr2_su@page_flip-p010.html
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@psr-cursor-plane-onoff:
    - shard-bmg:          [SKIP][270] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) -> [SKIP][271] ([Intel XE#1406] / [Intel XE#6703]) +6 other tests skip
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_psr@psr-cursor-plane-onoff.html
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_psr@psr-cursor-plane-onoff.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          [SKIP][272] ([Intel XE#1406] / [Intel XE#6703]) -> [SKIP][273] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_psr@psr-primary-page-flip.html
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-bmg:          [SKIP][274] ([Intel XE#1406] / [Intel XE#2414]) -> [SKIP][275] ([Intel XE#1406] / [Intel XE#6703])
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-bmg:          [SKIP][276] ([Intel XE#6703]) -> [SKIP][277] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_rotation_crc@primary-rotation-90.html
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-bmg:          [SKIP][278] ([Intel XE#6703]) -> [SKIP][279] ([Intel XE#2330])
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-bmg:          [SKIP][280] ([Intel XE#3414] / [Intel XE#3904]) -> [SKIP][281] ([Intel XE#6703]) +1 other test skip
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_sharpness_filter@filter-suspend:
    - shard-bmg:          [SKIP][282] ([Intel XE#6703]) -> [SKIP][283] ([Intel XE#6503]) +1 other test skip
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_sharpness_filter@filter-suspend.html
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_sharpness_filter@filter-suspend.html

  * igt@kms_sharpness_filter@invalid-filter-with-plane:
    - shard-bmg:          [SKIP][284] ([Intel XE#6503]) -> [SKIP][285] ([Intel XE#6703]) +2 other tests skip
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@kms_sharpness_filter@invalid-filter-with-plane.html
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@kms_sharpness_filter@invalid-filter-with-plane.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][286] ([Intel XE#2426]) -> [SKIP][287] ([Intel XE#6703])
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@lobf:
    - shard-bmg:          [SKIP][288] ([Intel XE#6703]) -> [SKIP][289] ([Intel XE#2168])
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_vrr@lobf.html
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@kms_vrr@lobf.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-bmg:          [SKIP][290] ([Intel XE#6703]) -> [SKIP][291] ([Intel XE#1499])
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@kms_vrr@seamless-rr-switch-drrs.html
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-bmg:          [SKIP][292] ([Intel XE#1499]) -> [SKIP][293] ([Intel XE#6703])
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@kms_vrr@seamless-rr-switch-vrr.html
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@testdisplay:
    - shard-bmg:          [SKIP][294] ([Intel XE#6703]) -> [ABORT][295] ([Intel XE#6740])
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@testdisplay.html
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@testdisplay.html

  * igt@xe_compute@eu-busy-10s:
    - shard-bmg:          [SKIP][296] ([Intel XE#6599]) -> [SKIP][297] ([Intel XE#6703])
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@xe_compute@eu-busy-10s.html
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@xe_compute@eu-busy-10s.html

  * igt@xe_eudebug@basic-exec-queues-enable:
    - shard-bmg:          [SKIP][298] ([Intel XE#4837]) -> [SKIP][299] ([Intel XE#6703]) +8 other tests skip
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_eudebug@basic-exec-queues-enable.html
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_eudebug@basic-exec-queues-enable.html

  * igt@xe_eudebug@basic-vm-access-userptr:
    - shard-bmg:          [SKIP][300] ([Intel XE#6703]) -> [SKIP][301] ([Intel XE#4837]) +3 other tests skip
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_eudebug@basic-vm-access-userptr.html
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@xe_eudebug@basic-vm-access-userptr.html

  * igt@xe_eudebug_online@breakpoint-many-sessions-single-tile:
    - shard-bmg:          [SKIP][302] ([Intel XE#4837] / [Intel XE#6665]) -> [SKIP][303] ([Intel XE#6703]) +2 other tests skip
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@xe_eudebug_online@breakpoint-many-sessions-single-tile.html
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@xe_eudebug_online@breakpoint-many-sessions-single-tile.html

  * igt@xe_eudebug_online@pagefault-read-stress:
    - shard-bmg:          [SKIP][304] ([Intel XE#6665] / [Intel XE#6681]) -> [SKIP][305] ([Intel XE#6703])
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@xe_eudebug_online@pagefault-read-stress.html
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_eudebug_online@pagefault-read-stress.html

  * igt@xe_eudebug_online@single-step:
    - shard-bmg:          [SKIP][306] ([Intel XE#6703]) -> [SKIP][307] ([Intel XE#4837] / [Intel XE#6665]) +2 other tests skip
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_eudebug_online@single-step.html
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@xe_eudebug_online@single-step.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [SKIP][308] ([Intel XE#6703]) -> [INCOMPLETE][309] ([Intel XE#6321])
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_evict@evict-mixed-many-threads-small.html
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap:
    - shard-bmg:          [SKIP][310] ([Intel XE#6703]) -> [SKIP][311] ([Intel XE#2322]) +4 other tests skip
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate:
    - shard-bmg:          [SKIP][312] ([Intel XE#2322]) -> [SKIP][313] ([Intel XE#6703]) +4 other tests skip
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html

  * igt@xe_exec_multi_queue@many-queues-basic-smem:
    - shard-bmg:          [SKIP][314] ([Intel XE#6703]) -> [SKIP][315] ([Intel XE#6874]) +14 other tests skip
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_exec_multi_queue@many-queues-basic-smem.html
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@xe_exec_multi_queue@many-queues-basic-smem.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-dyn-priority-smem:
    - shard-bmg:          [SKIP][316] ([Intel XE#6874]) -> [SKIP][317] ([Intel XE#6703]) +16 other tests skip
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-9/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-dyn-priority-smem.html
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-2/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-dyn-priority-smem.html

  * igt@xe_exec_system_allocator@many-64k-mmap-new-huge:
    - shard-bmg:          [SKIP][318] ([Intel XE#6703]) -> [SKIP][319] ([Intel XE#5007])
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_exec_system_allocator@many-64k-mmap-new-huge.html
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-3/igt@xe_exec_system_allocator@many-64k-mmap-new-huge.html

  * igt@xe_exec_system_allocator@many-execqueues-mmap-free-huge:
    - shard-bmg:          [SKIP][320] ([Intel XE#4943]) -> [SKIP][321] ([Intel XE#6703]) +16 other tests skip
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@xe_exec_system_allocator@many-execqueues-mmap-free-huge.html
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_exec_system_allocator@many-execqueues-mmap-free-huge.html

  * igt@xe_exec_system_allocator@many-large-execqueues-mmap-huge:
    - shard-bmg:          [SKIP][322] ([Intel XE#6703]) -> [SKIP][323] ([Intel XE#4943]) +10 other tests skip
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_exec_system_allocator@many-large-execqueues-mmap-huge.html
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@xe_exec_system_allocator@many-large-execqueues-mmap-huge.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][324] ([Intel XE#5466]) -> [SKIP][325] ([Intel XE#6703])
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          [SKIP][326] ([Intel XE#2245]) -> [SKIP][327] ([Intel XE#6703])
   [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_pat@pat-index-xelp.html
   [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pm@d3cold-basic:
    - shard-bmg:          [SKIP][328] ([Intel XE#6703]) -> [SKIP][329] ([Intel XE#2284]) +1 other test skip
   [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_pm@d3cold-basic.html
   [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@xe_pm@d3cold-basic.html

  * igt@xe_pxp@display-black-pxp-fb:
    - shard-bmg:          [SKIP][330] ([Intel XE#4733]) -> [SKIP][331] ([Intel XE#6703]) +1 other test skip
   [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-1/igt@xe_pxp@display-black-pxp-fb.html
   [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_pxp@display-black-pxp-fb.html

  * igt@xe_pxp@pxp-termination-key-update-post-termination-irq:
    - shard-bmg:          [SKIP][332] ([Intel XE#6703]) -> [SKIP][333] ([Intel XE#4733]) +1 other test skip
   [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html
   [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-8/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-bmg:          [SKIP][334] ([Intel XE#6703]) -> [SKIP][335] ([Intel XE#944]) +2 other tests skip
   [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-5/igt@xe_query@multigpu-query-mem-usage.html
   [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-7/igt@xe_query@multigpu-query-mem-usage.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-bmg:          [SKIP][336] ([Intel XE#944]) -> [SKIP][337] ([Intel XE#6703]) +2 other tests skip
   [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48/shard-bmg-3/igt@xe_query@multigpu-query-pxp-status.html
   [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/shard-bmg-5/igt@xe_query@multigpu-query-pxp-status.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
  [Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6681
  [Intel XE#6693]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6693
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6706]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6706
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6715
  [Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
  [Intel XE#6779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6779
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48 -> xe-pw-159008v2

  IGT_8671: 8671
  xe-4262-c84dc8f40d4f4462990de0437ebb2425c9f82b48: c84dc8f40d4f4462990de0437ebb2425c9f82b48
  xe-pw-159008v2: 159008v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v2/index.html

[-- Attachment #2: Type: text/html, Size: 102708 bytes --]

Re: [PATCH 0/7] Prepare GVT for display modularization

[Nautiyal, Ankit K]

On 12/18/2025 1:52 PM, Ankit Nautiyal wrote:
> GVT currently relies on display internals through register macros and
> helpers like for_each_pipe(). This tight coupling makes modularization
> difficult because GVT should not access struct intel_display directly.
> Add an API for GVT code to expose DISPLAY_RUNTIME_INFO()->pipe_mask.
> This series introduces changes to make GVT independent of display internals
> while keeping existing macros usable:
>
> - Abstract offset calculations in display using
>    INTEL_DISPLAY_DEVICE_*_OFFSET() macros.
> - Add APIs for GVT to compute offsets and pipe mask via functions.
> - Update GVT to use these APIs by overriding helper macros and
>    for_each_pipe().
>
> Rev2:
> - Remove conflicting headers and get rid of #ifdefs/#undefs in last
>    patch.
> - Wrap macro arguments in paranthesis.
> - Rename for_each_pipe to gvt_for_each_pipe.
>
> PS: I have not yet addressed the question about whether we need to start
>      using _MMIO_TRANS2() instead of_MMIO_PIPE2() in TRANSCONF() macro.
>      That likely needs a separate patch and discussion.
>      For now, I have kept the patch#4 to deal with the
>      -Werror=enum-conversion:
>       - drm/i915/gvt/display_helpers: Cast argument to enum pipe for
>         pipe-offset macro
>
> Ankit Nautiyal (7):
>    drm/i915/display: Abstract pipe/trans/cursor offset calculation
>    drm/i915/display: Add APIs to be used by gvt to get the register
>      offsets
>    drm/i915/gvt: Add header to use display offset functions in macros
>    drm/i915/gvt/display_helpers: Cast argument to enum pipe for
>      pipe-offset macro
>    drm/i915/gvt: Change for_each_pipe to use pipe_valid API
>    drm/i915/gvt: Use the appropriate header for the DPLL macro
>    drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs


Thanks Jani for the actual ground work, suggestions, for this series and 
for the reviews.

Pushed to drm-intel-next.


PS: Fixed the SPDX license identifier styling for the header files (and 
the checkpatch warnings due to these), before pushing.

Regards,

Ankit


>
>   drivers/gpu/drm/i915/Makefile                 |  1 +
>   .../drm/i915/display/intel_display_device.h   | 17 +++++++
>   .../drm/i915/display/intel_display_limits.c   |  0
>   .../drm/i915/display/intel_display_reg_defs.h | 15 ++-----
>   drivers/gpu/drm/i915/display/intel_gvt_api.c  | 45 +++++++++++++++++++
>   drivers/gpu/drm/i915/display/intel_gvt_api.h  | 21 +++++++++
>   drivers/gpu/drm/i915/gvt/cmd_parser.c         |  2 +-
>   drivers/gpu/drm/i915/gvt/display.c            |  9 ++--
>   drivers/gpu/drm/i915/gvt/display_helpers.h    | 27 +++++++++++
>   drivers/gpu/drm/i915/gvt/fb_decoder.c         |  2 +-
>   drivers/gpu/drm/i915/gvt/handlers.c           |  2 +-
>   11 files changed, 123 insertions(+), 18 deletions(-)
>   create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
>   create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
>   create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
>   create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h
>

Re: [PATCH 0/7] Prepare GVT for display modularization

[Jani Nikula]

On Mon, 29 Dec 2025, "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com> wrote:
> PS: Fixed the SPDX license identifier styling for the header files (and 
> the checkpatch warnings due to these), before pushing.

Did you checkpatch the changes? Usually the style is to have the SPDX
identifier in a comment of its own, not combined with whatever follows:

/* SPDX-License-Identifier: MIT */

BR,
Jani.


-- 
Jani Nikula, Intel

Re: [PATCH 0/7] Prepare GVT for display modularization

[Nautiyal, Ankit K]

On 12/31/2025 4:05 PM, Jani Nikula wrote:
> On Mon, 29 Dec 2025, "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com> wrote:
>> PS: Fixed the SPDX license identifier styling for the header files (and
>> the checkpatch warnings due to these), before pushing.
> Did you checkpatch the changes? Usually the style is to have the SPDX
> identifier in a comment of its own, not combined with whatever follows:
>
> /* SPDX-License-Identifier: MIT */


Hi Jani,

I did run checkpatch before pushing the changes.

With the original version of the patch, checkpatch was throwing the 
warning, but after this change it didn't.

You are absolutely right though. I misinterpreted the license rules [1] 
and assumed that Copyright line was part of the <SPDX License 
Expression>, which I can see is clearly wrong, based on the next point 
in the following section `Syntax`.

I will send patches to fix these, and will make sure to follow the 
correct style going forward.

In the new year I intend not to repeat older mistakes (but may be to 
make new ones :)).

Wish you a Happy New Year!


[1] https://www.kernel.org/doc/html/v6.9/process/license-rules.html

>
> BR,
> Jani.
>
>

Re: [PATCH 0/7] Prepare GVT for display modularization

[Jani Nikula]

On Fri, 02 Jan 2026, "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com> wrote:
> In the new year I intend not to repeat older mistakes (but may be to 
> make new ones :)).

I'm on board with that! :D

> Wish you a Happy New Year!

Thanks, you too!

BR,
Jani.-


-- 
Jani Nikula, Intel