From: Matt Atwood <matthew.s.atwood@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
Matt Atwood <matthew.s.atwood@intel.com>
Subject: [PATCH 02/12] drm/i915/ptl: Define IS_PANTHERLAKE macro
Date: Fri, 18 Oct 2024 13:49:31 -0700 [thread overview]
Message-ID: <20241018204941.73473-3-matthew.s.atwood@intel.com> (raw)
In-Reply-To: <20241018204941.73473-1-matthew.s.atwood@intel.com>
From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Common display code requires IS_PANTHERLAKE macro.
Define the macro and set 0 as PTL is no longer support for i915.
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a66e5bb078cf..ca1ab5931e28 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -538,6 +538,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
*/
#define IS_LUNARLAKE(i915) (0 && i915)
#define IS_BATTLEMAGE(i915) (0 && i915)
+#define IS_PANTHERLAKE(i915) (0 && i915)
#define IS_ARROWLAKE(i915) \
IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL)
--
2.45.0
next prev parent reply other threads:[~2024-10-18 20:49 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-18 20:49 [PATCH 00/12] drm/i915/xe3lpd: ptl display patches Matt Atwood
2024-10-18 20:49 ` [PATCH 01/12] drm/i915/display/ptl: Fill VRR crtc_state timings before other transcoder timings Matt Atwood
2024-10-18 23:43 ` Matt Roper
2024-10-22 4:37 ` Golani, Mitulkumar Ajitkumar
2024-10-18 20:49 ` Matt Atwood [this message]
2024-10-18 23:45 ` [PATCH 02/12] drm/i915/ptl: Define IS_PANTHERLAKE macro Matt Roper
2024-10-18 20:49 ` [PATCH 03/12] drm/i915/cx0: Extend C10 check to PTL Matt Atwood
2024-10-21 11:58 ` Gustavo Sousa
2024-10-21 12:02 ` Jani Nikula
2024-10-18 20:49 ` [PATCH 04/12] drm/i915/ptl: Move async flip bit to PLANE_SURF register Matt Atwood
2024-10-18 23:49 ` Matt Roper
2024-10-18 20:49 ` [PATCH 05/12] drm/i915/xe3: Underrun recovery does not exist post Xe2 Matt Atwood
2024-10-18 23:53 ` Matt Roper
2024-10-18 20:49 ` [PATCH 06/12] drm/i915/display/xe3: disable x-tiled framebuffers Matt Atwood
2024-10-21 12:25 ` Gustavo Sousa
2024-10-18 20:49 ` [PATCH 07/12] drm/i915/xe3lpd: Skip disabling VRR during modeset disable Matt Atwood
2024-10-18 20:49 ` [PATCH 08/12] drm/i915/xe3lpd: Increase resolution for plane to support 6k Matt Atwood
2024-10-19 7:07 ` Kandpal, Suraj
2024-10-18 20:49 ` [PATCH 09/12] drm/i915/xe3lpd: Increase max_h max_v for PSR Matt Atwood
2024-10-18 20:49 ` [PATCH 10/12] drm/i915/xe3lpd: Increase bigjoiner limitations Matt Atwood
2024-10-18 20:49 ` [PATCH 11/12] drm/i915/xe3lpd: Prune modes for YUV420 Matt Atwood
2024-10-18 20:49 ` [PATCH 12/12] drm/i915/xe3lpd: Power request asserting/deasserting Matt Atwood
2024-10-21 12:08 ` Jani Nikula
2024-10-21 12:30 ` Gustavo Sousa
2024-10-21 13:03 ` Kahola, Mika
2024-10-23 20:39 ` Gustavo Sousa
2024-10-28 9:11 ` Kahola, Mika
2024-10-18 22:08 ` ✓ CI.Patch_applied: success for drm/i915/xe3lpd: ptl display patches Patchwork
2024-10-18 22:09 ` ✗ CI.checkpatch: warning " Patchwork
2024-10-18 22:10 ` ✓ CI.KUnit: success " Patchwork
2024-10-18 22:21 ` ✓ CI.Build: " Patchwork
2024-10-18 22:24 ` ✓ CI.Hooks: " Patchwork
2024-10-18 22:25 ` ✗ CI.checksparse: warning " Patchwork
2024-10-18 22:44 ` ✗ CI.BAT: failure " Patchwork
2024-10-19 15:34 ` ✗ CI.FULL: " Patchwork
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