* [Intel-xe] [PATCH 01/21] drm/xe/uapi: Introduce OA (observability architecture) uapi
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-04 0:26 ` Umesh Nerlige Ramappa
2023-11-04 1:23 ` Dixit, Ashutosh
2023-09-19 16:10 ` [Intel-xe] [PATCH 02/21] drm/xe/oa: Add OA types Ashutosh Dixit
` (28 subsequent siblings)
29 siblings, 2 replies; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
OA uapi allows userspace to:
* Read streams of performance counters written by hardware
* Configure (and reconfigure) which sets of perf counters are captured as
part of OA streams
* Configure other properties (such as format and periodicity) of such
captures.
* Query associated parameters such as OA unit timestamp freq, oa_unit_id's
for hw engines and OA ioctl version
v2: Explain OA is observability architecture (Francois)
Change to reserved[7] in struct drm_xe_query_gts (Lionel)
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
include/uapi/drm/xe_drm.h | 255 +++++++++++++++++++++++++++++++++++++-
1 file changed, 253 insertions(+), 2 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 6ab85c7fed361..3a64f904858d8 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -111,6 +111,9 @@ struct xe_user_extension {
#define DRM_XE_WAIT_USER_FENCE 0x0b
#define DRM_XE_VM_MADVISE 0x0c
#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0d
+#define DRM_XE_OA_OPEN 0x16
+#define DRM_XE_OA_ADD_CONFIG 0x17
+#define DRM_XE_OA_REMOVE_CONFIG 0x18
/* Must be kept compact -- no holes */
#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
@@ -127,6 +130,9 @@ struct xe_user_extension {
#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
+#define DRM_IOCTL_XE_OA_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_OPEN, struct drm_xe_oa_open_param)
+#define DRM_IOCTL_XE_OA_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_ADD_CONFIG, struct drm_xe_oa_config)
+#define DRM_IOCTL_XE_OA_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_REMOVE_CONFIG, __u64)
/**
* enum drm_xe_memory_class - Supported memory classes.
@@ -257,7 +263,8 @@ struct drm_xe_query_config {
#define XE_QUERY_CONFIG_GT_COUNT 4
#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
#define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
-#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY + 1)
+#define XE_QUERY_OA_IOCTL_VERSION 7
+#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_OA_IOCTL_VERSION + 1)
/** @info: array of elements containing the config info */
__u64 info[];
};
@@ -294,7 +301,8 @@ struct drm_xe_query_gts {
__u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
__u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
__u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
- __u64 reserved[8];
+ __u64 oa_timestamp_freq;
+ __u64 reserved[7];
} gts[];
};
@@ -748,6 +756,7 @@ struct drm_xe_engine_class_instance {
__u16 engine_instance;
__u16 gt_id;
+ __u16 oa_unit_id;
};
struct drm_xe_exec_queue_create {
@@ -1091,6 +1100,248 @@ struct drm_xe_vm_madvise {
#define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
+enum drm_xe_oa_format {
+ XE_OA_FORMAT_C4_B8 = 7,
+
+ /* Gen8+ */
+ XE_OA_FORMAT_A12,
+ XE_OA_FORMAT_A12_B8_C8,
+ XE_OA_FORMAT_A32u40_A4u32_B8_C8,
+
+ /* DG2 */
+ XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
+ XE_OA_FORMAT_A24u40_A14u32_B8_C8,
+
+ /* MTL OAM */
+ XE_OAM_FORMAT_MPEC8u64_B8_C8,
+ XE_OAM_FORMAT_MPEC8u32_B8_C8,
+
+ XE_OA_FORMAT_MAX /* non-ABI */
+};
+
+enum drm_xe_oa_property_id {
+ /**
+ * Open the stream for a specific exec queue id (as used with
+ * drm_xe_exec). A stream opened for a specific exec queue id this
+ * way won't typically require root privileges.
+ */
+ DRM_XE_OA_PROP_EXEC_QUEUE_ID = 1,
+
+ /**
+ * A value of 1 requests the inclusion of raw OA unit reports as
+ * part of stream samples.
+ */
+ DRM_XE_OA_PROP_SAMPLE_OA,
+
+ /**
+ * The value specifies which set of OA unit metrics should be
+ * configured, defining the contents of any OA unit reports.
+ */
+ DRM_XE_OA_PROP_OA_METRICS_SET,
+
+ /**
+ * The value specifies the size and layout of OA unit reports.
+ */
+ DRM_XE_OA_PROP_OA_FORMAT,
+
+ /**
+ * Specifying this property implicitly requests periodic OA unit
+ * sampling and (at least on Haswell) the sampling frequency is derived
+ * from this exponent as follows:
+ *
+ * 80ns * 2^(period_exponent + 1)
+ */
+ DRM_XE_OA_PROP_OA_EXPONENT,
+
+ /**
+ * Specifying this property is only valid when specify a context to
+ * filter with DRM_XE_OA_PROP_ENGINE_ID. Specifying this property
+ * will hold preemption of the particular engine we want to gather
+ * performance data about.
+ */
+ DRM_XE_OA_PROP_HOLD_PREEMPTION,
+
+ /**
+ * Specifying this pins all contexts to the specified SSEU power
+ * configuration for the duration of the recording.
+ *
+ * This parameter's value is a pointer to a struct
+ * drm_xe_gem_context_param_sseu (TBD).
+ */
+ DRM_XE_OA_PROP_GLOBAL_SSEU,
+
+ /**
+ * This optional parameter specifies the timer interval in nanoseconds
+ * at which the xe driver will check the OA buffer for available data.
+ * Minimum allowed value is 100 microseconds. A default value is used by
+ * the driver if this parameter is not specified. Note that larger timer
+ * values will reduce cpu consumption during OA perf captures. However,
+ * excessively large values would potentially result in OA buffer
+ * overwrites as captures reach end of the OA buffer.
+ */
+ DRM_XE_OA_PROP_POLL_OA_PERIOD,
+
+ /**
+ * Multiple engines may be mapped to the same OA unit. The OA unit is
+ * identified by class:instance of any engine mapped to it.
+ *
+ * This parameter specifies the engine class and must be passed along
+ * with DRM_XE_OA_PROP_OA_ENGINE_INSTANCE.
+ */
+ DRM_XE_OA_PROP_OA_ENGINE_CLASS,
+
+ /**
+ * This parameter specifies the engine instance and must be passed along
+ * with DRM_XE_OA_PROP_OA_ENGINE_CLASS.
+ */
+ DRM_XE_OA_PROP_OA_ENGINE_INSTANCE,
+
+ DRM_XE_OA_PROP_MAX /* non-ABI */
+};
+
+struct drm_xe_oa_open_param {
+ __u32 flags;
+#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
+#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
+#define XE_OA_FLAG_DISABLED (1 << 2)
+
+ /** The number of u64 (id, value) pairs */
+ __u32 num_properties;
+
+ /**
+ * Pointer to array of u64 (id, value) pairs configuring the stream
+ * to open.
+ */
+ __u64 properties_ptr;
+};
+
+struct drm_xe_oa_record_header {
+ __u32 type;
+ __u16 pad;
+ __u16 size;
+};
+
+enum drm_xe_oa_record_type {
+ /**
+ * Samples are the work horse record type whose contents are
+ * extensible and defined when opening an xe oa stream based on the
+ * given properties.
+ *
+ * Boolean properties following the naming convention
+ * DRM_XE_OA_SAMPLE_xyz_PROP request the inclusion of 'xyz' data in
+ * every sample.
+ *
+ * The order of these sample properties given by userspace has no
+ * affect on the ordering of data within a sample. The order is
+ * documented here.
+ *
+ * struct {
+ * struct drm_xe_oa_record_header header;
+ *
+ * { u32 oa_report[]; } && DRM_XE_OA_PROP_SAMPLE_OA
+ * };
+ */
+ DRM_XE_OA_RECORD_SAMPLE = 1,
+
+ /**
+ * Indicates that one or more OA reports were not written by the
+ * hardware. This can happen for example if an MI_REPORT_PERF_COUNT
+ * command collides with periodic sampling - which would be more likely
+ * at higher sampling frequencies.
+ */
+ DRM_XE_OA_RECORD_OA_REPORT_LOST = 2,
+
+ /**
+ * An error occurred that resulted in all pending OA reports being lost.
+ */
+ DRM_XE_OA_RECORD_OA_BUFFER_LOST = 3,
+
+ DRM_XE_OA_RECORD_MAX /* non-ABI */
+};
+
+struct drm_xe_oa_config {
+ /**
+ * @uuid:
+ *
+ * String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x"
+ */
+ char uuid[36];
+
+ /**
+ * @n_mux_regs:
+ *
+ * Number of mux regs in &mux_regs_ptr.
+ */
+ __u32 n_mux_regs;
+
+ /**
+ * @n_boolean_regs:
+ *
+ * Number of boolean regs in &boolean_regs_ptr.
+ */
+ __u32 n_boolean_regs;
+
+ /**
+ * @n_flex_regs:
+ *
+ * Number of flex regs in &flex_regs_ptr.
+ */
+ __u32 n_flex_regs;
+
+ /**
+ * @mux_regs_ptr:
+ *
+ * Pointer to tuples of u32 values (register address, value) for mux
+ * registers. Expected length of buffer is (2 * sizeof(u32) *
+ * &n_mux_regs).
+ */
+ __u64 mux_regs_ptr;
+
+ /**
+ * @boolean_regs_ptr:
+ *
+ * Pointer to tuples of u32 values (register address, value) for mux
+ * registers. Expected length of buffer is (2 * sizeof(u32) *
+ * &n_boolean_regs).
+ */
+ __u64 boolean_regs_ptr;
+
+ /**
+ * @flex_regs_ptr:
+ *
+ * Pointer to tuples of u32 values (register address, value) for mux
+ * registers. Expected length of buffer is (2 * sizeof(u32) *
+ * &n_flex_regs).
+ */
+ __u64 flex_regs_ptr;
+};
+
+/*
+ * Enable data capture for a stream that was either opened in a disabled state
+ * via I915_PERF_FLAG_DISABLED or was later disabled via
+ * I915_PERF_IOCTL_DISABLE.
+ *
+ * It is intended to be cheaper to disable and enable a stream than it may be
+ * to close and re-open a stream with the same configuration.
+ *
+ * It's undefined whether any pending data for the stream will be lost.
+ */
+#define XE_OA_IOCTL_ENABLE _IO('i', 0x0)
+
+/*
+ * Disable data capture for a stream.
+ *
+ * It is an error to try and read a stream that is disabled.
+ */
+#define XE_OA_IOCTL_DISABLE _IO('i', 0x1)
+
+/*
+ * Change metrics_set captured by a stream.
+ *
+ * Returns the previously bound metrics set id, or a negative error code.
+ */
+#define XE_OA_IOCTL_CONFIG _IO('i', 0x2)
+
#if defined(__cplusplus)
}
#endif
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 01/21] drm/xe/uapi: Introduce OA (observability architecture) uapi
2023-09-19 16:10 ` [Intel-xe] [PATCH 01/21] drm/xe/uapi: Introduce OA (observability architecture) uapi Ashutosh Dixit
@ 2023-10-04 0:26 ` Umesh Nerlige Ramappa
2023-10-04 0:36 ` Dixit, Ashutosh
2023-11-04 1:23 ` Dixit, Ashutosh
1 sibling, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-04 0:26 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:29AM -0700, Ashutosh Dixit wrote:
>OA uapi allows userspace to:
>* Read streams of performance counters written by hardware
>* Configure (and reconfigure) which sets of perf counters are captured as
> part of OA streams
>* Configure other properties (such as format and periodicity) of such
> captures.
>* Query associated parameters such as OA unit timestamp freq, oa_unit_id's
> for hw engines and OA ioctl version
>
>v2: Explain OA is observability architecture (Francois)
> Change to reserved[7] in struct drm_xe_query_gts (Lionel)
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>---
> include/uapi/drm/xe_drm.h | 255 +++++++++++++++++++++++++++++++++++++-
> 1 file changed, 253 insertions(+), 2 deletions(-)
>
>diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>index 6ab85c7fed361..3a64f904858d8 100644
>--- a/include/uapi/drm/xe_drm.h
>+++ b/include/uapi/drm/xe_drm.h
>@@ -111,6 +111,9 @@ struct xe_user_extension {
> #define DRM_XE_WAIT_USER_FENCE 0x0b
> #define DRM_XE_VM_MADVISE 0x0c
> #define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0d
Assuming 0xe, 0xf are in the pipeline by someone else, As long as it's
resolved before merge, we should be good.
>+#define DRM_XE_OA_OPEN 0x16
>+#define DRM_XE_OA_ADD_CONFIG 0x17
>+#define DRM_XE_OA_REMOVE_CONFIG 0x18
>
> /* Must be kept compact -- no holes */
> #define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
>@@ -127,6 +130,9 @@ struct xe_user_extension {
> #define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
> #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> #define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
>+#define DRM_IOCTL_XE_OA_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_OPEN, struct drm_xe_oa_open_param)
>+#define DRM_IOCTL_XE_OA_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_ADD_CONFIG, struct drm_xe_oa_config)
>+#define DRM_IOCTL_XE_OA_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_REMOVE_CONFIG, __u64)
>
> /**
> * enum drm_xe_memory_class - Supported memory classes.
>@@ -257,7 +263,8 @@ struct drm_xe_query_config {
> #define XE_QUERY_CONFIG_GT_COUNT 4
> #define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> #define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
>-#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY + 1)
>+#define XE_QUERY_OA_IOCTL_VERSION 7
looks like removed in a later patch. why not just remove it here and
avoid adding the backend implementation altogether? Although it would be
ideal if the uApi and implementations are part of the same patch. I see
that you are doing that in future patches, so ignore if the comment is
redundant.
>+#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_OA_IOCTL_VERSION + 1)
> /** @info: array of elements containing the config info */
> __u64 info[];
> };
>@@ -294,7 +301,8 @@ struct drm_xe_query_gts {
> __u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
> __u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
> __u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
>- __u64 reserved[8];
>+ __u64 oa_timestamp_freq;
>+ __u64 reserved[7];
> } gts[];
> };
>
>@@ -748,6 +756,7 @@ struct drm_xe_engine_class_instance {
>
> __u16 engine_instance;
> __u16 gt_id;
>+ __u16 oa_unit_id;
> };
>
> struct drm_xe_exec_queue_create {
>@@ -1091,6 +1100,248 @@ struct drm_xe_vm_madvise {
> #define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
> #define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
>
>+enum drm_xe_oa_format {
>+ XE_OA_FORMAT_C4_B8 = 7,
>+
>+ /* Gen8+ */
>+ XE_OA_FORMAT_A12,
>+ XE_OA_FORMAT_A12_B8_C8,
>+ XE_OA_FORMAT_A32u40_A4u32_B8_C8,
>+
>+ /* DG2 */
>+ XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
>+ XE_OA_FORMAT_A24u40_A14u32_B8_C8,
>+
>+ /* MTL OAM */
>+ XE_OAM_FORMAT_MPEC8u64_B8_C8,
>+ XE_OAM_FORMAT_MPEC8u32_B8_C8,
>+
>+ XE_OA_FORMAT_MAX /* non-ABI */
>+};
>+
okay, I see what you meant when you said that things change in future
patches, so I will stop reviewing this patch here and continue to review
the future uapi patches.
Umesh
>+enum drm_xe_oa_property_id {
>+ /**
>+ * Open the stream for a specific exec queue id (as used with
>+ * drm_xe_exec). A stream opened for a specific exec queue id this
>+ * way won't typically require root privileges.
>+ */
>+ DRM_XE_OA_PROP_EXEC_QUEUE_ID = 1,
>+
>+ /**
>+ * A value of 1 requests the inclusion of raw OA unit reports as
>+ * part of stream samples.
>+ */
>+ DRM_XE_OA_PROP_SAMPLE_OA,
>+
>+ /**
>+ * The value specifies which set of OA unit metrics should be
>+ * configured, defining the contents of any OA unit reports.
>+ */
>+ DRM_XE_OA_PROP_OA_METRICS_SET,
>+
>+ /**
>+ * The value specifies the size and layout of OA unit reports.
>+ */
>+ DRM_XE_OA_PROP_OA_FORMAT,
>+
>+ /**
>+ * Specifying this property implicitly requests periodic OA unit
>+ * sampling and (at least on Haswell) the sampling frequency is derived
>+ * from this exponent as follows:
>+ *
>+ * 80ns * 2^(period_exponent + 1)
>+ */
>+ DRM_XE_OA_PROP_OA_EXPONENT,
>+
>+ /**
>+ * Specifying this property is only valid when specify a context to
>+ * filter with DRM_XE_OA_PROP_ENGINE_ID. Specifying this property
>+ * will hold preemption of the particular engine we want to gather
>+ * performance data about.
>+ */
>+ DRM_XE_OA_PROP_HOLD_PREEMPTION,
>+
>+ /**
>+ * Specifying this pins all contexts to the specified SSEU power
>+ * configuration for the duration of the recording.
>+ *
>+ * This parameter's value is a pointer to a struct
>+ * drm_xe_gem_context_param_sseu (TBD).
>+ */
>+ DRM_XE_OA_PROP_GLOBAL_SSEU,
>+
>+ /**
>+ * This optional parameter specifies the timer interval in nanoseconds
>+ * at which the xe driver will check the OA buffer for available data.
>+ * Minimum allowed value is 100 microseconds. A default value is used by
>+ * the driver if this parameter is not specified. Note that larger timer
>+ * values will reduce cpu consumption during OA perf captures. However,
>+ * excessively large values would potentially result in OA buffer
>+ * overwrites as captures reach end of the OA buffer.
>+ */
>+ DRM_XE_OA_PROP_POLL_OA_PERIOD,
>+
>+ /**
>+ * Multiple engines may be mapped to the same OA unit. The OA unit is
>+ * identified by class:instance of any engine mapped to it.
>+ *
>+ * This parameter specifies the engine class and must be passed along
>+ * with DRM_XE_OA_PROP_OA_ENGINE_INSTANCE.
>+ */
>+ DRM_XE_OA_PROP_OA_ENGINE_CLASS,
>+
>+ /**
>+ * This parameter specifies the engine instance and must be passed along
>+ * with DRM_XE_OA_PROP_OA_ENGINE_CLASS.
>+ */
>+ DRM_XE_OA_PROP_OA_ENGINE_INSTANCE,
>+
>+ DRM_XE_OA_PROP_MAX /* non-ABI */
>+};
>+
>+struct drm_xe_oa_open_param {
>+ __u32 flags;
>+#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
>+#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
>+#define XE_OA_FLAG_DISABLED (1 << 2)
>+
>+ /** The number of u64 (id, value) pairs */
>+ __u32 num_properties;
>+
>+ /**
>+ * Pointer to array of u64 (id, value) pairs configuring the stream
>+ * to open.
>+ */
>+ __u64 properties_ptr;
>+};
>+
>+struct drm_xe_oa_record_header {
>+ __u32 type;
>+ __u16 pad;
>+ __u16 size;
>+};
>+
>+enum drm_xe_oa_record_type {
>+ /**
>+ * Samples are the work horse record type whose contents are
>+ * extensible and defined when opening an xe oa stream based on the
>+ * given properties.
>+ *
>+ * Boolean properties following the naming convention
>+ * DRM_XE_OA_SAMPLE_xyz_PROP request the inclusion of 'xyz' data in
>+ * every sample.
>+ *
>+ * The order of these sample properties given by userspace has no
>+ * affect on the ordering of data within a sample. The order is
>+ * documented here.
>+ *
>+ * struct {
>+ * struct drm_xe_oa_record_header header;
>+ *
>+ * { u32 oa_report[]; } && DRM_XE_OA_PROP_SAMPLE_OA
>+ * };
>+ */
>+ DRM_XE_OA_RECORD_SAMPLE = 1,
>+
>+ /**
>+ * Indicates that one or more OA reports were not written by the
>+ * hardware. This can happen for example if an MI_REPORT_PERF_COUNT
>+ * command collides with periodic sampling - which would be more likely
>+ * at higher sampling frequencies.
>+ */
>+ DRM_XE_OA_RECORD_OA_REPORT_LOST = 2,
>+
>+ /**
>+ * An error occurred that resulted in all pending OA reports being lost.
>+ */
>+ DRM_XE_OA_RECORD_OA_BUFFER_LOST = 3,
>+
>+ DRM_XE_OA_RECORD_MAX /* non-ABI */
>+};
>+
>+struct drm_xe_oa_config {
>+ /**
>+ * @uuid:
>+ *
>+ * String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x"
>+ */
>+ char uuid[36];
>+
>+ /**
>+ * @n_mux_regs:
>+ *
>+ * Number of mux regs in &mux_regs_ptr.
>+ */
>+ __u32 n_mux_regs;
>+
>+ /**
>+ * @n_boolean_regs:
>+ *
>+ * Number of boolean regs in &boolean_regs_ptr.
>+ */
>+ __u32 n_boolean_regs;
>+
>+ /**
>+ * @n_flex_regs:
>+ *
>+ * Number of flex regs in &flex_regs_ptr.
>+ */
>+ __u32 n_flex_regs;
>+
>+ /**
>+ * @mux_regs_ptr:
>+ *
>+ * Pointer to tuples of u32 values (register address, value) for mux
>+ * registers. Expected length of buffer is (2 * sizeof(u32) *
>+ * &n_mux_regs).
>+ */
>+ __u64 mux_regs_ptr;
>+
>+ /**
>+ * @boolean_regs_ptr:
>+ *
>+ * Pointer to tuples of u32 values (register address, value) for mux
>+ * registers. Expected length of buffer is (2 * sizeof(u32) *
>+ * &n_boolean_regs).
>+ */
>+ __u64 boolean_regs_ptr;
>+
>+ /**
>+ * @flex_regs_ptr:
>+ *
>+ * Pointer to tuples of u32 values (register address, value) for mux
>+ * registers. Expected length of buffer is (2 * sizeof(u32) *
>+ * &n_flex_regs).
>+ */
>+ __u64 flex_regs_ptr;
>+};
>+
>+/*
>+ * Enable data capture for a stream that was either opened in a disabled state
>+ * via I915_PERF_FLAG_DISABLED or was later disabled via
>+ * I915_PERF_IOCTL_DISABLE.
>+ *
>+ * It is intended to be cheaper to disable and enable a stream than it may be
>+ * to close and re-open a stream with the same configuration.
>+ *
>+ * It's undefined whether any pending data for the stream will be lost.
>+ */
>+#define XE_OA_IOCTL_ENABLE _IO('i', 0x0)
>+
>+/*
>+ * Disable data capture for a stream.
>+ *
>+ * It is an error to try and read a stream that is disabled.
>+ */
>+#define XE_OA_IOCTL_DISABLE _IO('i', 0x1)
>+
>+/*
>+ * Change metrics_set captured by a stream.
>+ *
>+ * Returns the previously bound metrics set id, or a negative error code.
>+ */
>+#define XE_OA_IOCTL_CONFIG _IO('i', 0x2)
>+
> #if defined(__cplusplus)
> }
> #endif
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 01/21] drm/xe/uapi: Introduce OA (observability architecture) uapi
2023-09-19 16:10 ` [Intel-xe] [PATCH 01/21] drm/xe/uapi: Introduce OA (observability architecture) uapi Ashutosh Dixit
2023-10-04 0:26 ` Umesh Nerlige Ramappa
@ 2023-11-04 1:23 ` Dixit, Ashutosh
1 sibling, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-11-04 1:23 UTC (permalink / raw)
To: intel-xe, Umesh Nerlige Ramappa
On Tue, 19 Sep 2023 09:10:29 -0700, Ashutosh Dixit wrote:
>
Hi Umesh,
> +struct drm_xe_oa_record_header {
> + __u32 type;
> + __u16 pad;
> + __u16 size;
> +};
> +
> +enum drm_xe_oa_record_type {
> + /**
> + * Samples are the work horse record type whose contents are
> + * extensible and defined when opening an xe oa stream based on the
> + * given properties.
> + *
> + * Boolean properties following the naming convention
> + * DRM_XE_OA_SAMPLE_xyz_PROP request the inclusion of 'xyz' data in
> + * every sample.
> + *
> + * The order of these sample properties given by userspace has no
> + * affect on the ordering of data within a sample. The order is
> + * documented here.
> + *
> + * struct {
> + * struct drm_xe_oa_record_header header;
> + *
> + * { u32 oa_report[]; } && DRM_XE_OA_PROP_SAMPLE_OA
> + * };
> + */
> + DRM_XE_OA_RECORD_SAMPLE = 1,
> +
> + /**
> + * Indicates that one or more OA reports were not written by the
> + * hardware. This can happen for example if an MI_REPORT_PERF_COUNT
> + * command collides with periodic sampling - which would be more likely
> + * at higher sampling frequencies.
> + */
> + DRM_XE_OA_RECORD_OA_REPORT_LOST = 2,
> +
> + /**
> + * An error occurred that resulted in all pending OA reports being lost.
> + */
> + DRM_XE_OA_RECORD_OA_BUFFER_LOST = 3,
> +
> + DRM_XE_OA_RECORD_MAX /* non-ABI */
Rather than maintain these statuses in the uapi, how about just returning
oa_status register (from which these statuses come) directly to
userland. Basically the 32 bit type can directly be the oa_status register
directly. We can steal bit 31 (or something like that) to indicate a real
SAMPLE vs a status header. This way only bit 31 gets into
xe_drm.h. Thoughts?
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 02/21] drm/xe/oa: Add OA types
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
2023-09-19 16:10 ` [Intel-xe] [PATCH 01/21] drm/xe/uapi: Introduce OA (observability architecture) uapi Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-13 17:05 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 03/21] drm/xe/oa: Add registers and GPU commands used by OA Ashutosh Dixit
` (27 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Add types and data structs used by OA. The data structs maintain device and
gt level information, information about the open OA stream and OA buffer
used internally to capture OA counters written by HW as well as capture
configurations which can be selected for an OA stream.
v2: Add linux includes to fix build
v3: Change oa_unit_id to u16 (Umesh)
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa_types.h | 295 +++++++++++++++++++++++++++++++
1 file changed, 295 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_oa_types.h
diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
new file mode 100644
index 0000000000000..4063c81e353ff
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -0,0 +1,295 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _XE_OA_TYPES_H_
+#define _XE_OA_TYPES_H__
+
+#include <linux/idr.h>
+#include <linux/kobject.h>
+#include <linux/poll.h>
+#include <linux/sysfs.h>
+#include <drm/xe_drm.h>
+#include "regs/xe_reg_defs.h"
+
+struct drm_device;
+struct drm_file;
+
+enum {
+ OA_GROUP_OAG = 0,
+ OA_GROUP_OAM_SAMEDIA_0 = 0,
+
+ OA_GROUP_MAX,
+ OA_GROUP_INVALID = U32_MAX,
+};
+
+enum oa_type {
+ TYPE_OAG,
+ TYPE_OAM,
+};
+
+enum report_header {
+ HDR_32_BIT = 0,
+ HDR_64_BIT,
+};
+
+struct xe_oa_format {
+ u32 format;
+ int size;
+ int type;
+ enum report_header header;
+};
+
+struct xe_oa_reg {
+ struct xe_reg addr;
+ u32 value;
+};
+
+struct xe_oa_config {
+ struct xe_oa *oa;
+
+ char uuid[UUID_STRING_LEN + 1];
+ int id;
+
+ const struct xe_oa_reg *mux_regs;
+ u32 mux_regs_len;
+ const struct xe_oa_reg *b_counter_regs;
+ u32 b_counter_regs_len;
+ const struct xe_oa_reg *flex_regs;
+ u32 flex_regs_len;
+
+ struct attribute_group sysfs_metric;
+ struct attribute *attrs[2];
+ struct kobj_attribute sysfs_metric_id;
+
+ struct kref ref;
+ struct rcu_head rcu;
+};
+
+struct xe_oa_regs {
+ u32 base;
+ struct xe_reg oa_head_ptr;
+ struct xe_reg oa_tail_ptr;
+ struct xe_reg oa_buffer;
+ struct xe_reg oa_ctx_ctrl;
+ struct xe_reg oa_ctrl;
+ struct xe_reg oa_debug;
+ struct xe_reg oa_status;
+ u32 oa_ctrl_counter_format_shift;
+};
+
+/**
+ * struct xe_oa_group - OA group representing one hardware OA unit
+ */
+struct xe_oa_group {
+ /** @oa_unit_id: identifier for the OA unit */
+ u16 oa_unit_id;
+
+ /**
+ * @exclusive_stream: The stream currently using the OA unit. This is
+ * sometimes accessed outside a syscall associated to its file
+ * descriptor.
+ */
+ struct xe_oa_stream *exclusive_stream;
+
+ /** @num_engines: number of engines using this OA unit */
+ u32 num_engines;
+
+ /** @regs: OA buffer register group for programming the OA unit */
+ struct xe_oa_regs regs;
+
+ /** @type: Type of OA unit - OAM, OAG etc. */
+ enum oa_type type;
+};
+
+/**
+ * struct xe_oa_gt - OA per-gt information
+ */
+struct xe_oa_gt {
+ /** @lock: lock associated with anything below within this structure */
+ struct mutex lock;
+
+ /** @num_oa_groups: number of oa groups per gt */
+ u32 num_oa_groups;
+
+ /** @group: list of OA groups - one for each OA buffer */
+ struct xe_oa_group *group;
+};
+
+/**
+ * struct xe_oa - OA device level information
+ */
+struct xe_oa {
+ /** @xe: back pointer to xe device */
+ struct xe_device *xe;
+
+ /** @metrics_kobj: kobj for metrics sysfs */
+ struct kobject *metrics_kobj;
+
+ /**
+ * @metrics_lock: lock associated with adding/modifying/removing OA
+ * configs in oa->metrics_idr.
+ */
+ struct mutex metrics_lock;
+
+ /**
+ * @metrics_idr: List of dynamic configurations (struct xe_oa_config)
+ */
+ struct idr metrics_idr;
+
+ /** @ctx_oactxctrl_offset: offset of OACTXCONTROL register in context image */
+ u32 ctx_oactxctrl_offset;
+
+ /** @oa_formats: tracks all OA formats across platforms */
+ const struct xe_oa_format *oa_formats;
+
+#define FORMAT_MASK_SIZE DIV_ROUND_UP(XE_OA_FORMAT_MAX - 1, BITS_PER_LONG)
+
+ /** @format_mask: tracks valid OA formats for a platform */
+ unsigned long format_mask[FORMAT_MASK_SIZE];
+
+ /** @oa_unit_ids: tracks oa unit ids assigned across gt's */
+ u16 oa_unit_ids;
+};
+
+/**
+ * struct xe_oa_stream - state for a single open stream FD
+ */
+struct xe_oa_stream {
+ /** @oa: xe_oa backpointer */
+ struct xe_oa *oa;
+
+ /** @gt: gt associated with the oa stream */
+ struct xe_gt *gt;
+
+ /**
+ * @hwe: hardware engine associated with this performance stream.
+ */
+ struct xe_hw_engine *hwe;
+
+ /** @lock: Lock associated with operations on stream */
+ struct mutex lock;
+
+ /**
+ * @sample: true when DRM_XE_OA_PROP_SAMPLE_OA is given when
+ * opening a stream, representing the contents of a single sample
+ * as read() by userspace.
+ */
+ bool sample;
+
+ /**
+ * @sample_size: Considering the configured contents of a sample
+ * combined with the required header size, this is the total size
+ * of a single sample record.
+ */
+ int sample_size;
+
+ /**
+ * @exec_q: %NULL if measuring system-wide across all exec_q's or a
+ * specific exec_q that is being monitored.
+ */
+ struct xe_exec_queue *exec_q;
+
+ /**
+ * @enabled: Whether the stream is currently enabled, considering
+ * whether the stream was opened in a disabled state and based
+ * on `XE_OA_IOCTL_ENABLE` and `XE_OA_IOCTL_DISABLE` calls.
+ */
+ bool enabled;
+
+ /** @oa_config: The OA configuration used by the stream */
+ struct xe_oa_config *oa_config;
+
+ /**
+ * @oa_config_bos: A list of struct i915_oa_config_bo allocated lazily
+ * each time @oa_config changes.
+ */
+ struct llist_head oa_config_bos;
+
+ /** @specific_ctx_id: id of the context used for filtering reports */
+ u32 specific_ctx_id;
+
+ /** @specific_ctx_id_mask: The mask used to masking specific_ctx_id bits */
+ u32 specific_ctx_id_mask;
+
+ /**
+ * @poll_check_timer: High resolution timer that will periodically
+ * check for data in the circular OA buffer for notifying userspace
+ * (e.g. during a read() or poll()).
+ */
+ struct hrtimer poll_check_timer;
+
+ /**
+ * @poll_wq: The wait queue that hrtimer callback wakes when it
+ * sees data ready to read in the circular OA buffer.
+ */
+ wait_queue_head_t poll_wq;
+
+ /** @pollin: Whether there is data available to read */
+ bool pollin;
+
+ /** @periodic: Whether periodic sampling is currently enabled */
+ bool periodic;
+
+ /** @period_exponent: The OA unit sampling frequency is derived from this */
+ int period_exponent;
+
+ /** @oa_buffer: State of the OA buffer */
+ struct {
+ /** @format: data format */
+ const struct xe_oa_format *format;
+
+ /** @format: xe_bo backing the OA buffer */
+ struct xe_bo *bo;
+
+ /** @vaddr: mapped vaddr of the OA buffer */
+ u8 *vaddr;
+
+ /** @last_ctx_id: last context id for OA data added */
+ u32 last_ctx_id;
+
+ /**
+ * @ptr_lock: Locks reads and writes to all head/tail state
+ *
+ * Consider: the head and tail pointer state needs to be read
+ * consistently from a hrtimer callback (atomic context) and
+ * read() fop (user context) with tail pointer updates happening
+ * in atomic context and head updates in user context and the
+ * (unlikely) possibility of read() errors needing to reset all
+ * head/tail state.
+ *
+ * Note: Contention/performance aren't currently a significant
+ * concern here considering the relatively low frequency of
+ * hrtimer callbacks (5ms period) and that reads typically only
+ * happen in response to a hrtimer event and likely complete
+ * before the next callback.
+ *
+ * Note: This lock is not held *while* reading and copying data
+ * to userspace so the value of head observed in htrimer
+ * callbacks won't represent any partial consumption of data.
+ */
+ spinlock_t ptr_lock;
+
+ /**
+ * @head: Although we can always read back the head pointer register,
+ * we prefer to avoid trusting the HW state, just to avoid any
+ * risk that some hardware condition could somehow bump the
+ * head pointer unpredictably and cause us to forward the wrong
+ * OA buffer data to userspace.
+ */
+ u32 head;
+
+ /**
+ * @tail: The last verified tail that can be read by userspace.
+ */
+ u32 tail;
+ } oa_buffer;
+
+ /**
+ * @poll_oa_period: The period in nanoseconds at which the OA
+ * buffer should be checked for available data.
+ */
+ u64 poll_oa_period;
+};
+#endif
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 02/21] drm/xe/oa: Add OA types
2023-09-19 16:10 ` [Intel-xe] [PATCH 02/21] drm/xe/oa: Add OA types Ashutosh Dixit
@ 2023-10-13 17:05 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-13 17:05 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:30AM -0700, Ashutosh Dixit wrote:
>Add types and data structs used by OA. The data structs maintain device and
>gt level information, information about the open OA stream and OA buffer
>used internally to capture OA counters written by HW as well as capture
>configurations which can be selected for an OA stream.
>
>v2: Add linux includes to fix build
>v3: Change oa_unit_id to u16 (Umesh)
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
lgtm,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Umesh
>---
> drivers/gpu/drm/xe/xe_oa_types.h | 295 +++++++++++++++++++++++++++++++
> 1 file changed, 295 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_oa_types.h
>
>diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
>new file mode 100644
>index 0000000000000..4063c81e353ff
>--- /dev/null
>+++ b/drivers/gpu/drm/xe/xe_oa_types.h
>@@ -0,0 +1,295 @@
>+/* SPDX-License-Identifier: MIT */
>+/*
>+ * Copyright © 2023 Intel Corporation
>+ */
>+
>+#ifndef _XE_OA_TYPES_H_
>+#define _XE_OA_TYPES_H__
>+
>+#include <linux/idr.h>
>+#include <linux/kobject.h>
>+#include <linux/poll.h>
>+#include <linux/sysfs.h>
>+#include <drm/xe_drm.h>
>+#include "regs/xe_reg_defs.h"
>+
>+struct drm_device;
>+struct drm_file;
>+
>+enum {
>+ OA_GROUP_OAG = 0,
>+ OA_GROUP_OAM_SAMEDIA_0 = 0,
>+
>+ OA_GROUP_MAX,
>+ OA_GROUP_INVALID = U32_MAX,
>+};
>+
>+enum oa_type {
>+ TYPE_OAG,
>+ TYPE_OAM,
>+};
>+
>+enum report_header {
>+ HDR_32_BIT = 0,
>+ HDR_64_BIT,
>+};
>+
>+struct xe_oa_format {
>+ u32 format;
>+ int size;
>+ int type;
>+ enum report_header header;
>+};
>+
>+struct xe_oa_reg {
>+ struct xe_reg addr;
>+ u32 value;
>+};
>+
>+struct xe_oa_config {
>+ struct xe_oa *oa;
>+
>+ char uuid[UUID_STRING_LEN + 1];
>+ int id;
>+
>+ const struct xe_oa_reg *mux_regs;
>+ u32 mux_regs_len;
>+ const struct xe_oa_reg *b_counter_regs;
>+ u32 b_counter_regs_len;
>+ const struct xe_oa_reg *flex_regs;
>+ u32 flex_regs_len;
>+
>+ struct attribute_group sysfs_metric;
>+ struct attribute *attrs[2];
>+ struct kobj_attribute sysfs_metric_id;
>+
>+ struct kref ref;
>+ struct rcu_head rcu;
>+};
>+
>+struct xe_oa_regs {
>+ u32 base;
>+ struct xe_reg oa_head_ptr;
>+ struct xe_reg oa_tail_ptr;
>+ struct xe_reg oa_buffer;
>+ struct xe_reg oa_ctx_ctrl;
>+ struct xe_reg oa_ctrl;
>+ struct xe_reg oa_debug;
>+ struct xe_reg oa_status;
>+ u32 oa_ctrl_counter_format_shift;
>+};
>+
>+/**
>+ * struct xe_oa_group - OA group representing one hardware OA unit
>+ */
>+struct xe_oa_group {
>+ /** @oa_unit_id: identifier for the OA unit */
>+ u16 oa_unit_id;
>+
>+ /**
>+ * @exclusive_stream: The stream currently using the OA unit. This is
>+ * sometimes accessed outside a syscall associated to its file
>+ * descriptor.
>+ */
>+ struct xe_oa_stream *exclusive_stream;
>+
>+ /** @num_engines: number of engines using this OA unit */
>+ u32 num_engines;
>+
>+ /** @regs: OA buffer register group for programming the OA unit */
>+ struct xe_oa_regs regs;
>+
>+ /** @type: Type of OA unit - OAM, OAG etc. */
>+ enum oa_type type;
>+};
>+
>+/**
>+ * struct xe_oa_gt - OA per-gt information
>+ */
>+struct xe_oa_gt {
>+ /** @lock: lock associated with anything below within this structure */
>+ struct mutex lock;
>+
>+ /** @num_oa_groups: number of oa groups per gt */
>+ u32 num_oa_groups;
>+
>+ /** @group: list of OA groups - one for each OA buffer */
>+ struct xe_oa_group *group;
>+};
>+
>+/**
>+ * struct xe_oa - OA device level information
>+ */
>+struct xe_oa {
>+ /** @xe: back pointer to xe device */
>+ struct xe_device *xe;
>+
>+ /** @metrics_kobj: kobj for metrics sysfs */
>+ struct kobject *metrics_kobj;
>+
>+ /**
>+ * @metrics_lock: lock associated with adding/modifying/removing OA
>+ * configs in oa->metrics_idr.
>+ */
>+ struct mutex metrics_lock;
>+
>+ /**
>+ * @metrics_idr: List of dynamic configurations (struct xe_oa_config)
>+ */
>+ struct idr metrics_idr;
>+
>+ /** @ctx_oactxctrl_offset: offset of OACTXCONTROL register in context image */
>+ u32 ctx_oactxctrl_offset;
>+
>+ /** @oa_formats: tracks all OA formats across platforms */
>+ const struct xe_oa_format *oa_formats;
>+
>+#define FORMAT_MASK_SIZE DIV_ROUND_UP(XE_OA_FORMAT_MAX - 1, BITS_PER_LONG)
>+
>+ /** @format_mask: tracks valid OA formats for a platform */
>+ unsigned long format_mask[FORMAT_MASK_SIZE];
>+
>+ /** @oa_unit_ids: tracks oa unit ids assigned across gt's */
>+ u16 oa_unit_ids;
>+};
>+
>+/**
>+ * struct xe_oa_stream - state for a single open stream FD
>+ */
>+struct xe_oa_stream {
>+ /** @oa: xe_oa backpointer */
>+ struct xe_oa *oa;
>+
>+ /** @gt: gt associated with the oa stream */
>+ struct xe_gt *gt;
>+
>+ /**
>+ * @hwe: hardware engine associated with this performance stream.
>+ */
>+ struct xe_hw_engine *hwe;
>+
>+ /** @lock: Lock associated with operations on stream */
>+ struct mutex lock;
>+
>+ /**
>+ * @sample: true when DRM_XE_OA_PROP_SAMPLE_OA is given when
>+ * opening a stream, representing the contents of a single sample
>+ * as read() by userspace.
>+ */
>+ bool sample;
>+
>+ /**
>+ * @sample_size: Considering the configured contents of a sample
>+ * combined with the required header size, this is the total size
>+ * of a single sample record.
>+ */
>+ int sample_size;
>+
>+ /**
>+ * @exec_q: %NULL if measuring system-wide across all exec_q's or a
>+ * specific exec_q that is being monitored.
>+ */
>+ struct xe_exec_queue *exec_q;
>+
>+ /**
>+ * @enabled: Whether the stream is currently enabled, considering
>+ * whether the stream was opened in a disabled state and based
>+ * on `XE_OA_IOCTL_ENABLE` and `XE_OA_IOCTL_DISABLE` calls.
>+ */
>+ bool enabled;
>+
>+ /** @oa_config: The OA configuration used by the stream */
>+ struct xe_oa_config *oa_config;
>+
>+ /**
>+ * @oa_config_bos: A list of struct i915_oa_config_bo allocated lazily
>+ * each time @oa_config changes.
>+ */
>+ struct llist_head oa_config_bos;
>+
>+ /** @specific_ctx_id: id of the context used for filtering reports */
>+ u32 specific_ctx_id;
>+
>+ /** @specific_ctx_id_mask: The mask used to masking specific_ctx_id bits */
>+ u32 specific_ctx_id_mask;
>+
>+ /**
>+ * @poll_check_timer: High resolution timer that will periodically
>+ * check for data in the circular OA buffer for notifying userspace
>+ * (e.g. during a read() or poll()).
>+ */
>+ struct hrtimer poll_check_timer;
>+
>+ /**
>+ * @poll_wq: The wait queue that hrtimer callback wakes when it
>+ * sees data ready to read in the circular OA buffer.
>+ */
>+ wait_queue_head_t poll_wq;
>+
>+ /** @pollin: Whether there is data available to read */
>+ bool pollin;
>+
>+ /** @periodic: Whether periodic sampling is currently enabled */
>+ bool periodic;
>+
>+ /** @period_exponent: The OA unit sampling frequency is derived from this */
>+ int period_exponent;
>+
>+ /** @oa_buffer: State of the OA buffer */
>+ struct {
>+ /** @format: data format */
>+ const struct xe_oa_format *format;
>+
>+ /** @format: xe_bo backing the OA buffer */
>+ struct xe_bo *bo;
>+
>+ /** @vaddr: mapped vaddr of the OA buffer */
>+ u8 *vaddr;
>+
>+ /** @last_ctx_id: last context id for OA data added */
>+ u32 last_ctx_id;
>+
>+ /**
>+ * @ptr_lock: Locks reads and writes to all head/tail state
>+ *
>+ * Consider: the head and tail pointer state needs to be read
>+ * consistently from a hrtimer callback (atomic context) and
>+ * read() fop (user context) with tail pointer updates happening
>+ * in atomic context and head updates in user context and the
>+ * (unlikely) possibility of read() errors needing to reset all
>+ * head/tail state.
>+ *
>+ * Note: Contention/performance aren't currently a significant
>+ * concern here considering the relatively low frequency of
>+ * hrtimer callbacks (5ms period) and that reads typically only
>+ * happen in response to a hrtimer event and likely complete
>+ * before the next callback.
>+ *
>+ * Note: This lock is not held *while* reading and copying data
>+ * to userspace so the value of head observed in htrimer
>+ * callbacks won't represent any partial consumption of data.
>+ */
>+ spinlock_t ptr_lock;
>+
>+ /**
>+ * @head: Although we can always read back the head pointer register,
>+ * we prefer to avoid trusting the HW state, just to avoid any
>+ * risk that some hardware condition could somehow bump the
>+ * head pointer unpredictably and cause us to forward the wrong
>+ * OA buffer data to userspace.
>+ */
>+ u32 head;
>+
>+ /**
>+ * @tail: The last verified tail that can be read by userspace.
>+ */
>+ u32 tail;
>+ } oa_buffer;
>+
>+ /**
>+ * @poll_oa_period: The period in nanoseconds at which the OA
>+ * buffer should be checked for available data.
>+ */
>+ u64 poll_oa_period;
>+};
>+#endif
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 03/21] drm/xe/oa: Add registers and GPU commands used by OA
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
2023-09-19 16:10 ` [Intel-xe] [PATCH 01/21] drm/xe/uapi: Introduce OA (observability architecture) uapi Ashutosh Dixit
2023-09-19 16:10 ` [Intel-xe] [PATCH 02/21] drm/xe/oa: Add OA types Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-13 17:06 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 04/21] drm/xe/oa: Module init/exit and probe/remove Ashutosh Dixit
` (26 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Add registers and GPU commands used by OA in subsequent patches. The xe oa
code programs OA units which generate performance data. The code also
submits command buffers to change hardware engine context images and
implement waits.
v2: Remove unused registers (used by noa wait) (Umesh)
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +
drivers/gpu/drm/xe/regs/xe_gpu_commands.h | 13 ++
drivers/gpu/drm/xe/regs/xe_oa_regs.h | 173 ++++++++++++++++++++++
3 files changed, 188 insertions(+)
create mode 100644 drivers/gpu/drm/xe/regs/xe_oa_regs.h
diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index 692213d09ceaa..c12d23526f6ba 100644
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -115,6 +115,8 @@
#define RING_EXECLIST_CONTROL(base) XE_REG((base) + 0x550)
#define EL_CTRL_LOAD REG_BIT(0)
+#define GEN8_RING_CS_GPR(base, n) XE_REG((base) + 0x600 + (n) * 8)
+
#define VDBOX_CGCTL3F10(base) XE_REG((base) + 0x3f10)
#define IECPUNIT_CLKGATE_DIS REG_BIT(22)
diff --git a/drivers/gpu/drm/xe/regs/xe_gpu_commands.h b/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
index 12120dd37aa2a..f74cab662ad5b 100644
--- a/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
+++ b/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
@@ -14,6 +14,7 @@
#define MI_INSTR(opcode, flags) \
(__INSTR(INSTR_MI_CLIENT) | (opcode) << 23 | (flags))
+#define MI_OPCODE(x) (((x) >> 23) & 0x3f)
#define MI_NOOP MI_INSTR(0, 0)
#define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
@@ -23,12 +24,19 @@
#define MI_ARB_DISABLE (0<<0)
#define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
+
#define MI_STORE_DATA_IMM MI_INSTR(0x20, 0)
+#define MI_STORE_DWORD_IMM_GEN4 MI_INSTR(0x20, 2)
#define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1)
#define MI_LRI_LRM_CS_MMIO REG_BIT(19)
#define MI_LRI_MMIO_REMAP_EN REG_BIT(17)
#define MI_LRI_FORCE_POSTED (1<<12)
+#define IS_MI_LRI_CMD(x) (MI_OPCODE(x) == MI_OPCODE(MI_INSTR(0x22, 0)))
+#define MI_LRI_LEN(x) (((x) & 0xff) + 1)
+
+#define MI_STORE_REGISTER_MEM MI_INSTR(0x24, 1)
+#define MI_SRM_LRM_GLOBAL_GTT REG_BIT(22)
#define MI_FLUSH_DW MI_INSTR(0x26, 1)
#define MI_FLUSH_DW_STORE_INDEX (1<<21)
@@ -37,7 +45,12 @@
#define MI_FLUSH_DW_OP_STOREDW (1<<14)
#define MI_FLUSH_DW_USE_GTT (1<<2)
+#define MI_LOAD_REGISTER_MEM MI_INSTR(0x29, 1)
+
+#define MI_LOAD_REGISTER_REG MI_INSTR(0x2A, 1)
+
#define MI_BATCH_BUFFER_START MI_INSTR(0x31, 1)
+#define MI_BATCH_PREDICATE REG_BIT(15) /* HSW+ on RCS only*/
#define XY_CTRL_SURF_COPY_BLT ((2 << 29) | (0x48 << 22) | 3)
#define SRC_ACCESS_TYPE_SHIFT 21
diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
new file mode 100644
index 0000000000000..0b378cb7a6ddb
--- /dev/null
+++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
@@ -0,0 +1,173 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef __XE_OA_REGS__
+#define __XE_OA_REGS__
+
+#define REG_EQUAL(reg, xe_reg) ((reg) == (xe_reg.addr))
+#define REG_EQUAL_MCR(reg, xe_reg) ((reg) == (xe_reg.__reg.addr))
+
+#define HALF_SLICE_CHICKEN2 XE_REG_MCR(0xe180)
+#define GEN8_ST_PO_DISABLE REG_BIT(13)
+
+#define GEN7_ROW_CHICKEN2 XE_REG(0xe4f4)
+#define GEN8_ROW_CHICKEN XE_REG_MCR(0xe4f0)
+#define STALL_DOP_GATING_DISABLE REG_BIT(5)
+#define GEN12_DISABLE_DOP_GATING REG_BIT(0)
+
+#define RPM_CONFIG1 XE_REG(0xd04)
+#define GEN10_GT_NOA_ENABLE REG_BIT(9)
+
+#define WAIT_FOR_RC6_EXIT XE_REG(0x20cc)
+#define HSW_WAIT_FOR_RC6_EXIT_ENABLE REG_BIT(0)
+
+#define EU_PERF_CNTL0 XE_REG(0xe458)
+#define EU_PERF_CNTL4 XE_REG(0xe45c)
+#define EU_PERF_CNTL1 XE_REG(0xe558)
+#define EU_PERF_CNTL5 XE_REG(0xe55c)
+#define EU_PERF_CNTL2 XE_REG(0xe658)
+#define EU_PERF_CNTL6 XE_REG(0xe65c)
+#define EU_PERF_CNTL3 XE_REG(0xe758)
+
+#define OABUFFER_SIZE_MASK REG_GENMASK(5, 3)
+#define OABUFFER_SIZE_128K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 0)
+#define OABUFFER_SIZE_256K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 1)
+#define OABUFFER_SIZE_512K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 2)
+#define OABUFFER_SIZE_1M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 3)
+#define OABUFFER_SIZE_2M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 4)
+#define OABUFFER_SIZE_4M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 5)
+#define OABUFFER_SIZE_8M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 6)
+#define OABUFFER_SIZE_16M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 7)
+
+#define GEN12_OA_TLB_INV_CR XE_REG(0xceec)
+
+/* Gen12 OAR unit */
+#define GEN12_OAR_OACONTROL XE_REG(0x2960)
+#define GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT 1
+#define GEN12_OAR_OACONTROL_COUNTER_ENABLE REG_BIT(0)
+
+#define GEN8_OACTXCONTROL XE_REG(0x2360)
+#define GEN8_OA_COUNTER_RESUME REG_BIT(0)
+
+#define GEN12_OACTXCONTROL(base) XE_REG((base) + 0x360)
+#define GEN12_OAR_OASTATUS XE_REG(0x2968)
+
+/* Gen12 OAG unit */
+#define GEN12_OAG_OAHEADPTR XE_REG(0xdb00)
+#define GEN12_OAG_OAHEADPTR_MASK 0xffffffc0
+#define GEN12_OAG_OATAILPTR XE_REG(0xdb04)
+#define GEN12_OAG_OATAILPTR_MASK 0xffffffc0
+
+#define GEN12_OAG_OABUFFER XE_REG(0xdb08)
+#define GEN12_OAG_OABUFFER_BUFFER_SIZE_MASK (0x7)
+#define GEN12_OAG_OABUFFER_BUFFER_SIZE_SHIFT (3)
+#define GEN12_OAG_OABUFFER_MEMORY_SELECT REG_BIT(0) /* 0: PPGTT, 1: GGTT */
+
+#define GEN12_OAG_OAGLBCTXCTRL XE_REG(0x2b28)
+#define GEN12_OAG_OAGLBCTXCTRL_TIMER_PERIOD_SHIFT 2
+#define GEN12_OAG_OAGLBCTXCTRL_TIMER_ENABLE REG_BIT(1)
+#define GEN12_OAG_OAGLBCTXCTRL_COUNTER_RESUME REG_BIT(0)
+
+#define GEN12_OAG_OACONTROL XE_REG(0xdaf4)
+#define GEN12_OAG_OACONTROL_OA_COUNTER_FORMAT_SHIFT 2
+#define GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE REG_BIT(0)
+
+#define GEN12_OAG_OA_DEBUG XE_REG(0xdaf8)
+#define GEN12_OAG_OA_DEBUG_INCLUDE_CLK_RATIO REG_BIT(6)
+#define GEN12_OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS REG_BIT(5)
+#define GEN12_OAG_OA_DEBUG_DISABLE_GO_1_0_REPORTS REG_BIT(2)
+#define GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS REG_BIT(1)
+
+#define GEN12_OAG_OASTATUS XE_REG(0xdafc)
+#define GEN12_OAG_OASTATUS_COUNTER_OVERFLOW REG_BIT(2)
+#define GEN12_OAG_OASTATUS_BUFFER_OVERFLOW REG_BIT(1)
+#define GEN12_OAG_OASTATUS_REPORT_LOST REG_BIT(0)
+
+#define GDT_CHICKEN_BITS XE_REG(0x9840)
+#define GT_NOA_ENABLE 0x00000080
+
+#define GEN12_SQCNT1 XE_REG(0x8718)
+#define GEN12_SQCNT1_PMON_ENABLE REG_BIT(30)
+#define GEN12_SQCNT1_OABPC REG_BIT(29)
+
+/* Gen12 OAM unit */
+#define GEN12_OAM_HEAD_POINTER_OFFSET (0x1a0)
+#define GEN12_OAM_HEAD_POINTER_MASK 0xffffffc0
+
+#define GEN12_OAM_TAIL_POINTER_OFFSET (0x1a4)
+#define GEN12_OAM_TAIL_POINTER_MASK 0xffffffc0
+
+#define GEN12_OAM_BUFFER_OFFSET (0x1a8)
+#define GEN12_OAM_BUFFER_SIZE_MASK (0x7)
+#define GEN12_OAM_BUFFER_SIZE_SHIFT (3)
+#define GEN12_OAM_BUFFER_MEMORY_SELECT REG_BIT(0) /* 0: PPGTT, 1: GGTT */
+
+#define GEN12_OAM_CONTEXT_CONTROL_OFFSET (0x1bc)
+#define GEN12_OAM_CONTEXT_CONTROL_TIMER_PERIOD_SHIFT 2
+#define GEN12_OAM_CONTEXT_CONTROL_TIMER_ENABLE REG_BIT(1)
+#define GEN12_OAM_CONTEXT_CONTROL_COUNTER_RESUME REG_BIT(0)
+
+#define GEN12_OAM_CONTROL_OFFSET (0x194)
+#define GEN12_OAM_CONTROL_COUNTER_FORMAT_SHIFT 1
+#define GEN12_OAM_CONTROL_COUNTER_ENABLE REG_BIT(0)
+
+#define GEN12_OAM_DEBUG_OFFSET (0x198)
+#define GEN12_OAM_DEBUG_BUFFER_SIZE_SELECT REG_BIT(12)
+#define GEN12_OAM_DEBUG_INCLUDE_CLK_RATIO REG_BIT(6)
+#define GEN12_OAM_DEBUG_DISABLE_CLK_RATIO_REPORTS REG_BIT(5)
+#define GEN12_OAM_DEBUG_DISABLE_GO_1_0_REPORTS REG_BIT(2)
+#define GEN12_OAM_DEBUG_DISABLE_CTX_SWITCH_REPORTS REG_BIT(1)
+
+#define GEN12_OAM_STATUS_OFFSET (0x19c)
+#define GEN12_OAM_STATUS_COUNTER_OVERFLOW REG_BIT(2)
+#define GEN12_OAM_STATUS_BUFFER_OVERFLOW REG_BIT(1)
+#define GEN12_OAM_STATUS_REPORT_LOST REG_BIT(0)
+
+#define GEN12_OAM_MMIO_TRG_OFFSET (0x1d0)
+
+#define GEN12_OAM_MMIO_TRG(base) \
+ XE_REG((base) + GEN12_OAM_MMIO_TRG_OFFSET)
+
+#define GEN12_OAM_HEAD_POINTER(base) \
+ XE_REG((base) + GEN12_OAM_HEAD_POINTER_OFFSET)
+#define GEN12_OAM_TAIL_POINTER(base) \
+ XE_REG((base) + GEN12_OAM_TAIL_POINTER_OFFSET)
+#define GEN12_OAM_BUFFER(base) \
+ XE_REG((base) + GEN12_OAM_BUFFER_OFFSET)
+#define GEN12_OAM_CONTEXT_CONTROL(base) \
+ XE_REG((base) + GEN12_OAM_CONTEXT_CONTROL_OFFSET)
+#define GEN12_OAM_CONTROL(base) \
+ XE_REG((base) + GEN12_OAM_CONTROL_OFFSET)
+#define GEN12_OAM_DEBUG(base) \
+ XE_REG((base) + GEN12_OAM_DEBUG_OFFSET)
+#define GEN12_OAM_STATUS(base) \
+ XE_REG((base) + GEN12_OAM_STATUS_OFFSET)
+
+#define GEN12_OAM_CEC0_0_OFFSET (0x40)
+#define GEN12_OAM_CEC7_1_OFFSET (0x7c)
+#define GEN12_OAM_CEC0_0(base) \
+ XE_REG((base) + GEN12_OAM_CEC0_0_OFFSET)
+#define GEN12_OAM_CEC7_1(base) \
+ XE_REG((base) + GEN12_OAM_CEC7_1_OFFSET)
+
+#define GEN12_OAM_STARTTRIG1_OFFSET (0x00)
+#define GEN12_OAM_STARTTRIG8_OFFSET (0x1c)
+#define GEN12_OAM_STARTTRIG1(base) \
+ XE_REG((base) + GEN12_OAM_STARTTRIG1_OFFSET)
+#define GEN12_OAM_STARTTRIG8(base) \
+ XE_REG((base) + GEN12_OAM_STARTTRIG8_OFFSET)
+
+#define GEN12_OAM_REPORTTRIG1_OFFSET (0x20)
+#define GEN12_OAM_REPORTTRIG8_OFFSET (0x3c)
+#define GEN12_OAM_REPORTTRIG1(base) \
+ XE_REG((base) + GEN12_OAM_REPORTTRIG1_OFFSET)
+#define GEN12_OAM_REPORTTRIG8(base) \
+ XE_REG((base) + GEN12_OAM_REPORTTRIG8_OFFSET)
+
+#define GEN12_OAM_PERF_COUNTER_B0_OFFSET (0x84)
+#define GEN12_OAM_PERF_COUNTER_B(base, idx) \
+ XE_REG((base) + GEN12_OAM_PERF_COUNTER_B0_OFFSET + 4 * (idx))
+
+#endif /* __XE_OA_REGS__ */
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 03/21] drm/xe/oa: Add registers and GPU commands used by OA
2023-09-19 16:10 ` [Intel-xe] [PATCH 03/21] drm/xe/oa: Add registers and GPU commands used by OA Ashutosh Dixit
@ 2023-10-13 17:06 ` Umesh Nerlige Ramappa
2023-11-17 22:52 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-13 17:06 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:31AM -0700, Ashutosh Dixit wrote:
>Add registers and GPU commands used by OA in subsequent patches. The xe oa
>code programs OA units which generate performance data. The code also
>submits command buffers to change hardware engine context images and
>implement waits.
>
>v2: Remove unused registers (used by noa wait) (Umesh)
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +
> drivers/gpu/drm/xe/regs/xe_gpu_commands.h | 13 ++
> drivers/gpu/drm/xe/regs/xe_oa_regs.h | 173 ++++++++++++++++++++++
> 3 files changed, 188 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/regs/xe_oa_regs.h
>
>diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>index 692213d09ceaa..c12d23526f6ba 100644
>--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>@@ -115,6 +115,8 @@
> #define RING_EXECLIST_CONTROL(base) XE_REG((base) + 0x550)
> #define EL_CTRL_LOAD REG_BIT(0)
>
>+#define GEN8_RING_CS_GPR(base, n) XE_REG((base) + 0x600 + (n) * 8)
>+
> #define VDBOX_CGCTL3F10(base) XE_REG((base) + 0x3f10)
> #define IECPUNIT_CLKGATE_DIS REG_BIT(22)
>
>diff --git a/drivers/gpu/drm/xe/regs/xe_gpu_commands.h b/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
>index 12120dd37aa2a..f74cab662ad5b 100644
>--- a/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
>+++ b/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
>@@ -14,6 +14,7 @@
>
> #define MI_INSTR(opcode, flags) \
> (__INSTR(INSTR_MI_CLIENT) | (opcode) << 23 | (flags))
>+#define MI_OPCODE(x) (((x) >> 23) & 0x3f)
>
> #define MI_NOOP MI_INSTR(0, 0)
> #define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
>@@ -23,12 +24,19 @@
> #define MI_ARB_DISABLE (0<<0)
>
> #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
>+
> #define MI_STORE_DATA_IMM MI_INSTR(0x20, 0)
>+#define MI_STORE_DWORD_IMM_GEN4 MI_INSTR(0x20, 2)
>
> #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1)
> #define MI_LRI_LRM_CS_MMIO REG_BIT(19)
> #define MI_LRI_MMIO_REMAP_EN REG_BIT(17)
> #define MI_LRI_FORCE_POSTED (1<<12)
>+#define IS_MI_LRI_CMD(x) (MI_OPCODE(x) == MI_OPCODE(MI_INSTR(0x22, 0)))
>+#define MI_LRI_LEN(x) (((x) & 0xff) + 1)
>+
>+#define MI_STORE_REGISTER_MEM MI_INSTR(0x24, 1)
>+#define MI_SRM_LRM_GLOBAL_GTT REG_BIT(22)
>
> #define MI_FLUSH_DW MI_INSTR(0x26, 1)
> #define MI_FLUSH_DW_STORE_INDEX (1<<21)
>@@ -37,7 +45,12 @@
> #define MI_FLUSH_DW_OP_STOREDW (1<<14)
> #define MI_FLUSH_DW_USE_GTT (1<<2)
>
>+#define MI_LOAD_REGISTER_MEM MI_INSTR(0x29, 1)
>+
>+#define MI_LOAD_REGISTER_REG MI_INSTR(0x2A, 1)
>+
> #define MI_BATCH_BUFFER_START MI_INSTR(0x31, 1)
>+#define MI_BATCH_PREDICATE REG_BIT(15) /* HSW+ on RCS only*/
>
> #define XY_CTRL_SURF_COPY_BLT ((2 << 29) | (0x48 << 22) | 3)
> #define SRC_ACCESS_TYPE_SHIFT 21
>diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
>new file mode 100644
>index 0000000000000..0b378cb7a6ddb
>--- /dev/null
>+++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
>@@ -0,0 +1,173 @@
>+/* SPDX-License-Identifier: MIT */
>+/*
>+ * Copyright © 2023 Intel Corporation
>+ */
>+
>+#ifndef __XE_OA_REGS__
>+#define __XE_OA_REGS__
>+
>+#define REG_EQUAL(reg, xe_reg) ((reg) == (xe_reg.addr))
>+#define REG_EQUAL_MCR(reg, xe_reg) ((reg) == (xe_reg.__reg.addr))
>+
>+#define HALF_SLICE_CHICKEN2 XE_REG_MCR(0xe180)
>+#define GEN8_ST_PO_DISABLE REG_BIT(13)
>+
>+#define GEN7_ROW_CHICKEN2 XE_REG(0xe4f4)
>+#define GEN8_ROW_CHICKEN XE_REG_MCR(0xe4f0)
>+#define STALL_DOP_GATING_DISABLE REG_BIT(5)
>+#define GEN12_DISABLE_DOP_GATING REG_BIT(0)
>+
>+#define RPM_CONFIG1 XE_REG(0xd04)
>+#define GEN10_GT_NOA_ENABLE REG_BIT(9)
>+
>+#define WAIT_FOR_RC6_EXIT XE_REG(0x20cc)
>+#define HSW_WAIT_FOR_RC6_EXIT_ENABLE REG_BIT(0)
>+
>+#define EU_PERF_CNTL0 XE_REG(0xe458)
>+#define EU_PERF_CNTL4 XE_REG(0xe45c)
>+#define EU_PERF_CNTL1 XE_REG(0xe558)
>+#define EU_PERF_CNTL5 XE_REG(0xe55c)
>+#define EU_PERF_CNTL2 XE_REG(0xe658)
>+#define EU_PERF_CNTL6 XE_REG(0xe65c)
>+#define EU_PERF_CNTL3 XE_REG(0xe758)
>+
>+#define OABUFFER_SIZE_MASK REG_GENMASK(5, 3)
>+#define OABUFFER_SIZE_128K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 0)
>+#define OABUFFER_SIZE_256K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 1)
>+#define OABUFFER_SIZE_512K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 2)
>+#define OABUFFER_SIZE_1M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 3)
>+#define OABUFFER_SIZE_2M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 4)
>+#define OABUFFER_SIZE_4M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 5)
>+#define OABUFFER_SIZE_8M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 6)
>+#define OABUFFER_SIZE_16M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 7)
>+
>+#define GEN12_OA_TLB_INV_CR XE_REG(0xceec)
>+
>+/* Gen12 OAR unit */
>+#define GEN12_OAR_OACONTROL XE_REG(0x2960)
>+#define GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT 1
>+#define GEN12_OAR_OACONTROL_COUNTER_ENABLE REG_BIT(0)
>+
>+#define GEN8_OACTXCONTROL XE_REG(0x2360)
>+#define GEN8_OA_COUNTER_RESUME REG_BIT(0)
>+
>+#define GEN12_OACTXCONTROL(base) XE_REG((base) + 0x360)
>+#define GEN12_OAR_OASTATUS XE_REG(0x2968)
>+
>+/* Gen12 OAG unit */
>+#define GEN12_OAG_OAHEADPTR XE_REG(0xdb00)
>+#define GEN12_OAG_OAHEADPTR_MASK 0xffffffc0
>+#define GEN12_OAG_OATAILPTR XE_REG(0xdb04)
>+#define GEN12_OAG_OATAILPTR_MASK 0xffffffc0
>+
>+#define GEN12_OAG_OABUFFER XE_REG(0xdb08)
>+#define GEN12_OAG_OABUFFER_BUFFER_SIZE_MASK (0x7)
>+#define GEN12_OAG_OABUFFER_BUFFER_SIZE_SHIFT (3)
>+#define GEN12_OAG_OABUFFER_MEMORY_SELECT REG_BIT(0) /* 0: PPGTT, 1: GGTT */
>+
>+#define GEN12_OAG_OAGLBCTXCTRL XE_REG(0x2b28)
>+#define GEN12_OAG_OAGLBCTXCTRL_TIMER_PERIOD_SHIFT 2
>+#define GEN12_OAG_OAGLBCTXCTRL_TIMER_ENABLE REG_BIT(1)
>+#define GEN12_OAG_OAGLBCTXCTRL_COUNTER_RESUME REG_BIT(0)
>+
>+#define GEN12_OAG_OACONTROL XE_REG(0xdaf4)
>+#define GEN12_OAG_OACONTROL_OA_COUNTER_FORMAT_SHIFT 2
>+#define GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE REG_BIT(0)
>+
>+#define GEN12_OAG_OA_DEBUG XE_REG(0xdaf8)
>+#define GEN12_OAG_OA_DEBUG_INCLUDE_CLK_RATIO REG_BIT(6)
>+#define GEN12_OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS REG_BIT(5)
>+#define GEN12_OAG_OA_DEBUG_DISABLE_GO_1_0_REPORTS REG_BIT(2)
>+#define GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS REG_BIT(1)
>+
>+#define GEN12_OAG_OASTATUS XE_REG(0xdafc)
>+#define GEN12_OAG_OASTATUS_COUNTER_OVERFLOW REG_BIT(2)
>+#define GEN12_OAG_OASTATUS_BUFFER_OVERFLOW REG_BIT(1)
>+#define GEN12_OAG_OASTATUS_REPORT_LOST REG_BIT(0)
>+
>+#define GDT_CHICKEN_BITS XE_REG(0x9840)
>+#define GT_NOA_ENABLE 0x00000080
>+
>+#define GEN12_SQCNT1 XE_REG(0x8718)
>+#define GEN12_SQCNT1_PMON_ENABLE REG_BIT(30)
>+#define GEN12_SQCNT1_OABPC REG_BIT(29)
>+
>+/* Gen12 OAM unit */
>+#define GEN12_OAM_HEAD_POINTER_OFFSET (0x1a0)
>+#define GEN12_OAM_HEAD_POINTER_MASK 0xffffffc0
>+
>+#define GEN12_OAM_TAIL_POINTER_OFFSET (0x1a4)
>+#define GEN12_OAM_TAIL_POINTER_MASK 0xffffffc0
>+
>+#define GEN12_OAM_BUFFER_OFFSET (0x1a8)
>+#define GEN12_OAM_BUFFER_SIZE_MASK (0x7)
>+#define GEN12_OAM_BUFFER_SIZE_SHIFT (3)
>+#define GEN12_OAM_BUFFER_MEMORY_SELECT REG_BIT(0) /* 0: PPGTT, 1: GGTT */
>+
>+#define GEN12_OAM_CONTEXT_CONTROL_OFFSET (0x1bc)
>+#define GEN12_OAM_CONTEXT_CONTROL_TIMER_PERIOD_SHIFT 2
>+#define GEN12_OAM_CONTEXT_CONTROL_TIMER_ENABLE REG_BIT(1)
>+#define GEN12_OAM_CONTEXT_CONTROL_COUNTER_RESUME REG_BIT(0)
>+
>+#define GEN12_OAM_CONTROL_OFFSET (0x194)
>+#define GEN12_OAM_CONTROL_COUNTER_FORMAT_SHIFT 1
>+#define GEN12_OAM_CONTROL_COUNTER_ENABLE REG_BIT(0)
>+
>+#define GEN12_OAM_DEBUG_OFFSET (0x198)
>+#define GEN12_OAM_DEBUG_BUFFER_SIZE_SELECT REG_BIT(12)
>+#define GEN12_OAM_DEBUG_INCLUDE_CLK_RATIO REG_BIT(6)
>+#define GEN12_OAM_DEBUG_DISABLE_CLK_RATIO_REPORTS REG_BIT(5)
>+#define GEN12_OAM_DEBUG_DISABLE_GO_1_0_REPORTS REG_BIT(2)
>+#define GEN12_OAM_DEBUG_DISABLE_CTX_SWITCH_REPORTS REG_BIT(1)
>+
>+#define GEN12_OAM_STATUS_OFFSET (0x19c)
>+#define GEN12_OAM_STATUS_COUNTER_OVERFLOW REG_BIT(2)
>+#define GEN12_OAM_STATUS_BUFFER_OVERFLOW REG_BIT(1)
>+#define GEN12_OAM_STATUS_REPORT_LOST REG_BIT(0)
>+
>+#define GEN12_OAM_MMIO_TRG_OFFSET (0x1d0)
>+
>+#define GEN12_OAM_MMIO_TRG(base) \
>+ XE_REG((base) + GEN12_OAM_MMIO_TRG_OFFSET)
>+
>+#define GEN12_OAM_HEAD_POINTER(base) \
>+ XE_REG((base) + GEN12_OAM_HEAD_POINTER_OFFSET)
>+#define GEN12_OAM_TAIL_POINTER(base) \
>+ XE_REG((base) + GEN12_OAM_TAIL_POINTER_OFFSET)
>+#define GEN12_OAM_BUFFER(base) \
>+ XE_REG((base) + GEN12_OAM_BUFFER_OFFSET)
>+#define GEN12_OAM_CONTEXT_CONTROL(base) \
>+ XE_REG((base) + GEN12_OAM_CONTEXT_CONTROL_OFFSET)
>+#define GEN12_OAM_CONTROL(base) \
>+ XE_REG((base) + GEN12_OAM_CONTROL_OFFSET)
>+#define GEN12_OAM_DEBUG(base) \
>+ XE_REG((base) + GEN12_OAM_DEBUG_OFFSET)
>+#define GEN12_OAM_STATUS(base) \
>+ XE_REG((base) + GEN12_OAM_STATUS_OFFSET)
>+
>+#define GEN12_OAM_CEC0_0_OFFSET (0x40)
>+#define GEN12_OAM_CEC7_1_OFFSET (0x7c)
>+#define GEN12_OAM_CEC0_0(base) \
>+ XE_REG((base) + GEN12_OAM_CEC0_0_OFFSET)
>+#define GEN12_OAM_CEC7_1(base) \
>+ XE_REG((base) + GEN12_OAM_CEC7_1_OFFSET)
>+
>+#define GEN12_OAM_STARTTRIG1_OFFSET (0x00)
>+#define GEN12_OAM_STARTTRIG8_OFFSET (0x1c)
>+#define GEN12_OAM_STARTTRIG1(base) \
>+ XE_REG((base) + GEN12_OAM_STARTTRIG1_OFFSET)
>+#define GEN12_OAM_STARTTRIG8(base) \
>+ XE_REG((base) + GEN12_OAM_STARTTRIG8_OFFSET)
>+
>+#define GEN12_OAM_REPORTTRIG1_OFFSET (0x20)
>+#define GEN12_OAM_REPORTTRIG8_OFFSET (0x3c)
>+#define GEN12_OAM_REPORTTRIG1(base) \
>+ XE_REG((base) + GEN12_OAM_REPORTTRIG1_OFFSET)
>+#define GEN12_OAM_REPORTTRIG8(base) \
>+ XE_REG((base) + GEN12_OAM_REPORTTRIG8_OFFSET)
>+
>+#define GEN12_OAM_PERF_COUNTER_B0_OFFSET (0x84)
>+#define GEN12_OAM_PERF_COUNTER_B(base, idx) \
>+ XE_REG((base) + GEN12_OAM_PERF_COUNTER_B0_OFFSET + 4 * (idx))
>+
>+#endif /* __XE_OA_REGS__ */
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* Re: [Intel-xe] [PATCH 03/21] drm/xe/oa: Add registers and GPU commands used by OA
2023-10-13 17:06 ` Umesh Nerlige Ramappa
@ 2023-11-17 22:52 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-11-17 22:52 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Fri, 13 Oct 2023 10:06:29 -0700, Umesh Nerlige Ramappa wrote:
>
> On Tue, Sep 19, 2023 at 09:10:31AM -0700, Ashutosh Dixit wrote:
> > Add registers and GPU commands used by OA in subsequent patches. The xe oa
> > code programs OA units which generate performance data. The code also
> > submits command buffers to change hardware engine context images and
> > implement waits.
> >
> > v2: Remove unused registers (used by noa wait) (Umesh)
> >
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>
> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Thanks, though I am also thinking of doing s/GEN12_/XE_/ in all the
register name #define's, to better align with the new XE/XE2 nomenclature.
> > ---
> > drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +
> > drivers/gpu/drm/xe/regs/xe_gpu_commands.h | 13 ++
> > drivers/gpu/drm/xe/regs/xe_oa_regs.h | 173 ++++++++++++++++++++++
> > 3 files changed, 188 insertions(+)
> > create mode 100644 drivers/gpu/drm/xe/regs/xe_oa_regs.h
> >
> > diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > index 692213d09ceaa..c12d23526f6ba 100644
> > --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > @@ -115,6 +115,8 @@
> > #define RING_EXECLIST_CONTROL(base) XE_REG((base) + 0x550)
> > #define EL_CTRL_LOAD REG_BIT(0)
> >
> > +#define GEN8_RING_CS_GPR(base, n) XE_REG((base) + 0x600 + (n) * 8)
> > +
> > #define VDBOX_CGCTL3F10(base) XE_REG((base) + 0x3f10)
> > #define IECPUNIT_CLKGATE_DIS REG_BIT(22)
> >
> > diff --git a/drivers/gpu/drm/xe/regs/xe_gpu_commands.h b/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
> > index 12120dd37aa2a..f74cab662ad5b 100644
> > --- a/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
> > +++ b/drivers/gpu/drm/xe/regs/xe_gpu_commands.h
> > @@ -14,6 +14,7 @@
> >
> > #define MI_INSTR(opcode, flags) \
> > (__INSTR(INSTR_MI_CLIENT) | (opcode) << 23 | (flags))
> > +#define MI_OPCODE(x) (((x) >> 23) & 0x3f)
> >
> > #define MI_NOOP MI_INSTR(0, 0)
> > #define MI_USER_INTERRUPT MI_INSTR(0x02, 0)
> > @@ -23,12 +24,19 @@
> > #define MI_ARB_DISABLE (0<<0)
> >
> > #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
> > +
> > #define MI_STORE_DATA_IMM MI_INSTR(0x20, 0)
> > +#define MI_STORE_DWORD_IMM_GEN4 MI_INSTR(0x20, 2)
> >
> > #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1)
> > #define MI_LRI_LRM_CS_MMIO REG_BIT(19)
> > #define MI_LRI_MMIO_REMAP_EN REG_BIT(17)
> > #define MI_LRI_FORCE_POSTED (1<<12)
> > +#define IS_MI_LRI_CMD(x) (MI_OPCODE(x) == MI_OPCODE(MI_INSTR(0x22, 0)))
> > +#define MI_LRI_LEN(x) (((x) & 0xff) + 1)
> > +
> > +#define MI_STORE_REGISTER_MEM MI_INSTR(0x24, 1)
> > +#define MI_SRM_LRM_GLOBAL_GTT REG_BIT(22)
> >
> > #define MI_FLUSH_DW MI_INSTR(0x26, 1)
> > #define MI_FLUSH_DW_STORE_INDEX (1<<21)
> > @@ -37,7 +45,12 @@
> > #define MI_FLUSH_DW_OP_STOREDW (1<<14)
> > #define MI_FLUSH_DW_USE_GTT (1<<2)
> >
> > +#define MI_LOAD_REGISTER_MEM MI_INSTR(0x29, 1)
> > +
> > +#define MI_LOAD_REGISTER_REG MI_INSTR(0x2A, 1)
> > +
> > #define MI_BATCH_BUFFER_START MI_INSTR(0x31, 1)
> > +#define MI_BATCH_PREDICATE REG_BIT(15) /* HSW+ on RCS only*/
> >
> > #define XY_CTRL_SURF_COPY_BLT ((2 << 29) | (0x48 << 22) | 3)
> > #define SRC_ACCESS_TYPE_SHIFT 21
> > diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
> > new file mode 100644
> > index 0000000000000..0b378cb7a6ddb
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
> > @@ -0,0 +1,173 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2023 Intel Corporation
> > + */
> > +
> > +#ifndef __XE_OA_REGS__
> > +#define __XE_OA_REGS__
> > +
> > +#define REG_EQUAL(reg, xe_reg) ((reg) == (xe_reg.addr))
> > +#define REG_EQUAL_MCR(reg, xe_reg) ((reg) == (xe_reg.__reg.addr))
> > +
> > +#define HALF_SLICE_CHICKEN2 XE_REG_MCR(0xe180)
> > +#define GEN8_ST_PO_DISABLE REG_BIT(13)
> > +
> > +#define GEN7_ROW_CHICKEN2 XE_REG(0xe4f4)
> > +#define GEN8_ROW_CHICKEN XE_REG_MCR(0xe4f0)
> > +#define STALL_DOP_GATING_DISABLE REG_BIT(5)
> > +#define GEN12_DISABLE_DOP_GATING REG_BIT(0)
> > +
> > +#define RPM_CONFIG1 XE_REG(0xd04)
> > +#define GEN10_GT_NOA_ENABLE REG_BIT(9)
> > +
> > +#define WAIT_FOR_RC6_EXIT XE_REG(0x20cc)
> > +#define HSW_WAIT_FOR_RC6_EXIT_ENABLE REG_BIT(0)
> > +
> > +#define EU_PERF_CNTL0 XE_REG(0xe458)
> > +#define EU_PERF_CNTL4 XE_REG(0xe45c)
> > +#define EU_PERF_CNTL1 XE_REG(0xe558)
> > +#define EU_PERF_CNTL5 XE_REG(0xe55c)
> > +#define EU_PERF_CNTL2 XE_REG(0xe658)
> > +#define EU_PERF_CNTL6 XE_REG(0xe65c)
> > +#define EU_PERF_CNTL3 XE_REG(0xe758)
> > +
> > +#define OABUFFER_SIZE_MASK REG_GENMASK(5, 3)
> > +#define OABUFFER_SIZE_128K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 0)
> > +#define OABUFFER_SIZE_256K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 1)
> > +#define OABUFFER_SIZE_512K REG_FIELD_PREP(OABUFFER_SIZE_MASK, 2)
> > +#define OABUFFER_SIZE_1M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 3)
> > +#define OABUFFER_SIZE_2M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 4)
> > +#define OABUFFER_SIZE_4M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 5)
> > +#define OABUFFER_SIZE_8M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 6)
> > +#define OABUFFER_SIZE_16M REG_FIELD_PREP(OABUFFER_SIZE_MASK, 7)
> > +
> > +#define GEN12_OA_TLB_INV_CR XE_REG(0xceec)
> > +
> > +/* Gen12 OAR unit */
> > +#define GEN12_OAR_OACONTROL XE_REG(0x2960)
> > +#define GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT 1
> > +#define GEN12_OAR_OACONTROL_COUNTER_ENABLE REG_BIT(0)
> > +
> > +#define GEN8_OACTXCONTROL XE_REG(0x2360)
> > +#define GEN8_OA_COUNTER_RESUME REG_BIT(0)
> > +
> > +#define GEN12_OACTXCONTROL(base) XE_REG((base) + 0x360)
> > +#define GEN12_OAR_OASTATUS XE_REG(0x2968)
> > +
> > +/* Gen12 OAG unit */
> > +#define GEN12_OAG_OAHEADPTR XE_REG(0xdb00)
> > +#define GEN12_OAG_OAHEADPTR_MASK 0xffffffc0
> > +#define GEN12_OAG_OATAILPTR XE_REG(0xdb04)
> > +#define GEN12_OAG_OATAILPTR_MASK 0xffffffc0
> > +
> > +#define GEN12_OAG_OABUFFER XE_REG(0xdb08)
> > +#define GEN12_OAG_OABUFFER_BUFFER_SIZE_MASK (0x7)
> > +#define GEN12_OAG_OABUFFER_BUFFER_SIZE_SHIFT (3)
> > +#define GEN12_OAG_OABUFFER_MEMORY_SELECT REG_BIT(0) /* 0: PPGTT, 1: GGTT */
> > +
> > +#define GEN12_OAG_OAGLBCTXCTRL XE_REG(0x2b28)
> > +#define GEN12_OAG_OAGLBCTXCTRL_TIMER_PERIOD_SHIFT 2
> > +#define GEN12_OAG_OAGLBCTXCTRL_TIMER_ENABLE REG_BIT(1)
> > +#define GEN12_OAG_OAGLBCTXCTRL_COUNTER_RESUME REG_BIT(0)
> > +
> > +#define GEN12_OAG_OACONTROL XE_REG(0xdaf4)
> > +#define GEN12_OAG_OACONTROL_OA_COUNTER_FORMAT_SHIFT 2
> > +#define GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE REG_BIT(0)
> > +
> > +#define GEN12_OAG_OA_DEBUG XE_REG(0xdaf8)
> > +#define GEN12_OAG_OA_DEBUG_INCLUDE_CLK_RATIO REG_BIT(6)
> > +#define GEN12_OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS REG_BIT(5)
> > +#define GEN12_OAG_OA_DEBUG_DISABLE_GO_1_0_REPORTS REG_BIT(2)
> > +#define GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS REG_BIT(1)
> > +
> > +#define GEN12_OAG_OASTATUS XE_REG(0xdafc)
> > +#define GEN12_OAG_OASTATUS_COUNTER_OVERFLOW REG_BIT(2)
> > +#define GEN12_OAG_OASTATUS_BUFFER_OVERFLOW REG_BIT(1)
> > +#define GEN12_OAG_OASTATUS_REPORT_LOST REG_BIT(0)
> > +
> > +#define GDT_CHICKEN_BITS XE_REG(0x9840)
> > +#define GT_NOA_ENABLE 0x00000080
> > +
> > +#define GEN12_SQCNT1 XE_REG(0x8718)
> > +#define GEN12_SQCNT1_PMON_ENABLE REG_BIT(30)
> > +#define GEN12_SQCNT1_OABPC REG_BIT(29)
> > +
> > +/* Gen12 OAM unit */
> > +#define GEN12_OAM_HEAD_POINTER_OFFSET (0x1a0)
> > +#define GEN12_OAM_HEAD_POINTER_MASK 0xffffffc0
> > +
> > +#define GEN12_OAM_TAIL_POINTER_OFFSET (0x1a4)
> > +#define GEN12_OAM_TAIL_POINTER_MASK 0xffffffc0
> > +
> > +#define GEN12_OAM_BUFFER_OFFSET (0x1a8)
> > +#define GEN12_OAM_BUFFER_SIZE_MASK (0x7)
> > +#define GEN12_OAM_BUFFER_SIZE_SHIFT (3)
> > +#define GEN12_OAM_BUFFER_MEMORY_SELECT REG_BIT(0) /* 0: PPGTT, 1: GGTT */
> > +
> > +#define GEN12_OAM_CONTEXT_CONTROL_OFFSET (0x1bc)
> > +#define GEN12_OAM_CONTEXT_CONTROL_TIMER_PERIOD_SHIFT 2
> > +#define GEN12_OAM_CONTEXT_CONTROL_TIMER_ENABLE REG_BIT(1)
> > +#define GEN12_OAM_CONTEXT_CONTROL_COUNTER_RESUME REG_BIT(0)
> > +
> > +#define GEN12_OAM_CONTROL_OFFSET (0x194)
> > +#define GEN12_OAM_CONTROL_COUNTER_FORMAT_SHIFT 1
> > +#define GEN12_OAM_CONTROL_COUNTER_ENABLE REG_BIT(0)
> > +
> > +#define GEN12_OAM_DEBUG_OFFSET (0x198)
> > +#define GEN12_OAM_DEBUG_BUFFER_SIZE_SELECT REG_BIT(12)
> > +#define GEN12_OAM_DEBUG_INCLUDE_CLK_RATIO REG_BIT(6)
> > +#define GEN12_OAM_DEBUG_DISABLE_CLK_RATIO_REPORTS REG_BIT(5)
> > +#define GEN12_OAM_DEBUG_DISABLE_GO_1_0_REPORTS REG_BIT(2)
> > +#define GEN12_OAM_DEBUG_DISABLE_CTX_SWITCH_REPORTS REG_BIT(1)
> > +
> > +#define GEN12_OAM_STATUS_OFFSET (0x19c)
> > +#define GEN12_OAM_STATUS_COUNTER_OVERFLOW REG_BIT(2)
> > +#define GEN12_OAM_STATUS_BUFFER_OVERFLOW REG_BIT(1)
> > +#define GEN12_OAM_STATUS_REPORT_LOST REG_BIT(0)
> > +
> > +#define GEN12_OAM_MMIO_TRG_OFFSET (0x1d0)
> > +
> > +#define GEN12_OAM_MMIO_TRG(base) \
> > + XE_REG((base) + GEN12_OAM_MMIO_TRG_OFFSET)
> > +
> > +#define GEN12_OAM_HEAD_POINTER(base) \
> > + XE_REG((base) + GEN12_OAM_HEAD_POINTER_OFFSET)
> > +#define GEN12_OAM_TAIL_POINTER(base) \
> > + XE_REG((base) + GEN12_OAM_TAIL_POINTER_OFFSET)
> > +#define GEN12_OAM_BUFFER(base) \
> > + XE_REG((base) + GEN12_OAM_BUFFER_OFFSET)
> > +#define GEN12_OAM_CONTEXT_CONTROL(base) \
> > + XE_REG((base) + GEN12_OAM_CONTEXT_CONTROL_OFFSET)
> > +#define GEN12_OAM_CONTROL(base) \
> > + XE_REG((base) + GEN12_OAM_CONTROL_OFFSET)
> > +#define GEN12_OAM_DEBUG(base) \
> > + XE_REG((base) + GEN12_OAM_DEBUG_OFFSET)
> > +#define GEN12_OAM_STATUS(base) \
> > + XE_REG((base) + GEN12_OAM_STATUS_OFFSET)
> > +
> > +#define GEN12_OAM_CEC0_0_OFFSET (0x40)
> > +#define GEN12_OAM_CEC7_1_OFFSET (0x7c)
> > +#define GEN12_OAM_CEC0_0(base) \
> > + XE_REG((base) + GEN12_OAM_CEC0_0_OFFSET)
> > +#define GEN12_OAM_CEC7_1(base) \
> > + XE_REG((base) + GEN12_OAM_CEC7_1_OFFSET)
> > +
> > +#define GEN12_OAM_STARTTRIG1_OFFSET (0x00)
> > +#define GEN12_OAM_STARTTRIG8_OFFSET (0x1c)
> > +#define GEN12_OAM_STARTTRIG1(base) \
> > + XE_REG((base) + GEN12_OAM_STARTTRIG1_OFFSET)
> > +#define GEN12_OAM_STARTTRIG8(base) \
> > + XE_REG((base) + GEN12_OAM_STARTTRIG8_OFFSET)
> > +
> > +#define GEN12_OAM_REPORTTRIG1_OFFSET (0x20)
> > +#define GEN12_OAM_REPORTTRIG8_OFFSET (0x3c)
> > +#define GEN12_OAM_REPORTTRIG1(base) \
> > + XE_REG((base) + GEN12_OAM_REPORTTRIG1_OFFSET)
> > +#define GEN12_OAM_REPORTTRIG8(base) \
> > + XE_REG((base) + GEN12_OAM_REPORTTRIG8_OFFSET)
> > +
> > +#define GEN12_OAM_PERF_COUNTER_B0_OFFSET (0x84)
> > +#define GEN12_OAM_PERF_COUNTER_B(base, idx) \
> > + XE_REG((base) + GEN12_OAM_PERF_COUNTER_B0_OFFSET + 4 * (idx))
> > +
> > +#endif /* __XE_OA_REGS__ */
> > --
> > 2.41.0
> >
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 04/21] drm/xe/oa: Module init/exit and probe/remove
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (2 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 03/21] drm/xe/oa: Add registers and GPU commands used by OA Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-13 17:50 ` Umesh Nerlige Ramappa
2023-10-20 7:08 ` [Intel-xe] [04/21] " Lionel Landwerlin
2023-09-19 16:10 ` [Intel-xe] [PATCH 05/21] drm/xe/oa: Add/remove config ioctl's Ashutosh Dixit
` (25 subsequent siblings)
29 siblings, 2 replies; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Perform OA initialization at module init and probe time:
* Setup perf_stream_paranoid and oa_max_sample_rate files in /proc
* Setup metrics sysfs directories to expose which metrics configurations
are available
* Setup OA groups which associate hw engines with OA units
* Initialize OA units
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c | 11 +
drivers/gpu/drm/xe/xe_device_types.h | 4 +
drivers/gpu/drm/xe/xe_gt_types.h | 4 +
drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 +
drivers/gpu/drm/xe/xe_module.c | 5 +
drivers/gpu/drm/xe/xe_oa.c | 309 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_oa.h | 18 ++
8 files changed, 354 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_oa.c
create mode 100644 drivers/gpu/drm/xe/xe_oa.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index cc95a46b5e4d3..a40c4827b9c85 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -84,6 +84,7 @@ xe-y += xe_bb.o \
xe_mmio.o \
xe_mocs.o \
xe_module.o \
+ xe_oa.o \
xe_pat.o \
xe_pci.o \
xe_pcode.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index b6bcb6c3482e7..2c3dac6340f04 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -25,6 +25,7 @@
#include "xe_irq.h"
#include "xe_mmio.h"
#include "xe_module.h"
+#include "xe_oa.h"
#include "xe_pcode.h"
#include "xe_pm.h"
#include "xe_query.h"
@@ -323,6 +324,10 @@ int xe_device_probe(struct xe_device *xe)
goto err_irq_shutdown;
}
+ err = xe_oa_init(xe);
+ if (err)
+ goto err_irq_shutdown;
+
err = xe_display_init(xe);
if (err)
goto err_irq_shutdown;
@@ -333,6 +338,8 @@ int xe_device_probe(struct xe_device *xe)
xe_display_register(xe);
+ xe_oa_register(xe);
+
xe_debugfs_register(xe);
xe_pmu_register(&xe->pmu);
@@ -363,10 +370,14 @@ static void xe_device_remove_display(struct xe_device *xe)
void xe_device_remove(struct xe_device *xe)
{
+ xe_oa_unregister(xe);
+
xe_device_remove_display(xe);
xe_display_fini(xe);
+ xe_oa_fini(xe);
+
xe_irq_shutdown(xe);
}
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index a82f28c6a3a01..8161407913607 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -17,6 +17,7 @@
#include "xe_platform_types.h"
#include "xe_pmu.h"
#include "xe_step_types.h"
+#include "xe_oa.h"
#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
#include "soc/intel_pch.h"
@@ -365,6 +366,9 @@ struct xe_device {
/** @pmu: performance monitoring unit */
struct xe_pmu pmu;
+ /** @oa: oa perf counter subsystem */
+ struct xe_oa oa;
+
/* private: */
#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index d4310be3e1e7c..dc700198f33f7 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -13,6 +13,7 @@
#include "xe_reg_sr_types.h"
#include "xe_sa_types.h"
#include "xe_uc_types.h"
+#include "xe_oa.h"
struct xe_exec_queue_ops;
struct xe_migrate;
@@ -347,6 +348,9 @@ struct xe_gt {
/** @oob: bitmap with active OOB workaroudns */
unsigned long *oob;
} wa_active;
+
+ /** @oa: oa perf counter subsystem per gt info */
+ struct xe_oa_gt oa;
};
#endif
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
index cd4bc1412a3ff..c38674c827c91 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
@@ -146,6 +146,8 @@ struct xe_hw_engine {
enum xe_hw_engine_id engine_id;
/** @eclass: pointer to per hw engine class interface */
struct xe_hw_engine_class_intf *eclass;
+ /** @oa_group: oa unit for this hw engine */
+ struct xe_oa_group *oa_group;
};
/**
diff --git a/drivers/gpu/drm/xe/xe_module.c b/drivers/gpu/drm/xe/xe_module.c
index 7194595e7f312..5bf957b127f0f 100644
--- a/drivers/gpu/drm/xe/xe_module.c
+++ b/drivers/gpu/drm/xe/xe_module.c
@@ -11,6 +11,7 @@
#include "xe_drv.h"
#include "xe_hw_fence.h"
#include "xe_module.h"
+#include "xe_oa.h"
#include "xe_pci.h"
#include "xe_pmu.h"
#include "xe_sched_job.h"
@@ -68,6 +69,10 @@ static const struct init_funcs init_funcs[] = {
.init = xe_register_pci_driver,
.exit = xe_unregister_pci_driver,
},
+ {
+ .init = xe_oa_sysctl_register,
+ .exit = xe_oa_sysctl_unregister,
+ },
};
static int __init xe_init(void)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
new file mode 100644
index 0000000000000..fae067e73c027
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -0,0 +1,309 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include <linux/anon_inodes.h>
+#include <linux/nospec.h>
+#include <linux/sizes.h>
+#include <linux/uuid.h>
+
+#include <drm/xe_drm.h>
+#include <drm/drm_drv.h>
+
+#include "regs/xe_oa_regs.h"
+#include "xe_gt.h"
+#include "xe_device.h"
+#include "xe_oa.h"
+
+static u32 xe_oa_stream_paranoid = true;
+static int xe_oa_sample_rate_hard_limit;
+static u32 xe_oa_max_sample_rate = 100000;
+
+static const struct xe_oa_format oa_formats[] = {
+ [XE_OA_FORMAT_C4_B8] = { 7, 64 },
+ [XE_OA_FORMAT_A12] = { 0, 64 },
+ [XE_OA_FORMAT_A12_B8_C8] = { 2, 128 },
+ [XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
+ [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
+ [XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
+ [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, TYPE_OAM, HDR_64_BIT },
+ [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
+};
+
+static struct ctl_table_header *sysctl_header;
+
+void xe_oa_register(struct xe_device *xe)
+{
+ struct xe_oa *oa = &xe->oa;
+
+ if (!oa->xe)
+ return;
+
+ oa->metrics_kobj = kobject_create_and_add("metrics",
+ &xe->drm.primary->kdev->kobj);
+}
+
+void xe_oa_unregister(struct xe_device *xe)
+{
+ struct xe_oa *oa = &xe->oa;
+
+ if (!oa->metrics_kobj)
+ return;
+
+ kobject_put(oa->metrics_kobj);
+ oa->metrics_kobj = NULL;
+}
+
+static u32 num_oa_groups_per_gt(struct xe_gt *gt)
+{
+ return 1;
+}
+
+static u32 __oam_engine_group(struct xe_hw_engine *hwe)
+{
+ if (GRAPHICS_VERx100(gt_to_xe(hwe->gt)) >= 1270) {
+ /*
+ * There's 1 SAMEDIA gt and 1 OAM per SAMEDIA gt. All media slices
+ * within the gt use the same OAM. All MTL SKUs list 1 SA MEDIA.
+ */
+ drm_WARN_ON(&hwe->gt->tile->xe->drm,
+ hwe->gt->info.type != XE_GT_TYPE_MEDIA);
+
+ return OA_GROUP_OAM_SAMEDIA_0;
+ }
+
+ return OA_GROUP_INVALID;
+}
+
+static u32 __oa_engine_group(struct xe_hw_engine *hwe)
+{
+ switch (hwe->class) {
+ case XE_ENGINE_CLASS_RENDER:
+ return OA_GROUP_OAG;
+
+ case XE_ENGINE_CLASS_VIDEO_DECODE:
+ case XE_ENGINE_CLASS_VIDEO_ENHANCE:
+ return __oam_engine_group(hwe);
+
+ default:
+ return OA_GROUP_INVALID;
+ }
+}
+
+static struct xe_oa_regs __oam_regs(u32 base)
+{
+ return (struct xe_oa_regs) {
+ base,
+ GEN12_OAM_HEAD_POINTER(base),
+ GEN12_OAM_TAIL_POINTER(base),
+ GEN12_OAM_BUFFER(base),
+ GEN12_OAM_CONTEXT_CONTROL(base),
+ GEN12_OAM_CONTROL(base),
+ GEN12_OAM_DEBUG(base),
+ GEN12_OAM_STATUS(base),
+ GEN12_OAM_CONTROL_COUNTER_FORMAT_SHIFT,
+ };
+}
+
+static struct xe_oa_regs __oag_regs(void)
+{
+ return (struct xe_oa_regs) {
+ 0,
+ GEN12_OAG_OAHEADPTR,
+ GEN12_OAG_OATAILPTR,
+ GEN12_OAG_OABUFFER,
+ GEN12_OAG_OAGLBCTXCTRL,
+ GEN12_OAG_OACONTROL,
+ GEN12_OAG_OA_DEBUG,
+ GEN12_OAG_OASTATUS,
+ GEN12_OAG_OACONTROL_OA_COUNTER_FORMAT_SHIFT,
+ };
+}
+
+static void xe_oa_init_groups(struct xe_gt *gt)
+{
+ const u32 mtl_oa_base[] = {
+ [OA_GROUP_OAM_SAMEDIA_0] = 0x393000,
+ };
+ int i, num_groups = gt->oa.num_oa_groups;
+
+ for (i = 0; i < num_groups; i++) {
+ struct xe_oa_group *g = >->oa.group[i];
+
+ /* Fused off engines can result in a group with num_engines == 0 */
+ if (g->num_engines == 0)
+ continue;
+
+ if (i == OA_GROUP_OAG && gt->info.type != XE_GT_TYPE_MEDIA) {
+ g->regs = __oag_regs();
+ g->type = TYPE_OAG;
+ } else if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270) {
+ g->regs = __oam_regs(mtl_oa_base[i]);
+ g->type = TYPE_OAM;
+ }
+
+ /* Set oa_unit_ids now to ensure ids remain contiguous. */
+ g->oa_unit_id = gt->tile->xe->oa.oa_unit_ids++;
+ }
+}
+
+static int xe_oa_init_gt(struct xe_gt *gt)
+{
+ u32 num_groups = num_oa_groups_per_gt(gt);
+ struct xe_hw_engine *hwe;
+ enum xe_hw_engine_id id;
+ struct xe_oa_group *g;
+
+ g = kcalloc(num_groups, sizeof(*g), GFP_KERNEL);
+ if (!g)
+ return -ENOMEM;
+
+ for_each_hw_engine(hwe, gt, id) {
+ u32 index = __oa_engine_group(hwe);
+
+ hwe->oa_group = NULL;
+ if (index < num_groups) {
+ g[index].num_engines++;
+ hwe->oa_group = &g[index];
+ }
+ }
+
+ gt->oa.num_oa_groups = num_groups;
+ gt->oa.group = g;
+
+ xe_oa_init_groups(gt);
+
+ return 0;
+}
+
+static int xe_oa_init_engine_groups(struct xe_oa *oa)
+{
+ struct xe_gt *gt;
+ int i, ret;
+
+ for_each_gt(gt, oa->xe, i) {
+ ret = xe_oa_init_gt(gt);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
+{
+ __set_bit(format, oa->format_mask);
+}
+
+static void xe_oa_init_supported_formats(struct xe_oa *oa)
+{
+ switch (oa->xe->info.platform) {
+ case XE_ALDERLAKE_S:
+ case XE_ALDERLAKE_P:
+ oa_format_add(oa, XE_OA_FORMAT_A12);
+ oa_format_add(oa, XE_OA_FORMAT_A12_B8_C8);
+ oa_format_add(oa, XE_OA_FORMAT_A32u40_A4u32_B8_C8);
+ oa_format_add(oa, XE_OA_FORMAT_C4_B8);
+ break;
+
+ case XE_DG2:
+ oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
+ oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
+ break;
+
+ case XE_METEORLAKE:
+ oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
+ oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
+ oa_format_add(oa, XE_OAM_FORMAT_MPEC8u64_B8_C8);
+ oa_format_add(oa, XE_OAM_FORMAT_MPEC8u32_B8_C8);
+ break;
+
+ default:
+ drm_err(&oa->xe->drm, "Unknown platform\n");
+ }
+}
+
+int xe_oa_init(struct xe_device *xe)
+{
+ struct xe_oa *oa = &xe->oa;
+ struct xe_gt *gt;
+ int i, ret;
+
+ /* Support OA only with GuC submission and Gen12+ */
+ if (XE_WARN_ON(!xe_device_uc_enabled(xe)) || XE_WARN_ON(GRAPHICS_VER(xe) < 12))
+ return 0;
+
+ oa->xe = xe;
+ oa->oa_formats = oa_formats;
+
+ for_each_gt(gt, xe, i)
+ mutex_init(>->oa.lock);
+
+ /* Choose a representative limit */
+ xe_oa_sample_rate_hard_limit = xe_root_mmio_gt(xe)->info.clock_freq / 2;
+
+ mutex_init(&oa->metrics_lock);
+ idr_init_base(&oa->metrics_idr, 1);
+
+ ret = xe_oa_init_engine_groups(oa);
+ if (ret) {
+ drm_err(&xe->drm, "OA initialization failed %d\n", ret);
+ return ret;
+ }
+
+ xe_oa_init_supported_formats(oa);
+
+ oa->xe = xe;
+ return 0;
+}
+
+void xe_oa_fini(struct xe_device *xe)
+{
+ struct xe_oa *oa = &xe->oa;
+ struct xe_gt *gt;
+ int i;
+
+ if (!oa->xe)
+ return;
+
+ for_each_gt(gt, xe, i)
+ kfree(gt->oa.group);
+
+ idr_destroy(&oa->metrics_idr);
+
+ oa->xe = NULL;
+}
+
+static struct ctl_table oa_ctl_table[] = {
+ {
+ .procname = "perf_stream_paranoid",
+ .data = &xe_oa_stream_paranoid,
+ .maxlen = sizeof(xe_oa_stream_paranoid),
+ .mode = 0644,
+ .proc_handler = proc_dointvec_minmax,
+ .extra1 = SYSCTL_ZERO,
+ .extra2 = SYSCTL_ONE,
+ },
+ {
+ .procname = "oa_max_sample_rate",
+ .data = &xe_oa_max_sample_rate,
+ .maxlen = sizeof(xe_oa_max_sample_rate),
+ .mode = 0644,
+ .proc_handler = proc_dointvec_minmax,
+ .extra1 = SYSCTL_ZERO,
+ .extra2 = &xe_oa_sample_rate_hard_limit,
+ },
+ {}
+};
+
+int xe_oa_sysctl_register(void)
+{
+ sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
+ return 0;
+}
+
+void xe_oa_sysctl_unregister(void)
+{
+ unregister_sysctl_table(sysctl_header);
+}
diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
new file mode 100644
index 0000000000000..ba4ba80fd34cb
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_oa.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _XE_OA_H_
+#define _XE_OA_H_
+
+#include "xe_oa_types.h"
+
+int xe_oa_init(struct xe_device *xe);
+void xe_oa_fini(struct xe_device *xe);
+void xe_oa_register(struct xe_device *xe);
+void xe_oa_unregister(struct xe_device *xe);
+int xe_oa_sysctl_register(void);
+void xe_oa_sysctl_unregister(void);
+
+#endif
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 04/21] drm/xe/oa: Module init/exit and probe/remove
2023-09-19 16:10 ` [Intel-xe] [PATCH 04/21] drm/xe/oa: Module init/exit and probe/remove Ashutosh Dixit
@ 2023-10-13 17:50 ` Umesh Nerlige Ramappa
2023-10-20 7:08 ` [Intel-xe] [04/21] " Lionel Landwerlin
1 sibling, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-13 17:50 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:32AM -0700, Ashutosh Dixit wrote:
>Perform OA initialization at module init and probe time:
>
>* Setup perf_stream_paranoid and oa_max_sample_rate files in /proc
>* Setup metrics sysfs directories to expose which metrics configurations
> are available
>* Setup OA groups which associate hw engines with OA units
>* Initialize OA units
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
similar to what was present on i915,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Umesh
>---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/xe_device.c | 11 +
> drivers/gpu/drm/xe/xe_device_types.h | 4 +
> drivers/gpu/drm/xe/xe_gt_types.h | 4 +
> drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 +
> drivers/gpu/drm/xe/xe_module.c | 5 +
> drivers/gpu/drm/xe/xe_oa.c | 309 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_oa.h | 18 ++
> 8 files changed, 354 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_oa.c
> create mode 100644 drivers/gpu/drm/xe/xe_oa.h
>
>diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
>index cc95a46b5e4d3..a40c4827b9c85 100644
>--- a/drivers/gpu/drm/xe/Makefile
>+++ b/drivers/gpu/drm/xe/Makefile
>@@ -84,6 +84,7 @@ xe-y += xe_bb.o \
> xe_mmio.o \
> xe_mocs.o \
> xe_module.o \
>+ xe_oa.o \
> xe_pat.o \
> xe_pci.o \
> xe_pcode.o \
>diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>index b6bcb6c3482e7..2c3dac6340f04 100644
>--- a/drivers/gpu/drm/xe/xe_device.c
>+++ b/drivers/gpu/drm/xe/xe_device.c
>@@ -25,6 +25,7 @@
> #include "xe_irq.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
>+#include "xe_oa.h"
> #include "xe_pcode.h"
> #include "xe_pm.h"
> #include "xe_query.h"
>@@ -323,6 +324,10 @@ int xe_device_probe(struct xe_device *xe)
> goto err_irq_shutdown;
> }
>
>+ err = xe_oa_init(xe);
>+ if (err)
>+ goto err_irq_shutdown;
>+
> err = xe_display_init(xe);
> if (err)
> goto err_irq_shutdown;
>@@ -333,6 +338,8 @@ int xe_device_probe(struct xe_device *xe)
>
> xe_display_register(xe);
>
>+ xe_oa_register(xe);
>+
> xe_debugfs_register(xe);
>
> xe_pmu_register(&xe->pmu);
>@@ -363,10 +370,14 @@ static void xe_device_remove_display(struct xe_device *xe)
>
> void xe_device_remove(struct xe_device *xe)
> {
>+ xe_oa_unregister(xe);
>+
> xe_device_remove_display(xe);
>
> xe_display_fini(xe);
>
>+ xe_oa_fini(xe);
>+
> xe_irq_shutdown(xe);
> }
>
>diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>index a82f28c6a3a01..8161407913607 100644
>--- a/drivers/gpu/drm/xe/xe_device_types.h
>+++ b/drivers/gpu/drm/xe/xe_device_types.h
>@@ -17,6 +17,7 @@
> #include "xe_platform_types.h"
> #include "xe_pmu.h"
> #include "xe_step_types.h"
>+#include "xe_oa.h"
>
> #if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
> #include "soc/intel_pch.h"
>@@ -365,6 +366,9 @@ struct xe_device {
> /** @pmu: performance monitoring unit */
> struct xe_pmu pmu;
>
>+ /** @oa: oa perf counter subsystem */
>+ struct xe_oa oa;
>+
> /* private: */
>
> #if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
>diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
>index d4310be3e1e7c..dc700198f33f7 100644
>--- a/drivers/gpu/drm/xe/xe_gt_types.h
>+++ b/drivers/gpu/drm/xe/xe_gt_types.h
>@@ -13,6 +13,7 @@
> #include "xe_reg_sr_types.h"
> #include "xe_sa_types.h"
> #include "xe_uc_types.h"
>+#include "xe_oa.h"
>
> struct xe_exec_queue_ops;
> struct xe_migrate;
>@@ -347,6 +348,9 @@ struct xe_gt {
> /** @oob: bitmap with active OOB workaroudns */
> unsigned long *oob;
> } wa_active;
>+
>+ /** @oa: oa perf counter subsystem per gt info */
>+ struct xe_oa_gt oa;
> };
>
> #endif
>diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
>index cd4bc1412a3ff..c38674c827c91 100644
>--- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
>+++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
>@@ -146,6 +146,8 @@ struct xe_hw_engine {
> enum xe_hw_engine_id engine_id;
> /** @eclass: pointer to per hw engine class interface */
> struct xe_hw_engine_class_intf *eclass;
>+ /** @oa_group: oa unit for this hw engine */
>+ struct xe_oa_group *oa_group;
> };
>
> /**
>diff --git a/drivers/gpu/drm/xe/xe_module.c b/drivers/gpu/drm/xe/xe_module.c
>index 7194595e7f312..5bf957b127f0f 100644
>--- a/drivers/gpu/drm/xe/xe_module.c
>+++ b/drivers/gpu/drm/xe/xe_module.c
>@@ -11,6 +11,7 @@
> #include "xe_drv.h"
> #include "xe_hw_fence.h"
> #include "xe_module.h"
>+#include "xe_oa.h"
> #include "xe_pci.h"
> #include "xe_pmu.h"
> #include "xe_sched_job.h"
>@@ -68,6 +69,10 @@ static const struct init_funcs init_funcs[] = {
> .init = xe_register_pci_driver,
> .exit = xe_unregister_pci_driver,
> },
>+ {
>+ .init = xe_oa_sysctl_register,
>+ .exit = xe_oa_sysctl_unregister,
>+ },
> };
>
> static int __init xe_init(void)
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>new file mode 100644
>index 0000000000000..fae067e73c027
>--- /dev/null
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -0,0 +1,309 @@
>+// SPDX-License-Identifier: MIT
>+/*
>+ * Copyright © 2023 Intel Corporation
>+ */
>+
>+#include <linux/anon_inodes.h>
>+#include <linux/nospec.h>
>+#include <linux/sizes.h>
>+#include <linux/uuid.h>
>+
>+#include <drm/xe_drm.h>
>+#include <drm/drm_drv.h>
>+
>+#include "regs/xe_oa_regs.h"
>+#include "xe_gt.h"
>+#include "xe_device.h"
>+#include "xe_oa.h"
>+
>+static u32 xe_oa_stream_paranoid = true;
>+static int xe_oa_sample_rate_hard_limit;
>+static u32 xe_oa_max_sample_rate = 100000;
>+
>+static const struct xe_oa_format oa_formats[] = {
>+ [XE_OA_FORMAT_C4_B8] = { 7, 64 },
>+ [XE_OA_FORMAT_A12] = { 0, 64 },
>+ [XE_OA_FORMAT_A12_B8_C8] = { 2, 128 },
>+ [XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
>+ [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
>+ [XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
>+ [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, TYPE_OAM, HDR_64_BIT },
>+ [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
>+};
>+
>+static struct ctl_table_header *sysctl_header;
>+
>+void xe_oa_register(struct xe_device *xe)
>+{
>+ struct xe_oa *oa = &xe->oa;
>+
>+ if (!oa->xe)
>+ return;
>+
>+ oa->metrics_kobj = kobject_create_and_add("metrics",
>+ &xe->drm.primary->kdev->kobj);
>+}
>+
>+void xe_oa_unregister(struct xe_device *xe)
>+{
>+ struct xe_oa *oa = &xe->oa;
>+
>+ if (!oa->metrics_kobj)
>+ return;
>+
>+ kobject_put(oa->metrics_kobj);
>+ oa->metrics_kobj = NULL;
>+}
>+
>+static u32 num_oa_groups_per_gt(struct xe_gt *gt)
>+{
>+ return 1;
>+}
>+
>+static u32 __oam_engine_group(struct xe_hw_engine *hwe)
>+{
>+ if (GRAPHICS_VERx100(gt_to_xe(hwe->gt)) >= 1270) {
>+ /*
>+ * There's 1 SAMEDIA gt and 1 OAM per SAMEDIA gt. All media slices
>+ * within the gt use the same OAM. All MTL SKUs list 1 SA MEDIA.
>+ */
>+ drm_WARN_ON(&hwe->gt->tile->xe->drm,
>+ hwe->gt->info.type != XE_GT_TYPE_MEDIA);
>+
>+ return OA_GROUP_OAM_SAMEDIA_0;
>+ }
>+
>+ return OA_GROUP_INVALID;
>+}
>+
>+static u32 __oa_engine_group(struct xe_hw_engine *hwe)
>+{
>+ switch (hwe->class) {
>+ case XE_ENGINE_CLASS_RENDER:
>+ return OA_GROUP_OAG;
>+
>+ case XE_ENGINE_CLASS_VIDEO_DECODE:
>+ case XE_ENGINE_CLASS_VIDEO_ENHANCE:
>+ return __oam_engine_group(hwe);
>+
>+ default:
>+ return OA_GROUP_INVALID;
>+ }
>+}
>+
>+static struct xe_oa_regs __oam_regs(u32 base)
>+{
>+ return (struct xe_oa_regs) {
>+ base,
>+ GEN12_OAM_HEAD_POINTER(base),
>+ GEN12_OAM_TAIL_POINTER(base),
>+ GEN12_OAM_BUFFER(base),
>+ GEN12_OAM_CONTEXT_CONTROL(base),
>+ GEN12_OAM_CONTROL(base),
>+ GEN12_OAM_DEBUG(base),
>+ GEN12_OAM_STATUS(base),
>+ GEN12_OAM_CONTROL_COUNTER_FORMAT_SHIFT,
>+ };
>+}
>+
>+static struct xe_oa_regs __oag_regs(void)
>+{
>+ return (struct xe_oa_regs) {
>+ 0,
>+ GEN12_OAG_OAHEADPTR,
>+ GEN12_OAG_OATAILPTR,
>+ GEN12_OAG_OABUFFER,
>+ GEN12_OAG_OAGLBCTXCTRL,
>+ GEN12_OAG_OACONTROL,
>+ GEN12_OAG_OA_DEBUG,
>+ GEN12_OAG_OASTATUS,
>+ GEN12_OAG_OACONTROL_OA_COUNTER_FORMAT_SHIFT,
>+ };
>+}
>+
>+static void xe_oa_init_groups(struct xe_gt *gt)
>+{
>+ const u32 mtl_oa_base[] = {
>+ [OA_GROUP_OAM_SAMEDIA_0] = 0x393000,
>+ };
>+ int i, num_groups = gt->oa.num_oa_groups;
>+
>+ for (i = 0; i < num_groups; i++) {
>+ struct xe_oa_group *g = >->oa.group[i];
>+
>+ /* Fused off engines can result in a group with num_engines == 0 */
>+ if (g->num_engines == 0)
>+ continue;
>+
>+ if (i == OA_GROUP_OAG && gt->info.type != XE_GT_TYPE_MEDIA) {
>+ g->regs = __oag_regs();
>+ g->type = TYPE_OAG;
>+ } else if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270) {
>+ g->regs = __oam_regs(mtl_oa_base[i]);
>+ g->type = TYPE_OAM;
>+ }
>+
>+ /* Set oa_unit_ids now to ensure ids remain contiguous. */
>+ g->oa_unit_id = gt->tile->xe->oa.oa_unit_ids++;
>+ }
>+}
>+
>+static int xe_oa_init_gt(struct xe_gt *gt)
>+{
>+ u32 num_groups = num_oa_groups_per_gt(gt);
>+ struct xe_hw_engine *hwe;
>+ enum xe_hw_engine_id id;
>+ struct xe_oa_group *g;
>+
>+ g = kcalloc(num_groups, sizeof(*g), GFP_KERNEL);
>+ if (!g)
>+ return -ENOMEM;
>+
>+ for_each_hw_engine(hwe, gt, id) {
>+ u32 index = __oa_engine_group(hwe);
>+
>+ hwe->oa_group = NULL;
>+ if (index < num_groups) {
>+ g[index].num_engines++;
>+ hwe->oa_group = &g[index];
>+ }
>+ }
>+
>+ gt->oa.num_oa_groups = num_groups;
>+ gt->oa.group = g;
>+
>+ xe_oa_init_groups(gt);
>+
>+ return 0;
>+}
>+
>+static int xe_oa_init_engine_groups(struct xe_oa *oa)
>+{
>+ struct xe_gt *gt;
>+ int i, ret;
>+
>+ for_each_gt(gt, oa->xe, i) {
>+ ret = xe_oa_init_gt(gt);
>+ if (ret)
>+ return ret;
>+ }
>+
>+ return 0;
>+}
>+
>+static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
>+{
>+ __set_bit(format, oa->format_mask);
>+}
>+
>+static void xe_oa_init_supported_formats(struct xe_oa *oa)
>+{
>+ switch (oa->xe->info.platform) {
>+ case XE_ALDERLAKE_S:
>+ case XE_ALDERLAKE_P:
>+ oa_format_add(oa, XE_OA_FORMAT_A12);
>+ oa_format_add(oa, XE_OA_FORMAT_A12_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_A32u40_A4u32_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_C4_B8);
>+ break;
>+
>+ case XE_DG2:
>+ oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
>+ break;
>+
>+ case XE_METEORLAKE:
>+ oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
>+ oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
>+ oa_format_add(oa, XE_OAM_FORMAT_MPEC8u64_B8_C8);
>+ oa_format_add(oa, XE_OAM_FORMAT_MPEC8u32_B8_C8);
>+ break;
>+
>+ default:
>+ drm_err(&oa->xe->drm, "Unknown platform\n");
>+ }
>+}
>+
>+int xe_oa_init(struct xe_device *xe)
>+{
>+ struct xe_oa *oa = &xe->oa;
>+ struct xe_gt *gt;
>+ int i, ret;
>+
>+ /* Support OA only with GuC submission and Gen12+ */
>+ if (XE_WARN_ON(!xe_device_uc_enabled(xe)) || XE_WARN_ON(GRAPHICS_VER(xe) < 12))
>+ return 0;
>+
>+ oa->xe = xe;
>+ oa->oa_formats = oa_formats;
>+
>+ for_each_gt(gt, xe, i)
>+ mutex_init(>->oa.lock);
>+
>+ /* Choose a representative limit */
>+ xe_oa_sample_rate_hard_limit = xe_root_mmio_gt(xe)->info.clock_freq / 2;
>+
>+ mutex_init(&oa->metrics_lock);
>+ idr_init_base(&oa->metrics_idr, 1);
>+
>+ ret = xe_oa_init_engine_groups(oa);
>+ if (ret) {
>+ drm_err(&xe->drm, "OA initialization failed %d\n", ret);
>+ return ret;
>+ }
>+
>+ xe_oa_init_supported_formats(oa);
>+
>+ oa->xe = xe;
>+ return 0;
>+}
>+
>+void xe_oa_fini(struct xe_device *xe)
>+{
>+ struct xe_oa *oa = &xe->oa;
>+ struct xe_gt *gt;
>+ int i;
>+
>+ if (!oa->xe)
>+ return;
>+
>+ for_each_gt(gt, xe, i)
>+ kfree(gt->oa.group);
>+
>+ idr_destroy(&oa->metrics_idr);
>+
>+ oa->xe = NULL;
>+}
>+
>+static struct ctl_table oa_ctl_table[] = {
>+ {
>+ .procname = "perf_stream_paranoid",
>+ .data = &xe_oa_stream_paranoid,
>+ .maxlen = sizeof(xe_oa_stream_paranoid),
>+ .mode = 0644,
>+ .proc_handler = proc_dointvec_minmax,
>+ .extra1 = SYSCTL_ZERO,
>+ .extra2 = SYSCTL_ONE,
>+ },
>+ {
>+ .procname = "oa_max_sample_rate",
>+ .data = &xe_oa_max_sample_rate,
>+ .maxlen = sizeof(xe_oa_max_sample_rate),
>+ .mode = 0644,
>+ .proc_handler = proc_dointvec_minmax,
>+ .extra1 = SYSCTL_ZERO,
>+ .extra2 = &xe_oa_sample_rate_hard_limit,
>+ },
>+ {}
>+};
>+
>+int xe_oa_sysctl_register(void)
>+{
>+ sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
>+ return 0;
>+}
>+
>+void xe_oa_sysctl_unregister(void)
>+{
>+ unregister_sysctl_table(sysctl_header);
>+}
>diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
>new file mode 100644
>index 0000000000000..ba4ba80fd34cb
>--- /dev/null
>+++ b/drivers/gpu/drm/xe/xe_oa.h
>@@ -0,0 +1,18 @@
>+/* SPDX-License-Identifier: MIT */
>+/*
>+ * Copyright © 2023 Intel Corporation
>+ */
>+
>+#ifndef _XE_OA_H_
>+#define _XE_OA_H_
>+
>+#include "xe_oa_types.h"
>+
>+int xe_oa_init(struct xe_device *xe);
>+void xe_oa_fini(struct xe_device *xe);
>+void xe_oa_register(struct xe_device *xe);
>+void xe_oa_unregister(struct xe_device *xe);
>+int xe_oa_sysctl_register(void);
>+void xe_oa_sysctl_unregister(void);
>+
>+#endif
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [04/21] drm/xe/oa: Module init/exit and probe/remove
2023-09-19 16:10 ` [Intel-xe] [PATCH 04/21] drm/xe/oa: Module init/exit and probe/remove Ashutosh Dixit
2023-10-13 17:50 ` Umesh Nerlige Ramappa
@ 2023-10-20 7:08 ` Lionel Landwerlin
2023-10-27 20:28 ` Dixit, Ashutosh
1 sibling, 1 reply; 88+ messages in thread
From: Lionel Landwerlin @ 2023-10-20 7:08 UTC (permalink / raw)
To: Ashutosh Dixit, intel-xe
On 19/09/2023 19:10, Ashutosh Dixit wrote:
> Perform OA initialization at module init and probe time:
>
> * Setup perf_stream_paranoid and oa_max_sample_rate files in /proc
> * Setup metrics sysfs directories to expose which metrics configurations
> are available
> * Setup OA groups which associate hw engines with OA units
> * Initialize OA units
>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/xe_device.c | 11 +
> drivers/gpu/drm/xe/xe_device_types.h | 4 +
> drivers/gpu/drm/xe/xe_gt_types.h | 4 +
> drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 +
> drivers/gpu/drm/xe/xe_module.c | 5 +
> drivers/gpu/drm/xe/xe_oa.c | 309 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_oa.h | 18 ++
> 8 files changed, 354 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_oa.c
> create mode 100644 drivers/gpu/drm/xe/xe_oa.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index cc95a46b5e4d3..a40c4827b9c85 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -84,6 +84,7 @@ xe-y += xe_bb.o \
> xe_mmio.o \
> xe_mocs.o \
> xe_module.o \
> + xe_oa.o \
> xe_pat.o \
> xe_pci.o \
> xe_pcode.o \
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index b6bcb6c3482e7..2c3dac6340f04 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -25,6 +25,7 @@
> #include "xe_irq.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
> +#include "xe_oa.h"
> #include "xe_pcode.h"
> #include "xe_pm.h"
> #include "xe_query.h"
> @@ -323,6 +324,10 @@ int xe_device_probe(struct xe_device *xe)
> goto err_irq_shutdown;
> }
>
> + err = xe_oa_init(xe);
> + if (err)
> + goto err_irq_shutdown;
> +
> err = xe_display_init(xe);
> if (err)
> goto err_irq_shutdown;
> @@ -333,6 +338,8 @@ int xe_device_probe(struct xe_device *xe)
>
> xe_display_register(xe);
>
> + xe_oa_register(xe);
> +
> xe_debugfs_register(xe);
>
> xe_pmu_register(&xe->pmu);
> @@ -363,10 +370,14 @@ static void xe_device_remove_display(struct xe_device *xe)
>
> void xe_device_remove(struct xe_device *xe)
> {
> + xe_oa_unregister(xe);
> +
> xe_device_remove_display(xe);
>
> xe_display_fini(xe);
>
> + xe_oa_fini(xe);
> +
> xe_irq_shutdown(xe);
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index a82f28c6a3a01..8161407913607 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -17,6 +17,7 @@
> #include "xe_platform_types.h"
> #include "xe_pmu.h"
> #include "xe_step_types.h"
> +#include "xe_oa.h"
>
> #if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
> #include "soc/intel_pch.h"
> @@ -365,6 +366,9 @@ struct xe_device {
> /** @pmu: performance monitoring unit */
> struct xe_pmu pmu;
>
> + /** @oa: oa perf counter subsystem */
> + struct xe_oa oa;
> +
> /* private: */
>
> #if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
> diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
> index d4310be3e1e7c..dc700198f33f7 100644
> --- a/drivers/gpu/drm/xe/xe_gt_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_types.h
> @@ -13,6 +13,7 @@
> #include "xe_reg_sr_types.h"
> #include "xe_sa_types.h"
> #include "xe_uc_types.h"
> +#include "xe_oa.h"
>
> struct xe_exec_queue_ops;
> struct xe_migrate;
> @@ -347,6 +348,9 @@ struct xe_gt {
> /** @oob: bitmap with active OOB workaroudns */
> unsigned long *oob;
> } wa_active;
> +
> + /** @oa: oa perf counter subsystem per gt info */
> + struct xe_oa_gt oa;
> };
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
> index cd4bc1412a3ff..c38674c827c91 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
> @@ -146,6 +146,8 @@ struct xe_hw_engine {
> enum xe_hw_engine_id engine_id;
> /** @eclass: pointer to per hw engine class interface */
> struct xe_hw_engine_class_intf *eclass;
> + /** @oa_group: oa unit for this hw engine */
> + struct xe_oa_group *oa_group;
> };
>
> /**
> diff --git a/drivers/gpu/drm/xe/xe_module.c b/drivers/gpu/drm/xe/xe_module.c
> index 7194595e7f312..5bf957b127f0f 100644
> --- a/drivers/gpu/drm/xe/xe_module.c
> +++ b/drivers/gpu/drm/xe/xe_module.c
> @@ -11,6 +11,7 @@
> #include "xe_drv.h"
> #include "xe_hw_fence.h"
> #include "xe_module.h"
> +#include "xe_oa.h"
> #include "xe_pci.h"
> #include "xe_pmu.h"
> #include "xe_sched_job.h"
> @@ -68,6 +69,10 @@ static const struct init_funcs init_funcs[] = {
> .init = xe_register_pci_driver,
> .exit = xe_unregister_pci_driver,
> },
> + {
> + .init = xe_oa_sysctl_register,
> + .exit = xe_oa_sysctl_unregister,
> + },
> };
>
> static int __init xe_init(void)
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> new file mode 100644
> index 0000000000000..fae067e73c027
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -0,0 +1,309 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#include <linux/anon_inodes.h>
> +#include <linux/nospec.h>
> +#include <linux/sizes.h>
> +#include <linux/uuid.h>
> +
> +#include <drm/xe_drm.h>
> +#include <drm/drm_drv.h>
> +
> +#include "regs/xe_oa_regs.h"
> +#include "xe_gt.h"
> +#include "xe_device.h"
> +#include "xe_oa.h"
> +
> +static u32 xe_oa_stream_paranoid = true;
> +static int xe_oa_sample_rate_hard_limit;
> +static u32 xe_oa_max_sample_rate = 100000;
> +
> +static const struct xe_oa_format oa_formats[] = {
> + [XE_OA_FORMAT_C4_B8] = { 7, 64 },
> + [XE_OA_FORMAT_A12] = { 0, 64 },
> + [XE_OA_FORMAT_A12_B8_C8] = { 2, 128 },
> + [XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
> + [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
> + [XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
> + [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, TYPE_OAM, HDR_64_BIT },
> + [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
> +};
> +
> +static struct ctl_table_header *sysctl_header;
> +
> +void xe_oa_register(struct xe_device *xe)
> +{
> + struct xe_oa *oa = &xe->oa;
> +
> + if (!oa->xe)
> + return;
> +
> + oa->metrics_kobj = kobject_create_and_add("metrics",
> + &xe->drm.primary->kdev->kobj);
> +}
> +
> +void xe_oa_unregister(struct xe_device *xe)
> +{
> + struct xe_oa *oa = &xe->oa;
> +
> + if (!oa->metrics_kobj)
> + return;
> +
> + kobject_put(oa->metrics_kobj);
> + oa->metrics_kobj = NULL;
> +}
> +
> +static u32 num_oa_groups_per_gt(struct xe_gt *gt)
> +{
> + return 1;
> +}
> +
> +static u32 __oam_engine_group(struct xe_hw_engine *hwe)
> +{
> + if (GRAPHICS_VERx100(gt_to_xe(hwe->gt)) >= 1270) {
> + /*
> + * There's 1 SAMEDIA gt and 1 OAM per SAMEDIA gt. All media slices
> + * within the gt use the same OAM. All MTL SKUs list 1 SA MEDIA.
> + */
> + drm_WARN_ON(&hwe->gt->tile->xe->drm,
> + hwe->gt->info.type != XE_GT_TYPE_MEDIA);
> +
> + return OA_GROUP_OAM_SAMEDIA_0;
> + }
> +
> + return OA_GROUP_INVALID;
> +}
> +
> +static u32 __oa_engine_group(struct xe_hw_engine *hwe)
> +{
> + switch (hwe->class) {
> + case XE_ENGINE_CLASS_RENDER:
> + return OA_GROUP_OAG;
> +
> + case XE_ENGINE_CLASS_VIDEO_DECODE:
> + case XE_ENGINE_CLASS_VIDEO_ENHANCE:
> + return __oam_engine_group(hwe);
> +
> + default:
> + return OA_GROUP_INVALID;
> + }
> +}
> +
> +static struct xe_oa_regs __oam_regs(u32 base)
> +{
> + return (struct xe_oa_regs) {
> + base,
> + GEN12_OAM_HEAD_POINTER(base),
> + GEN12_OAM_TAIL_POINTER(base),
> + GEN12_OAM_BUFFER(base),
> + GEN12_OAM_CONTEXT_CONTROL(base),
> + GEN12_OAM_CONTROL(base),
> + GEN12_OAM_DEBUG(base),
> + GEN12_OAM_STATUS(base),
> + GEN12_OAM_CONTROL_COUNTER_FORMAT_SHIFT,
> + };
> +}
> +
> +static struct xe_oa_regs __oag_regs(void)
> +{
> + return (struct xe_oa_regs) {
> + 0,
> + GEN12_OAG_OAHEADPTR,
> + GEN12_OAG_OATAILPTR,
> + GEN12_OAG_OABUFFER,
> + GEN12_OAG_OAGLBCTXCTRL,
> + GEN12_OAG_OACONTROL,
> + GEN12_OAG_OA_DEBUG,
> + GEN12_OAG_OASTATUS,
> + GEN12_OAG_OACONTROL_OA_COUNTER_FORMAT_SHIFT,
> + };
> +}
> +
> +static void xe_oa_init_groups(struct xe_gt *gt)
> +{
> + const u32 mtl_oa_base[] = {
> + [OA_GROUP_OAM_SAMEDIA_0] = 0x393000,
> + };
> + int i, num_groups = gt->oa.num_oa_groups;
> +
> + for (i = 0; i < num_groups; i++) {
> + struct xe_oa_group *g = >->oa.group[i];
> +
> + /* Fused off engines can result in a group with num_engines == 0 */
> + if (g->num_engines == 0)
> + continue;
> +
> + if (i == OA_GROUP_OAG && gt->info.type != XE_GT_TYPE_MEDIA) {
> + g->regs = __oag_regs();
> + g->type = TYPE_OAG;
> + } else if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270) {
> + g->regs = __oam_regs(mtl_oa_base[i]);
> + g->type = TYPE_OAM;
> + }
> +
> + /* Set oa_unit_ids now to ensure ids remain contiguous. */
> + g->oa_unit_id = gt->tile->xe->oa.oa_unit_ids++;
> + }
> +}
> +
> +static int xe_oa_init_gt(struct xe_gt *gt)
> +{
> + u32 num_groups = num_oa_groups_per_gt(gt);
> + struct xe_hw_engine *hwe;
> + enum xe_hw_engine_id id;
> + struct xe_oa_group *g;
> +
> + g = kcalloc(num_groups, sizeof(*g), GFP_KERNEL);
> + if (!g)
> + return -ENOMEM;
> +
> + for_each_hw_engine(hwe, gt, id) {
> + u32 index = __oa_engine_group(hwe);
> +
> + hwe->oa_group = NULL;
> + if (index < num_groups) {
> + g[index].num_engines++;
> + hwe->oa_group = &g[index];
> + }
> + }
> +
> + gt->oa.num_oa_groups = num_groups;
> + gt->oa.group = g;
> +
> + xe_oa_init_groups(gt);
> +
> + return 0;
> +}
> +
> +static int xe_oa_init_engine_groups(struct xe_oa *oa)
> +{
> + struct xe_gt *gt;
> + int i, ret;
> +
> + for_each_gt(gt, oa->xe, i) {
> + ret = xe_oa_init_gt(gt);
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
> +{
> + __set_bit(format, oa->format_mask);
> +}
> +
> +static void xe_oa_init_supported_formats(struct xe_oa *oa)
> +{
> + switch (oa->xe->info.platform) {
> + case XE_ALDERLAKE_S:
> + case XE_ALDERLAKE_P:
case XE_ALDERLAKE_N:
case XE_DG1:
case XE_TIGERLAKE:
case XE_ROCKETLAKE:
Those are essentially the same from the OA register/format point of view.
> + oa_format_add(oa, XE_OA_FORMAT_A12);
> + oa_format_add(oa, XE_OA_FORMAT_A12_B8_C8);
> + oa_format_add(oa, XE_OA_FORMAT_A32u40_A4u32_B8_C8);
> + oa_format_add(oa, XE_OA_FORMAT_C4_B8);
> + break;
> +
> + case XE_DG2:
> + oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
> + oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
> + break;
> +
> + case XE_METEORLAKE:
> + oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
> + oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
> + oa_format_add(oa, XE_OAM_FORMAT_MPEC8u64_B8_C8);
> + oa_format_add(oa, XE_OAM_FORMAT_MPEC8u32_B8_C8);
> + break;
> +
> + default:
> + drm_err(&oa->xe->drm, "Unknown platform\n");
> + }
> +}
> +
> +int xe_oa_init(struct xe_device *xe)
> +{
> + struct xe_oa *oa = &xe->oa;
> + struct xe_gt *gt;
> + int i, ret;
> +
> + /* Support OA only with GuC submission and Gen12+ */
> + if (XE_WARN_ON(!xe_device_uc_enabled(xe)) || XE_WARN_ON(GRAPHICS_VER(xe) < 12))
> + return 0;
> +
> + oa->xe = xe;
> + oa->oa_formats = oa_formats;
> +
> + for_each_gt(gt, xe, i)
> + mutex_init(>->oa.lock);
> +
> + /* Choose a representative limit */
> + xe_oa_sample_rate_hard_limit = xe_root_mmio_gt(xe)->info.clock_freq / 2;
> +
> + mutex_init(&oa->metrics_lock);
> + idr_init_base(&oa->metrics_idr, 1);
> +
> + ret = xe_oa_init_engine_groups(oa);
> + if (ret) {
> + drm_err(&xe->drm, "OA initialization failed %d\n", ret);
> + return ret;
> + }
> +
> + xe_oa_init_supported_formats(oa);
> +
> + oa->xe = xe;
> + return 0;
> +}
> +
> +void xe_oa_fini(struct xe_device *xe)
> +{
> + struct xe_oa *oa = &xe->oa;
> + struct xe_gt *gt;
> + int i;
> +
> + if (!oa->xe)
> + return;
> +
> + for_each_gt(gt, xe, i)
> + kfree(gt->oa.group);
> +
> + idr_destroy(&oa->metrics_idr);
> +
> + oa->xe = NULL;
> +}
> +
> +static struct ctl_table oa_ctl_table[] = {
> + {
> + .procname = "perf_stream_paranoid",
> + .data = &xe_oa_stream_paranoid,
> + .maxlen = sizeof(xe_oa_stream_paranoid),
> + .mode = 0644,
> + .proc_handler = proc_dointvec_minmax,
> + .extra1 = SYSCTL_ZERO,
> + .extra2 = SYSCTL_ONE,
> + },
> + {
> + .procname = "oa_max_sample_rate",
> + .data = &xe_oa_max_sample_rate,
> + .maxlen = sizeof(xe_oa_max_sample_rate),
> + .mode = 0644,
> + .proc_handler = proc_dointvec_minmax,
> + .extra1 = SYSCTL_ZERO,
> + .extra2 = &xe_oa_sample_rate_hard_limit,
> + },
> + {}
> +};
> +
> +int xe_oa_sysctl_register(void)
> +{
> + sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
> + return 0;
> +}
> +
> +void xe_oa_sysctl_unregister(void)
> +{
> + unregister_sysctl_table(sysctl_header);
> +}
> diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
> new file mode 100644
> index 0000000000000..ba4ba80fd34cb
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_oa.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef _XE_OA_H_
> +#define _XE_OA_H_
> +
> +#include "xe_oa_types.h"
> +
> +int xe_oa_init(struct xe_device *xe);
> +void xe_oa_fini(struct xe_device *xe);
> +void xe_oa_register(struct xe_device *xe);
> +void xe_oa_unregister(struct xe_device *xe);
> +int xe_oa_sysctl_register(void);
> +void xe_oa_sysctl_unregister(void);
> +
> +#endif
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [04/21] drm/xe/oa: Module init/exit and probe/remove
2023-10-20 7:08 ` [Intel-xe] [04/21] " Lionel Landwerlin
@ 2023-10-27 20:28 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-27 20:28 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-xe
On Fri, 20 Oct 2023 00:08:18 -0700, Lionel Landwerlin wrote:
>
> > +static void xe_oa_init_supported_formats(struct xe_oa *oa)
> > +{
> > + switch (oa->xe->info.platform) {
> > + case XE_ALDERLAKE_S:
> > + case XE_ALDERLAKE_P:
>
> case XE_ALDERLAKE_N:
>
> case XE_DG1:
>
> case XE_TIGERLAKE:
>
> case XE_ROCKETLAKE:
>
> Those are essentially the same from the OA register/format point of view.
OK, will add them. Thx.
>
> > + oa_format_add(oa, XE_OA_FORMAT_A12);
> > + oa_format_add(oa, XE_OA_FORMAT_A12_B8_C8);
> > + oa_format_add(oa, XE_OA_FORMAT_A32u40_A4u32_B8_C8);
> > + oa_format_add(oa, XE_OA_FORMAT_C4_B8);
> > + break;
> > +
> > + case XE_DG2:
> > + oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
> > + oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
> > + break;
> > +
> > + case XE_METEORLAKE:
> > + oa_format_add(oa, XE_OAR_FORMAT_A32u40_A4u32_B8_C8);
> > + oa_format_add(oa, XE_OA_FORMAT_A24u40_A14u32_B8_C8);
> > + oa_format_add(oa, XE_OAM_FORMAT_MPEC8u64_B8_C8);
> > + oa_format_add(oa, XE_OAM_FORMAT_MPEC8u32_B8_C8);
> > + break;
> > +
> > + default:
> > + drm_err(&oa->xe->drm, "Unknown platform\n");
> > + }
> > +}
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 05/21] drm/xe/oa: Add/remove config ioctl's
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (3 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 04/21] drm/xe/oa: Module init/exit and probe/remove Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-13 17:59 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 06/21] drm/xe/oa: Start implementing OA stream open ioctl Ashutosh Dixit
` (24 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
OA configurations consist of a set of event and counter select registers.
The add_config ioctl validates and stores such configurations and also
exposes them in the metrics sysfs. These configurations will be programmed
to OA unit HW when an OA stream using a configuration is opened. The OA
stream can also switch to other stored configurations.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 4 +
drivers/gpu/drm/xe/xe_oa.c | 379 ++++++++++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_oa.h | 5 +
3 files changed, 387 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 2c3dac6340f04..aacca14e52b11 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -114,6 +114,10 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
DRM_IOCTL_DEF_DRV(XE_WAIT_USER_FENCE, xe_wait_user_fence_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
+
+ DRM_IOCTL_DEF_DRV(XE_OA_ADD_CONFIG, xe_oa_add_config_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_OA_REMOVE_CONFIG, xe_oa_remove_config_ioctl, DRM_RENDER_ALLOW),
+
};
static const struct file_operations xe_driver_fops = {
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index fae067e73c027..1963bc6fad10e 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -12,8 +12,8 @@
#include <drm/drm_drv.h>
#include "regs/xe_oa_regs.h"
-#include "xe_gt.h"
#include "xe_device.h"
+#include "xe_gt.h"
#include "xe_oa.h"
static u32 xe_oa_stream_paranoid = true;
@@ -33,6 +33,376 @@ static const struct xe_oa_format oa_formats[] = {
static struct ctl_table_header *sysctl_header;
+static void xe_oa_config_release(struct kref *ref)
+{
+ struct xe_oa_config *oa_config =
+ container_of(ref, typeof(*oa_config), ref);
+
+ kfree(oa_config->flex_regs);
+ kfree(oa_config->b_counter_regs);
+ kfree(oa_config->mux_regs);
+
+ kfree_rcu(oa_config, rcu);
+}
+
+static void xe_oa_config_put(struct xe_oa_config *oa_config)
+{
+ if (!oa_config)
+ return;
+
+ kref_put(&oa_config->ref, xe_oa_config_release);
+}
+
+static bool xe_oa_is_valid_flex_addr(struct xe_oa *oa, u32 addr)
+{
+ static const struct xe_reg flex_eu_regs[] = {
+ EU_PERF_CNTL0,
+ EU_PERF_CNTL1,
+ EU_PERF_CNTL2,
+ EU_PERF_CNTL3,
+ EU_PERF_CNTL4,
+ EU_PERF_CNTL5,
+ EU_PERF_CNTL6,
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(flex_eu_regs); i++) {
+ if (flex_eu_regs[i].addr == addr)
+ return true;
+ }
+ return false;
+}
+
+static bool xe_oa_reg_in_range_table(u32 addr, const struct xe_mmio_range *table)
+{
+ while (table->start || table->end) {
+ if (addr >= table->start && addr <= table->end)
+ return true;
+
+ table++;
+ }
+
+ return false;
+}
+
+static const struct xe_mmio_range xehp_oa_b_counters[] = {
+ { .start = 0xdc48, .end = 0xdc48 }, /* OAA_ENABLE_REG */
+ { .start = 0xdd00, .end = 0xdd48 }, /* OAG_LCE0_0 - OAA_LENABLE_REG */
+ {}
+};
+
+static const struct xe_mmio_range gen12_oa_b_counters[] = {
+ { .start = 0x2b2c, .end = 0x2b2c }, /* GEN12_OAG_OA_PESS */
+ { .start = 0xd900, .end = 0xd91c }, /* GEN12_OAG_OASTARTTRIG[1-8] */
+ { .start = 0xd920, .end = 0xd93c }, /* GEN12_OAG_OAREPORTTRIG1[1-8] */
+ { .start = 0xd940, .end = 0xd97c }, /* GEN12_OAG_CEC[0-7][0-1] */
+ { .start = 0xdc00, .end = 0xdc3c }, /* GEN12_OAG_SCEC[0-7][0-1] */
+ { .start = 0xdc40, .end = 0xdc40 }, /* GEN12_OAG_SPCTR_CNF */
+ { .start = 0xdc44, .end = 0xdc44 }, /* GEN12_OAA_DBG_REG */
+ {}
+};
+
+static const struct xe_mmio_range mtl_oam_b_counters[] = {
+ { .start = 0x393000, .end = 0x39301c }, /* GEN12_OAM_STARTTRIG1[1-8] */
+ { .start = 0x393020, .end = 0x39303c }, /* GEN12_OAM_REPORTTRIG1[1-8] */
+ { .start = 0x393040, .end = 0x39307c }, /* GEN12_OAM_CEC[0-7][0-1] */
+ { .start = 0x393200, .end = 0x39323C }, /* MPES[0-7] */
+ {}
+};
+
+static bool xe_oa_is_valid_b_counter_addr(struct xe_oa *oa, u32 addr)
+{
+ return xe_oa_reg_in_range_table(addr, xehp_oa_b_counters) ||
+ xe_oa_reg_in_range_table(addr, gen12_oa_b_counters) ||
+ xe_oa_reg_in_range_table(addr, mtl_oam_b_counters);
+}
+
+/*
+ * Ref: 14010536224:
+ * 0x20cc is repurposed on MTL, so use a separate array for MTL.
+ */
+static const struct xe_mmio_range mtl_oa_mux_regs[] = {
+ { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
+ { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
+ { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */
+ { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */
+ { .start = 0x38d100, .end = 0x38d114}, /* VISACTL */
+ {}
+};
+
+static const struct xe_mmio_range gen12_oa_mux_regs[] = {
+ { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
+ { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
+ { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */
+ { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */
+ { .start = 0x20cc, .end = 0x20cc }, /* WAIT_FOR_RC6_EXIT */
+ {}
+};
+
+static bool xe_oa_is_valid_mux_addr(struct xe_oa *oa, u32 addr)
+{
+ if (oa->xe->info.platform == XE_METEORLAKE)
+ return xe_oa_reg_in_range_table(addr, mtl_oa_mux_regs);
+ else
+ return xe_oa_reg_in_range_table(addr, gen12_oa_mux_regs);
+}
+
+static u32 mask_reg_value(u32 reg, u32 val)
+{
+ /*
+ * HALF_SLICE_CHICKEN2 is programmed with a the WaDisableSTUnitPowerOptimization
+ * workaround. Make sure the value programmed by userspace doesn't change this.
+ */
+ if (REG_EQUAL_MCR(reg, HALF_SLICE_CHICKEN2))
+ val = val & ~_MASKED_BIT_ENABLE(GEN8_ST_PO_DISABLE);
+
+ /*
+ * WAIT_FOR_RC6_EXIT has only one bit fullfilling the function indicated by its
+ * name and a bunch of selection fields used by OA configs.
+ */
+ if (REG_EQUAL(reg, WAIT_FOR_RC6_EXIT))
+ val = val & ~_MASKED_BIT_ENABLE(HSW_WAIT_FOR_RC6_EXIT_ENABLE);
+
+ return val;
+}
+
+static struct xe_oa_reg *
+xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr),
+ u32 __user *regs, u32 n_regs)
+{
+ struct xe_oa_reg *oa_regs;
+ int err;
+ u32 i;
+
+ if (!n_regs || WARN_ON(!is_valid))
+ return NULL;
+
+ oa_regs = kmalloc_array(n_regs, sizeof(*oa_regs), GFP_KERNEL);
+ if (!oa_regs)
+ return ERR_PTR(-ENOMEM);
+
+ for (i = 0; i < n_regs; i++) {
+ u32 addr, value;
+
+ err = get_user(addr, regs);
+ if (err)
+ goto addr_err;
+
+ if (!is_valid(oa, addr)) {
+ drm_dbg(&oa->xe->drm, "Invalid oa_reg address: %X\n", addr);
+ err = -EINVAL;
+ goto addr_err;
+ }
+
+ err = get_user(value, regs + 1);
+ if (err)
+ goto addr_err;
+
+ oa_regs[i].addr = XE_REG(addr);
+ oa_regs[i].value = mask_reg_value(addr, value);
+
+ regs += 2;
+ }
+
+ return oa_regs;
+
+addr_err:
+ kfree(oa_regs);
+ return ERR_PTR(err);
+}
+
+static ssize_t show_dynamic_id(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ struct xe_oa_config *oa_config =
+ container_of(attr, typeof(*oa_config), sysfs_metric_id);
+
+ return sprintf(buf, "%d\n", oa_config->id);
+}
+
+static int create_dynamic_oa_sysfs_entry(struct xe_oa *oa,
+ struct xe_oa_config *oa_config)
+{
+ sysfs_attr_init(&oa_config->sysfs_metric_id.attr);
+ oa_config->sysfs_metric_id.attr.name = "id";
+ oa_config->sysfs_metric_id.attr.mode = 0444;
+ oa_config->sysfs_metric_id.show = show_dynamic_id;
+ oa_config->sysfs_metric_id.store = NULL;
+
+ oa_config->attrs[0] = &oa_config->sysfs_metric_id.attr;
+ oa_config->attrs[1] = NULL;
+
+ oa_config->sysfs_metric.name = oa_config->uuid;
+ oa_config->sysfs_metric.attrs = oa_config->attrs;
+
+ return sysfs_create_group(oa->metrics_kobj, &oa_config->sysfs_metric);
+}
+
+int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct xe_oa *oa = &to_xe_device(dev)->oa;
+ struct drm_xe_oa_config *arg = data;
+ struct xe_oa_config *oa_config, *tmp;
+ struct xe_oa_reg *regs;
+ int err, id;
+
+ if (!oa->xe) {
+ drm_dbg(&oa->xe->drm, "xe oa interface not available for this system\n");
+ return -ENODEV;
+ }
+
+ if (xe_oa_stream_paranoid && !perfmon_capable()) {
+ drm_dbg(&oa->xe->drm, "Insufficient privileges to add xe OA config\n");
+ return -EACCES;
+ }
+
+ if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
+ (!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
+ (!arg->flex_regs_ptr || !arg->n_flex_regs)) {
+ drm_dbg(&oa->xe->drm, "No OA registers given\n");
+ return -EINVAL;
+ }
+
+ oa_config = kzalloc(sizeof(*oa_config), GFP_KERNEL);
+ if (!oa_config)
+ return -ENOMEM;
+
+ oa_config->oa = oa;
+ kref_init(&oa_config->ref);
+
+ if (!uuid_is_valid(arg->uuid)) {
+ drm_dbg(&oa->xe->drm, "Invalid uuid format for OA config\n");
+ err = -EINVAL;
+ goto reg_err;
+ }
+
+ /* Last character in oa_config->uuid will be 0 because oa_config is kzalloc */
+ memcpy(oa_config->uuid, arg->uuid, sizeof(arg->uuid));
+
+ oa_config->mux_regs_len = arg->n_mux_regs;
+ regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_mux_addr,
+ u64_to_user_ptr(arg->mux_regs_ptr),
+ arg->n_mux_regs);
+ if (IS_ERR(regs)) {
+ drm_dbg(&oa->xe->drm, "Failed to create OA config for mux_regs\n");
+ err = PTR_ERR(regs);
+ goto reg_err;
+ }
+ oa_config->mux_regs = regs;
+
+ oa_config->b_counter_regs_len = arg->n_boolean_regs;
+ regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_b_counter_addr,
+ u64_to_user_ptr(arg->boolean_regs_ptr),
+ arg->n_boolean_regs);
+ if (IS_ERR(regs)) {
+ drm_dbg(&oa->xe->drm, "Failed to create OA config for b_counter_regs\n");
+ err = PTR_ERR(regs);
+ goto reg_err;
+ }
+ oa_config->b_counter_regs = regs;
+
+ oa_config->flex_regs_len = arg->n_flex_regs;
+ regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_flex_addr,
+ u64_to_user_ptr(arg->flex_regs_ptr),
+ arg->n_flex_regs);
+ if (IS_ERR(regs)) {
+ drm_dbg(&oa->xe->drm, "Failed to create OA config for flex_regs\n");
+ err = PTR_ERR(regs);
+ goto reg_err;
+ }
+ oa_config->flex_regs = regs;
+
+ err = mutex_lock_interruptible(&oa->metrics_lock);
+ if (err)
+ goto reg_err;
+
+ /* We shouldn't have too many configs, so this iteration shouldn't be too costly */
+ idr_for_each_entry(&oa->metrics_idr, tmp, id) {
+ if (!strcmp(tmp->uuid, oa_config->uuid)) {
+ drm_dbg(&oa->xe->drm, "OA config already exists with this uuid\n");
+ err = -EADDRINUSE;
+ goto sysfs_err;
+ }
+ }
+
+ err = create_dynamic_oa_sysfs_entry(oa, oa_config);
+ if (err) {
+ drm_dbg(&oa->xe->drm, "Failed to create sysfs entry for OA config\n");
+ goto sysfs_err;
+ }
+
+ /* Config id 0 is invalid, id 1 for kernel stored test config. */
+ oa_config->id = idr_alloc(&oa->metrics_idr, oa_config, 2, 0, GFP_KERNEL);
+ if (oa_config->id < 0) {
+ drm_dbg(&oa->xe->drm, "Failed to create sysfs entry for OA config\n");
+ err = oa_config->id;
+ goto sysfs_err;
+ }
+
+ mutex_unlock(&oa->metrics_lock);
+
+ drm_dbg(&oa->xe->drm, "Added config %s id=%i\n", oa_config->uuid, oa_config->id);
+
+ return oa_config->id;
+
+sysfs_err:
+ mutex_unlock(&oa->metrics_lock);
+reg_err:
+ xe_oa_config_put(oa_config);
+ drm_dbg(&oa->xe->drm, "Failed to add new OA config\n");
+ return err;
+}
+
+int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct xe_oa *oa = &to_xe_device(dev)->oa;
+ struct xe_oa_config *oa_config;
+ u64 *arg = data;
+ int ret;
+
+ if (!oa->xe) {
+ drm_dbg(&oa->xe->drm, "xe oa interface not available for this system\n");
+ return -ENODEV;
+ }
+
+ if (xe_oa_stream_paranoid && !perfmon_capable()) {
+ drm_dbg(&oa->xe->drm, "Insufficient privileges to remove xe OA config\n");
+ return -EACCES;
+ }
+
+ ret = mutex_lock_interruptible(&oa->metrics_lock);
+ if (ret)
+ return ret;
+
+ oa_config = idr_find(&oa->metrics_idr, *arg);
+ if (!oa_config) {
+ drm_dbg(&oa->xe->drm, "Failed to remove unknown OA config\n");
+ ret = -ENOENT;
+ goto err_unlock;
+ }
+
+ WARN_ON(*arg != oa_config->id);
+
+ sysfs_remove_group(oa->metrics_kobj, &oa_config->sysfs_metric);
+
+ idr_remove(&oa->metrics_idr, *arg);
+
+ mutex_unlock(&oa->metrics_lock);
+
+ drm_dbg(&oa->xe->drm, "Removed config %s id=%i\n", oa_config->uuid, oa_config->id);
+
+ xe_oa_config_put(oa_config);
+
+ return 0;
+
+err_unlock:
+ mutex_unlock(&oa->metrics_lock);
+ return ret;
+}
+
void xe_oa_register(struct xe_device *xe)
{
struct xe_oa *oa = &xe->oa;
@@ -258,6 +628,12 @@ int xe_oa_init(struct xe_device *xe)
return 0;
}
+static int destroy_config(int id, void *p, void *data)
+{
+ xe_oa_config_put(p);
+ return 0;
+}
+
void xe_oa_fini(struct xe_device *xe)
{
struct xe_oa *oa = &xe->oa;
@@ -270,6 +646,7 @@ void xe_oa_fini(struct xe_device *xe)
for_each_gt(gt, xe, i)
kfree(gt->oa.group);
+ idr_for_each(&oa->metrics_idr, destroy_config, oa);
idr_destroy(&oa->metrics_idr);
oa->xe = NULL;
diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
index ba4ba80fd34cb..79f77f445deb0 100644
--- a/drivers/gpu/drm/xe/xe_oa.h
+++ b/drivers/gpu/drm/xe/xe_oa.h
@@ -12,7 +12,12 @@ int xe_oa_init(struct xe_device *xe);
void xe_oa_fini(struct xe_device *xe);
void xe_oa_register(struct xe_device *xe);
void xe_oa_unregister(struct xe_device *xe);
+int xe_oa_ioctl_version(struct xe_device *xe);
int xe_oa_sysctl_register(void);
void xe_oa_sysctl_unregister(void);
+int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
+int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
#endif
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 05/21] drm/xe/oa: Add/remove config ioctl's
2023-09-19 16:10 ` [Intel-xe] [PATCH 05/21] drm/xe/oa: Add/remove config ioctl's Ashutosh Dixit
@ 2023-10-13 17:59 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-13 17:59 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:33AM -0700, Ashutosh Dixit wrote:
>OA configurations consist of a set of event and counter select registers.
>The add_config ioctl validates and stores such configurations and also
>exposes them in the metrics sysfs. These configurations will be programmed
>to OA unit HW when an OA stream using a configuration is opened. The OA
>stream can also switch to other stored configurations.
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
I think the plan was to do away with the differentiation of flex/mux/b
even from the implementation, otherwise this lgtm,
Umesh
>---
> drivers/gpu/drm/xe/xe_device.c | 4 +
> drivers/gpu/drm/xe/xe_oa.c | 379 ++++++++++++++++++++++++++++++++-
> drivers/gpu/drm/xe/xe_oa.h | 5 +
> 3 files changed, 387 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>index 2c3dac6340f04..aacca14e52b11 100644
>--- a/drivers/gpu/drm/xe/xe_device.c
>+++ b/drivers/gpu/drm/xe/xe_device.c
>@@ -114,6 +114,10 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
> DRM_IOCTL_DEF_DRV(XE_WAIT_USER_FENCE, xe_wait_user_fence_ioctl,
> DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
>+
>+ DRM_IOCTL_DEF_DRV(XE_OA_ADD_CONFIG, xe_oa_add_config_ioctl, DRM_RENDER_ALLOW),
>+ DRM_IOCTL_DEF_DRV(XE_OA_REMOVE_CONFIG, xe_oa_remove_config_ioctl, DRM_RENDER_ALLOW),
>+
> };
>
> static const struct file_operations xe_driver_fops = {
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index fae067e73c027..1963bc6fad10e 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -12,8 +12,8 @@
> #include <drm/drm_drv.h>
>
> #include "regs/xe_oa_regs.h"
>-#include "xe_gt.h"
> #include "xe_device.h"
>+#include "xe_gt.h"
> #include "xe_oa.h"
>
> static u32 xe_oa_stream_paranoid = true;
>@@ -33,6 +33,376 @@ static const struct xe_oa_format oa_formats[] = {
>
> static struct ctl_table_header *sysctl_header;
>
>+static void xe_oa_config_release(struct kref *ref)
>+{
>+ struct xe_oa_config *oa_config =
>+ container_of(ref, typeof(*oa_config), ref);
>+
>+ kfree(oa_config->flex_regs);
>+ kfree(oa_config->b_counter_regs);
>+ kfree(oa_config->mux_regs);
>+
>+ kfree_rcu(oa_config, rcu);
>+}
>+
>+static void xe_oa_config_put(struct xe_oa_config *oa_config)
>+{
>+ if (!oa_config)
>+ return;
>+
>+ kref_put(&oa_config->ref, xe_oa_config_release);
>+}
>+
>+static bool xe_oa_is_valid_flex_addr(struct xe_oa *oa, u32 addr)
>+{
>+ static const struct xe_reg flex_eu_regs[] = {
>+ EU_PERF_CNTL0,
>+ EU_PERF_CNTL1,
>+ EU_PERF_CNTL2,
>+ EU_PERF_CNTL3,
>+ EU_PERF_CNTL4,
>+ EU_PERF_CNTL5,
>+ EU_PERF_CNTL6,
>+ };
>+ int i;
>+
>+ for (i = 0; i < ARRAY_SIZE(flex_eu_regs); i++) {
>+ if (flex_eu_regs[i].addr == addr)
>+ return true;
>+ }
>+ return false;
>+}
>+
>+static bool xe_oa_reg_in_range_table(u32 addr, const struct xe_mmio_range *table)
>+{
>+ while (table->start || table->end) {
>+ if (addr >= table->start && addr <= table->end)
>+ return true;
>+
>+ table++;
>+ }
>+
>+ return false;
>+}
>+
>+static const struct xe_mmio_range xehp_oa_b_counters[] = {
>+ { .start = 0xdc48, .end = 0xdc48 }, /* OAA_ENABLE_REG */
>+ { .start = 0xdd00, .end = 0xdd48 }, /* OAG_LCE0_0 - OAA_LENABLE_REG */
>+ {}
>+};
>+
>+static const struct xe_mmio_range gen12_oa_b_counters[] = {
>+ { .start = 0x2b2c, .end = 0x2b2c }, /* GEN12_OAG_OA_PESS */
>+ { .start = 0xd900, .end = 0xd91c }, /* GEN12_OAG_OASTARTTRIG[1-8] */
>+ { .start = 0xd920, .end = 0xd93c }, /* GEN12_OAG_OAREPORTTRIG1[1-8] */
>+ { .start = 0xd940, .end = 0xd97c }, /* GEN12_OAG_CEC[0-7][0-1] */
>+ { .start = 0xdc00, .end = 0xdc3c }, /* GEN12_OAG_SCEC[0-7][0-1] */
>+ { .start = 0xdc40, .end = 0xdc40 }, /* GEN12_OAG_SPCTR_CNF */
>+ { .start = 0xdc44, .end = 0xdc44 }, /* GEN12_OAA_DBG_REG */
>+ {}
>+};
>+
>+static const struct xe_mmio_range mtl_oam_b_counters[] = {
>+ { .start = 0x393000, .end = 0x39301c }, /* GEN12_OAM_STARTTRIG1[1-8] */
>+ { .start = 0x393020, .end = 0x39303c }, /* GEN12_OAM_REPORTTRIG1[1-8] */
>+ { .start = 0x393040, .end = 0x39307c }, /* GEN12_OAM_CEC[0-7][0-1] */
>+ { .start = 0x393200, .end = 0x39323C }, /* MPES[0-7] */
>+ {}
>+};
>+
>+static bool xe_oa_is_valid_b_counter_addr(struct xe_oa *oa, u32 addr)
>+{
>+ return xe_oa_reg_in_range_table(addr, xehp_oa_b_counters) ||
>+ xe_oa_reg_in_range_table(addr, gen12_oa_b_counters) ||
>+ xe_oa_reg_in_range_table(addr, mtl_oam_b_counters);
>+}
>+
>+/*
>+ * Ref: 14010536224:
>+ * 0x20cc is repurposed on MTL, so use a separate array for MTL.
>+ */
>+static const struct xe_mmio_range mtl_oa_mux_regs[] = {
>+ { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
>+ { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
>+ { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */
>+ { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */
>+ { .start = 0x38d100, .end = 0x38d114}, /* VISACTL */
>+ {}
>+};
>+
>+static const struct xe_mmio_range gen12_oa_mux_regs[] = {
>+ { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
>+ { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
>+ { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */
>+ { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */
>+ { .start = 0x20cc, .end = 0x20cc }, /* WAIT_FOR_RC6_EXIT */
>+ {}
>+};
>+
>+static bool xe_oa_is_valid_mux_addr(struct xe_oa *oa, u32 addr)
>+{
>+ if (oa->xe->info.platform == XE_METEORLAKE)
>+ return xe_oa_reg_in_range_table(addr, mtl_oa_mux_regs);
>+ else
>+ return xe_oa_reg_in_range_table(addr, gen12_oa_mux_regs);
>+}
>+
>+static u32 mask_reg_value(u32 reg, u32 val)
>+{
>+ /*
>+ * HALF_SLICE_CHICKEN2 is programmed with a the WaDisableSTUnitPowerOptimization
>+ * workaround. Make sure the value programmed by userspace doesn't change this.
>+ */
>+ if (REG_EQUAL_MCR(reg, HALF_SLICE_CHICKEN2))
>+ val = val & ~_MASKED_BIT_ENABLE(GEN8_ST_PO_DISABLE);
>+
>+ /*
>+ * WAIT_FOR_RC6_EXIT has only one bit fullfilling the function indicated by its
>+ * name and a bunch of selection fields used by OA configs.
>+ */
>+ if (REG_EQUAL(reg, WAIT_FOR_RC6_EXIT))
>+ val = val & ~_MASKED_BIT_ENABLE(HSW_WAIT_FOR_RC6_EXIT_ENABLE);
>+
>+ return val;
>+}
>+
>+static struct xe_oa_reg *
>+xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr),
>+ u32 __user *regs, u32 n_regs)
>+{
>+ struct xe_oa_reg *oa_regs;
>+ int err;
>+ u32 i;
>+
>+ if (!n_regs || WARN_ON(!is_valid))
>+ return NULL;
>+
>+ oa_regs = kmalloc_array(n_regs, sizeof(*oa_regs), GFP_KERNEL);
>+ if (!oa_regs)
>+ return ERR_PTR(-ENOMEM);
>+
>+ for (i = 0; i < n_regs; i++) {
>+ u32 addr, value;
>+
>+ err = get_user(addr, regs);
>+ if (err)
>+ goto addr_err;
>+
>+ if (!is_valid(oa, addr)) {
>+ drm_dbg(&oa->xe->drm, "Invalid oa_reg address: %X\n", addr);
>+ err = -EINVAL;
>+ goto addr_err;
>+ }
>+
>+ err = get_user(value, regs + 1);
>+ if (err)
>+ goto addr_err;
>+
>+ oa_regs[i].addr = XE_REG(addr);
>+ oa_regs[i].value = mask_reg_value(addr, value);
>+
>+ regs += 2;
>+ }
>+
>+ return oa_regs;
>+
>+addr_err:
>+ kfree(oa_regs);
>+ return ERR_PTR(err);
>+}
>+
>+static ssize_t show_dynamic_id(struct kobject *kobj,
>+ struct kobj_attribute *attr,
>+ char *buf)
>+{
>+ struct xe_oa_config *oa_config =
>+ container_of(attr, typeof(*oa_config), sysfs_metric_id);
>+
>+ return sprintf(buf, "%d\n", oa_config->id);
>+}
>+
>+static int create_dynamic_oa_sysfs_entry(struct xe_oa *oa,
>+ struct xe_oa_config *oa_config)
>+{
>+ sysfs_attr_init(&oa_config->sysfs_metric_id.attr);
>+ oa_config->sysfs_metric_id.attr.name = "id";
>+ oa_config->sysfs_metric_id.attr.mode = 0444;
>+ oa_config->sysfs_metric_id.show = show_dynamic_id;
>+ oa_config->sysfs_metric_id.store = NULL;
>+
>+ oa_config->attrs[0] = &oa_config->sysfs_metric_id.attr;
>+ oa_config->attrs[1] = NULL;
>+
>+ oa_config->sysfs_metric.name = oa_config->uuid;
>+ oa_config->sysfs_metric.attrs = oa_config->attrs;
>+
>+ return sysfs_create_group(oa->metrics_kobj, &oa_config->sysfs_metric);
>+}
>+
>+int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
>+ struct drm_file *file)
>+{
>+ struct xe_oa *oa = &to_xe_device(dev)->oa;
>+ struct drm_xe_oa_config *arg = data;
>+ struct xe_oa_config *oa_config, *tmp;
>+ struct xe_oa_reg *regs;
>+ int err, id;
>+
>+ if (!oa->xe) {
>+ drm_dbg(&oa->xe->drm, "xe oa interface not available for this system\n");
>+ return -ENODEV;
>+ }
>+
>+ if (xe_oa_stream_paranoid && !perfmon_capable()) {
>+ drm_dbg(&oa->xe->drm, "Insufficient privileges to add xe OA config\n");
>+ return -EACCES;
>+ }
>+
>+ if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
>+ (!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
>+ (!arg->flex_regs_ptr || !arg->n_flex_regs)) {
>+ drm_dbg(&oa->xe->drm, "No OA registers given\n");
>+ return -EINVAL;
>+ }
>+
>+ oa_config = kzalloc(sizeof(*oa_config), GFP_KERNEL);
>+ if (!oa_config)
>+ return -ENOMEM;
>+
>+ oa_config->oa = oa;
>+ kref_init(&oa_config->ref);
>+
>+ if (!uuid_is_valid(arg->uuid)) {
>+ drm_dbg(&oa->xe->drm, "Invalid uuid format for OA config\n");
>+ err = -EINVAL;
>+ goto reg_err;
>+ }
>+
>+ /* Last character in oa_config->uuid will be 0 because oa_config is kzalloc */
>+ memcpy(oa_config->uuid, arg->uuid, sizeof(arg->uuid));
>+
>+ oa_config->mux_regs_len = arg->n_mux_regs;
>+ regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_mux_addr,
>+ u64_to_user_ptr(arg->mux_regs_ptr),
>+ arg->n_mux_regs);
>+ if (IS_ERR(regs)) {
>+ drm_dbg(&oa->xe->drm, "Failed to create OA config for mux_regs\n");
>+ err = PTR_ERR(regs);
>+ goto reg_err;
>+ }
>+ oa_config->mux_regs = regs;
>+
>+ oa_config->b_counter_regs_len = arg->n_boolean_regs;
>+ regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_b_counter_addr,
>+ u64_to_user_ptr(arg->boolean_regs_ptr),
>+ arg->n_boolean_regs);
>+ if (IS_ERR(regs)) {
>+ drm_dbg(&oa->xe->drm, "Failed to create OA config for b_counter_regs\n");
>+ err = PTR_ERR(regs);
>+ goto reg_err;
>+ }
>+ oa_config->b_counter_regs = regs;
>+
>+ oa_config->flex_regs_len = arg->n_flex_regs;
>+ regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_flex_addr,
>+ u64_to_user_ptr(arg->flex_regs_ptr),
>+ arg->n_flex_regs);
>+ if (IS_ERR(regs)) {
>+ drm_dbg(&oa->xe->drm, "Failed to create OA config for flex_regs\n");
>+ err = PTR_ERR(regs);
>+ goto reg_err;
>+ }
>+ oa_config->flex_regs = regs;
>+
>+ err = mutex_lock_interruptible(&oa->metrics_lock);
>+ if (err)
>+ goto reg_err;
>+
>+ /* We shouldn't have too many configs, so this iteration shouldn't be too costly */
>+ idr_for_each_entry(&oa->metrics_idr, tmp, id) {
>+ if (!strcmp(tmp->uuid, oa_config->uuid)) {
>+ drm_dbg(&oa->xe->drm, "OA config already exists with this uuid\n");
>+ err = -EADDRINUSE;
>+ goto sysfs_err;
>+ }
>+ }
>+
>+ err = create_dynamic_oa_sysfs_entry(oa, oa_config);
>+ if (err) {
>+ drm_dbg(&oa->xe->drm, "Failed to create sysfs entry for OA config\n");
>+ goto sysfs_err;
>+ }
>+
>+ /* Config id 0 is invalid, id 1 for kernel stored test config. */
>+ oa_config->id = idr_alloc(&oa->metrics_idr, oa_config, 2, 0, GFP_KERNEL);
>+ if (oa_config->id < 0) {
>+ drm_dbg(&oa->xe->drm, "Failed to create sysfs entry for OA config\n");
>+ err = oa_config->id;
>+ goto sysfs_err;
>+ }
>+
>+ mutex_unlock(&oa->metrics_lock);
>+
>+ drm_dbg(&oa->xe->drm, "Added config %s id=%i\n", oa_config->uuid, oa_config->id);
>+
>+ return oa_config->id;
>+
>+sysfs_err:
>+ mutex_unlock(&oa->metrics_lock);
>+reg_err:
>+ xe_oa_config_put(oa_config);
>+ drm_dbg(&oa->xe->drm, "Failed to add new OA config\n");
>+ return err;
>+}
>+
>+int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
>+ struct drm_file *file)
>+{
>+ struct xe_oa *oa = &to_xe_device(dev)->oa;
>+ struct xe_oa_config *oa_config;
>+ u64 *arg = data;
>+ int ret;
>+
>+ if (!oa->xe) {
>+ drm_dbg(&oa->xe->drm, "xe oa interface not available for this system\n");
>+ return -ENODEV;
>+ }
>+
>+ if (xe_oa_stream_paranoid && !perfmon_capable()) {
>+ drm_dbg(&oa->xe->drm, "Insufficient privileges to remove xe OA config\n");
>+ return -EACCES;
>+ }
>+
>+ ret = mutex_lock_interruptible(&oa->metrics_lock);
>+ if (ret)
>+ return ret;
>+
>+ oa_config = idr_find(&oa->metrics_idr, *arg);
>+ if (!oa_config) {
>+ drm_dbg(&oa->xe->drm, "Failed to remove unknown OA config\n");
>+ ret = -ENOENT;
>+ goto err_unlock;
>+ }
>+
>+ WARN_ON(*arg != oa_config->id);
>+
>+ sysfs_remove_group(oa->metrics_kobj, &oa_config->sysfs_metric);
>+
>+ idr_remove(&oa->metrics_idr, *arg);
>+
>+ mutex_unlock(&oa->metrics_lock);
>+
>+ drm_dbg(&oa->xe->drm, "Removed config %s id=%i\n", oa_config->uuid, oa_config->id);
>+
>+ xe_oa_config_put(oa_config);
>+
>+ return 0;
>+
>+err_unlock:
>+ mutex_unlock(&oa->metrics_lock);
>+ return ret;
>+}
>+
> void xe_oa_register(struct xe_device *xe)
> {
> struct xe_oa *oa = &xe->oa;
>@@ -258,6 +628,12 @@ int xe_oa_init(struct xe_device *xe)
> return 0;
> }
>
>+static int destroy_config(int id, void *p, void *data)
>+{
>+ xe_oa_config_put(p);
>+ return 0;
>+}
>+
> void xe_oa_fini(struct xe_device *xe)
> {
> struct xe_oa *oa = &xe->oa;
>@@ -270,6 +646,7 @@ void xe_oa_fini(struct xe_device *xe)
> for_each_gt(gt, xe, i)
> kfree(gt->oa.group);
>
>+ idr_for_each(&oa->metrics_idr, destroy_config, oa);
> idr_destroy(&oa->metrics_idr);
>
> oa->xe = NULL;
>diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
>index ba4ba80fd34cb..79f77f445deb0 100644
>--- a/drivers/gpu/drm/xe/xe_oa.h
>+++ b/drivers/gpu/drm/xe/xe_oa.h
>@@ -12,7 +12,12 @@ int xe_oa_init(struct xe_device *xe);
> void xe_oa_fini(struct xe_device *xe);
> void xe_oa_register(struct xe_device *xe);
> void xe_oa_unregister(struct xe_device *xe);
>+int xe_oa_ioctl_version(struct xe_device *xe);
> int xe_oa_sysctl_register(void);
> void xe_oa_sysctl_unregister(void);
>
>+int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
>+ struct drm_file *file);
>+int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
>+ struct drm_file *file);
> #endif
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 06/21] drm/xe/oa: Start implementing OA stream open ioctl
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (4 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 05/21] drm/xe/oa: Add/remove config ioctl's Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-13 18:09 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 07/21] drm/xe/oa: OA stream initialization Ashutosh Dixit
` (23 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Start implementing OA stream open ioctl and parse properties passed in as
part of OA stream open. The remaining operations associated with OA stream
open continue in subsequent patches.
v2: Include PVC in xe_oa_timestamp_frequency
Remove forcewake_get from reading RPM_CONFIG0
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 1 +
drivers/gpu/drm/xe/xe_oa.c | 239 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_oa.h | 2 +
3 files changed, 242 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index aacca14e52b11..7a179c4515633 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -115,6 +115,7 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_OA_OPEN, xe_oa_stream_open_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_OA_ADD_CONFIG, xe_oa_add_config_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_OA_REMOVE_CONFIG, xe_oa_remove_config_ioctl, DRM_RENDER_ALLOW),
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 1963bc6fad10e..c0ff8c2319ac0 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -11,11 +11,16 @@
#include <drm/xe_drm.h>
#include <drm/drm_drv.h>
+#include "regs/xe_gt_regs.h"
#include "regs/xe_oa_regs.h"
#include "xe_device.h"
#include "xe_gt.h"
+#include "xe_mmio.h"
#include "xe_oa.h"
+#define DEFAULT_POLL_FREQUENCY_HZ 200
+#define DEFAULT_POLL_PERIOD_NS (NSEC_PER_SEC / DEFAULT_POLL_FREQUENCY_HZ)
+
static u32 xe_oa_stream_paranoid = true;
static int xe_oa_sample_rate_hard_limit;
static u32 xe_oa_max_sample_rate = 100000;
@@ -31,6 +36,21 @@ static const struct xe_oa_format oa_formats[] = {
[XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
};
+struct xe_oa_open_properties {
+ bool sample;
+ bool single_exec_q;
+ u64 exec_q_id;
+
+ int metrics_set;
+ int oa_format;
+ bool oa_periodic;
+ int oa_period_exponent;
+
+ struct xe_hw_engine *hwe;
+
+ u64 poll_oa_period;
+};
+
static struct ctl_table_header *sysctl_header;
static void xe_oa_config_release(struct kref *ref)
@@ -53,6 +73,225 @@ static void xe_oa_config_put(struct xe_oa_config *oa_config)
kref_put(&oa_config->ref, xe_oa_config_release);
}
+/*
+ * OA timestamp frequency = CS timestamp frequency in most platforms. On some
+ * platforms OA unit ignores the CTC_SHIFT and the 2 timestamps differ. In such
+ * cases, return the adjusted CS timestamp frequency to the user.
+ */
+u32 xe_oa_timestamp_frequency(struct xe_device *xe)
+{
+ u32 reg, shift;
+
+ /*
+ * Wa_18013179988:dg2
+ * Wa_14015568240:pvc
+ * Wa_14015846243:mtl
+ */
+ switch (xe->info.platform) {
+ case XE_DG2:
+ case XE_PVC:
+ case XE_METEORLAKE:
+ xe_device_mem_access_get(xe);
+ reg = xe_mmio_read32(xe_root_mmio_gt(xe), RPM_CONFIG0);
+ xe_device_mem_access_put(xe);
+
+ shift = REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
+ return xe_root_mmio_gt(xe)->info.clock_freq << (3 - shift);
+
+ default:
+ return xe_root_mmio_gt(xe)->info.clock_freq;
+ }
+}
+
+static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent)
+{
+ u64 nom = (2ULL << exponent) * NSEC_PER_SEC;
+ u32 den = xe_oa_timestamp_frequency(oa->xe);
+
+ return div_u64(nom + den - 1, den);
+}
+
+static bool oa_format_valid(struct xe_oa *oa, u64 format)
+{
+ if (format >= XE_OA_FORMAT_MAX)
+ return false;
+ return test_bit(format, oa->format_mask);
+}
+
+static bool engine_supports_oa(const struct xe_hw_engine *hwe)
+{
+ return hwe->oa_group;
+}
+
+static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
+{
+ return hwe->oa_group && hwe->oa_group->type == type;
+}
+
+#define OA_EXPONENT_MAX 31
+
+static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
+ u32 n_props,
+ struct xe_oa_open_properties *props)
+{
+ const struct xe_oa_format *f;
+ u64 __user *uprop = uprops;
+ bool config_instance = false;
+ bool config_class = false;
+ u8 class, instance;
+ struct xe_gt *gt;
+ u32 i;
+ int ret;
+
+ if (!n_props || n_props >= DRM_XE_OA_PROP_MAX) {
+ drm_dbg(&oa->xe->drm, "Invalid number of xe perf properties given\n");
+ return -EINVAL;
+ }
+
+ props->poll_oa_period = DEFAULT_POLL_PERIOD_NS;
+
+ /* Defaults when class:instance is not passed */
+ class = XE_ENGINE_CLASS_RENDER;
+ instance = 0;
+
+ for (i = 0; i < n_props; i++) {
+ u64 oa_period, oa_freq_hz;
+ u64 id, value;
+
+ ret = get_user(id, uprop);
+ if (ret)
+ return ret;
+
+ ret = get_user(value, uprop + 1);
+ if (ret)
+ return ret;
+
+ switch ((enum drm_xe_oa_property_id)id) {
+ case DRM_XE_OA_PROP_EXEC_QUEUE_ID:
+ props->single_exec_q = true;
+ props->exec_q_id = value;
+ break;
+ case DRM_XE_OA_PROP_SAMPLE_OA:
+ props->sample = value;
+ break;
+ case DRM_XE_OA_PROP_OA_METRICS_SET:
+ if (!value) {
+ drm_dbg(&oa->xe->drm, "Unknown OA metric set ID\n");
+ return -EINVAL;
+ }
+ props->metrics_set = value;
+ break;
+ case DRM_XE_OA_PROP_OA_FORMAT:
+ if (!oa_format_valid(oa, value)) {
+ drm_dbg(&oa->xe->drm, "Unsupported OA report format %llu\n",
+ value);
+ return -EINVAL;
+ }
+ props->oa_format = value;
+ break;
+ case DRM_XE_OA_PROP_OA_EXPONENT:
+ if (value > OA_EXPONENT_MAX) {
+ drm_dbg(&oa->xe->drm, "OA timer exponent too high (> %u)\n",
+ OA_EXPONENT_MAX);
+ return -EINVAL;
+ }
+
+ BUILD_BUG_ON(sizeof(oa_period) != 8);
+ oa_period = oa_exponent_to_ns(oa, value);
+
+ oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
+ if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
+ drm_dbg(&oa->xe->drm,
+ "OA exponent would exceed the max sampling frequency (sysctl dev.xe.oa_max_sample_rate) %uHz without CAP_PERFMON or CAP_SYS_ADMIN privileges\n",
+ xe_oa_max_sample_rate);
+ return -EACCES;
+ }
+
+ props->oa_periodic = true;
+ props->oa_period_exponent = value;
+ break;
+ case DRM_XE_OA_PROP_POLL_OA_PERIOD:
+ if (value < 100000 /* 100us */) {
+ drm_dbg(&oa->xe->drm, "OA timer too small (%lluns < 100us)\n",
+ value);
+ return -EINVAL;
+ }
+ props->poll_oa_period = value;
+ break;
+ case DRM_XE_OA_PROP_OA_ENGINE_CLASS:
+ class = (u8)value;
+ config_class = true;
+ break;
+ case DRM_XE_OA_PROP_OA_ENGINE_INSTANCE:
+ instance = (u8)value;
+ config_instance = true;
+ break;
+ default:
+ drm_dbg(&oa->xe->drm, "Unknown xe oa property ID %lld\n", id);
+ return -EINVAL;
+ }
+
+ uprop += 2;
+ }
+
+ if ((config_class && !config_instance) ||
+ (config_instance && !config_class)) {
+ drm_dbg(&oa->xe->drm, "OA engine class/instance parameters must be passed together\n");
+ return -EINVAL;
+ }
+
+ for_each_gt(gt, oa->xe, i) {
+ props->hwe = xe_gt_hw_engine(gt, class, instance, false);
+ if (props->hwe)
+ break;
+ }
+ if (!props->hwe) {
+ drm_dbg(&oa->xe->drm, "OA engine class and instance invalid %d:%d\n",
+ class, instance);
+ return -EINVAL;
+ }
+
+ if (!engine_supports_oa(props->hwe)) {
+ drm_dbg(&oa->xe->drm, "Engine not supported by OA %d:%d\n",
+ class, instance);
+ return -EINVAL;
+ }
+
+ f = &oa->oa_formats[props->oa_format];
+ if (!props->oa_format || !f->size ||
+ !engine_supports_oa_format(props->hwe, f->type)) {
+ drm_dbg(&oa->xe->drm, "Invalid OA format %d type %d size %d for class %d\n",
+ props->oa_format, f->type, f->size, props->hwe->class);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct xe_oa *oa = &to_xe_device(dev)->oa;
+ struct drm_xe_oa_open_param *param = data;
+ struct xe_oa_open_properties props = {};
+ u32 known_open_flags;
+
+ if (!oa->xe) {
+ drm_dbg(&oa->xe->drm, "xe oa interface not available for this system\n");
+ return -ENODEV;
+ }
+
+ known_open_flags = XE_OA_FLAG_FD_CLOEXEC | XE_OA_FLAG_FD_NONBLOCK | XE_OA_FLAG_DISABLED;
+ if (param->flags & ~known_open_flags) {
+ drm_dbg(&oa->xe->drm, "Unknown drm_xe_oa_open_param flag\n");
+ return -EINVAL;
+ }
+
+ return xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param->properties_ptr),
+ param->num_properties,
+ &props);
+}
+
static bool xe_oa_is_valid_flex_addr(struct xe_oa *oa, u32 addr)
{
static const struct xe_reg flex_eu_regs[] = {
diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
index 79f77f445deb0..fd6caf652047a 100644
--- a/drivers/gpu/drm/xe/xe_oa.h
+++ b/drivers/gpu/drm/xe/xe_oa.h
@@ -16,6 +16,8 @@ int xe_oa_ioctl_version(struct xe_device *xe);
int xe_oa_sysctl_register(void);
void xe_oa_sysctl_unregister(void);
+int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 06/21] drm/xe/oa: Start implementing OA stream open ioctl
2023-09-19 16:10 ` [Intel-xe] [PATCH 06/21] drm/xe/oa: Start implementing OA stream open ioctl Ashutosh Dixit
@ 2023-10-13 18:09 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-13 18:09 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:34AM -0700, Ashutosh Dixit wrote:
>Start implementing OA stream open ioctl and parse properties passed in as
>part of OA stream open. The remaining operations associated with OA stream
>open continue in subsequent patches.
>
>v2: Include PVC in xe_oa_timestamp_frequency
> Remove forcewake_get from reading RPM_CONFIG0
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
lgtm, largely similar to i915,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/xe_device.c | 1 +
> drivers/gpu/drm/xe/xe_oa.c | 239 +++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_oa.h | 2 +
> 3 files changed, 242 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>index aacca14e52b11..7a179c4515633 100644
>--- a/drivers/gpu/drm/xe/xe_device.c
>+++ b/drivers/gpu/drm/xe/xe_device.c
>@@ -115,6 +115,7 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
> DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
>
>+ DRM_IOCTL_DEF_DRV(XE_OA_OPEN, xe_oa_stream_open_ioctl, DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF_DRV(XE_OA_ADD_CONFIG, xe_oa_add_config_ioctl, DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF_DRV(XE_OA_REMOVE_CONFIG, xe_oa_remove_config_ioctl, DRM_RENDER_ALLOW),
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 1963bc6fad10e..c0ff8c2319ac0 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -11,11 +11,16 @@
> #include <drm/xe_drm.h>
> #include <drm/drm_drv.h>
>
>+#include "regs/xe_gt_regs.h"
> #include "regs/xe_oa_regs.h"
> #include "xe_device.h"
> #include "xe_gt.h"
>+#include "xe_mmio.h"
> #include "xe_oa.h"
>
>+#define DEFAULT_POLL_FREQUENCY_HZ 200
>+#define DEFAULT_POLL_PERIOD_NS (NSEC_PER_SEC / DEFAULT_POLL_FREQUENCY_HZ)
>+
> static u32 xe_oa_stream_paranoid = true;
> static int xe_oa_sample_rate_hard_limit;
> static u32 xe_oa_max_sample_rate = 100000;
>@@ -31,6 +36,21 @@ static const struct xe_oa_format oa_formats[] = {
> [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
> };
>
>+struct xe_oa_open_properties {
>+ bool sample;
>+ bool single_exec_q;
>+ u64 exec_q_id;
>+
>+ int metrics_set;
>+ int oa_format;
>+ bool oa_periodic;
>+ int oa_period_exponent;
>+
>+ struct xe_hw_engine *hwe;
>+
>+ u64 poll_oa_period;
>+};
>+
> static struct ctl_table_header *sysctl_header;
>
> static void xe_oa_config_release(struct kref *ref)
>@@ -53,6 +73,225 @@ static void xe_oa_config_put(struct xe_oa_config *oa_config)
> kref_put(&oa_config->ref, xe_oa_config_release);
> }
>
>+/*
>+ * OA timestamp frequency = CS timestamp frequency in most platforms. On some
>+ * platforms OA unit ignores the CTC_SHIFT and the 2 timestamps differ. In such
>+ * cases, return the adjusted CS timestamp frequency to the user.
>+ */
>+u32 xe_oa_timestamp_frequency(struct xe_device *xe)
>+{
>+ u32 reg, shift;
>+
>+ /*
>+ * Wa_18013179988:dg2
>+ * Wa_14015568240:pvc
>+ * Wa_14015846243:mtl
>+ */
>+ switch (xe->info.platform) {
>+ case XE_DG2:
>+ case XE_PVC:
>+ case XE_METEORLAKE:
>+ xe_device_mem_access_get(xe);
>+ reg = xe_mmio_read32(xe_root_mmio_gt(xe), RPM_CONFIG0);
>+ xe_device_mem_access_put(xe);
>+
>+ shift = REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
>+ return xe_root_mmio_gt(xe)->info.clock_freq << (3 - shift);
>+
>+ default:
>+ return xe_root_mmio_gt(xe)->info.clock_freq;
>+ }
>+}
>+
>+static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent)
>+{
>+ u64 nom = (2ULL << exponent) * NSEC_PER_SEC;
>+ u32 den = xe_oa_timestamp_frequency(oa->xe);
>+
>+ return div_u64(nom + den - 1, den);
>+}
>+
>+static bool oa_format_valid(struct xe_oa *oa, u64 format)
>+{
>+ if (format >= XE_OA_FORMAT_MAX)
>+ return false;
>+ return test_bit(format, oa->format_mask);
>+}
>+
>+static bool engine_supports_oa(const struct xe_hw_engine *hwe)
>+{
>+ return hwe->oa_group;
>+}
>+
>+static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
>+{
>+ return hwe->oa_group && hwe->oa_group->type == type;
>+}
>+
>+#define OA_EXPONENT_MAX 31
>+
>+static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
>+ u32 n_props,
>+ struct xe_oa_open_properties *props)
>+{
>+ const struct xe_oa_format *f;
>+ u64 __user *uprop = uprops;
>+ bool config_instance = false;
>+ bool config_class = false;
>+ u8 class, instance;
>+ struct xe_gt *gt;
>+ u32 i;
>+ int ret;
>+
>+ if (!n_props || n_props >= DRM_XE_OA_PROP_MAX) {
>+ drm_dbg(&oa->xe->drm, "Invalid number of xe perf properties given\n");
>+ return -EINVAL;
>+ }
>+
>+ props->poll_oa_period = DEFAULT_POLL_PERIOD_NS;
>+
>+ /* Defaults when class:instance is not passed */
>+ class = XE_ENGINE_CLASS_RENDER;
>+ instance = 0;
>+
>+ for (i = 0; i < n_props; i++) {
>+ u64 oa_period, oa_freq_hz;
>+ u64 id, value;
>+
>+ ret = get_user(id, uprop);
>+ if (ret)
>+ return ret;
>+
>+ ret = get_user(value, uprop + 1);
>+ if (ret)
>+ return ret;
>+
>+ switch ((enum drm_xe_oa_property_id)id) {
>+ case DRM_XE_OA_PROP_EXEC_QUEUE_ID:
>+ props->single_exec_q = true;
>+ props->exec_q_id = value;
>+ break;
>+ case DRM_XE_OA_PROP_SAMPLE_OA:
>+ props->sample = value;
>+ break;
>+ case DRM_XE_OA_PROP_OA_METRICS_SET:
>+ if (!value) {
>+ drm_dbg(&oa->xe->drm, "Unknown OA metric set ID\n");
>+ return -EINVAL;
>+ }
>+ props->metrics_set = value;
>+ break;
>+ case DRM_XE_OA_PROP_OA_FORMAT:
>+ if (!oa_format_valid(oa, value)) {
>+ drm_dbg(&oa->xe->drm, "Unsupported OA report format %llu\n",
>+ value);
>+ return -EINVAL;
>+ }
>+ props->oa_format = value;
>+ break;
>+ case DRM_XE_OA_PROP_OA_EXPONENT:
>+ if (value > OA_EXPONENT_MAX) {
>+ drm_dbg(&oa->xe->drm, "OA timer exponent too high (> %u)\n",
>+ OA_EXPONENT_MAX);
>+ return -EINVAL;
>+ }
>+
>+ BUILD_BUG_ON(sizeof(oa_period) != 8);
>+ oa_period = oa_exponent_to_ns(oa, value);
>+
>+ oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
>+ if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
>+ drm_dbg(&oa->xe->drm,
>+ "OA exponent would exceed the max sampling frequency (sysctl dev.xe.oa_max_sample_rate) %uHz without CAP_PERFMON or CAP_SYS_ADMIN privileges\n",
>+ xe_oa_max_sample_rate);
>+ return -EACCES;
>+ }
>+
>+ props->oa_periodic = true;
>+ props->oa_period_exponent = value;
>+ break;
>+ case DRM_XE_OA_PROP_POLL_OA_PERIOD:
>+ if (value < 100000 /* 100us */) {
>+ drm_dbg(&oa->xe->drm, "OA timer too small (%lluns < 100us)\n",
>+ value);
>+ return -EINVAL;
>+ }
>+ props->poll_oa_period = value;
>+ break;
>+ case DRM_XE_OA_PROP_OA_ENGINE_CLASS:
>+ class = (u8)value;
>+ config_class = true;
>+ break;
>+ case DRM_XE_OA_PROP_OA_ENGINE_INSTANCE:
>+ instance = (u8)value;
>+ config_instance = true;
>+ break;
>+ default:
>+ drm_dbg(&oa->xe->drm, "Unknown xe oa property ID %lld\n", id);
>+ return -EINVAL;
>+ }
>+
>+ uprop += 2;
>+ }
>+
>+ if ((config_class && !config_instance) ||
>+ (config_instance && !config_class)) {
>+ drm_dbg(&oa->xe->drm, "OA engine class/instance parameters must be passed together\n");
>+ return -EINVAL;
>+ }
>+
>+ for_each_gt(gt, oa->xe, i) {
>+ props->hwe = xe_gt_hw_engine(gt, class, instance, false);
>+ if (props->hwe)
>+ break;
>+ }
>+ if (!props->hwe) {
>+ drm_dbg(&oa->xe->drm, "OA engine class and instance invalid %d:%d\n",
>+ class, instance);
>+ return -EINVAL;
>+ }
>+
>+ if (!engine_supports_oa(props->hwe)) {
>+ drm_dbg(&oa->xe->drm, "Engine not supported by OA %d:%d\n",
>+ class, instance);
>+ return -EINVAL;
>+ }
>+
>+ f = &oa->oa_formats[props->oa_format];
>+ if (!props->oa_format || !f->size ||
>+ !engine_supports_oa_format(props->hwe, f->type)) {
>+ drm_dbg(&oa->xe->drm, "Invalid OA format %d type %d size %d for class %d\n",
>+ props->oa_format, f->type, f->size, props->hwe->class);
>+ return -EINVAL;
>+ }
>+
>+ return 0;
>+}
>+
>+int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
>+ struct drm_file *file)
>+{
>+ struct xe_oa *oa = &to_xe_device(dev)->oa;
>+ struct drm_xe_oa_open_param *param = data;
>+ struct xe_oa_open_properties props = {};
>+ u32 known_open_flags;
>+
>+ if (!oa->xe) {
>+ drm_dbg(&oa->xe->drm, "xe oa interface not available for this system\n");
>+ return -ENODEV;
>+ }
>+
>+ known_open_flags = XE_OA_FLAG_FD_CLOEXEC | XE_OA_FLAG_FD_NONBLOCK | XE_OA_FLAG_DISABLED;
>+ if (param->flags & ~known_open_flags) {
>+ drm_dbg(&oa->xe->drm, "Unknown drm_xe_oa_open_param flag\n");
>+ return -EINVAL;
>+ }
>+
>+ return xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param->properties_ptr),
>+ param->num_properties,
>+ &props);
>+}
>+
> static bool xe_oa_is_valid_flex_addr(struct xe_oa *oa, u32 addr)
> {
> static const struct xe_reg flex_eu_regs[] = {
>diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
>index 79f77f445deb0..fd6caf652047a 100644
>--- a/drivers/gpu/drm/xe/xe_oa.h
>+++ b/drivers/gpu/drm/xe/xe_oa.h
>@@ -16,6 +16,8 @@ int xe_oa_ioctl_version(struct xe_device *xe);
> int xe_oa_sysctl_register(void);
> void xe_oa_sysctl_unregister(void);
>
>+int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
>+ struct drm_file *file);
> int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file);
> int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 07/21] drm/xe/oa: OA stream initialization
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (5 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 06/21] drm/xe/oa: Start implementing OA stream open ioctl Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-04 15:22 ` Dixit, Ashutosh
2023-09-19 16:10 ` [Intel-xe] [PATCH 08/21] drm/xe/oa: Expose OA stream fd Ashutosh Dixit
` (22 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Implement majority of OA stream initialization (as part of OA stream open
ioctl). The OA buffer is allocated for receiving perf counter samples from
HW. The selected counter configuration is programmed into OA unit HW using
a command/batch buffer. For OAR, the render context image is modified so as
to have correct register values when the context switches in.
v2: Rebase, with change to xe_oa_submit_bb
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 672 ++++++++++++++++++++++++++++++++++++-
1 file changed, 669 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index c0ff8c2319ac0..794ebbdc34cbd 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -11,13 +11,26 @@
#include <drm/xe_drm.h>
#include <drm/drm_drv.h>
+#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
+#include "regs/xe_lrc_layout.h"
#include "regs/xe_oa_regs.h"
+#include "regs/xe_regs.h"
+#include "xe_bb.h"
+#include "xe_bo.h"
#include "xe_device.h"
+#include "xe_exec_queue.h"
#include "xe_gt.h"
+#include "xe_gt_mcr.h"
+#include "xe_lrc.h"
+#include "xe_migrate.h"
#include "xe_mmio.h"
#include "xe_oa.h"
+#include "xe_sched_job.h"
+#include "xe_vm.h"
+#define OA_BUFFER_SIZE SZ_16M
+#define OA_TAKEN(tail, head) (((tail) - (head)) & (OA_BUFFER_SIZE - 1))
#define DEFAULT_POLL_FREQUENCY_HZ 200
#define DEFAULT_POLL_PERIOD_NS (NSEC_PER_SEC / DEFAULT_POLL_FREQUENCY_HZ)
@@ -25,6 +38,12 @@ static u32 xe_oa_stream_paranoid = true;
static int xe_oa_sample_rate_hard_limit;
static u32 xe_oa_max_sample_rate = 100000;
+struct flex {
+ struct xe_reg reg;
+ u32 offset;
+ u32 value;
+};
+
static const struct xe_oa_format oa_formats[] = {
[XE_OA_FORMAT_C4_B8] = { 7, 64 },
[XE_OA_FORMAT_A12] = { 0, 64 },
@@ -51,6 +70,13 @@ struct xe_oa_open_properties {
u64 poll_oa_period;
};
+struct xe_oa_config_bo {
+ struct llist_node node;
+
+ struct xe_oa_config *oa_config;
+ struct xe_bb *bb;
+};
+
static struct ctl_table_header *sysctl_header;
static void xe_oa_config_release(struct kref *ref)
@@ -73,6 +99,634 @@ static void xe_oa_config_put(struct xe_oa_config *oa_config)
kref_put(&oa_config->ref, xe_oa_config_release);
}
+static struct xe_oa_config *xe_oa_config_get(struct xe_oa_config *oa_config)
+{
+ return kref_get_unless_zero(&oa_config->ref) ? oa_config : NULL;
+}
+
+static struct xe_oa_config *xe_oa_get_oa_config(struct xe_oa *oa, int metrics_set)
+{
+ struct xe_oa_config *oa_config;
+
+ rcu_read_lock();
+ oa_config = idr_find(&oa->metrics_idr, metrics_set);
+ if (oa_config)
+ oa_config = xe_oa_config_get(oa_config);
+ rcu_read_unlock();
+
+ return oa_config;
+}
+
+static void free_oa_config_bo(struct xe_oa_config_bo *oa_bo)
+{
+ xe_oa_config_put(oa_bo->oa_config);
+ xe_bb_free(oa_bo->bb, NULL);
+ kfree(oa_bo);
+}
+
+static const struct xe_oa_regs *__oa_regs(struct xe_oa_stream *stream)
+{
+ return &stream->hwe->oa_group->regs;
+}
+
+static int xe_oa_submit_bb(struct xe_oa_stream *stream, struct xe_bb *bb)
+{
+ struct xe_hw_engine *hwe = stream->hwe;
+ struct xe_sched_job *job;
+ struct xe_exec_queue *q;
+ struct dma_fence *fence;
+ long timeout;
+ int err = 0;
+
+ q = xe_exec_queue_create(hwe->gt->tile->xe, NULL, BIT(hwe->logical_instance), 1,
+ hwe, EXEC_QUEUE_FLAG_KERNEL);
+ if (IS_ERR(q)) {
+ err = PTR_ERR(q);
+ drm_err(&stream->oa->xe->drm, "gt%d, hwe %s, xe_exec_queue_create failed=%d",
+ stream->gt->info.id, hwe->name, err);
+ goto exit;
+ }
+
+ /* Will add MI_BATCH_BUFFER_END */
+ job = xe_bb_create_job(q, bb);
+ if (IS_ERR(job)) {
+ err = PTR_ERR(job);
+ goto put_exec_q;
+ }
+
+ xe_sched_job_arm(job);
+ fence = dma_fence_get(&job->drm.s_fence->finished);
+ xe_sched_job_push(job);
+
+ timeout = dma_fence_wait_timeout(fence, false, HZ);
+ dma_fence_put(fence);
+ if (timeout < 0)
+ err = timeout;
+ else if (!timeout)
+ err = -ETIME;
+put_exec_q:
+ xe_exec_queue_put(q);
+exit:
+ return err;
+}
+
+static void xe_oa_free_oa_buffer(struct xe_oa_stream *stream)
+{
+ xe_bo_unpin_map_no_vm(stream->oa_buffer.bo);
+}
+
+static void xe_oa_free_configs(struct xe_oa_stream *stream)
+{
+ struct xe_oa_config_bo *oa_bo, *tmp;
+
+ xe_oa_config_put(stream->oa_config);
+ llist_for_each_entry_safe(oa_bo, tmp, stream->oa_config_bos.first, node)
+ free_oa_config_bo(oa_bo);
+}
+
+static void xe_oa_store_flex(struct xe_oa_stream *stream, struct xe_lrc *lrc,
+ struct xe_bb *bb, const struct flex *flex, u32 count)
+{
+ u32 offset = xe_bo_ggtt_addr(lrc->bo);
+
+ do {
+ bb->cs[bb->len++] = MI_STORE_DWORD_IMM_GEN4 | MI_SRM_LRM_GLOBAL_GTT;
+ bb->cs[bb->len++] = offset + flex->offset * sizeof(u32);
+ bb->cs[bb->len++] = 0;
+ bb->cs[bb->len++] = flex->value;
+
+ } while (flex++, --count);
+}
+
+static int xe_oa_modify_context(struct xe_oa_stream *stream, struct xe_lrc *lrc,
+ const struct flex *flex, u32 count)
+{
+ struct xe_bb *bb;
+ int err = 0;
+
+ bb = xe_bb_new(stream->gt, 4 * count + 1, false);
+ if (IS_ERR(bb)) {
+ err = PTR_ERR(bb);
+ goto exit;
+ }
+
+ xe_oa_store_flex(stream, lrc, bb, flex, count);
+
+ err = xe_oa_submit_bb(stream, bb);
+ xe_bb_free(bb, NULL);
+exit:
+ return err;
+}
+
+static void xe_oa_load_flex(struct xe_oa_stream *stream, struct xe_bb *bb,
+ const struct flex *flex, u32 count)
+{
+ XE_WARN_ON(!count || count > 63);
+
+ bb->cs[bb->len++] = MI_LOAD_REGISTER_IMM(count);
+
+ do {
+ bb->cs[bb->len++] = flex->reg.addr;
+ bb->cs[bb->len++] = flex->value;
+
+ } while (flex++, --count);
+
+ bb->cs[bb->len++] = MI_NOOP;
+}
+
+static int xe_oa_modify_self(struct xe_oa_stream *stream,
+ const struct flex *flex, u32 count)
+{
+ struct xe_bb *bb;
+ int err = 0;
+
+ bb = xe_bb_new(stream->gt, 2 * count + 3, false);
+ if (IS_ERR(bb)) {
+ err = PTR_ERR(bb);
+ goto exit;
+ }
+
+ xe_oa_load_flex(stream, bb, flex, count);
+
+ err = xe_oa_submit_bb(stream, bb);
+ xe_bb_free(bb, NULL);
+exit:
+ return err;
+}
+
+static int xe_oa_configure_oar_context(struct xe_oa_stream *stream, bool enable)
+{
+ int err;
+ u32 format = stream->oa_buffer.format->format;
+ u32 offset = stream->oa->ctx_oactxctrl_offset;
+ struct flex regs_context[] = {
+ {
+ GEN8_OACTXCONTROL,
+ offset + 1,
+ enable ? GEN8_OA_COUNTER_RESUME : 0,
+ },
+ };
+#define GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE BIT(8)
+#define GEN12_OAR_OACONTROL_OFFSET 0x5B0
+ /* Offsets in regs_lri are not used since this configuration is applied using LRI */
+ struct flex regs_lri[] = {
+ {
+ GEN12_OAR_OACONTROL,
+ GEN12_OAR_OACONTROL_OFFSET + 1,
+ (format << GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT) |
+ (enable ? GEN12_OAR_OACONTROL_COUNTER_ENABLE : 0)
+ },
+ {
+ RING_CONTEXT_CONTROL(stream->hwe->mmio_base),
+ CTX_CONTEXT_CONTROL,
+ _MASKED_FIELD(GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE,
+ enable ?
+ GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE :
+ 0)
+ },
+ };
+
+ /* Modify stream hwe context image with regs_context */
+ err = xe_oa_modify_context(stream, &stream->exec_q->lrc[0],
+ regs_context, ARRAY_SIZE(regs_context));
+ if (err)
+ return err;
+
+ /* Apply regs_lri using LRI */
+ return xe_oa_modify_self(stream, regs_lri, ARRAY_SIZE(regs_lri));
+}
+
+#define HAS_OA_BPC_REPORTING(xe) (GRAPHICS_VERx100(xe) >= 1255)
+
+static void xe_oa_disable_metric_set(struct xe_oa_stream *stream)
+{
+ u32 sqcnt1;
+
+ /*
+ * Wa_1508761755:xehpsdv, dg2
+ * Enable thread stall DOP gating and EU DOP gating.
+ */
+ if (stream->gt->tile->xe->info.platform == XE_DG2) {
+ xe_gt_mcr_multicast_write(stream->gt, GEN8_ROW_CHICKEN,
+ _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));
+ xe_mmio_write32(stream->gt, GEN7_ROW_CHICKEN2,
+ _MASKED_BIT_ENABLE(GEN12_DISABLE_DOP_GATING));
+ }
+
+ /* disable the context save/restore or OAR counters */
+ if (stream->exec_q)
+ xe_oa_configure_oar_context(stream, false);
+
+ /* Make sure we disable noa to save power. */
+ xe_mmio_rmw32(stream->gt, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);
+
+ sqcnt1 = GEN12_SQCNT1_PMON_ENABLE |
+ (HAS_OA_BPC_REPORTING(stream->gt->tile->xe) ? GEN12_SQCNT1_OABPC : 0);
+
+ /* Reset PMON Enable to save power. */
+ xe_mmio_rmw32(stream->gt, GEN12_SQCNT1, sqcnt1, 0);
+}
+
+static int xe_oa_alloc_oa_buffer(struct xe_oa_stream *stream)
+{
+ struct xe_bo *bo;
+
+ BUILD_BUG_ON_NOT_POWER_OF_2(OA_BUFFER_SIZE);
+ BUILD_BUG_ON(OA_BUFFER_SIZE < SZ_128K || OA_BUFFER_SIZE > SZ_16M);
+
+ bo = xe_bo_create_pin_map(stream->gt->tile->xe, stream->gt->tile, NULL,
+ OA_BUFFER_SIZE, ttm_bo_type_kernel,
+ XE_BO_CREATE_SYSTEM_BIT | XE_BO_CREATE_GGTT_BIT);
+ if (IS_ERR(bo))
+ return PTR_ERR(bo);
+
+ stream->oa_buffer.bo = bo;
+ stream->oa_buffer.vaddr = bo->vmap.is_iomem ?
+ bo->vmap.vaddr_iomem : bo->vmap.vaddr;
+ return 0;
+}
+
+static void write_cs_mi_lri(struct xe_bb *bb, const struct xe_oa_reg *reg_data, u32 n_regs)
+{
+ u32 i;
+
+#define MI_LOAD_REGISTER_IMM_MAX_REGS (126)
+
+ for (i = 0; i < n_regs; i++) {
+ if ((i % MI_LOAD_REGISTER_IMM_MAX_REGS) == 0) {
+ u32 n_lri = min_t(u32, n_regs - i,
+ MI_LOAD_REGISTER_IMM_MAX_REGS);
+
+ bb->cs[bb->len++] = MI_LOAD_REGISTER_IMM(n_lri);
+ }
+ bb->cs[bb->len++] = reg_data[i].addr.addr;
+ bb->cs[bb->len++] = reg_data[i].value;
+ }
+}
+
+static int num_lri_dwords(int num_regs)
+{
+ int count = 0;
+
+ if (num_regs > 0) {
+ count += DIV_ROUND_UP(num_regs, MI_LOAD_REGISTER_IMM_MAX_REGS);
+ count += num_regs * 2;
+ }
+
+ return count;
+}
+
+static struct xe_oa_config_bo *
+__xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa_config)
+{
+ struct xe_oa_config_bo *oa_bo;
+ size_t config_length = 0;
+ struct xe_bb *bb;
+
+ oa_bo = kzalloc(sizeof(*oa_bo), GFP_KERNEL);
+ if (!oa_bo)
+ return ERR_PTR(-ENOMEM);
+
+ config_length += num_lri_dwords(oa_config->mux_regs_len);
+ config_length += num_lri_dwords(oa_config->b_counter_regs_len);
+ config_length += num_lri_dwords(oa_config->flex_regs_len);
+ config_length++; /* MI_BATCH_BUFFER_END */
+ config_length = ALIGN(sizeof(u32) * config_length, XE_PAGE_SIZE) / sizeof(u32);
+
+ bb = xe_bb_new(stream->gt, config_length, false);
+ if (IS_ERR(bb))
+ goto err_free;
+
+ write_cs_mi_lri(bb, oa_config->mux_regs, oa_config->mux_regs_len);
+ write_cs_mi_lri(bb, oa_config->b_counter_regs, oa_config->b_counter_regs_len);
+ write_cs_mi_lri(bb, oa_config->flex_regs, oa_config->flex_regs_len);
+
+ oa_bo->bb = bb;
+ oa_bo->oa_config = xe_oa_config_get(oa_config);
+ llist_add(&oa_bo->node, &stream->oa_config_bos);
+
+ return oa_bo;
+err_free:
+ kfree(oa_bo);
+ return ERR_CAST(bb);
+}
+
+static struct xe_oa_config_bo *xe_oa_alloc_config_buffer(struct xe_oa_stream *stream)
+{
+ struct xe_oa_config *oa_config = stream->oa_config;
+ struct xe_oa_config_bo *oa_bo;
+
+ /* Look for the buffer in the already allocated BOs attached to the stream */
+ llist_for_each_entry(oa_bo, stream->oa_config_bos.first, node) {
+ if (oa_bo->oa_config == oa_config &&
+ memcmp(oa_bo->oa_config->uuid, oa_config->uuid,
+ sizeof(oa_config->uuid)) == 0)
+ goto out;
+ }
+
+ oa_bo = __xe_oa_alloc_config_buffer(stream, oa_config);
+out:
+ return oa_bo;
+}
+
+static int xe_oa_emit_oa_config(struct xe_oa_stream *stream)
+{
+ struct xe_oa_config_bo *oa_bo;
+ int err = 0;
+
+ oa_bo = xe_oa_alloc_config_buffer(stream);
+ if (IS_ERR(oa_bo)) {
+ err = PTR_ERR(oa_bo);
+ goto exit;
+ }
+
+ err = xe_oa_submit_bb(stream, oa_bo->bb);
+exit:
+ return err;
+}
+
+static u32 oag_report_ctx_switches(const struct xe_oa_stream *stream)
+{
+ return _MASKED_FIELD(GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS,
+ stream->sample ?
+ 0 : GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS);
+}
+
+static int xe_oa_enable_metric_set(struct xe_oa_stream *stream)
+{
+ u32 sqcnt1;
+ int ret;
+
+ /*
+ * Wa_1508761755:xehpsdv, dg2
+ * EU NOA signals behave incorrectly if EU clock gating is enabled.
+ * Disable thread stall DOP gating and EU DOP gating.
+ */
+ if (stream->gt->tile->xe->info.platform == XE_DG2) {
+ xe_gt_mcr_multicast_write(stream->gt, GEN8_ROW_CHICKEN,
+ _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));
+ xe_mmio_write32(stream->gt, GEN7_ROW_CHICKEN2,
+ _MASKED_BIT_ENABLE(GEN12_DISABLE_DOP_GATING));
+ }
+
+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_debug,
+ /* Disable clk ratio reports, like previous Gens. */
+ _MASKED_BIT_ENABLE(GEN12_OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |
+ GEN12_OAG_OA_DEBUG_INCLUDE_CLK_RATIO) |
+ /*
+ * If the user didn't require OA reports, instruct the hardware
+ * not to emit ctx switch reports.
+ */
+ oag_report_ctx_switches(stream));
+
+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_ctx_ctrl, stream->periodic ?
+ (GEN12_OAG_OAGLBCTXCTRL_COUNTER_RESUME |
+ GEN12_OAG_OAGLBCTXCTRL_TIMER_ENABLE |
+ (stream->period_exponent <<
+ GEN12_OAG_OAGLBCTXCTRL_TIMER_PERIOD_SHIFT)) : 0);
+
+ /*
+ * Initialize Super Queue Internal Cnt Register
+ * Set PMON Enable in order to collect valid metrics.
+ * Enable bytes per clock reporting in OA for XEHPSDV onward.
+ */
+ sqcnt1 = GEN12_SQCNT1_PMON_ENABLE |
+ (HAS_OA_BPC_REPORTING(stream->gt->tile->xe) ? GEN12_SQCNT1_OABPC : 0);
+
+ xe_mmio_rmw32(stream->gt, GEN12_SQCNT1, 0, sqcnt1);
+
+ /*
+ * For Gen12, performance counters are context saved/restored. Only enable it
+ * for the context that requested this.
+ */
+ if (stream->exec_q) {
+ ret = xe_oa_configure_oar_context(stream, true);
+ if (ret)
+ return ret;
+ }
+
+ return xe_oa_emit_oa_config(stream);
+}
+
+static bool engine_supports_mi_query(struct xe_hw_engine *hwe)
+{
+ return hwe->class == XE_ENGINE_CLASS_RENDER;
+}
+
+#define MI_LRI_LEN(x) (((x) & 0xff) + 1)
+
+static bool xe_oa_find_reg_in_lri(u32 *state, u32 reg, u32 *offset, u32 end)
+{
+ u32 idx = *offset;
+ u32 len = min(MI_LRI_LEN(state[idx]) + idx, end);
+ bool found = false;
+
+ idx++;
+ for (; idx < len; idx += 2) {
+ if (state[idx] == reg) {
+ found = true;
+ break;
+ }
+ }
+
+ *offset = idx;
+ return found;
+}
+
+static u32 xe_oa_context_image_offset(struct xe_oa_stream *stream, u32 reg)
+{
+ u32 len = (xe_lrc_size(stream->gt->tile->xe, stream->hwe->class) - PAGE_SIZE) / 4;
+ u32 *state = stream->gt->default_lrc[stream->hwe->class];
+ u32 offset;
+
+ if (drm_WARN_ON(&stream->oa->xe->drm, !state))
+ return U32_MAX;
+
+ for (offset = 0; offset < len; ) {
+ if (IS_MI_LRI_CMD(state[offset])) {
+ /*
+ * We expect reg-value pairs in MI_LRI command, so
+ * MI_LRI_LEN() should be even
+ */
+ drm_WARN_ON(&stream->oa->xe->drm,
+ MI_LRI_LEN(state[offset]) & 0x1);
+
+ if (xe_oa_find_reg_in_lri(state, reg, &offset, len))
+ break;
+ } else {
+ offset++;
+ }
+ }
+
+ return offset < len ? offset : U32_MAX;
+}
+
+static int xe_oa_set_ctx_ctrl_offset(struct xe_oa_stream *stream)
+{
+ struct xe_reg reg = GEN12_OACTXCONTROL(stream->hwe->mmio_base);
+ u32 offset = stream->oa->ctx_oactxctrl_offset;
+
+ /* Do this only once. Failure is stored as offset of U32_MAX */
+ if (offset)
+ goto exit;
+
+ offset = xe_oa_context_image_offset(stream, reg.addr);
+ stream->oa->ctx_oactxctrl_offset = offset;
+
+ drm_dbg(&stream->oa->xe->drm, "%s oa ctx control at 0x%08x dword offset\n",
+ stream->hwe->name, offset);
+exit:
+ return offset && offset != U32_MAX ? 0 : -ENODEV;
+}
+
+static int xe_oa_stream_init(struct xe_oa_stream *stream,
+ struct xe_oa_open_properties *props)
+{
+ struct xe_oa_group *g = props->hwe->oa_group;
+ struct xe_gt *gt = props->hwe->gt;
+ struct xe_oa *oa = stream->oa;
+ int ret;
+
+ stream->poll_oa_period = props->poll_oa_period;
+ stream->hwe = props->hwe;
+ stream->gt = stream->hwe->gt;
+ stream->sample_size = sizeof(struct drm_xe_oa_record_header);
+ stream->oa_buffer.format = &oa->oa_formats[props->oa_format];
+
+ stream->sample = props->sample;
+ stream->sample_size += stream->oa_buffer.format->size;
+ stream->periodic = props->oa_periodic;
+ stream->period_exponent = props->oa_period_exponent;
+
+ if (stream->exec_q && engine_supports_mi_query(stream->hwe)) {
+ /* If we don't find the context offset, just return error */
+ ret = xe_oa_set_ctx_ctrl_offset(stream);
+ if (ret) {
+ drm_err(&stream->gt->tile->xe->drm,
+ "xe_oa_set_ctx_ctrl_offset failed for %s\n",
+ stream->hwe->name);
+ goto exit;
+ }
+ }
+
+ stream->oa_config = xe_oa_get_oa_config(oa, props->metrics_set);
+ if (!stream->oa_config) {
+ drm_dbg(&oa->xe->drm, "Invalid OA config id=%i\n", props->metrics_set);
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ ret = xe_oa_alloc_oa_buffer(stream);
+ if (ret)
+ goto err_free_configs;
+
+ /* Take runtime pm ref and forcewake to disable RC6 */
+ xe_device_mem_access_get(stream->oa->xe);
+ XE_WARN_ON(xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL));
+
+ ret = xe_oa_enable_metric_set(stream);
+ if (ret) {
+ drm_dbg(&oa->xe->drm, "Unable to enable metric set\n");
+ goto err_fw_put;
+ }
+
+ drm_dbg(&oa->xe->drm, "opening stream oa config uuid=%s\n",
+ stream->oa_config->uuid);
+
+ WRITE_ONCE(g->exclusive_stream, stream);
+
+ hrtimer_init(&stream->poll_check_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ init_waitqueue_head(&stream->poll_wq);
+
+ spin_lock_init(&stream->oa_buffer.ptr_lock);
+ mutex_init(&stream->lock);
+
+ return 0;
+
+err_fw_put:
+ xe_oa_disable_metric_set(stream);
+ XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
+ xe_device_mem_access_put(stream->oa->xe);
+ xe_oa_free_oa_buffer(stream);
+err_free_configs:
+ xe_oa_free_configs(stream);
+exit:
+ return ret;
+}
+
+static int
+xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
+ struct drm_xe_oa_open_param *param,
+ struct xe_oa_open_properties *props,
+ struct drm_file *file)
+{
+ struct xe_file *xef = to_xe_file(file);
+ struct xe_oa_stream *stream = NULL;
+ struct xe_exec_queue *q = NULL;
+ bool privileged_op = true;
+ int stream_fd;
+ int ret;
+
+ if (props->single_exec_q) {
+ q = xe_exec_queue_lookup(xef, props->exec_q_id);
+ if (XE_IOCTL_DBG(oa->xe, !q)) {
+ ret = -ENOENT;
+ goto err_exec_q;
+ }
+ }
+
+ /*
+ * The OAR unit only monitors the RCS on a per context basis. Relax
+ * requirements if the user doesn't request global stream access,
+ * i.e. query based sampling using MI_REPORT_PERF_COUNT
+ */
+ if (q && !props->sample)
+ privileged_op = false;
+
+ if (privileged_op && xe_oa_stream_paranoid && !perfmon_capable()) {
+ drm_dbg(&oa->xe->drm, "Insufficient privileges to open xe perf stream\n");
+ ret = -EACCES;
+ goto err_exec_q;
+ }
+
+ if (!props->sample && !q) {
+ drm_dbg(&oa->xe->drm, "Only OA report sampling supported\n");
+ ret = -EINVAL;
+ goto err_exec_q;
+ }
+
+ /* We currently only allow exclusive access */
+ if (props->hwe->oa_group->exclusive_stream) {
+ drm_dbg(&oa->xe->drm, "OA unit already in use\n");
+ ret = -EBUSY;
+ goto err_exec_q;
+ }
+
+ stream = kzalloc(sizeof(*stream), GFP_KERNEL);
+ if (!stream) {
+ ret = -ENOMEM;
+ goto err_exec_q;
+ }
+
+ stream->oa = oa;
+ stream->exec_q = q;
+
+ ret = xe_oa_stream_init(stream, props);
+ if (ret)
+ goto err_free;
+
+ /* Hold a reference on the drm device till stream_fd is released */
+ drm_dev_get(&oa->xe->drm);
+
+ return stream_fd;
+err_free:
+ kfree(stream);
+err_exec_q:
+ if (q)
+ xe_exec_queue_put(q);
+ return ret;
+}
+
/*
* OA timestamp frequency = CS timestamp frequency in most platforms. On some
* platforms OA unit ignores the CTC_SHIFT and the 2 timestamps differ. In such
@@ -275,6 +929,8 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
struct drm_xe_oa_open_param *param = data;
struct xe_oa_open_properties props = {};
u32 known_open_flags;
+ struct xe_gt *gt;
+ int ret;
if (!oa->xe) {
drm_dbg(&oa->xe->drm, "xe oa interface not available for this system\n");
@@ -287,9 +943,19 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
}
- return xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param->properties_ptr),
- param->num_properties,
- &props);
+ ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param->properties_ptr),
+ param->num_properties,
+ &props);
+ if (ret)
+ return ret;
+
+ gt = props.hwe->gt;
+
+ mutex_lock(>->oa.lock);
+ ret = xe_oa_stream_open_ioctl_locked(oa, param, &props, file);
+ mutex_unlock(>->oa.lock);
+
+ return ret;
}
static bool xe_oa_is_valid_flex_addr(struct xe_oa *oa, u32 addr)
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 07/21] drm/xe/oa: OA stream initialization
2023-09-19 16:10 ` [Intel-xe] [PATCH 07/21] drm/xe/oa: OA stream initialization Ashutosh Dixit
@ 2023-10-04 15:22 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-04 15:22 UTC (permalink / raw)
To: intel-xe
On Tue, 19 Sep 2023 09:10:35 -0700, Ashutosh Dixit wrote:
>
> +static int xe_oa_configure_oar_context(struct xe_oa_stream *stream, bool enable)
> +{
> + int err;
> + u32 format = stream->oa_buffer.format->format;
> + u32 offset = stream->oa->ctx_oactxctrl_offset;
> + struct flex regs_context[] = {
> + {
> + GEN8_OACTXCONTROL,
> + offset + 1,
> + enable ? GEN8_OA_COUNTER_RESUME : 0,
> + },
> + };
> +#define GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE BIT(8)
> +#define GEN12_OAR_OACONTROL_OFFSET 0x5B0
> + /* Offsets in regs_lri are not used since this configuration is applied using LRI */
> + struct flex regs_lri[] = {
> + {
> + GEN12_OAR_OACONTROL,
> + GEN12_OAR_OACONTROL_OFFSET + 1,
> + (format << GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT) |
> + (enable ? GEN12_OAR_OACONTROL_COUNTER_ENABLE : 0)
> + },
> + {
> + RING_CONTEXT_CONTROL(stream->hwe->mmio_base),
> + CTX_CONTEXT_CONTROL,
> + _MASKED_FIELD(GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE,
> + enable ?
> + GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE :
> + 0)
> + },
> + };
> +
> + /* Modify stream hwe context image with regs_context */
> + err = xe_oa_modify_context(stream, &stream->exec_q->lrc[0],
> + regs_context, ARRAY_SIZE(regs_context));
> + if (err)
> + return err;
> +
> + /* Apply regs_lri using LRI */
> + return xe_oa_modify_self(stream, regs_lri, ARRAY_SIZE(regs_lri));
This function is incorrect. Please don't review this. Hopefully I have
fixed it here (at least "gen12-unprivileged-single-ctx-counters" IGT passes
with this patch):
https://gitlab.freedesktop.org/adixit/kernel/-/commit/eb47df203caf259d2b0a3fc7cb9b557a78f76b8b
The above patch will be included in the next rev of the series.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 08/21] drm/xe/oa: Expose OA stream fd
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (6 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 07/21] drm/xe/oa: OA stream initialization Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-13 18:17 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 09/21] drm/xe/oa: Read file_operation Ashutosh Dixit
` (21 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
The OA stream open ioctl returns an fd with its own file_operations for the
newly initialized OA stream. These file_operations allow userspace to
enable or disable the stream, as well as apply a different counter
configuration for the OA stream. Userspace can also poll for data
availability. OA stream initialization is completed in this commit by
enabling the OA stream. When sampling is enabled this starts a hrtimer
which periodically checks for data availablility.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 386 +++++++++++++++++++++++++++++++++++++
1 file changed, 386 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 794ebbdc34cbd..261b168a61bf5 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -12,6 +12,7 @@
#include <drm/drm_drv.h>
#include "regs/xe_engine_regs.h"
+#include "regs/xe_gpu_commands.h"
#include "regs/xe_gt_regs.h"
#include "regs/xe_lrc_layout.h"
#include "regs/xe_oa_regs.h"
@@ -26,6 +27,7 @@
#include "xe_migrate.h"
#include "xe_mmio.h"
#include "xe_oa.h"
+#include "xe_pm.h"
#include "xe_sched_job.h"
#include "xe_vm.h"
@@ -33,6 +35,7 @@
#define OA_TAKEN(tail, head) (((tail) - (head)) & (OA_BUFFER_SIZE - 1))
#define DEFAULT_POLL_FREQUENCY_HZ 200
#define DEFAULT_POLL_PERIOD_NS (NSEC_PER_SEC / DEFAULT_POLL_FREQUENCY_HZ)
+#define INVALID_CTX_ID U32_MAX
static u32 xe_oa_stream_paranoid = true;
static int xe_oa_sample_rate_hard_limit;
@@ -129,6 +132,210 @@ static const struct xe_oa_regs *__oa_regs(struct xe_oa_stream *stream)
return &stream->hwe->oa_group->regs;
}
+static u32 gen12_oa_hw_tail_read(struct xe_oa_stream *stream)
+{
+ return xe_mmio_read32(stream->gt, __oa_regs(stream)->oa_tail_ptr) &
+ GEN12_OAG_OATAILPTR_MASK;
+}
+
+#define oa_report_header_64bit(__s) \
+ ((__s)->oa_buffer.format->header == HDR_64_BIT)
+
+static u64 oa_report_id(struct xe_oa_stream *stream, void *report)
+{
+ return oa_report_header_64bit(stream) ? *(u64 *)report : *(u32 *)report;
+}
+
+static u64 oa_timestamp(struct xe_oa_stream *stream, void *report)
+{
+ return oa_report_header_64bit(stream) ?
+ *((u64 *)report + 1) :
+ *((u32 *)report + 1);
+}
+
+static bool xe_oa_buffer_check_unlocked(struct xe_oa_stream *stream)
+{
+ u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
+ int report_size = stream->oa_buffer.format->size;
+ u32 tail, hw_tail;
+ unsigned long flags;
+ bool pollin;
+ u32 partial_report_size;
+
+ /*
+ * We have to consider the (unlikely) possibility that read() errors could result
+ * in an OA buffer reset which might reset the head and tail state.
+ */
+ spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
+
+ hw_tail = gen12_oa_hw_tail_read(stream);
+ hw_tail -= gtt_offset;
+
+ /*
+ * The tail pointer increases in 64 byte increments, not in report_size
+ * steps. Also the report size may not be a power of 2. Compute potentially
+ * partially landed report in the OA buffer
+ */
+ partial_report_size = OA_TAKEN(hw_tail, stream->oa_buffer.tail);
+ partial_report_size %= report_size;
+
+ /* Subtract partial amount off the tail */
+ hw_tail = OA_TAKEN(hw_tail, partial_report_size);
+
+ tail = hw_tail;
+
+ /*
+ * Walk the stream backward until we find a report with report id and timestmap
+ * not at 0. Since the circular buffer pointers progress by increments of 64 bytes
+ * and that reports can be up to 256 bytes long, we can't tell whether a report
+ * has fully landed in memory before the report id and timestamp of the following
+ * report have effectively landed.
+ *
+ * This is assuming that the writes of the OA unit land in memory in the order
+ * they were written to. If not : (╯°□°）╯︵ ┻━┻
+ */
+ while (OA_TAKEN(tail, stream->oa_buffer.tail) >= report_size) {
+ void *report = stream->oa_buffer.vaddr + tail;
+
+ if (oa_report_id(stream, report) ||
+ oa_timestamp(stream, report))
+ break;
+
+ tail = OA_TAKEN(tail, report_size);
+ }
+
+ if (OA_TAKEN(hw_tail, tail) > report_size)
+ drm_dbg(&stream->oa->xe->drm,
+ "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
+ stream->oa_buffer.head, tail, hw_tail);
+
+ stream->oa_buffer.tail = tail;
+
+ pollin = OA_TAKEN(stream->oa_buffer.tail,
+ stream->oa_buffer.head) >= report_size;
+
+ spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
+
+ return pollin;
+}
+
+static enum hrtimer_restart xe_oa_poll_check_timer_cb(struct hrtimer *hrtimer)
+{
+ struct xe_oa_stream *stream =
+ container_of(hrtimer, typeof(*stream), poll_check_timer);
+
+ if (xe_oa_buffer_check_unlocked(stream)) {
+ stream->pollin = true;
+ wake_up(&stream->poll_wq);
+ }
+
+ hrtimer_forward_now(hrtimer, ns_to_ktime(stream->poll_oa_period));
+
+ return HRTIMER_RESTART;
+}
+
+static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
+{
+ u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
+ unsigned long flags;
+
+ spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
+
+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_status, 0);
+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_head_ptr,
+ gtt_offset & GEN12_OAG_OAHEADPTR_MASK);
+ stream->oa_buffer.head = 0;
+
+ /*
+ * PRM says: "This MMIO must be set before the OATAILPTR register and after the
+ * OAHEADPTR register. This is to enable proper functionality of the overflow bit".
+ */
+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_buffer, gtt_offset |
+ OABUFFER_SIZE_16M | GEN12_OAG_OABUFFER_MEMORY_SELECT);
+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_tail_ptr,
+ gtt_offset & GEN12_OAG_OATAILPTR_MASK);
+
+ /* Mark that we need updated tail pointers to read from... */
+ stream->oa_buffer.tail = 0;
+
+ /*
+ * Reset state used to recognise context switches, affecting which reports we will
+ * forward to userspace while filtering for a single context.
+ */
+ stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;
+
+ spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
+
+ /* Zero out the OA buffer since we rely on zero report id and timestamp fields */
+ memset(stream->oa_buffer.vaddr, 0, stream->oa_buffer.bo->size);
+}
+
+static void xe_oa_enable(struct xe_oa_stream *stream)
+{
+ const struct xe_oa_regs *regs;
+ u32 val;
+
+ /*
+ * BSpec: 46822
+ * Correct values for OAR counters are still dependent on enabling the
+ * GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE in OAG_OACONTROL. Enabling this
+ * bit means OAG unit will write reports to the OAG buffer, so
+ * initialize the OAG buffer correctly.
+ */
+ xe_oa_init_oa_buffer(stream);
+
+ regs = __oa_regs(stream);
+ val = (stream->oa_buffer.format->format << regs->oa_ctrl_counter_format_shift) |
+ GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE;
+
+ xe_mmio_write32(stream->gt, regs->oa_ctrl, val);
+}
+
+static void xe_oa_disable(struct xe_oa_stream *stream)
+{
+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_ctrl, 0);
+ if (xe_mmio_wait32(stream->gt, __oa_regs(stream)->oa_ctrl,
+ GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE, 0, 50000, NULL, false))
+ drm_err(&stream->oa->xe->drm,
+ "wait for OA to be disabled timed out\n");
+
+ xe_mmio_write32(stream->gt, GEN12_OA_TLB_INV_CR, 1);
+ if (xe_mmio_wait32(stream->gt, GEN12_OA_TLB_INV_CR, 1, 0, 50000, NULL, false))
+ drm_err(&stream->oa->xe->drm,
+ "wait for OA tlb invalidate timed out\n");
+}
+
+static __poll_t xe_oa_poll_locked(struct xe_oa_stream *stream,
+ struct file *file, poll_table *wait)
+{
+ __poll_t events = 0;
+
+ poll_wait(file, &stream->poll_wq, wait);
+
+ /*
+ * We don't explicitly check whether there's something to read here since this
+ * path may be hot depending on what else userspace is polling, or on the timeout
+ * in use. We rely on hrtimer/xe_oa_poll_check_timer_cb to notify us when there
+ * are samples to read.
+ */
+ if (stream->pollin)
+ events |= EPOLLIN;
+
+ return events;
+}
+
+static __poll_t xe_oa_poll(struct file *file, poll_table *wait)
+{
+ struct xe_oa_stream *stream = file->private_data;
+ __poll_t ret;
+
+ mutex_lock(&stream->lock);
+ ret = xe_oa_poll_locked(stream, file, wait);
+ mutex_unlock(&stream->lock);
+
+ return ret;
+}
+
static int xe_oa_submit_bb(struct xe_oa_stream *stream, struct xe_bb *bb)
{
struct xe_hw_engine *hwe = stream->hwe;
@@ -327,6 +534,25 @@ static void xe_oa_disable_metric_set(struct xe_oa_stream *stream)
xe_mmio_rmw32(stream->gt, GEN12_SQCNT1, sqcnt1, 0);
}
+static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
+{
+ struct xe_oa_group *g = stream->hwe->oa_group;
+ struct xe_gt *gt = stream->hwe->gt;
+
+ if (WARN_ON(stream != g->exclusive_stream))
+ return;
+
+ /* Unset exclusive_stream first */
+ WRITE_ONCE(g->exclusive_stream, NULL);
+ xe_oa_disable_metric_set(stream);
+
+ XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
+ xe_device_mem_access_put(stream->oa->xe);
+
+ xe_oa_free_oa_buffer(stream);
+ xe_oa_free_configs(stream);
+}
+
static int xe_oa_alloc_oa_buffer(struct xe_oa_stream *stream)
{
struct xe_bo *bo;
@@ -508,6 +734,148 @@ static int xe_oa_enable_metric_set(struct xe_oa_stream *stream)
return xe_oa_emit_oa_config(stream);
}
+static void xe_oa_stream_enable(struct xe_oa_stream *stream)
+{
+ stream->pollin = false;
+
+ xe_oa_enable(stream);
+
+ if (stream->sample)
+ hrtimer_start(&stream->poll_check_timer,
+ ns_to_ktime(stream->poll_oa_period),
+ HRTIMER_MODE_REL_PINNED);
+}
+
+static void xe_oa_stream_disable(struct xe_oa_stream *stream)
+{
+ xe_oa_disable(stream);
+
+ if (stream->sample)
+ hrtimer_cancel(&stream->poll_check_timer);
+}
+
+static void xe_oa_enable_locked(struct xe_oa_stream *stream)
+{
+ if (stream->enabled)
+ return;
+
+ stream->enabled = true;
+
+ xe_oa_stream_enable(stream);
+}
+
+static void xe_oa_disable_locked(struct xe_oa_stream *stream)
+{
+ if (!stream->enabled)
+ return;
+
+ stream->enabled = false;
+
+ xe_oa_stream_disable(stream);
+}
+
+static long xe_oa_config_locked(struct xe_oa_stream *stream,
+ unsigned long metrics_set)
+{
+ struct xe_oa_config *config;
+ long ret = stream->oa_config->id;
+
+ config = xe_oa_get_oa_config(stream->oa, metrics_set);
+ if (!config)
+ return -ENODEV;
+
+ if (config != stream->oa_config) {
+ int err;
+
+ /*
+ * If OA is bound to a specific engine, emit the reconfiguration
+ * inline from that engine. The update will then be ordered with
+ * respect to submission on that engine.
+ */
+ err = xe_oa_emit_oa_config(stream);
+ if (!err)
+ config = xchg(&stream->oa_config, config);
+ else
+ ret = err;
+ }
+
+ xe_oa_config_put(config);
+
+ return ret;
+}
+
+static long xe_oa_ioctl_locked(struct xe_oa_stream *stream,
+ unsigned int cmd,
+ unsigned long arg)
+{
+ switch (cmd) {
+ case XE_OA_IOCTL_ENABLE:
+ xe_oa_enable_locked(stream);
+ return 0;
+ case XE_OA_IOCTL_DISABLE:
+ xe_oa_disable_locked(stream);
+ return 0;
+ case XE_OA_IOCTL_CONFIG:
+ return xe_oa_config_locked(stream, arg);
+ }
+
+ return -EINVAL;
+}
+
+static long xe_oa_ioctl(struct file *file,
+ unsigned int cmd,
+ unsigned long arg)
+{
+ struct xe_oa_stream *stream = file->private_data;
+ long ret;
+
+ mutex_lock(&stream->lock);
+ ret = xe_oa_ioctl_locked(stream, cmd, arg);
+ mutex_unlock(&stream->lock);
+
+ return ret;
+}
+
+static void xe_oa_destroy_locked(struct xe_oa_stream *stream)
+{
+ if (stream->enabled)
+ xe_oa_disable_locked(stream);
+
+ xe_oa_stream_destroy(stream);
+
+ if (stream->exec_q)
+ xe_exec_queue_put(stream->exec_q);
+
+ kfree(stream);
+}
+
+static int xe_oa_release(struct inode *inode, struct file *file)
+{
+ struct xe_oa_stream *stream = file->private_data;
+ struct xe_gt *gt = stream->gt;
+
+ /*
+ * Within this call, we know that the fd is being closed and we have no other
+ * user of stream->lock. Use the perf lock to destroy the stream here.
+ */
+ mutex_lock(>->oa.lock);
+ xe_oa_destroy_locked(stream);
+ mutex_unlock(>->oa.lock);
+
+ /* Release the reference the perf stream kept on the driver. */
+ drm_dev_put(>->tile->xe->drm);
+
+ return 0;
+}
+
+static const struct file_operations xe_oa_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .release = xe_oa_release,
+ .poll = xe_oa_poll,
+ .unlocked_ioctl = xe_oa_ioctl,
+};
+
static bool engine_supports_mi_query(struct xe_hw_engine *hwe)
{
return hwe->class == XE_ENGINE_CLASS_RENDER;
@@ -636,6 +1004,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
WRITE_ONCE(g->exclusive_stream, stream);
hrtimer_init(&stream->poll_check_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ stream->poll_check_timer.function = xe_oa_poll_check_timer_cb;
init_waitqueue_head(&stream->poll_wq);
spin_lock_init(&stream->oa_buffer.ptr_lock);
@@ -663,6 +1032,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
struct xe_file *xef = to_xe_file(file);
struct xe_oa_stream *stream = NULL;
struct xe_exec_queue *q = NULL;
+ unsigned long f_flags = 0;
bool privileged_op = true;
int stream_fd;
int ret;
@@ -715,10 +1085,26 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
if (ret)
goto err_free;
+ if (param->flags & XE_OA_FLAG_FD_CLOEXEC)
+ f_flags |= O_CLOEXEC;
+ if (param->flags & XE_OA_FLAG_FD_NONBLOCK)
+ f_flags |= O_NONBLOCK;
+
+ stream_fd = anon_inode_getfd("[xe_oa]", &xe_oa_fops, stream, f_flags);
+ if (stream_fd < 0) {
+ ret = stream_fd;
+ goto err_destroy;
+ }
+
+ if (!(param->flags & XE_OA_FLAG_DISABLED))
+ xe_oa_enable_locked(stream);
+
/* Hold a reference on the drm device till stream_fd is released */
drm_dev_get(&oa->xe->drm);
return stream_fd;
+err_destroy:
+ xe_oa_stream_destroy(stream);
err_free:
kfree(stream);
err_exec_q:
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 08/21] drm/xe/oa: Expose OA stream fd
2023-09-19 16:10 ` [Intel-xe] [PATCH 08/21] drm/xe/oa: Expose OA stream fd Ashutosh Dixit
@ 2023-10-13 18:17 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-13 18:17 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:36AM -0700, Ashutosh Dixit wrote:
>The OA stream open ioctl returns an fd with its own file_operations for the
>newly initialized OA stream. These file_operations allow userspace to
>enable or disable the stream, as well as apply a different counter
>configuration for the OA stream. Userspace can also poll for data
>availability. OA stream initialization is completed in this commit by
>enabling the OA stream. When sampling is enabled this starts a hrtimer
>which periodically checks for data availablility.
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>---
> drivers/gpu/drm/xe/xe_oa.c | 386 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 386 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 794ebbdc34cbd..261b168a61bf5 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -12,6 +12,7 @@
> #include <drm/drm_drv.h>
>
> #include "regs/xe_engine_regs.h"
>+#include "regs/xe_gpu_commands.h"
> #include "regs/xe_gt_regs.h"
> #include "regs/xe_lrc_layout.h"
> #include "regs/xe_oa_regs.h"
>@@ -26,6 +27,7 @@
> #include "xe_migrate.h"
> #include "xe_mmio.h"
> #include "xe_oa.h"
>+#include "xe_pm.h"
> #include "xe_sched_job.h"
> #include "xe_vm.h"
>
>@@ -33,6 +35,7 @@
> #define OA_TAKEN(tail, head) (((tail) - (head)) & (OA_BUFFER_SIZE - 1))
> #define DEFAULT_POLL_FREQUENCY_HZ 200
> #define DEFAULT_POLL_PERIOD_NS (NSEC_PER_SEC / DEFAULT_POLL_FREQUENCY_HZ)
>+#define INVALID_CTX_ID U32_MAX
>
> static u32 xe_oa_stream_paranoid = true;
> static int xe_oa_sample_rate_hard_limit;
>@@ -129,6 +132,210 @@ static const struct xe_oa_regs *__oa_regs(struct xe_oa_stream *stream)
> return &stream->hwe->oa_group->regs;
> }
>
>+static u32 gen12_oa_hw_tail_read(struct xe_oa_stream *stream)
>+{
>+ return xe_mmio_read32(stream->gt, __oa_regs(stream)->oa_tail_ptr) &
>+ GEN12_OAG_OATAILPTR_MASK;
>+}
>+
>+#define oa_report_header_64bit(__s) \
>+ ((__s)->oa_buffer.format->header == HDR_64_BIT)
>+
>+static u64 oa_report_id(struct xe_oa_stream *stream, void *report)
>+{
>+ return oa_report_header_64bit(stream) ? *(u64 *)report : *(u32 *)report;
>+}
>+
>+static u64 oa_timestamp(struct xe_oa_stream *stream, void *report)
>+{
>+ return oa_report_header_64bit(stream) ?
>+ *((u64 *)report + 1) :
>+ *((u32 *)report + 1);
>+}
>+
>+static bool xe_oa_buffer_check_unlocked(struct xe_oa_stream *stream)
>+{
>+ u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
>+ int report_size = stream->oa_buffer.format->size;
>+ u32 tail, hw_tail;
>+ unsigned long flags;
>+ bool pollin;
>+ u32 partial_report_size;
>+
>+ /*
>+ * We have to consider the (unlikely) possibility that read() errors could result
>+ * in an OA buffer reset which might reset the head and tail state.
>+ */
>+ spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
>+
>+ hw_tail = gen12_oa_hw_tail_read(stream);
>+ hw_tail -= gtt_offset;
>+
>+ /*
>+ * The tail pointer increases in 64 byte increments, not in report_size
>+ * steps. Also the report size may not be a power of 2. Compute potentially
>+ * partially landed report in the OA buffer
>+ */
>+ partial_report_size = OA_TAKEN(hw_tail, stream->oa_buffer.tail);
>+ partial_report_size %= report_size;
>+
>+ /* Subtract partial amount off the tail */
>+ hw_tail = OA_TAKEN(hw_tail, partial_report_size);
>+
>+ tail = hw_tail;
>+
>+ /*
>+ * Walk the stream backward until we find a report with report id and timestmap
>+ * not at 0. Since the circular buffer pointers progress by increments of 64 bytes
>+ * and that reports can be up to 256 bytes long, we can't tell whether a report
>+ * has fully landed in memory before the report id and timestamp of the following
>+ * report have effectively landed.
>+ *
>+ * This is assuming that the writes of the OA unit land in memory in the order
>+ * they were written to. If not : (╯°□°）╯︵ ┻━┻
>+ */
>+ while (OA_TAKEN(tail, stream->oa_buffer.tail) >= report_size) {
>+ void *report = stream->oa_buffer.vaddr + tail;
>+
>+ if (oa_report_id(stream, report) ||
>+ oa_timestamp(stream, report))
>+ break;
>+
>+ tail = OA_TAKEN(tail, report_size);
>+ }
>+
>+ if (OA_TAKEN(hw_tail, tail) > report_size)
>+ drm_dbg(&stream->oa->xe->drm,
>+ "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
>+ stream->oa_buffer.head, tail, hw_tail);
>+
>+ stream->oa_buffer.tail = tail;
>+
>+ pollin = OA_TAKEN(stream->oa_buffer.tail,
>+ stream->oa_buffer.head) >= report_size;
>+
>+ spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
>+
>+ return pollin;
>+}
>+
>+static enum hrtimer_restart xe_oa_poll_check_timer_cb(struct hrtimer *hrtimer)
>+{
>+ struct xe_oa_stream *stream =
>+ container_of(hrtimer, typeof(*stream), poll_check_timer);
>+
>+ if (xe_oa_buffer_check_unlocked(stream)) {
>+ stream->pollin = true;
>+ wake_up(&stream->poll_wq);
>+ }
>+
>+ hrtimer_forward_now(hrtimer, ns_to_ktime(stream->poll_oa_period));
>+
>+ return HRTIMER_RESTART;
>+}
>+
>+static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
>+{
>+ u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
>+ unsigned long flags;
>+
>+ spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
>+
>+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_status, 0);
>+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_head_ptr,
>+ gtt_offset & GEN12_OAG_OAHEADPTR_MASK);
>+ stream->oa_buffer.head = 0;
>+
>+ /*
>+ * PRM says: "This MMIO must be set before the OATAILPTR register and after the
>+ * OAHEADPTR register. This is to enable proper functionality of the overflow bit".
>+ */
>+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_buffer, gtt_offset |
>+ OABUFFER_SIZE_16M | GEN12_OAG_OABUFFER_MEMORY_SELECT);
>+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_tail_ptr,
>+ gtt_offset & GEN12_OAG_OATAILPTR_MASK);
>+
>+ /* Mark that we need updated tail pointers to read from... */
>+ stream->oa_buffer.tail = 0;
>+
>+ /*
>+ * Reset state used to recognise context switches, affecting which reports we will
>+ * forward to userspace while filtering for a single context.
>+ */
>+ stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;
>+
>+ spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
>+
>+ /* Zero out the OA buffer since we rely on zero report id and timestamp fields */
>+ memset(stream->oa_buffer.vaddr, 0, stream->oa_buffer.bo->size);
>+}
>+
>+static void xe_oa_enable(struct xe_oa_stream *stream)
>+{
>+ const struct xe_oa_regs *regs;
>+ u32 val;
>+
>+ /*
>+ * BSpec: 46822
>+ * Correct values for OAR counters are still dependent on enabling the
>+ * GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE in OAG_OACONTROL. Enabling this
>+ * bit means OAG unit will write reports to the OAG buffer, so
>+ * initialize the OAG buffer correctly.
>+ */
>+ xe_oa_init_oa_buffer(stream);
In the case where we just want OAR/OAC, we could go with a small OAG
buffer and set "Disable Overrun Mode" bit in the OAG_OABUFFER register.
Then OAG would just stop once the buffer is full. I would think that
would consume less HW resources. We can do this later too, everything
here lgtm,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>+
>+ regs = __oa_regs(stream);
>+ val = (stream->oa_buffer.format->format << regs->oa_ctrl_counter_format_shift) |
>+ GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE;
>+
>+ xe_mmio_write32(stream->gt, regs->oa_ctrl, val);
>+}
>+
>+static void xe_oa_disable(struct xe_oa_stream *stream)
>+{
>+ xe_mmio_write32(stream->gt, __oa_regs(stream)->oa_ctrl, 0);
>+ if (xe_mmio_wait32(stream->gt, __oa_regs(stream)->oa_ctrl,
>+ GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE, 0, 50000, NULL, false))
>+ drm_err(&stream->oa->xe->drm,
>+ "wait for OA to be disabled timed out\n");
>+
>+ xe_mmio_write32(stream->gt, GEN12_OA_TLB_INV_CR, 1);
>+ if (xe_mmio_wait32(stream->gt, GEN12_OA_TLB_INV_CR, 1, 0, 50000, NULL, false))
>+ drm_err(&stream->oa->xe->drm,
>+ "wait for OA tlb invalidate timed out\n");
>+}
>+
>+static __poll_t xe_oa_poll_locked(struct xe_oa_stream *stream,
>+ struct file *file, poll_table *wait)
>+{
>+ __poll_t events = 0;
>+
>+ poll_wait(file, &stream->poll_wq, wait);
>+
>+ /*
>+ * We don't explicitly check whether there's something to read here since this
>+ * path may be hot depending on what else userspace is polling, or on the timeout
>+ * in use. We rely on hrtimer/xe_oa_poll_check_timer_cb to notify us when there
>+ * are samples to read.
>+ */
>+ if (stream->pollin)
>+ events |= EPOLLIN;
>+
>+ return events;
>+}
>+
>+static __poll_t xe_oa_poll(struct file *file, poll_table *wait)
>+{
>+ struct xe_oa_stream *stream = file->private_data;
>+ __poll_t ret;
>+
>+ mutex_lock(&stream->lock);
>+ ret = xe_oa_poll_locked(stream, file, wait);
>+ mutex_unlock(&stream->lock);
>+
>+ return ret;
>+}
>+
> static int xe_oa_submit_bb(struct xe_oa_stream *stream, struct xe_bb *bb)
> {
> struct xe_hw_engine *hwe = stream->hwe;
>@@ -327,6 +534,25 @@ static void xe_oa_disable_metric_set(struct xe_oa_stream *stream)
> xe_mmio_rmw32(stream->gt, GEN12_SQCNT1, sqcnt1, 0);
> }
>
>+static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
>+{
>+ struct xe_oa_group *g = stream->hwe->oa_group;
>+ struct xe_gt *gt = stream->hwe->gt;
>+
>+ if (WARN_ON(stream != g->exclusive_stream))
>+ return;
>+
>+ /* Unset exclusive_stream first */
>+ WRITE_ONCE(g->exclusive_stream, NULL);
>+ xe_oa_disable_metric_set(stream);
>+
>+ XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
>+ xe_device_mem_access_put(stream->oa->xe);
>+
>+ xe_oa_free_oa_buffer(stream);
>+ xe_oa_free_configs(stream);
>+}
>+
> static int xe_oa_alloc_oa_buffer(struct xe_oa_stream *stream)
> {
> struct xe_bo *bo;
>@@ -508,6 +734,148 @@ static int xe_oa_enable_metric_set(struct xe_oa_stream *stream)
> return xe_oa_emit_oa_config(stream);
> }
>
>+static void xe_oa_stream_enable(struct xe_oa_stream *stream)
>+{
>+ stream->pollin = false;
>+
>+ xe_oa_enable(stream);
>+
>+ if (stream->sample)
>+ hrtimer_start(&stream->poll_check_timer,
>+ ns_to_ktime(stream->poll_oa_period),
>+ HRTIMER_MODE_REL_PINNED);
>+}
>+
>+static void xe_oa_stream_disable(struct xe_oa_stream *stream)
>+{
>+ xe_oa_disable(stream);
>+
>+ if (stream->sample)
>+ hrtimer_cancel(&stream->poll_check_timer);
>+}
>+
>+static void xe_oa_enable_locked(struct xe_oa_stream *stream)
>+{
>+ if (stream->enabled)
>+ return;
>+
>+ stream->enabled = true;
>+
>+ xe_oa_stream_enable(stream);
>+}
>+
>+static void xe_oa_disable_locked(struct xe_oa_stream *stream)
>+{
>+ if (!stream->enabled)
>+ return;
>+
>+ stream->enabled = false;
>+
>+ xe_oa_stream_disable(stream);
>+}
>+
>+static long xe_oa_config_locked(struct xe_oa_stream *stream,
>+ unsigned long metrics_set)
>+{
>+ struct xe_oa_config *config;
>+ long ret = stream->oa_config->id;
>+
>+ config = xe_oa_get_oa_config(stream->oa, metrics_set);
>+ if (!config)
>+ return -ENODEV;
>+
>+ if (config != stream->oa_config) {
>+ int err;
>+
>+ /*
>+ * If OA is bound to a specific engine, emit the reconfiguration
>+ * inline from that engine. The update will then be ordered with
>+ * respect to submission on that engine.
>+ */
>+ err = xe_oa_emit_oa_config(stream);
>+ if (!err)
>+ config = xchg(&stream->oa_config, config);
>+ else
>+ ret = err;
>+ }
>+
>+ xe_oa_config_put(config);
>+
>+ return ret;
>+}
>+
>+static long xe_oa_ioctl_locked(struct xe_oa_stream *stream,
>+ unsigned int cmd,
>+ unsigned long arg)
>+{
>+ switch (cmd) {
>+ case XE_OA_IOCTL_ENABLE:
>+ xe_oa_enable_locked(stream);
>+ return 0;
>+ case XE_OA_IOCTL_DISABLE:
>+ xe_oa_disable_locked(stream);
>+ return 0;
>+ case XE_OA_IOCTL_CONFIG:
>+ return xe_oa_config_locked(stream, arg);
>+ }
>+
>+ return -EINVAL;
>+}
>+
>+static long xe_oa_ioctl(struct file *file,
>+ unsigned int cmd,
>+ unsigned long arg)
>+{
>+ struct xe_oa_stream *stream = file->private_data;
>+ long ret;
>+
>+ mutex_lock(&stream->lock);
>+ ret = xe_oa_ioctl_locked(stream, cmd, arg);
>+ mutex_unlock(&stream->lock);
>+
>+ return ret;
>+}
>+
>+static void xe_oa_destroy_locked(struct xe_oa_stream *stream)
>+{
>+ if (stream->enabled)
>+ xe_oa_disable_locked(stream);
>+
>+ xe_oa_stream_destroy(stream);
>+
>+ if (stream->exec_q)
>+ xe_exec_queue_put(stream->exec_q);
>+
>+ kfree(stream);
>+}
>+
>+static int xe_oa_release(struct inode *inode, struct file *file)
>+{
>+ struct xe_oa_stream *stream = file->private_data;
>+ struct xe_gt *gt = stream->gt;
>+
>+ /*
>+ * Within this call, we know that the fd is being closed and we have no other
>+ * user of stream->lock. Use the perf lock to destroy the stream here.
>+ */
>+ mutex_lock(>->oa.lock);
>+ xe_oa_destroy_locked(stream);
>+ mutex_unlock(>->oa.lock);
>+
>+ /* Release the reference the perf stream kept on the driver. */
>+ drm_dev_put(>->tile->xe->drm);
>+
>+ return 0;
>+}
>+
>+static const struct file_operations xe_oa_fops = {
>+ .owner = THIS_MODULE,
>+ .llseek = no_llseek,
>+ .release = xe_oa_release,
>+ .poll = xe_oa_poll,
>+ .unlocked_ioctl = xe_oa_ioctl,
>+};
>+
> static bool engine_supports_mi_query(struct xe_hw_engine *hwe)
> {
> return hwe->class == XE_ENGINE_CLASS_RENDER;
>@@ -636,6 +1004,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> WRITE_ONCE(g->exclusive_stream, stream);
>
> hrtimer_init(&stream->poll_check_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
>+ stream->poll_check_timer.function = xe_oa_poll_check_timer_cb;
> init_waitqueue_head(&stream->poll_wq);
>
> spin_lock_init(&stream->oa_buffer.ptr_lock);
>@@ -663,6 +1032,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
> struct xe_file *xef = to_xe_file(file);
> struct xe_oa_stream *stream = NULL;
> struct xe_exec_queue *q = NULL;
>+ unsigned long f_flags = 0;
> bool privileged_op = true;
> int stream_fd;
> int ret;
>@@ -715,10 +1085,26 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
> if (ret)
> goto err_free;
>
>+ if (param->flags & XE_OA_FLAG_FD_CLOEXEC)
>+ f_flags |= O_CLOEXEC;
>+ if (param->flags & XE_OA_FLAG_FD_NONBLOCK)
>+ f_flags |= O_NONBLOCK;
>+
>+ stream_fd = anon_inode_getfd("[xe_oa]", &xe_oa_fops, stream, f_flags);
>+ if (stream_fd < 0) {
>+ ret = stream_fd;
>+ goto err_destroy;
>+ }
>+
>+ if (!(param->flags & XE_OA_FLAG_DISABLED))
>+ xe_oa_enable_locked(stream);
>+
> /* Hold a reference on the drm device till stream_fd is released */
> drm_dev_get(&oa->xe->drm);
>
> return stream_fd;
>+err_destroy:
>+ xe_oa_stream_destroy(stream);
> err_free:
> kfree(stream);
> err_exec_q:
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 09/21] drm/xe/oa: Read file_operation
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (7 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 08/21] drm/xe/oa: Expose OA stream fd Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-14 0:56 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 10/21] drm/xe/oa: Implement queries Ashutosh Dixit
` (20 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Finally implement the OA stream read file_operation which was the only fop
missing in the previous commit. Both blocking and non-blocking reads are
supported. The read copies OA perf data from the OA buffer to the user
buffer provided as part of read system call.
v2: Implement oa_report_ctx_invalid (Umesh)
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 360 +++++++++++++++++++++++++++++++++++++
1 file changed, 360 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 261b168a61bf5..d6d9dcc5c0bda 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -146,6 +146,30 @@ static u64 oa_report_id(struct xe_oa_stream *stream, void *report)
return oa_report_header_64bit(stream) ? *(u64 *)report : *(u32 *)report;
}
+#define OAREPORT_REASON_MASK_EXTENDED GENMASK(25, 19)
+#define OAREPORT_REASON_TIMER BIT(0)
+#define OAREPORT_REASON_CTX_SWITCH BIT(3)
+#define OAREPORT_REASON_CLK_RATIO BIT(5)
+#define OAREPORT_CONTEXT_VALID BIT(16)
+
+static u64 oa_report_reason(struct xe_oa_stream *stream, void *report)
+{
+ return FIELD_GET(OAREPORT_REASON_MASK_EXTENDED, oa_report_id(stream, report));
+}
+
+static void oa_report_id_clear(struct xe_oa_stream *stream, u32 *report)
+{
+ if (oa_report_header_64bit(stream))
+ *(u64 *)report = 0;
+ else
+ *report = 0;
+}
+
+static bool oa_report_ctx_invalid(struct xe_oa_stream *stream, void *report)
+{
+ return !(oa_report_id(stream, report) & OAREPORT_CONTEXT_VALID);
+}
+
static u64 oa_timestamp(struct xe_oa_stream *stream, void *report)
{
return oa_report_header_64bit(stream) ?
@@ -153,6 +177,29 @@ static u64 oa_timestamp(struct xe_oa_stream *stream, void *report)
*((u32 *)report + 1);
}
+static void oa_timestamp_clear(struct xe_oa_stream *stream, u32 *report)
+{
+ if (oa_report_header_64bit(stream))
+ *(u64 *)&report[2] = 0;
+ else
+ report[1] = 0;
+}
+
+static u32 oa_context_id(struct xe_oa_stream *stream, u32 *report)
+{
+ u32 ctx_id = oa_report_header_64bit(stream) ? report[4] : report[2];
+
+ return ctx_id & stream->specific_ctx_id_mask;
+}
+
+static void oa_context_id_squash(struct xe_oa_stream *stream, u32 *report)
+{
+ if (oa_report_header_64bit(stream))
+ report[4] = INVALID_CTX_ID;
+ else
+ report[2] = INVALID_CTX_ID;
+}
+
static bool xe_oa_buffer_check_unlocked(struct xe_oa_stream *stream)
{
u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
@@ -234,6 +281,199 @@ static enum hrtimer_restart xe_oa_poll_check_timer_cb(struct hrtimer *hrtimer)
return HRTIMER_RESTART;
}
+static int xe_oa_append_status(struct xe_oa_stream *stream, char __user *buf,
+ size_t count, size_t *offset,
+ enum drm_xe_oa_record_type type)
+{
+ struct drm_xe_oa_record_header header = { type, 0, sizeof(header) };
+
+ if ((count - *offset) < header.size)
+ return -ENOSPC;
+
+ if (copy_to_user(buf + *offset, &header, sizeof(header)))
+ return -EFAULT;
+
+ *offset += header.size;
+
+ return 0;
+}
+
+static int xe_oa_append_sample(struct xe_oa_stream *stream, char __user *buf,
+ size_t count, size_t *offset, const u8 *report)
+{
+ int report_size = stream->oa_buffer.format->size;
+ struct drm_xe_oa_record_header header;
+ int report_size_partial;
+ u8 *oa_buf_end;
+
+ header.type = DRM_XE_OA_RECORD_SAMPLE;
+ header.pad = 0;
+ header.size = stream->sample_size;
+
+ if ((count - *offset) < header.size)
+ return -ENOSPC;
+
+ buf += *offset;
+ if (copy_to_user(buf, &header, sizeof(header)))
+ return -EFAULT;
+ buf += sizeof(header);
+
+ oa_buf_end = stream->oa_buffer.vaddr + OA_BUFFER_SIZE;
+ report_size_partial = oa_buf_end - report;
+
+ if (report_size_partial < report_size) {
+ if (copy_to_user(buf, report, report_size_partial))
+ return -EFAULT;
+ buf += report_size_partial;
+
+ if (copy_to_user(buf, stream->oa_buffer.vaddr,
+ report_size - report_size_partial))
+ return -EFAULT;
+ } else if (copy_to_user(buf, report, report_size)) {
+ return -EFAULT;
+ }
+
+ *offset += header.size;
+
+ return 0;
+}
+
+static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
+ size_t count, size_t *offset)
+{
+ int report_size = stream->oa_buffer.format->size;
+ u8 *oa_buf_base = stream->oa_buffer.vaddr;
+ u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
+ u32 mask = (OA_BUFFER_SIZE - 1);
+ size_t start_offset = *offset;
+ unsigned long flags;
+ u32 head, tail;
+ int ret = 0;
+
+ if (drm_WARN_ON(&stream->oa->xe->drm, !stream->enabled))
+ return -EIO;
+
+ spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
+
+ head = stream->oa_buffer.head;
+ tail = stream->oa_buffer.tail;
+
+ spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
+
+ /* An out of bounds or misaligned head or tail pointer implies a driver bug */
+ if (drm_WARN_ONCE(&stream->oa->xe->drm,
+ head > OA_BUFFER_SIZE || tail > OA_BUFFER_SIZE,
+ "Inconsistent OA buffer pointers: head = %u, tail = %u\n",
+ head, tail))
+ return -EIO;
+
+ for (; OA_TAKEN(tail, head); head = (head + report_size) & mask) {
+ u8 *report = oa_buf_base + head;
+ u32 ctx_id, *report32 = (void *)report;
+ u64 reason;
+
+ /*
+ * The reason field indicates what triggered this report (e.g. timer
+ * triggered or a context switch).
+ *
+ * In MMIO triggered reports, some platforms do not set the reason bit in
+ * this field and it is valid to have a reason field of zero.
+ */
+ reason = oa_report_reason(stream, report);
+ ctx_id = oa_context_id(stream, report32);
+
+ /*
+ * Squash whatever is in the CTX_ID field if it's marked as invalid to be
+ * sure we avoid false-positive, single-context filtering below...
+ *
+ * Note: we don't clear the valid_ctx_bit so userspace can understand that
+ * the ID has been squashed by the kernel.
+ */
+ if (oa_report_ctx_invalid(stream, report)) {
+ ctx_id = INVALID_CTX_ID;
+ oa_context_id_squash(stream, report32);
+ }
+
+ /*
+ * NB: The OA unit does not support clock gating off for a specific
+ * context and the kernel can't securely stop counters from updating as
+ * system-wide/global values.
+ *
+ * Automatic reports include a context ID so reports can be filtered on
+ * the cpu but it's not worth trying to automatically subtract/hide
+ * counter progress for other contexts while filtering since userspace can
+ * issue MI_REPORT_PERF_COUNT commands which would still provide a
+ * side-band view of the real values.
+ *
+ * To allow userspace to normalize counters for a single filtered context
+ * then it needs be forwarded bookend context-switch reports so that it
+ * can track switches in between MI_REPORT_PERF_COUNT commands and can
+ * itself subtract/ignore the progress of counters associated with other
+ * contexts. Note that the hardware automatically triggers reports when
+ * switching to a new context which are tagged with the ID of the newly
+ * active context. To avoid the complexity of reading ahead while parsing
+ * reports to try and minimize forwarding redundant context switch reports
+ * (i.e. between other, unrelated contexts) we simply elect to forward
+ * them all.
+ *
+ * We don't rely solely on the reason field to identify context switches
+ * since it's not-uncommon for periodic samples to identify a switch
+ * before any 'context switch' report.
+ */
+ if (!stream->exec_q || stream->specific_ctx_id == ctx_id ||
+ stream->oa_buffer.last_ctx_id == stream->specific_ctx_id ||
+ reason & OAREPORT_REASON_CTX_SWITCH) {
+ /*
+ * While filtering for a single context we avoid
+ * leaking the IDs of other contexts.
+ */
+ if (stream->exec_q && stream->specific_ctx_id != ctx_id)
+ oa_context_id_squash(stream, report32);
+
+ ret = xe_oa_append_sample(stream, buf, count, offset, report);
+ if (ret)
+ break;
+
+ stream->oa_buffer.last_ctx_id = ctx_id;
+ }
+
+ if (is_power_of_2(report_size)) {
+ /*
+ * Clear out report id and timestamp as a means to
+ * detect unlanded reports.
+ */
+ oa_report_id_clear(stream, report32);
+ oa_timestamp_clear(stream, report32);
+ } else {
+ u8 *oa_buf_end = stream->oa_buffer.vaddr +
+ OA_BUFFER_SIZE;
+ u32 part = oa_buf_end - (u8 *)report32;
+
+ /* Zero out the entire report */
+ if (report_size <= part) {
+ memset(report32, 0, report_size);
+ } else {
+ memset(report32, 0, part);
+ memset(oa_buf_base, 0, report_size - part);
+ }
+ }
+ }
+
+ if (start_offset != *offset) {
+ struct xe_reg oaheadptr = __oa_regs(stream)->oa_head_ptr;
+
+ spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
+
+ xe_mmio_write32(stream->gt, oaheadptr,
+ (head + gtt_offset) & GEN12_OAG_OAHEADPTR_MASK);
+ stream->oa_buffer.head = head;
+
+ spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
+ }
+
+ return ret;
+}
+
static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
{
u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
@@ -305,6 +545,125 @@ static void xe_oa_disable(struct xe_oa_stream *stream)
"wait for OA tlb invalidate timed out\n");
}
+static int __xe_oa_read(struct xe_oa_stream *stream, char __user *buf,
+ size_t count, size_t *offset)
+{
+ struct xe_reg oastatus_reg = __oa_regs(stream)->oa_status;
+ u32 oastatus;
+ int ret;
+
+ if (drm_WARN_ON(&stream->oa->xe->drm, !stream->oa_buffer.vaddr))
+ return -EIO;
+
+ oastatus = xe_mmio_read32(stream->gt, oastatus_reg);
+
+ /*
+ * We treat OABUFFER_OVERFLOW as a significant error:
+ *
+ * We could handle this more gracefully, but some Gens don't correctly suppress
+ * certain automatically triggered reports in this condition and so we have to
+ * assume that old reports are now being trampled over.
+ *
+ * Considering how we don't currently give userspace control over the OA buffer
+ * size and always configure a large 16MB buffer, then a buffer overflow does
+ * anyway likely indicate that something has gone quite badly wrong.
+ */
+ if (oastatus & GEN12_OAG_OASTATUS_BUFFER_OVERFLOW) {
+ ret = xe_oa_append_status(stream, buf, count, offset,
+ DRM_XE_OA_RECORD_OA_BUFFER_LOST);
+ if (ret)
+ return ret;
+
+ drm_dbg(&stream->oa->xe->drm,
+ "OA buffer overflow (exponent = %d): force restart\n",
+ stream->period_exponent);
+
+ xe_oa_disable(stream);
+ xe_oa_enable(stream);
+
+ /*
+ * Note: oa_enable is expected to re-init the oabuffer and reset
+ * oastatus_reg for us
+ */
+ oastatus = xe_mmio_read32(stream->gt, oastatus_reg);
+ }
+
+ if (oastatus & GEN12_OAG_OASTATUS_REPORT_LOST) {
+ ret = xe_oa_append_status(stream, buf, count, offset,
+ DRM_XE_OA_RECORD_OA_REPORT_LOST);
+ if (ret)
+ return ret;
+
+ xe_mmio_rmw32(stream->gt, oastatus_reg,
+ GEN12_OAG_OASTATUS_COUNTER_OVERFLOW |
+ GEN12_OAG_OASTATUS_REPORT_LOST, 0);
+ }
+
+ return xe_oa_append_reports(stream, buf, count, offset);
+}
+
+static int xe_oa_wait_unlocked(struct xe_oa_stream *stream)
+{
+ /* We might wait indefinitely if periodic sampling is not enabled */
+ if (!stream->periodic)
+ return -EIO;
+
+ return wait_event_interruptible(stream->poll_wq,
+ xe_oa_buffer_check_unlocked(stream));
+}
+
+static ssize_t xe_oa_read(struct file *file, char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ struct xe_oa_stream *stream = file->private_data;
+ size_t offset = 0;
+ int ret;
+
+ /* Can't read from disabled streams */
+ if (!stream->enabled || !stream->sample)
+ return -EIO;
+
+ if (!(file->f_flags & O_NONBLOCK)) {
+ /*
+ * There's the small chance of false positives from wait_unlocked,
+ * e.g. with single engine filtering since we only wait until oabuffer
+ * has >= 1 report we don't immediately know whether any reports really
+ * belong to the current engine.
+ */
+ do {
+ ret = xe_oa_wait_unlocked(stream);
+ if (ret)
+ return ret;
+
+ mutex_lock(&stream->lock);
+ ret = __xe_oa_read(stream, buf, count, &offset);
+ mutex_unlock(&stream->lock);
+ } while (!offset && !ret);
+ } else {
+ mutex_lock(&stream->lock);
+ ret = __xe_oa_read(stream, buf, count, &offset);
+ mutex_unlock(&stream->lock);
+ }
+
+ /*
+ * We allow the poll checking to sometimes report false positive EPOLLIN
+ * events where we might actually report EAGAIN on read() if there's
+ * not really any data available. In this situation though we don't
+ * want to enter a busy loop between poll() reporting a EPOLLIN event
+ * and read() returning -EAGAIN. Clearing the oa.pollin state here
+ * effectively ensures we back off until the next hrtimer callback
+ * before reporting another EPOLLIN event.
+ * The exception to this is if __xe_oa_read returned -ENOSPC which means
+ * that more OA data is available than could fit in the user provided
+ * buffer. In this case we want the next poll() call to not block.
+ */
+ if (ret != -ENOSPC)
+ stream->pollin = false;
+
+ /* Possible values for ret are 0, -EFAULT, -ENOSPC, -EIO, ... */
+ return offset ?: (ret ?: -EAGAIN);
+}
+
static __poll_t xe_oa_poll_locked(struct xe_oa_stream *stream,
struct file *file, poll_table *wait)
{
@@ -873,6 +1232,7 @@ static const struct file_operations xe_oa_fops = {
.llseek = no_llseek,
.release = xe_oa_release,
.poll = xe_oa_poll,
+ .read = xe_oa_read,
.unlocked_ioctl = xe_oa_ioctl,
};
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 09/21] drm/xe/oa: Read file_operation
2023-09-19 16:10 ` [Intel-xe] [PATCH 09/21] drm/xe/oa: Read file_operation Ashutosh Dixit
@ 2023-10-14 0:56 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-14 0:56 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:37AM -0700, Ashutosh Dixit wrote:
>Finally implement the OA stream read file_operation which was the only fop
>missing in the previous commit. Both blocking and non-blocking reads are
>supported. The read copies OA perf data from the OA buffer to the user
>buffer provided as part of read system call.
>
>v2: Implement oa_report_ctx_invalid (Umesh)
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
lgtm,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/xe_oa.c | 360 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 360 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 261b168a61bf5..d6d9dcc5c0bda 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -146,6 +146,30 @@ static u64 oa_report_id(struct xe_oa_stream *stream, void *report)
> return oa_report_header_64bit(stream) ? *(u64 *)report : *(u32 *)report;
> }
>
>+#define OAREPORT_REASON_MASK_EXTENDED GENMASK(25, 19)
>+#define OAREPORT_REASON_TIMER BIT(0)
>+#define OAREPORT_REASON_CTX_SWITCH BIT(3)
>+#define OAREPORT_REASON_CLK_RATIO BIT(5)
>+#define OAREPORT_CONTEXT_VALID BIT(16)
>+
>+static u64 oa_report_reason(struct xe_oa_stream *stream, void *report)
>+{
>+ return FIELD_GET(OAREPORT_REASON_MASK_EXTENDED, oa_report_id(stream, report));
>+}
>+
>+static void oa_report_id_clear(struct xe_oa_stream *stream, u32 *report)
>+{
>+ if (oa_report_header_64bit(stream))
>+ *(u64 *)report = 0;
>+ else
>+ *report = 0;
>+}
>+
>+static bool oa_report_ctx_invalid(struct xe_oa_stream *stream, void *report)
>+{
>+ return !(oa_report_id(stream, report) & OAREPORT_CONTEXT_VALID);
>+}
>+
> static u64 oa_timestamp(struct xe_oa_stream *stream, void *report)
> {
> return oa_report_header_64bit(stream) ?
>@@ -153,6 +177,29 @@ static u64 oa_timestamp(struct xe_oa_stream *stream, void *report)
> *((u32 *)report + 1);
> }
>
>+static void oa_timestamp_clear(struct xe_oa_stream *stream, u32 *report)
>+{
>+ if (oa_report_header_64bit(stream))
>+ *(u64 *)&report[2] = 0;
>+ else
>+ report[1] = 0;
>+}
>+
>+static u32 oa_context_id(struct xe_oa_stream *stream, u32 *report)
>+{
>+ u32 ctx_id = oa_report_header_64bit(stream) ? report[4] : report[2];
>+
>+ return ctx_id & stream->specific_ctx_id_mask;
>+}
>+
>+static void oa_context_id_squash(struct xe_oa_stream *stream, u32 *report)
>+{
>+ if (oa_report_header_64bit(stream))
>+ report[4] = INVALID_CTX_ID;
>+ else
>+ report[2] = INVALID_CTX_ID;
>+}
>+
> static bool xe_oa_buffer_check_unlocked(struct xe_oa_stream *stream)
> {
> u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
>@@ -234,6 +281,199 @@ static enum hrtimer_restart xe_oa_poll_check_timer_cb(struct hrtimer *hrtimer)
> return HRTIMER_RESTART;
> }
>
>+static int xe_oa_append_status(struct xe_oa_stream *stream, char __user *buf,
>+ size_t count, size_t *offset,
>+ enum drm_xe_oa_record_type type)
>+{
>+ struct drm_xe_oa_record_header header = { type, 0, sizeof(header) };
>+
>+ if ((count - *offset) < header.size)
>+ return -ENOSPC;
>+
>+ if (copy_to_user(buf + *offset, &header, sizeof(header)))
>+ return -EFAULT;
>+
>+ *offset += header.size;
>+
>+ return 0;
>+}
>+
>+static int xe_oa_append_sample(struct xe_oa_stream *stream, char __user *buf,
>+ size_t count, size_t *offset, const u8 *report)
>+{
>+ int report_size = stream->oa_buffer.format->size;
>+ struct drm_xe_oa_record_header header;
>+ int report_size_partial;
>+ u8 *oa_buf_end;
>+
>+ header.type = DRM_XE_OA_RECORD_SAMPLE;
>+ header.pad = 0;
>+ header.size = stream->sample_size;
>+
>+ if ((count - *offset) < header.size)
>+ return -ENOSPC;
>+
>+ buf += *offset;
>+ if (copy_to_user(buf, &header, sizeof(header)))
>+ return -EFAULT;
>+ buf += sizeof(header);
>+
>+ oa_buf_end = stream->oa_buffer.vaddr + OA_BUFFER_SIZE;
>+ report_size_partial = oa_buf_end - report;
>+
>+ if (report_size_partial < report_size) {
>+ if (copy_to_user(buf, report, report_size_partial))
>+ return -EFAULT;
>+ buf += report_size_partial;
>+
>+ if (copy_to_user(buf, stream->oa_buffer.vaddr,
>+ report_size - report_size_partial))
>+ return -EFAULT;
>+ } else if (copy_to_user(buf, report, report_size)) {
>+ return -EFAULT;
>+ }
>+
>+ *offset += header.size;
>+
>+ return 0;
>+}
>+
>+static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
>+ size_t count, size_t *offset)
>+{
>+ int report_size = stream->oa_buffer.format->size;
>+ u8 *oa_buf_base = stream->oa_buffer.vaddr;
>+ u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
>+ u32 mask = (OA_BUFFER_SIZE - 1);
>+ size_t start_offset = *offset;
>+ unsigned long flags;
>+ u32 head, tail;
>+ int ret = 0;
>+
>+ if (drm_WARN_ON(&stream->oa->xe->drm, !stream->enabled))
>+ return -EIO;
>+
>+ spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
>+
>+ head = stream->oa_buffer.head;
>+ tail = stream->oa_buffer.tail;
>+
>+ spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
>+
>+ /* An out of bounds or misaligned head or tail pointer implies a driver bug */
>+ if (drm_WARN_ONCE(&stream->oa->xe->drm,
>+ head > OA_BUFFER_SIZE || tail > OA_BUFFER_SIZE,
>+ "Inconsistent OA buffer pointers: head = %u, tail = %u\n",
>+ head, tail))
>+ return -EIO;
>+
>+ for (; OA_TAKEN(tail, head); head = (head + report_size) & mask) {
>+ u8 *report = oa_buf_base + head;
>+ u32 ctx_id, *report32 = (void *)report;
>+ u64 reason;
>+
>+ /*
>+ * The reason field indicates what triggered this report (e.g. timer
>+ * triggered or a context switch).
>+ *
>+ * In MMIO triggered reports, some platforms do not set the reason bit in
>+ * this field and it is valid to have a reason field of zero.
>+ */
>+ reason = oa_report_reason(stream, report);
>+ ctx_id = oa_context_id(stream, report32);
>+
>+ /*
>+ * Squash whatever is in the CTX_ID field if it's marked as invalid to be
>+ * sure we avoid false-positive, single-context filtering below...
>+ *
>+ * Note: we don't clear the valid_ctx_bit so userspace can understand that
>+ * the ID has been squashed by the kernel.
>+ */
>+ if (oa_report_ctx_invalid(stream, report)) {
>+ ctx_id = INVALID_CTX_ID;
>+ oa_context_id_squash(stream, report32);
>+ }
>+
>+ /*
>+ * NB: The OA unit does not support clock gating off for a specific
>+ * context and the kernel can't securely stop counters from updating as
>+ * system-wide/global values.
>+ *
>+ * Automatic reports include a context ID so reports can be filtered on
>+ * the cpu but it's not worth trying to automatically subtract/hide
>+ * counter progress for other contexts while filtering since userspace can
>+ * issue MI_REPORT_PERF_COUNT commands which would still provide a
>+ * side-band view of the real values.
>+ *
>+ * To allow userspace to normalize counters for a single filtered context
>+ * then it needs be forwarded bookend context-switch reports so that it
>+ * can track switches in between MI_REPORT_PERF_COUNT commands and can
>+ * itself subtract/ignore the progress of counters associated with other
>+ * contexts. Note that the hardware automatically triggers reports when
>+ * switching to a new context which are tagged with the ID of the newly
>+ * active context. To avoid the complexity of reading ahead while parsing
>+ * reports to try and minimize forwarding redundant context switch reports
>+ * (i.e. between other, unrelated contexts) we simply elect to forward
>+ * them all.
>+ *
>+ * We don't rely solely on the reason field to identify context switches
>+ * since it's not-uncommon for periodic samples to identify a switch
>+ * before any 'context switch' report.
>+ */
>+ if (!stream->exec_q || stream->specific_ctx_id == ctx_id ||
>+ stream->oa_buffer.last_ctx_id == stream->specific_ctx_id ||
>+ reason & OAREPORT_REASON_CTX_SWITCH) {
>+ /*
>+ * While filtering for a single context we avoid
>+ * leaking the IDs of other contexts.
>+ */
>+ if (stream->exec_q && stream->specific_ctx_id != ctx_id)
>+ oa_context_id_squash(stream, report32);
>+
>+ ret = xe_oa_append_sample(stream, buf, count, offset, report);
>+ if (ret)
>+ break;
>+
>+ stream->oa_buffer.last_ctx_id = ctx_id;
>+ }
>+
>+ if (is_power_of_2(report_size)) {
>+ /*
>+ * Clear out report id and timestamp as a means to
>+ * detect unlanded reports.
>+ */
>+ oa_report_id_clear(stream, report32);
>+ oa_timestamp_clear(stream, report32);
>+ } else {
>+ u8 *oa_buf_end = stream->oa_buffer.vaddr +
>+ OA_BUFFER_SIZE;
>+ u32 part = oa_buf_end - (u8 *)report32;
>+
>+ /* Zero out the entire report */
>+ if (report_size <= part) {
>+ memset(report32, 0, report_size);
>+ } else {
>+ memset(report32, 0, part);
>+ memset(oa_buf_base, 0, report_size - part);
>+ }
>+ }
>+ }
>+
>+ if (start_offset != *offset) {
>+ struct xe_reg oaheadptr = __oa_regs(stream)->oa_head_ptr;
>+
>+ spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
>+
>+ xe_mmio_write32(stream->gt, oaheadptr,
>+ (head + gtt_offset) & GEN12_OAG_OAHEADPTR_MASK);
>+ stream->oa_buffer.head = head;
>+
>+ spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
>+ }
>+
>+ return ret;
>+}
>+
> static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
> {
> u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo);
>@@ -305,6 +545,125 @@ static void xe_oa_disable(struct xe_oa_stream *stream)
> "wait for OA tlb invalidate timed out\n");
> }
>
>+static int __xe_oa_read(struct xe_oa_stream *stream, char __user *buf,
>+ size_t count, size_t *offset)
>+{
>+ struct xe_reg oastatus_reg = __oa_regs(stream)->oa_status;
>+ u32 oastatus;
>+ int ret;
>+
>+ if (drm_WARN_ON(&stream->oa->xe->drm, !stream->oa_buffer.vaddr))
>+ return -EIO;
>+
>+ oastatus = xe_mmio_read32(stream->gt, oastatus_reg);
>+
>+ /*
>+ * We treat OABUFFER_OVERFLOW as a significant error:
>+ *
>+ * We could handle this more gracefully, but some Gens don't correctly suppress
>+ * certain automatically triggered reports in this condition and so we have to
>+ * assume that old reports are now being trampled over.
>+ *
>+ * Considering how we don't currently give userspace control over the OA buffer
>+ * size and always configure a large 16MB buffer, then a buffer overflow does
>+ * anyway likely indicate that something has gone quite badly wrong.
>+ */
>+ if (oastatus & GEN12_OAG_OASTATUS_BUFFER_OVERFLOW) {
>+ ret = xe_oa_append_status(stream, buf, count, offset,
>+ DRM_XE_OA_RECORD_OA_BUFFER_LOST);
>+ if (ret)
>+ return ret;
>+
>+ drm_dbg(&stream->oa->xe->drm,
>+ "OA buffer overflow (exponent = %d): force restart\n",
>+ stream->period_exponent);
>+
>+ xe_oa_disable(stream);
>+ xe_oa_enable(stream);
>+
>+ /*
>+ * Note: oa_enable is expected to re-init the oabuffer and reset
>+ * oastatus_reg for us
>+ */
>+ oastatus = xe_mmio_read32(stream->gt, oastatus_reg);
>+ }
>+
>+ if (oastatus & GEN12_OAG_OASTATUS_REPORT_LOST) {
>+ ret = xe_oa_append_status(stream, buf, count, offset,
>+ DRM_XE_OA_RECORD_OA_REPORT_LOST);
>+ if (ret)
>+ return ret;
>+
>+ xe_mmio_rmw32(stream->gt, oastatus_reg,
>+ GEN12_OAG_OASTATUS_COUNTER_OVERFLOW |
>+ GEN12_OAG_OASTATUS_REPORT_LOST, 0);
>+ }
>+
>+ return xe_oa_append_reports(stream, buf, count, offset);
>+}
>+
>+static int xe_oa_wait_unlocked(struct xe_oa_stream *stream)
>+{
>+ /* We might wait indefinitely if periodic sampling is not enabled */
>+ if (!stream->periodic)
>+ return -EIO;
>+
>+ return wait_event_interruptible(stream->poll_wq,
>+ xe_oa_buffer_check_unlocked(stream));
>+}
>+
>+static ssize_t xe_oa_read(struct file *file, char __user *buf,
>+ size_t count, loff_t *ppos)
>+{
>+ struct xe_oa_stream *stream = file->private_data;
>+ size_t offset = 0;
>+ int ret;
>+
>+ /* Can't read from disabled streams */
>+ if (!stream->enabled || !stream->sample)
>+ return -EIO;
>+
>+ if (!(file->f_flags & O_NONBLOCK)) {
>+ /*
>+ * There's the small chance of false positives from wait_unlocked,
>+ * e.g. with single engine filtering since we only wait until oabuffer
>+ * has >= 1 report we don't immediately know whether any reports really
>+ * belong to the current engine.
>+ */
>+ do {
>+ ret = xe_oa_wait_unlocked(stream);
>+ if (ret)
>+ return ret;
>+
>+ mutex_lock(&stream->lock);
>+ ret = __xe_oa_read(stream, buf, count, &offset);
>+ mutex_unlock(&stream->lock);
>+ } while (!offset && !ret);
>+ } else {
>+ mutex_lock(&stream->lock);
>+ ret = __xe_oa_read(stream, buf, count, &offset);
>+ mutex_unlock(&stream->lock);
>+ }
>+
>+ /*
>+ * We allow the poll checking to sometimes report false positive EPOLLIN
>+ * events where we might actually report EAGAIN on read() if there's
>+ * not really any data available. In this situation though we don't
>+ * want to enter a busy loop between poll() reporting a EPOLLIN event
>+ * and read() returning -EAGAIN. Clearing the oa.pollin state here
>+ * effectively ensures we back off until the next hrtimer callback
>+ * before reporting another EPOLLIN event.
>+ * The exception to this is if __xe_oa_read returned -ENOSPC which means
>+ * that more OA data is available than could fit in the user provided
>+ * buffer. In this case we want the next poll() call to not block.
>+ */
>+ if (ret != -ENOSPC)
>+ stream->pollin = false;
>+
>+ /* Possible values for ret are 0, -EFAULT, -ENOSPC, -EIO, ... */
>+ return offset ?: (ret ?: -EAGAIN);
>+}
>+
> static __poll_t xe_oa_poll_locked(struct xe_oa_stream *stream,
> struct file *file, poll_table *wait)
> {
>@@ -873,6 +1232,7 @@ static const struct file_operations xe_oa_fops = {
> .llseek = no_llseek,
> .release = xe_oa_release,
> .poll = xe_oa_poll,
>+ .read = xe_oa_read,
> .unlocked_ioctl = xe_oa_ioctl,
> };
>
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 10/21] drm/xe/oa: Implement queries
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (8 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 09/21] drm/xe/oa: Read file_operation Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-14 0:58 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 11/21] drm/xe/oa: Override GuC RC with OA on PVC Ashutosh Dixit
` (19 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Implement queries to query OA unit ID's for HW engines, OA timestamp freq
and OA ioctl version.
v2: Convert oa_unit_id to u16 (Umesh)
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 11 +++++++++++
drivers/gpu/drm/xe/xe_oa.h | 3 +++
drivers/gpu/drm/xe/xe_query.c | 6 +++++-
3 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index d6d9dcc5c0bda..fc0159543dc74 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -2212,6 +2212,12 @@ static int xe_oa_init_engine_groups(struct xe_oa *oa)
return 0;
}
+u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
+{
+ return hwe->oa_group && hwe->oa_group->num_engines ?
+ hwe->oa_group->oa_unit_id : U16_MAX;
+}
+
static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
{
__set_bit(format, oa->format_mask);
@@ -2325,6 +2331,11 @@ static struct ctl_table oa_ctl_table[] = {
{}
};
+int xe_oa_ioctl_version(struct xe_device *xe)
+{
+ return 1;
+}
+
int xe_oa_sysctl_register(void)
{
sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
index fd6caf652047a..1f3d05067f19d 100644
--- a/drivers/gpu/drm/xe/xe_oa.h
+++ b/drivers/gpu/drm/xe/xe_oa.h
@@ -22,4 +22,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
+u32 xe_oa_timestamp_frequency(struct xe_device *xe);
+u16 xe_oa_unit_id(struct xe_hw_engine *hwe);
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index a951205100fea..4a3a9c11e8cc4 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -78,7 +78,9 @@ static int query_engines(struct xe_device *xe,
xe_to_user_engine_class[hwe->class];
hw_engine_info[i].engine_instance =
hwe->logical_instance;
- hw_engine_info[i++].gt_id = gt->info.id;
+ hw_engine_info[i].gt_id = gt->info.id;
+ hw_engine_info[i].oa_unit_id = xe_oa_unit_id(hwe);
+ i++;
}
if (copy_to_user(query_ptr, hw_engine_info, size)) {
@@ -200,6 +202,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
hweight_long(xe->info.mem_region_mask);
config->info[XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY] =
xe_exec_queue_device_get_max_priority(xe);
+ config->info[XE_QUERY_OA_IOCTL_VERSION] = xe_oa_ioctl_version(xe);
if (copy_to_user(query_ptr, config, size)) {
kfree(config);
@@ -241,6 +244,7 @@ static int query_gts(struct xe_device *xe, struct drm_xe_device_query *query)
gts->gts[id].type = XE_QUERY_GT_TYPE_MAIN;
gts->gts[id].instance = id;
gts->gts[id].clock_freq = gt->info.clock_freq;
+ gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(xe);
if (!IS_DGFX(xe))
gts->gts[id].native_mem_regions = 0x1;
else
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 10/21] drm/xe/oa: Implement queries
2023-09-19 16:10 ` [Intel-xe] [PATCH 10/21] drm/xe/oa: Implement queries Ashutosh Dixit
@ 2023-10-14 0:58 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-14 0:58 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:38AM -0700, Ashutosh Dixit wrote:
>Implement queries to query OA unit ID's for HW engines, OA timestamp freq
>and OA ioctl version.
>
>v2: Convert oa_unit_id to u16 (Umesh)
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
I guess this will change in the next revision, so will review that.
Umesh
>---
> drivers/gpu/drm/xe/xe_oa.c | 11 +++++++++++
> drivers/gpu/drm/xe/xe_oa.h | 3 +++
> drivers/gpu/drm/xe/xe_query.c | 6 +++++-
> 3 files changed, 19 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index d6d9dcc5c0bda..fc0159543dc74 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -2212,6 +2212,12 @@ static int xe_oa_init_engine_groups(struct xe_oa *oa)
> return 0;
> }
>
>+u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
>+{
>+ return hwe->oa_group && hwe->oa_group->num_engines ?
>+ hwe->oa_group->oa_unit_id : U16_MAX;
>+}
>+
> static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
> {
> __set_bit(format, oa->format_mask);
>@@ -2325,6 +2331,11 @@ static struct ctl_table oa_ctl_table[] = {
> {}
> };
>
>+int xe_oa_ioctl_version(struct xe_device *xe)
>+{
>+ return 1;
>+}
>+
> int xe_oa_sysctl_register(void)
> {
> sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
>diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
>index fd6caf652047a..1f3d05067f19d 100644
>--- a/drivers/gpu/drm/xe/xe_oa.h
>+++ b/drivers/gpu/drm/xe/xe_oa.h
>@@ -22,4 +22,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file);
> int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file);
>+u32 xe_oa_timestamp_frequency(struct xe_device *xe);
>+u16 xe_oa_unit_id(struct xe_hw_engine *hwe);
>+
> #endif
>diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
>index a951205100fea..4a3a9c11e8cc4 100644
>--- a/drivers/gpu/drm/xe/xe_query.c
>+++ b/drivers/gpu/drm/xe/xe_query.c
>@@ -78,7 +78,9 @@ static int query_engines(struct xe_device *xe,
> xe_to_user_engine_class[hwe->class];
> hw_engine_info[i].engine_instance =
> hwe->logical_instance;
>- hw_engine_info[i++].gt_id = gt->info.id;
>+ hw_engine_info[i].gt_id = gt->info.id;
>+ hw_engine_info[i].oa_unit_id = xe_oa_unit_id(hwe);
>+ i++;
> }
>
> if (copy_to_user(query_ptr, hw_engine_info, size)) {
>@@ -200,6 +202,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> hweight_long(xe->info.mem_region_mask);
> config->info[XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY] =
> xe_exec_queue_device_get_max_priority(xe);
>+ config->info[XE_QUERY_OA_IOCTL_VERSION] = xe_oa_ioctl_version(xe);
>
> if (copy_to_user(query_ptr, config, size)) {
> kfree(config);
>@@ -241,6 +244,7 @@ static int query_gts(struct xe_device *xe, struct drm_xe_device_query *query)
> gts->gts[id].type = XE_QUERY_GT_TYPE_MAIN;
> gts->gts[id].instance = id;
> gts->gts[id].clock_freq = gt->info.clock_freq;
>+ gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(xe);
> if (!IS_DGFX(xe))
> gts->gts[id].native_mem_regions = 0x1;
> else
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 11/21] drm/xe/oa: Override GuC RC with OA on PVC
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (9 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 10/21] drm/xe/oa: Implement queries Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-16 17:43 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 12/21] drm/xe/uapi: "Perf" layer to support multiple perf counter stream types Ashutosh Dixit
` (18 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
On PVC, a w/a resets RCS/CCS before it goes into RC6. This breaks OA since
OA does not expect engine resets during its use. Fix it by disabling RC6.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_guc_pc.c | 60 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_pc.h | 3 ++
drivers/gpu/drm/xe/xe_oa.c | 26 +++++++++++++-
drivers/gpu/drm/xe/xe_oa_types.h | 6 ++++
4 files changed, 94 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 8a4d299d6cb02..a91de057f6246 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -225,6 +225,27 @@ static int pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value)
return ret;
}
+static int pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
+{
+ struct xe_guc_ct *ct = &pc_to_guc(pc)->ct;
+ int ret;
+ u32 action[] = {
+ GUC_ACTION_HOST2GUC_PC_SLPC_REQUEST,
+ SLPC_EVENT(SLPC_EVENT_PARAMETER_UNSET, 1),
+ id,
+ };
+
+ if (wait_for_pc_state(pc, SLPC_GLOBAL_STATE_RUNNING))
+ return -EAGAIN;
+
+ ret = xe_guc_ct_send(ct, action, ARRAY_SIZE(action), 0, 0);
+ if (ret)
+ drm_err(&pc_to_xe(pc)->drm, "GuC PC unset param failed: %pe",
+ ERR_PTR(ret));
+
+ return ret;
+}
+
static int pc_action_setup_gucrc(struct xe_guc_pc *pc, u32 mode)
{
struct xe_guc_ct *ct = &pc_to_guc(pc)->ct;
@@ -768,6 +789,45 @@ int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc)
return ret;
}
+/**
+ * xe_guc_pc_override_gucrc_mode() - override GUCRC mode
+ * @pc: Xe_GuC_PC instance
+ * @mode: new value of the mode.
+ *
+ * Override the GUCRC mode.
+ *
+ * Return: 0 on success, negative error code on error.
+ */
+int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode)
+{
+ int ret;
+
+ xe_device_mem_access_get(pc_to_xe(pc));
+ ret = pc_action_set_param(pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
+ xe_device_mem_access_put(pc_to_xe(pc));
+
+ return ret;
+}
+
+/**
+ * xe_guc_pc_override_gucrc_mode() - override GUCRC mode
+ * @pc: Xe_GuC_PC instance
+ *
+ * Unset the GUCRC mode override
+ *
+ * Return: 0 on success, negative error code on error.
+ */
+int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc)
+{
+ int ret;
+
+ xe_device_mem_access_get(pc_to_xe(pc));
+ ret = pc_action_unset_param(pc, SLPC_PARAM_PWRGATE_RC_MODE);
+ xe_device_mem_access_put(pc_to_xe(pc));
+
+ return ret;
+}
+
static void pc_init_pcode_freq(struct xe_guc_pc *pc)
{
u32 min = DIV_ROUND_CLOSEST(pc->rpn_freq, GT_FREQUENCY_MULTIPLIER);
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h b/drivers/gpu/drm/xe/xe_guc_pc.h
index 43ea582545b57..0a2c7b9a4dc97 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.h
+++ b/drivers/gpu/drm/xe/xe_guc_pc.h
@@ -7,12 +7,15 @@
#define _XE_GUC_PC_H_
#include "xe_guc_pc_types.h"
+#include "abi/guc_actions_slpc_abi.h"
int xe_guc_pc_init(struct xe_guc_pc *pc);
void xe_guc_pc_fini(struct xe_guc_pc *pc);
int xe_guc_pc_start(struct xe_guc_pc *pc);
int xe_guc_pc_stop(struct xe_guc_pc *pc);
int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
+int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
+int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc);
u64 xe_guc_pc_rc6_residency(struct xe_guc_pc *pc);
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index fc0159543dc74..506dd056805b2 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -23,6 +23,7 @@
#include "xe_exec_queue.h"
#include "xe_gt.h"
#include "xe_gt_mcr.h"
+#include "xe_guc_pc.h"
#include "xe_lrc.h"
#include "xe_migrate.h"
#include "xe_mmio.h"
@@ -909,6 +910,10 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
xe_device_mem_access_put(stream->oa->xe);
xe_oa_free_oa_buffer(stream);
+ /* Wa_1509372804:pvc: * Unset the override of GUCRC mode to enable rc6 */
+ if (stream->override_gucrc)
+ XE_WARN_ON(xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
+
xe_oa_free_configs(stream);
}
@@ -1344,9 +1349,25 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
goto exit;
}
+ /*
+ * Wa_1509372804:pvc
+ *
+ * GuC reset of engines causes OA to lose configuration
+ * state. Prevent this by overriding GUCRC mode.
+ *
+ */
+ if (gt->tile->xe->info.platform == XE_PVC) {
+ ret = xe_guc_pc_override_gucrc_mode(>->uc.guc.pc,
+ SLPC_GUCRC_MODE_GUCRC_NO_RC6);
+ if (ret)
+ goto err_free_configs;
+
+ stream->override_gucrc = true;
+ }
+
ret = xe_oa_alloc_oa_buffer(stream);
if (ret)
- goto err_free_configs;
+ goto err_unset_gucrc;
/* Take runtime pm ref and forcewake to disable RC6 */
xe_device_mem_access_get(stream->oa->xe);
@@ -1377,6 +1398,9 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
xe_device_mem_access_put(stream->oa->xe);
xe_oa_free_oa_buffer(stream);
+err_unset_gucrc:
+ if (stream->override_gucrc)
+ XE_WARN_ON(xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
err_free_configs:
xe_oa_free_configs(stream);
exit:
diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index 4063c81e353ff..126692718c888 100644
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -291,5 +291,11 @@ struct xe_oa_stream {
* buffer should be checked for available data.
*/
u64 poll_oa_period;
+
+ /**
+ * @override_gucrc: GuC RC has been overridden for the perf stream,
+ * and we need to restore the default configuration on release.
+ */
+ bool override_gucrc;
};
#endif
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 11/21] drm/xe/oa: Override GuC RC with OA on PVC
2023-09-19 16:10 ` [Intel-xe] [PATCH 11/21] drm/xe/oa: Override GuC RC with OA on PVC Ashutosh Dixit
@ 2023-10-16 17:43 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-16 17:43 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:39AM -0700, Ashutosh Dixit wrote:
>On PVC, a w/a resets RCS/CCS before it goes into RC6. This breaks OA since
>OA does not expect engine resets during its use. Fix it by disabling RC6.
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
lgtm
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/xe_guc_pc.c | 60 ++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_pc.h | 3 ++
> drivers/gpu/drm/xe/xe_oa.c | 26 +++++++++++++-
> drivers/gpu/drm/xe/xe_oa_types.h | 6 ++++
> 4 files changed, 94 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
>index 8a4d299d6cb02..a91de057f6246 100644
>--- a/drivers/gpu/drm/xe/xe_guc_pc.c
>+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
>@@ -225,6 +225,27 @@ static int pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value)
> return ret;
> }
>
>+static int pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
>+{
>+ struct xe_guc_ct *ct = &pc_to_guc(pc)->ct;
>+ int ret;
>+ u32 action[] = {
>+ GUC_ACTION_HOST2GUC_PC_SLPC_REQUEST,
>+ SLPC_EVENT(SLPC_EVENT_PARAMETER_UNSET, 1),
>+ id,
>+ };
>+
>+ if (wait_for_pc_state(pc, SLPC_GLOBAL_STATE_RUNNING))
>+ return -EAGAIN;
>+
>+ ret = xe_guc_ct_send(ct, action, ARRAY_SIZE(action), 0, 0);
>+ if (ret)
>+ drm_err(&pc_to_xe(pc)->drm, "GuC PC unset param failed: %pe",
>+ ERR_PTR(ret));
>+
>+ return ret;
>+}
>+
> static int pc_action_setup_gucrc(struct xe_guc_pc *pc, u32 mode)
> {
> struct xe_guc_ct *ct = &pc_to_guc(pc)->ct;
>@@ -768,6 +789,45 @@ int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc)
> return ret;
> }
>
>+/**
>+ * xe_guc_pc_override_gucrc_mode() - override GUCRC mode
>+ * @pc: Xe_GuC_PC instance
>+ * @mode: new value of the mode.
>+ *
>+ * Override the GUCRC mode.
>+ *
>+ * Return: 0 on success, negative error code on error.
>+ */
>+int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode)
>+{
>+ int ret;
>+
>+ xe_device_mem_access_get(pc_to_xe(pc));
>+ ret = pc_action_set_param(pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
>+ xe_device_mem_access_put(pc_to_xe(pc));
>+
>+ return ret;
>+}
>+
>+/**
>+ * xe_guc_pc_override_gucrc_mode() - override GUCRC mode
>+ * @pc: Xe_GuC_PC instance
>+ *
>+ * Unset the GUCRC mode override
>+ *
>+ * Return: 0 on success, negative error code on error.
>+ */
>+int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc)
>+{
>+ int ret;
>+
>+ xe_device_mem_access_get(pc_to_xe(pc));
>+ ret = pc_action_unset_param(pc, SLPC_PARAM_PWRGATE_RC_MODE);
>+ xe_device_mem_access_put(pc_to_xe(pc));
>+
>+ return ret;
>+}
>+
> static void pc_init_pcode_freq(struct xe_guc_pc *pc)
> {
> u32 min = DIV_ROUND_CLOSEST(pc->rpn_freq, GT_FREQUENCY_MULTIPLIER);
>diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h b/drivers/gpu/drm/xe/xe_guc_pc.h
>index 43ea582545b57..0a2c7b9a4dc97 100644
>--- a/drivers/gpu/drm/xe/xe_guc_pc.h
>+++ b/drivers/gpu/drm/xe/xe_guc_pc.h
>@@ -7,12 +7,15 @@
> #define _XE_GUC_PC_H_
>
> #include "xe_guc_pc_types.h"
>+#include "abi/guc_actions_slpc_abi.h"
>
> int xe_guc_pc_init(struct xe_guc_pc *pc);
> void xe_guc_pc_fini(struct xe_guc_pc *pc);
> int xe_guc_pc_start(struct xe_guc_pc *pc);
> int xe_guc_pc_stop(struct xe_guc_pc *pc);
> int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
>+int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
>+int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
>
> enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc);
> u64 xe_guc_pc_rc6_residency(struct xe_guc_pc *pc);
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index fc0159543dc74..506dd056805b2 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -23,6 +23,7 @@
> #include "xe_exec_queue.h"
> #include "xe_gt.h"
> #include "xe_gt_mcr.h"
>+#include "xe_guc_pc.h"
> #include "xe_lrc.h"
> #include "xe_migrate.h"
> #include "xe_mmio.h"
>@@ -909,6 +910,10 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
> xe_device_mem_access_put(stream->oa->xe);
>
> xe_oa_free_oa_buffer(stream);
>+ /* Wa_1509372804:pvc: * Unset the override of GUCRC mode to enable rc6 */
>+ if (stream->override_gucrc)
>+ XE_WARN_ON(xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
>+
> xe_oa_free_configs(stream);
> }
>
>@@ -1344,9 +1349,25 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> goto exit;
> }
>
>+ /*
>+ * Wa_1509372804:pvc
>+ *
>+ * GuC reset of engines causes OA to lose configuration
>+ * state. Prevent this by overriding GUCRC mode.
>+ *
>+ */
>+ if (gt->tile->xe->info.platform == XE_PVC) {
>+ ret = xe_guc_pc_override_gucrc_mode(>->uc.guc.pc,
>+ SLPC_GUCRC_MODE_GUCRC_NO_RC6);
>+ if (ret)
>+ goto err_free_configs;
>+
>+ stream->override_gucrc = true;
>+ }
>+
> ret = xe_oa_alloc_oa_buffer(stream);
> if (ret)
>- goto err_free_configs;
>+ goto err_unset_gucrc;
>
> /* Take runtime pm ref and forcewake to disable RC6 */
> xe_device_mem_access_get(stream->oa->xe);
>@@ -1377,6 +1398,9 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
> xe_device_mem_access_put(stream->oa->xe);
> xe_oa_free_oa_buffer(stream);
>+err_unset_gucrc:
>+ if (stream->override_gucrc)
>+ XE_WARN_ON(xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
> err_free_configs:
> xe_oa_free_configs(stream);
> exit:
>diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
>index 4063c81e353ff..126692718c888 100644
>--- a/drivers/gpu/drm/xe/xe_oa_types.h
>+++ b/drivers/gpu/drm/xe/xe_oa_types.h
>@@ -291,5 +291,11 @@ struct xe_oa_stream {
> * buffer should be checked for available data.
> */
> u64 poll_oa_period;
>+
>+ /**
>+ * @override_gucrc: GuC RC has been overridden for the perf stream,
>+ * and we need to restore the default configuration on release.
>+ */
>+ bool override_gucrc;
> };
> #endif
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 12/21] drm/xe/uapi: "Perf" layer to support multiple perf counter stream types
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (10 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 11/21] drm/xe/oa: Override GuC RC with OA on PVC Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-04 2:13 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl Ashutosh Dixit
` (17 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
In XE, the plan is to support multiple types of perf counter streams (OA is
only one type of these streams). This requires addition of a PERF layer to
multiplex these different stream types through a single set of PERF
ioctl's.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c | 8 +++---
drivers/gpu/drm/xe/xe_oa.c | 43 +++++++++++++++++-----------
drivers/gpu/drm/xe/xe_perf.c | 52 ++++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_perf.h | 18 ++++++++++++
include/uapi/drm/xe_drm.h | 44 +++++++++++++++++++---------
6 files changed, 133 insertions(+), 33 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_perf.c
create mode 100644 drivers/gpu/drm/xe/xe_perf.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index a40c4827b9c85..294874681cc6c 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -88,6 +88,7 @@ xe-y += xe_bb.o \
xe_pat.o \
xe_pci.o \
xe_pcode.o \
+ xe_perf.o \
xe_pm.o \
xe_preempt_fence.o \
xe_pt.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 7a179c4515633..770b9fe6e65df 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -25,8 +25,8 @@
#include "xe_irq.h"
#include "xe_mmio.h"
#include "xe_module.h"
-#include "xe_oa.h"
#include "xe_pcode.h"
+#include "xe_perf.h"
#include "xe_pm.h"
#include "xe_query.h"
#include "xe_tile.h"
@@ -115,9 +115,9 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_OA_OPEN, xe_oa_stream_open_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_OA_ADD_CONFIG, xe_oa_add_config_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_OA_REMOVE_CONFIG, xe_oa_remove_config_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
};
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 506dd056805b2..63db0969a86b2 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -1173,13 +1173,13 @@ static long xe_oa_ioctl_locked(struct xe_oa_stream *stream,
unsigned long arg)
{
switch (cmd) {
- case XE_OA_IOCTL_ENABLE:
+ case XE_PERF_IOCTL_ENABLE:
xe_oa_enable_locked(stream);
return 0;
- case XE_OA_IOCTL_DISABLE:
+ case XE_PERF_IOCTL_DISABLE:
xe_oa_disable_locked(stream);
return 0;
- case XE_OA_IOCTL_CONFIG:
+ case XE_PERF_IOCTL_CONFIG:
return xe_oa_config_locked(stream, arg);
}
@@ -1692,12 +1692,11 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
return 0;
}
-int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file)
+int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
{
struct xe_oa *oa = &to_xe_device(dev)->oa;
- struct drm_xe_oa_open_param *param = data;
struct xe_oa_open_properties props = {};
+ struct drm_xe_oa_open_param param;
u32 known_open_flags;
struct xe_gt *gt;
int ret;
@@ -1707,14 +1706,18 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
return -ENODEV;
}
+ ret = __copy_from_user(¶m, data, sizeof(param));
+ if (XE_IOCTL_DBG(oa->xe, ret))
+ return -EFAULT;
+
known_open_flags = XE_OA_FLAG_FD_CLOEXEC | XE_OA_FLAG_FD_NONBLOCK | XE_OA_FLAG_DISABLED;
- if (param->flags & ~known_open_flags) {
+ if (param.flags & ~known_open_flags) {
drm_dbg(&oa->xe->drm, "Unknown drm_xe_oa_open_param flag\n");
return -EINVAL;
}
- ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param->properties_ptr),
- param->num_properties,
+ ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param.properties_ptr),
+ param.num_properties,
&props);
if (ret)
return ret;
@@ -1722,7 +1725,7 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
gt = props.hwe->gt;
mutex_lock(>->oa.lock);
- ret = xe_oa_stream_open_ioctl_locked(oa, param, &props, file);
+ ret = xe_oa_stream_open_ioctl_locked(oa, ¶m, &props, file);
mutex_unlock(>->oa.lock);
return ret;
@@ -1918,7 +1921,8 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
{
struct xe_oa *oa = &to_xe_device(dev)->oa;
- struct drm_xe_oa_config *arg = data;
+ struct drm_xe_oa_config param;
+ struct drm_xe_oa_config *arg = ¶m;
struct xe_oa_config *oa_config, *tmp;
struct xe_oa_reg *regs;
int err, id;
@@ -1933,6 +1937,10 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
return -EACCES;
}
+ err = __copy_from_user(¶m, data, sizeof(param));
+ if (XE_IOCTL_DBG(oa->xe, err))
+ return -EFAULT;
+
if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
(!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
(!arg->flex_regs_ptr || !arg->n_flex_regs)) {
@@ -2035,7 +2043,7 @@ int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
{
struct xe_oa *oa = &to_xe_device(dev)->oa;
struct xe_oa_config *oa_config;
- u64 *arg = data;
+ u64 arg, *ptr = data;
int ret;
if (!oa->xe) {
@@ -2048,22 +2056,25 @@ int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
return -EACCES;
}
+ ret = get_user(arg, ptr);
+ if (XE_IOCTL_DBG(oa->xe, ret))
+ return ret;
+
ret = mutex_lock_interruptible(&oa->metrics_lock);
if (ret)
return ret;
- oa_config = idr_find(&oa->metrics_idr, *arg);
+ oa_config = idr_find(&oa->metrics_idr, arg);
if (!oa_config) {
drm_dbg(&oa->xe->drm, "Failed to remove unknown OA config\n");
ret = -ENOENT;
goto err_unlock;
}
- WARN_ON(*arg != oa_config->id);
+ WARN_ON(arg != oa_config->id);
sysfs_remove_group(oa->metrics_kobj, &oa_config->sysfs_metric);
-
- idr_remove(&oa->metrics_idr, *arg);
+ idr_remove(&oa->metrics_idr, arg);
mutex_unlock(&oa->metrics_lock);
diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
new file mode 100644
index 0000000000000..0f747af59f245
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_perf.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include "xe_oa.h"
+#include "xe_perf.h"
+
+int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
+{
+ struct drm_xe_perf_param *arg = data;
+
+ if (arg->extensions)
+ return -EINVAL;
+
+ switch (arg->perf_type) {
+ case XE_PERF_TYPE_OA:
+ return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
+ default:
+ return -EINVAL;
+ }
+}
+
+int xe_perf_add_config_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
+{
+ struct drm_xe_perf_param *arg = data;
+
+ if (arg->extensions)
+ return -EINVAL;
+
+ switch (arg->perf_type) {
+ case XE_PERF_TYPE_OA:
+ return xe_oa_add_config_ioctl(dev, (void *)arg->param, file);
+ default:
+ return -EINVAL;
+ }
+}
+
+int xe_perf_remove_config_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
+{
+ struct drm_xe_perf_param *arg = data;
+
+ if (arg->extensions)
+ return -EINVAL;
+
+ switch (arg->perf_type) {
+ case XE_PERF_TYPE_OA:
+ return xe_oa_remove_config_ioctl(dev, (void *)arg->param, file);
+ default:
+ return -EINVAL;
+ }
+}
diff --git a/drivers/gpu/drm/xe/xe_perf.h b/drivers/gpu/drm/xe/xe_perf.h
new file mode 100644
index 0000000000000..7ee90491132a0
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_perf.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _XE_PERF_H_
+#define _XE_PERF_H_
+
+#include <drm/xe_drm.h>
+
+struct drm_device;
+struct drm_file;
+
+int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
+int xe_perf_add_config_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
+int xe_perf_remove_config_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
+
+#endif
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 3a64f904858d8..265a52d0162be 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -111,9 +111,9 @@ struct xe_user_extension {
#define DRM_XE_WAIT_USER_FENCE 0x0b
#define DRM_XE_VM_MADVISE 0x0c
#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0d
-#define DRM_XE_OA_OPEN 0x16
-#define DRM_XE_OA_ADD_CONFIG 0x17
-#define DRM_XE_OA_REMOVE_CONFIG 0x18
+#define DRM_XE_PERF_OPEN 0x16
+#define DRM_XE_PERF_ADD_CONFIG 0x17
+#define DRM_XE_PERF_REMOVE_CONFIG 0x18
/* Must be kept compact -- no holes */
#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
@@ -130,9 +130,9 @@ struct xe_user_extension {
#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
-#define DRM_IOCTL_XE_OA_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_OPEN, struct drm_xe_oa_open_param)
-#define DRM_IOCTL_XE_OA_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_ADD_CONFIG, struct drm_xe_oa_config)
-#define DRM_IOCTL_XE_OA_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_REMOVE_CONFIG, __u64)
+#define DRM_IOCTL_XE_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_OPEN, struct drm_xe_perf_param)
+#define DRM_IOCTL_XE_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_ADD_CONFIG, struct drm_xe_perf_param)
+#define DRM_IOCTL_XE_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_REMOVE_CONFIG, struct drm_xe_perf_param)
/**
* enum drm_xe_memory_class - Supported memory classes.
@@ -1100,6 +1100,26 @@ struct drm_xe_vm_madvise {
#define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
+enum drm_xe_perf_type {
+ XE_PERF_TYPE_OA,
+};
+
+/**
+ * struct drm_xe_perf_param - XE perf layer param
+ *
+ * The perf layer enables multiplexing perf counter streams of multiple
+ * types. The actual params for a particular stream operation are supplied
+ * via the @param pointer (use __copy_from_user to get these params).
+ */
+struct drm_xe_perf_param {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+ /** @perf_type: Type, of enum drm_xe_perf_type, of perf stream */
+ __u64 perf_type;
+ /** @param: Pointer to actual stream params */
+ __u64 param;
+};
+
enum drm_xe_oa_format {
XE_OA_FORMAT_C4_B8 = 7,
@@ -1326,21 +1346,19 @@ struct drm_xe_oa_config {
*
* It's undefined whether any pending data for the stream will be lost.
*/
-#define XE_OA_IOCTL_ENABLE _IO('i', 0x0)
+#define XE_PERF_IOCTL_ENABLE _IO('i', 0x0)
/*
- * Disable data capture for a stream.
+ * Disable data capture for a stream
*
* It is an error to try and read a stream that is disabled.
*/
-#define XE_OA_IOCTL_DISABLE _IO('i', 0x1)
+#define XE_PERF_IOCTL_DISABLE _IO('i', 0x1)
/*
- * Change metrics_set captured by a stream.
- *
- * Returns the previously bound metrics set id, or a negative error code.
+ * Change stream configuration
*/
-#define XE_OA_IOCTL_CONFIG _IO('i', 0x2)
+#define XE_PERF_IOCTL_CONFIG _IO('i', 0x2)
#if defined(__cplusplus)
}
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 12/21] drm/xe/uapi: "Perf" layer to support multiple perf counter stream types
2023-09-19 16:10 ` [Intel-xe] [PATCH 12/21] drm/xe/uapi: "Perf" layer to support multiple perf counter stream types Ashutosh Dixit
@ 2023-10-04 2:13 ` Umesh Nerlige Ramappa
2023-10-05 4:33 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-04 2:13 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:40AM -0700, Ashutosh Dixit wrote:
>In XE, the plan is to support multiple types of perf counter streams (OA is
>only one type of these streams). This requires addition of a PERF layer to
>multiplex these different stream types through a single set of PERF
>ioctl's.
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/xe_device.c | 8 +++---
> drivers/gpu/drm/xe/xe_oa.c | 43 +++++++++++++++++-----------
> drivers/gpu/drm/xe/xe_perf.c | 52 ++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_perf.h | 18 ++++++++++++
> include/uapi/drm/xe_drm.h | 44 +++++++++++++++++++---------
> 6 files changed, 133 insertions(+), 33 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_perf.c
> create mode 100644 drivers/gpu/drm/xe/xe_perf.h
>
>diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
>index a40c4827b9c85..294874681cc6c 100644
>--- a/drivers/gpu/drm/xe/Makefile
>+++ b/drivers/gpu/drm/xe/Makefile
>@@ -88,6 +88,7 @@ xe-y += xe_bb.o \
> xe_pat.o \
> xe_pci.o \
> xe_pcode.o \
>+ xe_perf.o \
> xe_pm.o \
> xe_preempt_fence.o \
> xe_pt.o \
>diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>index 7a179c4515633..770b9fe6e65df 100644
>--- a/drivers/gpu/drm/xe/xe_device.c
>+++ b/drivers/gpu/drm/xe/xe_device.c
>@@ -25,8 +25,8 @@
> #include "xe_irq.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
>-#include "xe_oa.h"
> #include "xe_pcode.h"
>+#include "xe_perf.h"
> #include "xe_pm.h"
> #include "xe_query.h"
> #include "xe_tile.h"
>@@ -115,9 +115,9 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
> DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
>
>- DRM_IOCTL_DEF_DRV(XE_OA_OPEN, xe_oa_stream_open_ioctl, DRM_RENDER_ALLOW),
>- DRM_IOCTL_DEF_DRV(XE_OA_ADD_CONFIG, xe_oa_add_config_ioctl, DRM_RENDER_ALLOW),
>- DRM_IOCTL_DEF_DRV(XE_OA_REMOVE_CONFIG, xe_oa_remove_config_ioctl, DRM_RENDER_ALLOW),
>+ DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
>+ DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
>+ DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
>
> };
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 506dd056805b2..63db0969a86b2 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -1173,13 +1173,13 @@ static long xe_oa_ioctl_locked(struct xe_oa_stream *stream,
> unsigned long arg)
> {
> switch (cmd) {
>- case XE_OA_IOCTL_ENABLE:
>+ case XE_PERF_IOCTL_ENABLE:
> xe_oa_enable_locked(stream);
> return 0;
>- case XE_OA_IOCTL_DISABLE:
>+ case XE_PERF_IOCTL_DISABLE:
> xe_oa_disable_locked(stream);
> return 0;
>- case XE_OA_IOCTL_CONFIG:
>+ case XE_PERF_IOCTL_CONFIG:
> return xe_oa_config_locked(stream, arg);
> }
>
>@@ -1692,12 +1692,11 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
> return 0;
> }
>
>-int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
>- struct drm_file *file)
>+int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> {
> struct xe_oa *oa = &to_xe_device(dev)->oa;
>- struct drm_xe_oa_open_param *param = data;
> struct xe_oa_open_properties props = {};
>+ struct drm_xe_oa_open_param param;
> u32 known_open_flags;
> struct xe_gt *gt;
> int ret;
>@@ -1707,14 +1706,18 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
> return -ENODEV;
> }
>
>+ ret = __copy_from_user(¶m, data, sizeof(param));
>+ if (XE_IOCTL_DBG(oa->xe, ret))
>+ return -EFAULT;
>+
> known_open_flags = XE_OA_FLAG_FD_CLOEXEC | XE_OA_FLAG_FD_NONBLOCK | XE_OA_FLAG_DISABLED;
>- if (param->flags & ~known_open_flags) {
>+ if (param.flags & ~known_open_flags) {
> drm_dbg(&oa->xe->drm, "Unknown drm_xe_oa_open_param flag\n");
> return -EINVAL;
> }
>
>- ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param->properties_ptr),
>- param->num_properties,
>+ ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param.properties_ptr),
>+ param.num_properties,
> &props);
> if (ret)
> return ret;
>@@ -1722,7 +1725,7 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
> gt = props.hwe->gt;
>
> mutex_lock(>->oa.lock);
>- ret = xe_oa_stream_open_ioctl_locked(oa, param, &props, file);
>+ ret = xe_oa_stream_open_ioctl_locked(oa, ¶m, &props, file);
> mutex_unlock(>->oa.lock);
>
> return ret;
>@@ -1918,7 +1921,8 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file)
> {
> struct xe_oa *oa = &to_xe_device(dev)->oa;
>- struct drm_xe_oa_config *arg = data;
>+ struct drm_xe_oa_config param;
>+ struct drm_xe_oa_config *arg = ¶m;
> struct xe_oa_config *oa_config, *tmp;
> struct xe_oa_reg *regs;
> int err, id;
>@@ -1933,6 +1937,10 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> return -EACCES;
> }
>
>+ err = __copy_from_user(¶m, data, sizeof(param));
>+ if (XE_IOCTL_DBG(oa->xe, err))
>+ return -EFAULT;
>+
> if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
> (!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
> (!arg->flex_regs_ptr || !arg->n_flex_regs)) {
>@@ -2035,7 +2043,7 @@ int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
> {
> struct xe_oa *oa = &to_xe_device(dev)->oa;
> struct xe_oa_config *oa_config;
>- u64 *arg = data;
>+ u64 arg, *ptr = data;
> int ret;
>
> if (!oa->xe) {
>@@ -2048,22 +2056,25 @@ int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
> return -EACCES;
> }
>
>+ ret = get_user(arg, ptr);
>+ if (XE_IOCTL_DBG(oa->xe, ret))
>+ return ret;
>+
> ret = mutex_lock_interruptible(&oa->metrics_lock);
> if (ret)
> return ret;
>
>- oa_config = idr_find(&oa->metrics_idr, *arg);
>+ oa_config = idr_find(&oa->metrics_idr, arg);
> if (!oa_config) {
> drm_dbg(&oa->xe->drm, "Failed to remove unknown OA config\n");
> ret = -ENOENT;
> goto err_unlock;
> }
>
>- WARN_ON(*arg != oa_config->id);
>+ WARN_ON(arg != oa_config->id);
>
> sysfs_remove_group(oa->metrics_kobj, &oa_config->sysfs_metric);
>-
>- idr_remove(&oa->metrics_idr, *arg);
>+ idr_remove(&oa->metrics_idr, arg);
>
> mutex_unlock(&oa->metrics_lock);
>
>diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
>new file mode 100644
>index 0000000000000..0f747af59f245
>--- /dev/null
>+++ b/drivers/gpu/drm/xe/xe_perf.c
>@@ -0,0 +1,52 @@
>+// SPDX-License-Identifier: MIT
>+/*
>+ * Copyright © 2023 Intel Corporation
>+ */
>+
>+#include "xe_oa.h"
>+#include "xe_perf.h"
>+
>+int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>+{
>+ struct drm_xe_perf_param *arg = data;
>+
>+ if (arg->extensions)
>+ return -EINVAL;
>+
>+ switch (arg->perf_type) {
>+ case XE_PERF_TYPE_OA:
>+ return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
>+ default:
>+ return -EINVAL;
Wondering if a different unique error must be returned to indicate that
a particular perf module is not supported. Other than that, this lgtm,
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Umesh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 12/21] drm/xe/uapi: "Perf" layer to support multiple perf counter stream types
2023-10-04 2:13 ` Umesh Nerlige Ramappa
@ 2023-10-05 4:33 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 4:33 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Tue, 03 Oct 2023 19:13:31 -0700, Umesh Nerlige Ramappa wrote:
>
> On Tue, Sep 19, 2023 at 09:10:40AM -0700, Ashutosh Dixit wrote:
> > In XE, the plan is to support multiple types of perf counter streams (OA is
> > only one type of these streams). This requires addition of a PERF layer to
> > multiplex these different stream types through a single set of PERF
> > ioctl's.
> >
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > ---
> > drivers/gpu/drm/xe/Makefile | 1 +
> > drivers/gpu/drm/xe/xe_device.c | 8 +++---
> > drivers/gpu/drm/xe/xe_oa.c | 43 +++++++++++++++++-----------
> > drivers/gpu/drm/xe/xe_perf.c | 52 ++++++++++++++++++++++++++++++++++
> > drivers/gpu/drm/xe/xe_perf.h | 18 ++++++++++++
> > include/uapi/drm/xe_drm.h | 44 +++++++++++++++++++---------
> > 6 files changed, 133 insertions(+), 33 deletions(-)
> > create mode 100644 drivers/gpu/drm/xe/xe_perf.c
> > create mode 100644 drivers/gpu/drm/xe/xe_perf.h
> >
> > diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> > index a40c4827b9c85..294874681cc6c 100644
> > --- a/drivers/gpu/drm/xe/Makefile
> > +++ b/drivers/gpu/drm/xe/Makefile
> > @@ -88,6 +88,7 @@ xe-y += xe_bb.o \
> > xe_pat.o \
> > xe_pci.o \
> > xe_pcode.o \
> > + xe_perf.o \
> > xe_pm.o \
> > xe_preempt_fence.o \
> > xe_pt.o \
> > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> > index 7a179c4515633..770b9fe6e65df 100644
> > --- a/drivers/gpu/drm/xe/xe_device.c
> > +++ b/drivers/gpu/drm/xe/xe_device.c
> > @@ -25,8 +25,8 @@
> > #include "xe_irq.h"
> > #include "xe_mmio.h"
> > #include "xe_module.h"
> > -#include "xe_oa.h"
> > #include "xe_pcode.h"
> > +#include "xe_perf.h"
> > #include "xe_pm.h"
> > #include "xe_query.h"
> > #include "xe_tile.h"
> > @@ -115,9 +115,9 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
> > DRM_RENDER_ALLOW),
> > DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
> >
> > - DRM_IOCTL_DEF_DRV(XE_OA_OPEN, xe_oa_stream_open_ioctl, DRM_RENDER_ALLOW),
> > - DRM_IOCTL_DEF_DRV(XE_OA_ADD_CONFIG, xe_oa_add_config_ioctl, DRM_RENDER_ALLOW),
> > - DRM_IOCTL_DEF_DRV(XE_OA_REMOVE_CONFIG, xe_oa_remove_config_ioctl, DRM_RENDER_ALLOW),
> > + DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
> > + DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
> > + DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
> >
> > };
> >
> > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> > index 506dd056805b2..63db0969a86b2 100644
> > --- a/drivers/gpu/drm/xe/xe_oa.c
> > +++ b/drivers/gpu/drm/xe/xe_oa.c
> > @@ -1173,13 +1173,13 @@ static long xe_oa_ioctl_locked(struct xe_oa_stream *stream,
> > unsigned long arg)
> > {
> > switch (cmd) {
> > - case XE_OA_IOCTL_ENABLE:
> > + case XE_PERF_IOCTL_ENABLE:
> > xe_oa_enable_locked(stream);
> > return 0;
> > - case XE_OA_IOCTL_DISABLE:
> > + case XE_PERF_IOCTL_DISABLE:
> > xe_oa_disable_locked(stream);
> > return 0;
> > - case XE_OA_IOCTL_CONFIG:
> > + case XE_PERF_IOCTL_CONFIG:
> > return xe_oa_config_locked(stream, arg);
> > }
> >
> > @@ -1692,12 +1692,11 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
> > return 0;
> > }
> >
> > -int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
> > - struct drm_file *file)
> > +int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > {
> > struct xe_oa *oa = &to_xe_device(dev)->oa;
> > - struct drm_xe_oa_open_param *param = data;
> > struct xe_oa_open_properties props = {};
> > + struct drm_xe_oa_open_param param;
> > u32 known_open_flags;
> > struct xe_gt *gt;
> > int ret;
> > @@ -1707,14 +1706,18 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
> > return -ENODEV;
> > }
> >
> > + ret = __copy_from_user(¶m, data, sizeof(param));
> > + if (XE_IOCTL_DBG(oa->xe, ret))
> > + return -EFAULT;
> > +
> > known_open_flags = XE_OA_FLAG_FD_CLOEXEC | XE_OA_FLAG_FD_NONBLOCK | XE_OA_FLAG_DISABLED;
> > - if (param->flags & ~known_open_flags) {
> > + if (param.flags & ~known_open_flags) {
> > drm_dbg(&oa->xe->drm, "Unknown drm_xe_oa_open_param flag\n");
> > return -EINVAL;
> > }
> >
> > - ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param->properties_ptr),
> > - param->num_properties,
> > + ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param.properties_ptr),
> > + param.num_properties,
> > &props);
> > if (ret)
> > return ret;
> > @@ -1722,7 +1725,7 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data,
> > gt = props.hwe->gt;
> >
> > mutex_lock(>->oa.lock);
> > - ret = xe_oa_stream_open_ioctl_locked(oa, param, &props, file);
> > + ret = xe_oa_stream_open_ioctl_locked(oa, ¶m, &props, file);
> > mutex_unlock(>->oa.lock);
> >
> > return ret;
> > @@ -1918,7 +1921,8 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> > struct drm_file *file)
> > {
> > struct xe_oa *oa = &to_xe_device(dev)->oa;
> > - struct drm_xe_oa_config *arg = data;
> > + struct drm_xe_oa_config param;
> > + struct drm_xe_oa_config *arg = ¶m;
> > struct xe_oa_config *oa_config, *tmp;
> > struct xe_oa_reg *regs;
> > int err, id;
> > @@ -1933,6 +1937,10 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> > return -EACCES;
> > }
> >
> > + err = __copy_from_user(¶m, data, sizeof(param));
> > + if (XE_IOCTL_DBG(oa->xe, err))
> > + return -EFAULT;
> > +
> > if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
> > (!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
> > (!arg->flex_regs_ptr || !arg->n_flex_regs)) {
> > @@ -2035,7 +2043,7 @@ int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
> > {
> > struct xe_oa *oa = &to_xe_device(dev)->oa;
> > struct xe_oa_config *oa_config;
> > - u64 *arg = data;
> > + u64 arg, *ptr = data;
> > int ret;
> >
> > if (!oa->xe) {
> > @@ -2048,22 +2056,25 @@ int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
> > return -EACCES;
> > }
> >
> > + ret = get_user(arg, ptr);
> > + if (XE_IOCTL_DBG(oa->xe, ret))
> > + return ret;
> > +
> > ret = mutex_lock_interruptible(&oa->metrics_lock);
> > if (ret)
> > return ret;
> >
> > - oa_config = idr_find(&oa->metrics_idr, *arg);
> > + oa_config = idr_find(&oa->metrics_idr, arg);
> > if (!oa_config) {
> > drm_dbg(&oa->xe->drm, "Failed to remove unknown OA config\n");
> > ret = -ENOENT;
> > goto err_unlock;
> > }
> >
> > - WARN_ON(*arg != oa_config->id);
> > + WARN_ON(arg != oa_config->id);
> >
> > sysfs_remove_group(oa->metrics_kobj, &oa_config->sysfs_metric);
> > -
> > - idr_remove(&oa->metrics_idr, *arg);
> > + idr_remove(&oa->metrics_idr, arg);
> >
> > mutex_unlock(&oa->metrics_lock);
> >
> > diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
> > new file mode 100644
> > index 0000000000000..0f747af59f245
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/xe_perf.c
> > @@ -0,0 +1,52 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright © 2023 Intel Corporation
> > + */
> > +
> > +#include "xe_oa.h"
> > +#include "xe_perf.h"
> > +
> > +int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > +{
> > + struct drm_xe_perf_param *arg = data;
> > +
> > + if (arg->extensions)
> > + return -EINVAL;
> > +
> > + switch (arg->perf_type) {
> > + case XE_PERF_TYPE_OA:
> > + return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
> > + default:
> > + return -EINVAL;
>
> Wondering if a different unique error must be returned to indicate that a
> particular perf module is not supported. Other than that, this lgtm,
Somthing weird like ECONNABORTED? If ops are included here probably
EOPNOSUPP would also work. Probably doesn't matter much. Maybe I will
change to EOPNOSUPP for now.
> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (11 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 12/21] drm/xe/uapi: "Perf" layer to support multiple perf counter stream types Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-04 2:23 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 14/21] drm/xe/uapi: Simplify OA configs in uapi Ashutosh Dixit
` (16 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Since we are already mulitplexing multiple perf counter stream types
through the PERF layer, it seems odd to retain separate ioctls for perf
op's (add/remove config). In fact it seems logical to also multiplex these
ops through a single PERF ioctl. This also affords greater flexibility to
add stream specific ops if needed for different perf stream types.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 5 +----
drivers/gpu/drm/xe/xe_perf.c | 32 ++++++++------------------------
drivers/gpu/drm/xe/xe_perf.h | 4 +---
include/uapi/drm/xe_drm.h | 16 ++++++++++------
4 files changed, 20 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 770b9fe6e65df..24018a0801788 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -115,10 +115,7 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
-
+ DRM_IOCTL_DEF_DRV(XE_PERF, xe_perf_ioctl, DRM_RENDER_ALLOW),
};
static const struct file_operations xe_driver_fops = {
diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
index 0f747af59f245..f8d7eae8fffe0 100644
--- a/drivers/gpu/drm/xe/xe_perf.c
+++ b/drivers/gpu/drm/xe/xe_perf.c
@@ -6,37 +6,21 @@
#include "xe_oa.h"
#include "xe_perf.h"
-int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
+int xe_oa_ioctl(struct drm_device *dev, struct drm_xe_perf_param *arg, struct drm_file *file)
{
- struct drm_xe_perf_param *arg = data;
-
- if (arg->extensions)
- return -EINVAL;
-
- switch (arg->perf_type) {
- case XE_PERF_TYPE_OA:
+ switch (arg->perf_op) {
+ case XE_PERF_STREAM_OPEN:
return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
- default:
- return -EINVAL;
- }
-}
-
-int xe_perf_add_config_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
-{
- struct drm_xe_perf_param *arg = data;
-
- if (arg->extensions)
- return -EINVAL;
-
- switch (arg->perf_type) {
- case XE_PERF_TYPE_OA:
+ case XE_PERF_ADD_CONFIG:
return xe_oa_add_config_ioctl(dev, (void *)arg->param, file);
+ case XE_PERF_REMOVE_CONFIG:
+ return xe_oa_remove_config_ioctl(dev, (void *)arg->param, file);
default:
return -EINVAL;
}
}
-int xe_perf_remove_config_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
+int xe_perf_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
{
struct drm_xe_perf_param *arg = data;
@@ -45,7 +29,7 @@ int xe_perf_remove_config_ioctl(struct drm_device *dev, void *data, struct drm_f
switch (arg->perf_type) {
case XE_PERF_TYPE_OA:
- return xe_oa_remove_config_ioctl(dev, (void *)arg->param, file);
+ return xe_oa_ioctl(dev, arg, file);
default:
return -EINVAL;
}
diff --git a/drivers/gpu/drm/xe/xe_perf.h b/drivers/gpu/drm/xe/xe_perf.h
index 7ee90491132a0..254cc7cf49fef 100644
--- a/drivers/gpu/drm/xe/xe_perf.h
+++ b/drivers/gpu/drm/xe/xe_perf.h
@@ -11,8 +11,6 @@
struct drm_device;
struct drm_file;
-int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
-int xe_perf_add_config_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
-int xe_perf_remove_config_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
+int xe_perf_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
#endif
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 265a52d0162be..bf0af9474e7ee 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -111,9 +111,7 @@ struct xe_user_extension {
#define DRM_XE_WAIT_USER_FENCE 0x0b
#define DRM_XE_VM_MADVISE 0x0c
#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0d
-#define DRM_XE_PERF_OPEN 0x16
-#define DRM_XE_PERF_ADD_CONFIG 0x17
-#define DRM_XE_PERF_REMOVE_CONFIG 0x18
+#define DRM_XE_PERF 0x16
/* Must be kept compact -- no holes */
#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
@@ -130,9 +128,7 @@ struct xe_user_extension {
#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
-#define DRM_IOCTL_XE_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_OPEN, struct drm_xe_perf_param)
-#define DRM_IOCTL_XE_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_ADD_CONFIG, struct drm_xe_perf_param)
-#define DRM_IOCTL_XE_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_REMOVE_CONFIG, struct drm_xe_perf_param)
+#define DRM_IOCTL_XE_PERF DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF, struct drm_xe_perf_param)
/**
* enum drm_xe_memory_class - Supported memory classes.
@@ -1104,6 +1100,12 @@ enum drm_xe_perf_type {
XE_PERF_TYPE_OA,
};
+enum drm_xe_perf_op {
+ XE_PERF_STREAM_OPEN,
+ XE_PERF_ADD_CONFIG,
+ XE_PERF_REMOVE_CONFIG,
+};
+
/**
* struct drm_xe_perf_param - XE perf layer param
*
@@ -1116,6 +1118,8 @@ struct drm_xe_perf_param {
__u64 extensions;
/** @perf_type: Type, of enum drm_xe_perf_type, of perf stream */
__u64 perf_type;
+ /** @perf_op: Perf op, of enum drm_xe_perf_op */
+ __u64 perf_op;
/** @param: Pointer to actual stream params */
__u64 param;
};
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
2023-09-19 16:10 ` [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl Ashutosh Dixit
@ 2023-10-04 2:23 ` Umesh Nerlige Ramappa
2023-10-05 5:27 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-04 2:23 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:41AM -0700, Ashutosh Dixit wrote:
>Since we are already mulitplexing multiple perf counter stream types
>through the PERF layer, it seems odd to retain separate ioctls for perf
>op's (add/remove config). In fact it seems logical to also multiplex these
>ops through a single PERF ioctl. This also affords greater flexibility to
>add stream specific ops if needed for different perf stream types.
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>---
> drivers/gpu/drm/xe/xe_device.c | 5 +----
> drivers/gpu/drm/xe/xe_perf.c | 32 ++++++++------------------------
> drivers/gpu/drm/xe/xe_perf.h | 4 +---
> include/uapi/drm/xe_drm.h | 16 ++++++++++------
> 4 files changed, 20 insertions(+), 37 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>index 770b9fe6e65df..24018a0801788 100644
>--- a/drivers/gpu/drm/xe/xe_device.c
>+++ b/drivers/gpu/drm/xe/xe_device.c
>@@ -115,10 +115,7 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
> DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
>
>- DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
>- DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
>- DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
>-
>+ DRM_IOCTL_DEF_DRV(XE_PERF, xe_perf_ioctl, DRM_RENDER_ALLOW),
> };
>
> static const struct file_operations xe_driver_fops = {
>diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
>index 0f747af59f245..f8d7eae8fffe0 100644
>--- a/drivers/gpu/drm/xe/xe_perf.c
>+++ b/drivers/gpu/drm/xe/xe_perf.c
>@@ -6,37 +6,21 @@
> #include "xe_oa.h"
> #include "xe_perf.h"
>
>-int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>+int xe_oa_ioctl(struct drm_device *dev, struct drm_xe_perf_param *arg, struct drm_file *file)
> {
>- struct drm_xe_perf_param *arg = data;
>-
>- if (arg->extensions)
>- return -EINVAL;
>-
>- switch (arg->perf_type) {
>- case XE_PERF_TYPE_OA:
>+ switch (arg->perf_op) {
>+ case XE_PERF_STREAM_OPEN:
> return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
It's a nice idea to reduce the ioctls, but if your struct
drm_xe_perf_param *arg is overloaded based on the PERF_OP passed, then I
would recommend validating that the right arg is passed for the
corresponding OP. Ideally I wouldn't go that route since that would
require some sort of signature in the arg which would identify it as the
correct param. Instead I would be okay with retaining separate ioctls
for the 3 operations.
Umesh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
2023-10-04 2:23 ` Umesh Nerlige Ramappa
@ 2023-10-05 5:27 ` Dixit, Ashutosh
2023-10-05 15:22 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 5:27 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Tue, 03 Oct 2023 19:23:24 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh,
> On Tue, Sep 19, 2023 at 09:10:41AM -0700, Ashutosh Dixit wrote:
> > Since we are already mulitplexing multiple perf counter stream types
> > through the PERF layer, it seems odd to retain separate ioctls for perf
> > op's (add/remove config). In fact it seems logical to also multiplex these
> > ops through a single PERF ioctl. This also affords greater flexibility to
> > add stream specific ops if needed for different perf stream types.
> >
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_device.c | 5 +----
> > drivers/gpu/drm/xe/xe_perf.c | 32 ++++++++------------------------
> > drivers/gpu/drm/xe/xe_perf.h | 4 +---
> > include/uapi/drm/xe_drm.h | 16 ++++++++++------
> > 4 files changed, 20 insertions(+), 37 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> > index 770b9fe6e65df..24018a0801788 100644
> > --- a/drivers/gpu/drm/xe/xe_device.c
> > +++ b/drivers/gpu/drm/xe/xe_device.c
> > @@ -115,10 +115,7 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
> > DRM_RENDER_ALLOW),
> > DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
> >
> > - DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
> > - DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
> > - DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
> > -
> > + DRM_IOCTL_DEF_DRV(XE_PERF, xe_perf_ioctl, DRM_RENDER_ALLOW),
> > };
> >
> > static const struct file_operations xe_driver_fops = {
> > diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
> > index 0f747af59f245..f8d7eae8fffe0 100644
> > --- a/drivers/gpu/drm/xe/xe_perf.c
> > +++ b/drivers/gpu/drm/xe/xe_perf.c
> > @@ -6,37 +6,21 @@
> > #include "xe_oa.h"
> > #include "xe_perf.h"
> >
> > -int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > +int xe_oa_ioctl(struct drm_device *dev, struct drm_xe_perf_param *arg, struct drm_file *file)
> > {
> > - struct drm_xe_perf_param *arg = data;
> > -
> > - if (arg->extensions)
> > - return -EINVAL;
> > -
> > - switch (arg->perf_type) {
> > - case XE_PERF_TYPE_OA:
> > + switch (arg->perf_op) {
> > + case XE_PERF_STREAM_OPEN:
> > return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
>
> It's a nice idea to reduce the ioctls, but if your struct drm_xe_perf_param
> *arg is overloaded based on the PERF_OP passed, then I would recommend
> validating that the right arg is passed for the corresponding OP.
I am not following what you mean here: which right arg for which OP?
The PERF layer only demultiplexes based on perf_type (say OA/XYZ etc.). The
perf_op belongs to the perf_type layer (say OA), not the PERF layer. It is
the job of the perf_type layer (OA) to validate the perf_op, not the job of
the PERF layer. It is just convenient to include the perf_op as part of
'struct drm_xe_perf_param' (rather than inventing yet another layer there).
See the function xe_perf_ioctl() in the patch.
The xe_oa_ioctl function above could possibly be moved into xe_oa.c. I just
left it in xe_perf.c since it didn't seem to matter much. But I am open to
doing that.
> Ideally I wouldn't go that route since that would require some sort of
> signature in the arg which would identify it as the correct
> param. Instead I would be okay with retaining separate ioctls for the 3
> operations.
If we were not doing this multiplexing based on perf_type (as in i915) we
could have separate ioctl's for each operation. But since here we have
anyway introduced a multiplxing layer, to me it makes no sense to have
separate operation ioctl's (only disadvantags and no advantages). (Note
that the multiplexing layer implies a (non-obvious) additional
copy_from_user per operation visible in the previous "drm/xe/uapi: "Perf"
layer to support multiple perf counter stream types" patch).
Also we cannot assume that a future stream type will only have 3 operations
as i915 OA did. The OPEN/ADD_CONFIG/CLOSE are really OA specific
operations. But it appears other potential perf_type's will also be able to
use them, at least initially that is why they are left defined as PERF_OP's
(rather than OA_OP's) in xe_drm.h. New stream types are free to introduce
new ops in this design.
So retaining the ops inside a single PERF ioctl eliminates the need for
introducing a new ioctl each time a stream type introduces a new OP.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
2023-10-05 5:27 ` Dixit, Ashutosh
@ 2023-10-05 15:22 ` Dixit, Ashutosh
2023-10-05 18:27 ` Umesh Nerlige Ramappa
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 15:22 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Wed, 04 Oct 2023 22:27:14 -0700, Dixit, Ashutosh wrote:
>
> On Tue, 03 Oct 2023 19:23:24 -0700, Umesh Nerlige Ramappa wrote:
> >
>
> Hi Umesh,
>
> > On Tue, Sep 19, 2023 at 09:10:41AM -0700, Ashutosh Dixit wrote:
> > > Since we are already mulitplexing multiple perf counter stream types
> > > through the PERF layer, it seems odd to retain separate ioctls for perf
> > > op's (add/remove config). In fact it seems logical to also multiplex these
> > > ops through a single PERF ioctl. This also affords greater flexibility to
> > > add stream specific ops if needed for different perf stream types.
> > >
> > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_device.c | 5 +----
> > > drivers/gpu/drm/xe/xe_perf.c | 32 ++++++++------------------------
> > > drivers/gpu/drm/xe/xe_perf.h | 4 +---
> > > include/uapi/drm/xe_drm.h | 16 ++++++++++------
> > > 4 files changed, 20 insertions(+), 37 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> > > index 770b9fe6e65df..24018a0801788 100644
> > > --- a/drivers/gpu/drm/xe/xe_device.c
> > > +++ b/drivers/gpu/drm/xe/xe_device.c
> > > @@ -115,10 +115,7 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
> > > DRM_RENDER_ALLOW),
> > > DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
> > >
> > > - DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
> > > - DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
> > > - DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
> > > -
> > > + DRM_IOCTL_DEF_DRV(XE_PERF, xe_perf_ioctl, DRM_RENDER_ALLOW),
> > > };
> > >
> > > static const struct file_operations xe_driver_fops = {
> > > diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
> > > index 0f747af59f245..f8d7eae8fffe0 100644
> > > --- a/drivers/gpu/drm/xe/xe_perf.c
> > > +++ b/drivers/gpu/drm/xe/xe_perf.c
> > > @@ -6,37 +6,21 @@
> > > #include "xe_oa.h"
> > > #include "xe_perf.h"
> > >
> > > -int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > > +int xe_oa_ioctl(struct drm_device *dev, struct drm_xe_perf_param *arg, struct drm_file *file)
> > > {
> > > - struct drm_xe_perf_param *arg = data;
> > > -
> > > - if (arg->extensions)
> > > - return -EINVAL;
> > > -
> > > - switch (arg->perf_type) {
> > > - case XE_PERF_TYPE_OA:
> > > + switch (arg->perf_op) {
> > > + case XE_PERF_STREAM_OPEN:
> > > return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
> >
> > It's a nice idea to reduce the ioctls, but if your struct drm_xe_perf_param
> > *arg is overloaded based on the PERF_OP passed, then I would recommend
> > validating that the right arg is passed for the corresponding OP.
>
> I am not following what you mean here: which right arg for which OP?
>
> The PERF layer only demultiplexes based on perf_type (say OA/XYZ etc.). The
> perf_op belongs to the perf_type layer (say OA), not the PERF layer. It is
> the job of the perf_type layer (OA) to validate the perf_op, not the job of
> the PERF layer. It is just convenient to include the perf_op as part of
> 'struct drm_xe_perf_param' (rather than inventing yet another layer there).
> See the function xe_perf_ioctl() in the patch.
>
> The xe_oa_ioctl function above could possibly be moved into xe_oa.c. I just
> left it in xe_perf.c since it didn't seem to matter much. But I am open to
> doing that.
OK, I think I figured out the right way to visualize this. It's as
follows. Let's say we have a an OA stream inside the PERF layer. So what we
have is:
struct drm_xe_perf_param {
perf_type;
struct oa {
oa_op;
struct oa_op_params {
...
}
}
}
So basically I have eliminated 'struct oa' and merged into 'struct
drm_xe_perf_param'. But oa_op still belongs to the OA layer, not the PERF
layer. So the oa layer handles the oa_op not the PERF layer.
> > Ideally I wouldn't go that route since that would require some sort of
> > signature in the arg which would identify it as the correct
> > param. Instead I would be okay with retaining separate ioctls for the 3
> > operations.
>
> If we were not doing this multiplexing based on perf_type (as in i915) we
> could have separate ioctl's for each operation. But since here we have
> anyway introduced a multiplxing layer, to me it makes no sense to have
> separate operation ioctl's (only disadvantags and no advantages). (Note
> that the multiplexing layer implies a (non-obvious) additional
> copy_from_user per operation visible in the previous "drm/xe/uapi: "Perf"
> layer to support multiple perf counter stream types" patch).
The drm layer does a copy_from_user for the first layer but any second
layer structs need to be copy_from_user'd by the driver.
>
> Also we cannot assume that a future stream type will only have 3 operations
> as i915 OA did. The OPEN/ADD_CONFIG/CLOSE are really OA specific
> operations. But it appears other potential perf_type's will also be able to
> use them, at least initially that is why they are left defined as PERF_OP's
> (rather than OA_OP's) in xe_drm.h. New stream types are free to introduce
> new ops in this design.
>
> So retaining the ops inside a single PERF ioctl eliminates the need for
> introducing a new ioctl each time a stream type introduces a new OP.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
2023-10-05 15:22 ` Dixit, Ashutosh
@ 2023-10-05 18:27 ` Umesh Nerlige Ramappa
2023-10-05 23:18 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-05 18:27 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
On Thu, Oct 05, 2023 at 08:22:30AM -0700, Dixit, Ashutosh wrote:
>On Wed, 04 Oct 2023 22:27:14 -0700, Dixit, Ashutosh wrote:
>>
>> On Tue, 03 Oct 2023 19:23:24 -0700, Umesh Nerlige Ramappa wrote:
>> >
>>
>> Hi Umesh,
>>
>> > On Tue, Sep 19, 2023 at 09:10:41AM -0700, Ashutosh Dixit wrote:
>> > > Since we are already mulitplexing multiple perf counter stream types
>> > > through the PERF layer, it seems odd to retain separate ioctls for perf
>> > > op's (add/remove config). In fact it seems logical to also multiplex these
>> > > ops through a single PERF ioctl. This also affords greater flexibility to
>> > > add stream specific ops if needed for different perf stream types.
>> > >
>> > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>> > > ---
>> > > drivers/gpu/drm/xe/xe_device.c | 5 +----
>> > > drivers/gpu/drm/xe/xe_perf.c | 32 ++++++++------------------------
>> > > drivers/gpu/drm/xe/xe_perf.h | 4 +---
>> > > include/uapi/drm/xe_drm.h | 16 ++++++++++------
>> > > 4 files changed, 20 insertions(+), 37 deletions(-)
>> > >
>> > > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>> > > index 770b9fe6e65df..24018a0801788 100644
>> > > --- a/drivers/gpu/drm/xe/xe_device.c
>> > > +++ b/drivers/gpu/drm/xe/xe_device.c
>> > > @@ -115,10 +115,7 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
>> > > DRM_RENDER_ALLOW),
>> > > DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
>> > >
>> > > - DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
>> > > - DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
>> > > - DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
>> > > -
>> > > + DRM_IOCTL_DEF_DRV(XE_PERF, xe_perf_ioctl, DRM_RENDER_ALLOW),
>> > > };
>> > >
>> > > static const struct file_operations xe_driver_fops = {
>> > > diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
>> > > index 0f747af59f245..f8d7eae8fffe0 100644
>> > > --- a/drivers/gpu/drm/xe/xe_perf.c
>> > > +++ b/drivers/gpu/drm/xe/xe_perf.c
>> > > @@ -6,37 +6,21 @@
>> > > #include "xe_oa.h"
>> > > #include "xe_perf.h"
>> > >
>> > > -int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>> > > +int xe_oa_ioctl(struct drm_device *dev, struct drm_xe_perf_param *arg, struct drm_file *file)
>> > > {
>> > > - struct drm_xe_perf_param *arg = data;
>> > > -
>> > > - if (arg->extensions)
>> > > - return -EINVAL;
>> > > -
>> > > - switch (arg->perf_type) {
>> > > - case XE_PERF_TYPE_OA:
>> > > + switch (arg->perf_op) {
>> > > + case XE_PERF_STREAM_OPEN:
>> > > return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
>> >
>> > It's a nice idea to reduce the ioctls, but if your struct drm_xe_perf_param
>> > *arg is overloaded based on the PERF_OP passed, then I would recommend
>> > validating that the right arg is passed for the corresponding OP.
>>
>> I am not following what you mean here: which right arg for which OP?
>>
>> The PERF layer only demultiplexes based on perf_type (say OA/XYZ etc.). The
>> perf_op belongs to the perf_type layer (say OA), not the PERF layer. It is
>> the job of the perf_type layer (OA) to validate the perf_op, not the job of
>> the PERF layer. It is just convenient to include the perf_op as part of
>> 'struct drm_xe_perf_param' (rather than inventing yet another layer there).
>> See the function xe_perf_ioctl() in the patch.
>>
>> The xe_oa_ioctl function above could possibly be moved into xe_oa.c. I just
>> left it in xe_perf.c since it didn't seem to matter much. But I am open to
>> doing that.
>
>OK, I think I figured out the right way to visualize this. It's as
>follows. Let's say we have a an OA stream inside the PERF layer. So what we
>have is:
>
>struct drm_xe_perf_param {
> perf_type;
>
> struct oa {
> oa_op;
>
> struct oa_op_params {
> ...
> }
> }
>}
>
>So basically I have eliminated 'struct oa' and merged into 'struct
>drm_xe_perf_param'. But oa_op still belongs to the OA layer, not the PERF
>layer. So the oa layer handles the oa_op not the PERF layer.
>
>> > Ideally I wouldn't go that route since that would require some sort of
>> > signature in the arg which would identify it as the correct
>> > param. Instead I would be okay with retaining separate ioctls for the 3
>> > operations.
>>
>> If we were not doing this multiplexing based on perf_type (as in i915) we
>> could have separate ioctl's for each operation. But since here we have
>> anyway introduced a multiplxing layer, to me it makes no sense to have
>> separate operation ioctl's (only disadvantags and no advantages). (Note
>> that the multiplexing layer implies a (non-obvious) additional
>> copy_from_user per operation visible in the previous "drm/xe/uapi: "Perf"
>> layer to support multiple perf counter stream types" patch).
>
>The drm layer does a copy_from_user for the first layer but any second
>layer structs need to be copy_from_user'd by the driver.
>
>>
>> Also we cannot assume that a future stream type will only have 3 operations
>> as i915 OA did. The OPEN/ADD_CONFIG/CLOSE are really OA specific
>> operations. But it appears other potential perf_type's will also be able to
>> use them, at least initially that is why they are left defined as PERF_OP's
>> (rather than OA_OP's) in xe_drm.h. New stream types are free to introduce
>> new ops in this design.
>>
>> So retaining the ops inside a single PERF ioctl eliminates the need for
>> introducing a new ioctl each time a stream type introduces a new OP.
I think I misunderstood. This is fine as long as the underlying layer is
able to validate the arguments.
Thanks,
Umesh
>
>Thanks.
>--
>Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
2023-10-05 18:27 ` Umesh Nerlige Ramappa
@ 2023-10-05 23:18 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 23:18 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Thu, 05 Oct 2023 11:27:08 -0700, Umesh Nerlige Ramappa wrote:
>
> On Thu, Oct 05, 2023 at 08:22:30AM -0700, Dixit, Ashutosh wrote:
> > On Wed, 04 Oct 2023 22:27:14 -0700, Dixit, Ashutosh wrote:
> >>
> >> On Tue, 03 Oct 2023 19:23:24 -0700, Umesh Nerlige Ramappa wrote:
> >> >
> >> > On Tue, Sep 19, 2023 at 09:10:41AM -0700, Ashutosh Dixit wrote:
> >> > > Since we are already mulitplexing multiple perf counter stream types
> >> > > through the PERF layer, it seems odd to retain separate ioctls for perf
> >> > > op's (add/remove config). In fact it seems logical to also multiplex these
> >> > > ops through a single PERF ioctl. This also affords greater flexibility to
> >> > > add stream specific ops if needed for different perf stream types.
> >> > >
> >> > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> >> > > ---
> >> > > drivers/gpu/drm/xe/xe_device.c | 5 +----
> >> > > drivers/gpu/drm/xe/xe_perf.c | 32 ++++++++------------------------
> >> > > drivers/gpu/drm/xe/xe_perf.h | 4 +---
> >> > > include/uapi/drm/xe_drm.h | 16 ++++++++++------
> >> > > 4 files changed, 20 insertions(+), 37 deletions(-)
> >> > >
> >> > > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> >> > > index 770b9fe6e65df..24018a0801788 100644
> >> > > --- a/drivers/gpu/drm/xe/xe_device.c
> >> > > +++ b/drivers/gpu/drm/xe/xe_device.c
> >> > > @@ -115,10 +115,7 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
> >> > > DRM_RENDER_ALLOW),
> >> > > DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
> >> > >
> >> > > - DRM_IOCTL_DEF_DRV(XE_PERF_OPEN, xe_perf_open_ioctl, DRM_RENDER_ALLOW),
> >> > > - DRM_IOCTL_DEF_DRV(XE_PERF_ADD_CONFIG, xe_perf_add_config_ioctl, DRM_RENDER_ALLOW),
> >> > > - DRM_IOCTL_DEF_DRV(XE_PERF_REMOVE_CONFIG, xe_perf_remove_config_ioctl, DRM_RENDER_ALLOW),
> >> > > -
> >> > > + DRM_IOCTL_DEF_DRV(XE_PERF, xe_perf_ioctl, DRM_RENDER_ALLOW),
> >> > > };
> >> > >
> >> > > static const struct file_operations xe_driver_fops = {
> >> > > diff --git a/drivers/gpu/drm/xe/xe_perf.c b/drivers/gpu/drm/xe/xe_perf.c
> >> > > index 0f747af59f245..f8d7eae8fffe0 100644
> >> > > --- a/drivers/gpu/drm/xe/xe_perf.c
> >> > > +++ b/drivers/gpu/drm/xe/xe_perf.c
> >> > > @@ -6,37 +6,21 @@
> >> > > #include "xe_oa.h"
> >> > > #include "xe_perf.h"
> >> > >
> >> > > -int xe_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> >> > > +int xe_oa_ioctl(struct drm_device *dev, struct drm_xe_perf_param *arg, struct drm_file *file)
> >> > > {
> >> > > - struct drm_xe_perf_param *arg = data;
> >> > > -
> >> > > - if (arg->extensions)
> >> > > - return -EINVAL;
> >> > > -
> >> > > - switch (arg->perf_type) {
> >> > > - case XE_PERF_TYPE_OA:
> >> > > + switch (arg->perf_op) {
> >> > > + case XE_PERF_STREAM_OPEN:
> >> > > return xe_oa_stream_open_ioctl(dev, (void *)arg->param, file);
> >> >
> >> > It's a nice idea to reduce the ioctls, but if your struct drm_xe_perf_param
> >> > *arg is overloaded based on the PERF_OP passed, then I would recommend
> >> > validating that the right arg is passed for the corresponding OP.
> >>
> >> I am not following what you mean here: which right arg for which OP?
> >>
> >> The PERF layer only demultiplexes based on perf_type (say OA/XYZ etc.). The
> >> perf_op belongs to the perf_type layer (say OA), not the PERF layer. It is
> >> the job of the perf_type layer (OA) to validate the perf_op, not the job of
> >> the PERF layer. It is just convenient to include the perf_op as part of
> >> 'struct drm_xe_perf_param' (rather than inventing yet another layer there).
> >> See the function xe_perf_ioctl() in the patch.
> >>
> >> The xe_oa_ioctl function above could possibly be moved into xe_oa.c. I just
> >> left it in xe_perf.c since it didn't seem to matter much. But I am open to
> >> doing that.
> >
> > OK, I think I figured out the right way to visualize this. It's as
> > follows. Let's say we have a an OA stream inside the PERF layer. So what we
> > have is:
> >
> > struct drm_xe_perf_param {
> > perf_type;
> >
> > struct oa {
> > oa_op;
> >
> > struct oa_op_params {
> > ...
> > }
> > }
> > }
> >
> > So basically I have eliminated 'struct oa' and merged into 'struct
> > drm_xe_perf_param'. But oa_op still belongs to the OA layer, not the PERF
> > layer. So the oa layer handles the oa_op not the PERF layer.
Umesh brought up an excellent point. When UMD and KMD versions are not the
same and struct sizes change, UMD and KMD have different values for 'struct
oa_op_params' above. To handle this situation, we will add a 'size' field
to 'struct oa' above (in reality to 'struct drm_xe_perf_param'). UMD can
fill in this field to indicate its notion of the 'struct oa_op_params'
size.
This should enable the kernel to take handle the discrepancy in the param
size between userspace and kernel (if needed, possibly in the future). It
may also be possible to move the additional copy_from_user into the perf
layer, similar to what drm_ioctl() does. But we will start by adding 'size'
to the header.
> >> > Ideally I wouldn't go that route since that would require some sort of
> >> > signature in the arg which would identify it as the correct
> >> > param. Instead I would be okay with retaining separate ioctls for the 3
> >> > operations.
> >>
> >> If we were not doing this multiplexing based on perf_type (as in i915) we
> >> could have separate ioctl's for each operation. But since here we have
> >> anyway introduced a multiplxing layer, to me it makes no sense to have
> >> separate operation ioctl's (only disadvantags and no advantages). (Note
> >> that the multiplexing layer implies a (non-obvious) additional
> >> copy_from_user per operation visible in the previous "drm/xe/uapi: "Perf"
> >> layer to support multiple perf counter stream types" patch).
> >
> > The drm layer does a copy_from_user for the first layer but any second
> > layer structs need to be copy_from_user'd by the driver.
> >
> >>
> >> Also we cannot assume that a future stream type will only have 3 operations
> >> as i915 OA did. The OPEN/ADD_CONFIG/CLOSE are really OA specific
> >> operations. But it appears other potential perf_type's will also be able to
> >> use them, at least initially that is why they are left defined as PERF_OP's
> >> (rather than OA_OP's) in xe_drm.h. New stream types are free to introduce
> >> new ops in this design.
> >>
> >> So retaining the ops inside a single PERF ioctl eliminates the need for
> >> introducing a new ioctl each time a stream type introduces a new OP.
>
> I think I misunderstood. This is fine as long as the underlying layer is
> able to validate the arguments.
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 14/21] drm/xe/uapi: Simplify OA configs in uapi
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (12 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 13/21] drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-04 2:26 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 15/21] drm/xe/uapi: Remove OA format names from OA uapi Ashutosh Dixit
` (15 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
In OA uapi, there is no reason to have separate mux/boolean/flex registers
in 'struct drm_xe_oa_config'. The kernel knows ranges of these registers
and can determine which are which when needed without these being provided
through the uapi. Therefore combine the three register arrays into a single
one in the uapi.
Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 60 +++++++++-----------------------
drivers/gpu/drm/xe/xe_oa_types.h | 8 ++---
include/uapi/drm/xe_drm.h | 48 +++++--------------------
3 files changed, 27 insertions(+), 89 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 63db0969a86b2..19ad23b90e6ad 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -88,9 +88,7 @@ static void xe_oa_config_release(struct kref *ref)
struct xe_oa_config *oa_config =
container_of(ref, typeof(*oa_config), ref);
- kfree(oa_config->flex_regs);
- kfree(oa_config->b_counter_regs);
- kfree(oa_config->mux_regs);
+ kfree(oa_config->regs);
kfree_rcu(oa_config, rcu);
}
@@ -970,16 +968,14 @@ static struct xe_oa_config_bo *
__xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa_config)
{
struct xe_oa_config_bo *oa_bo;
- size_t config_length = 0;
+ size_t config_length;
struct xe_bb *bb;
oa_bo = kzalloc(sizeof(*oa_bo), GFP_KERNEL);
if (!oa_bo)
return ERR_PTR(-ENOMEM);
- config_length += num_lri_dwords(oa_config->mux_regs_len);
- config_length += num_lri_dwords(oa_config->b_counter_regs_len);
- config_length += num_lri_dwords(oa_config->flex_regs_len);
+ config_length = num_lri_dwords(oa_config->regs_len);
config_length++; /* MI_BATCH_BUFFER_END */
config_length = ALIGN(sizeof(u32) * config_length, XE_PAGE_SIZE) / sizeof(u32);
@@ -987,9 +983,7 @@ __xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa
if (IS_ERR(bb))
goto err_free;
- write_cs_mi_lri(bb, oa_config->mux_regs, oa_config->mux_regs_len);
- write_cs_mi_lri(bb, oa_config->b_counter_regs, oa_config->b_counter_regs_len);
- write_cs_mi_lri(bb, oa_config->flex_regs, oa_config->flex_regs_len);
+ write_cs_mi_lri(bb, oa_config->regs, oa_config->regs_len);
oa_bo->bb = bb;
oa_bo->oa_config = xe_oa_config_get(oa_config);
@@ -1825,6 +1819,13 @@ static bool xe_oa_is_valid_mux_addr(struct xe_oa *oa, u32 addr)
return xe_oa_reg_in_range_table(addr, gen12_oa_mux_regs);
}
+static bool xe_oa_is_valid_config_reg_addr(struct xe_oa *oa, u32 addr)
+{
+ return xe_oa_is_valid_flex_addr(oa, addr) ||
+ xe_oa_is_valid_b_counter_addr(oa, addr) ||
+ xe_oa_is_valid_mux_addr(oa, addr);
+}
+
static u32 mask_reg_value(u32 reg, u32 val)
{
/*
@@ -1852,9 +1853,6 @@ xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr),
int err;
u32 i;
- if (!n_regs || WARN_ON(!is_valid))
- return NULL;
-
oa_regs = kmalloc_array(n_regs, sizeof(*oa_regs), GFP_KERNEL);
if (!oa_regs)
return ERR_PTR(-ENOMEM);
@@ -1941,9 +1939,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(oa->xe, err))
return -EFAULT;
- if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
- (!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
- (!arg->flex_regs_ptr || !arg->n_flex_regs)) {
+ if (!arg->regs_ptr || !arg->n_regs) {
drm_dbg(&oa->xe->drm, "No OA registers given\n");
return -EINVAL;
}
@@ -1964,38 +1960,16 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
/* Last character in oa_config->uuid will be 0 because oa_config is kzalloc */
memcpy(oa_config->uuid, arg->uuid, sizeof(arg->uuid));
- oa_config->mux_regs_len = arg->n_mux_regs;
- regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_mux_addr,
- u64_to_user_ptr(arg->mux_regs_ptr),
- arg->n_mux_regs);
+ oa_config->regs_len = arg->n_regs;
+ regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_config_reg_addr,
+ u64_to_user_ptr(arg->regs_ptr),
+ arg->n_regs);
if (IS_ERR(regs)) {
drm_dbg(&oa->xe->drm, "Failed to create OA config for mux_regs\n");
err = PTR_ERR(regs);
goto reg_err;
}
- oa_config->mux_regs = regs;
-
- oa_config->b_counter_regs_len = arg->n_boolean_regs;
- regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_b_counter_addr,
- u64_to_user_ptr(arg->boolean_regs_ptr),
- arg->n_boolean_regs);
- if (IS_ERR(regs)) {
- drm_dbg(&oa->xe->drm, "Failed to create OA config for b_counter_regs\n");
- err = PTR_ERR(regs);
- goto reg_err;
- }
- oa_config->b_counter_regs = regs;
-
- oa_config->flex_regs_len = arg->n_flex_regs;
- regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_flex_addr,
- u64_to_user_ptr(arg->flex_regs_ptr),
- arg->n_flex_regs);
- if (IS_ERR(regs)) {
- drm_dbg(&oa->xe->drm, "Failed to create OA config for flex_regs\n");
- err = PTR_ERR(regs);
- goto reg_err;
- }
- oa_config->flex_regs = regs;
+ oa_config->regs = regs;
err = mutex_lock_interruptible(&oa->metrics_lock);
if (err)
diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index 126692718c888..ac8b23695cc6e 100644
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -52,12 +52,8 @@ struct xe_oa_config {
char uuid[UUID_STRING_LEN + 1];
int id;
- const struct xe_oa_reg *mux_regs;
- u32 mux_regs_len;
- const struct xe_oa_reg *b_counter_regs;
- u32 b_counter_regs_len;
- const struct xe_oa_reg *flex_regs;
- u32 flex_regs_len;
+ const struct xe_oa_reg *regs;
+ u32 regs_len;
struct attribute_group sysfs_metric;
struct attribute *attrs[2];
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index bf0af9474e7ee..fe873dc63fc5a 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1292,52 +1292,20 @@ struct drm_xe_oa_config {
char uuid[36];
/**
- * @n_mux_regs:
+ * @n_regs:
*
- * Number of mux regs in &mux_regs_ptr.
+ * Number of regs in @regs_ptr.
*/
- __u32 n_mux_regs;
+ __u32 n_regs;
/**
- * @n_boolean_regs:
+ * @regs_ptr:
*
- * Number of boolean regs in &boolean_regs_ptr.
+ * Pointer to tuples of u32 values (register address, value) for OA
+ * config registers. Expected length of buffer is (2 * sizeof(u32) *
+ * @n_regs).
*/
- __u32 n_boolean_regs;
-
- /**
- * @n_flex_regs:
- *
- * Number of flex regs in &flex_regs_ptr.
- */
- __u32 n_flex_regs;
-
- /**
- * @mux_regs_ptr:
- *
- * Pointer to tuples of u32 values (register address, value) for mux
- * registers. Expected length of buffer is (2 * sizeof(u32) *
- * &n_mux_regs).
- */
- __u64 mux_regs_ptr;
-
- /**
- * @boolean_regs_ptr:
- *
- * Pointer to tuples of u32 values (register address, value) for mux
- * registers. Expected length of buffer is (2 * sizeof(u32) *
- * &n_boolean_regs).
- */
- __u64 boolean_regs_ptr;
-
- /**
- * @flex_regs_ptr:
- *
- * Pointer to tuples of u32 values (register address, value) for mux
- * registers. Expected length of buffer is (2 * sizeof(u32) *
- * &n_flex_regs).
- */
- __u64 flex_regs_ptr;
+ __u64 regs_ptr;
};
/*
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 14/21] drm/xe/uapi: Simplify OA configs in uapi
2023-09-19 16:10 ` [Intel-xe] [PATCH 14/21] drm/xe/uapi: Simplify OA configs in uapi Ashutosh Dixit
@ 2023-10-04 2:26 ` Umesh Nerlige Ramappa
2023-10-04 15:44 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-04 2:26 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:42AM -0700, Ashutosh Dixit wrote:
>In OA uapi, there is no reason to have separate mux/boolean/flex registers
>in 'struct drm_xe_oa_config'. The kernel knows ranges of these registers
>and can determine which are which when needed without these being provided
>through the uapi. Therefore combine the three register arrays into a single
>one in the uapi.
>
>Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
lgtm
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Umesh
>---
> drivers/gpu/drm/xe/xe_oa.c | 60 +++++++++-----------------------
> drivers/gpu/drm/xe/xe_oa_types.h | 8 ++---
> include/uapi/drm/xe_drm.h | 48 +++++--------------------
> 3 files changed, 27 insertions(+), 89 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 63db0969a86b2..19ad23b90e6ad 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -88,9 +88,7 @@ static void xe_oa_config_release(struct kref *ref)
> struct xe_oa_config *oa_config =
> container_of(ref, typeof(*oa_config), ref);
>
>- kfree(oa_config->flex_regs);
>- kfree(oa_config->b_counter_regs);
>- kfree(oa_config->mux_regs);
>+ kfree(oa_config->regs);
>
> kfree_rcu(oa_config, rcu);
> }
>@@ -970,16 +968,14 @@ static struct xe_oa_config_bo *
> __xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa_config)
> {
> struct xe_oa_config_bo *oa_bo;
>- size_t config_length = 0;
>+ size_t config_length;
> struct xe_bb *bb;
>
> oa_bo = kzalloc(sizeof(*oa_bo), GFP_KERNEL);
> if (!oa_bo)
> return ERR_PTR(-ENOMEM);
>
>- config_length += num_lri_dwords(oa_config->mux_regs_len);
>- config_length += num_lri_dwords(oa_config->b_counter_regs_len);
>- config_length += num_lri_dwords(oa_config->flex_regs_len);
>+ config_length = num_lri_dwords(oa_config->regs_len);
> config_length++; /* MI_BATCH_BUFFER_END */
> config_length = ALIGN(sizeof(u32) * config_length, XE_PAGE_SIZE) / sizeof(u32);
>
>@@ -987,9 +983,7 @@ __xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa
> if (IS_ERR(bb))
> goto err_free;
>
>- write_cs_mi_lri(bb, oa_config->mux_regs, oa_config->mux_regs_len);
>- write_cs_mi_lri(bb, oa_config->b_counter_regs, oa_config->b_counter_regs_len);
>- write_cs_mi_lri(bb, oa_config->flex_regs, oa_config->flex_regs_len);
>+ write_cs_mi_lri(bb, oa_config->regs, oa_config->regs_len);
>
> oa_bo->bb = bb;
> oa_bo->oa_config = xe_oa_config_get(oa_config);
>@@ -1825,6 +1819,13 @@ static bool xe_oa_is_valid_mux_addr(struct xe_oa *oa, u32 addr)
> return xe_oa_reg_in_range_table(addr, gen12_oa_mux_regs);
> }
>
>+static bool xe_oa_is_valid_config_reg_addr(struct xe_oa *oa, u32 addr)
>+{
>+ return xe_oa_is_valid_flex_addr(oa, addr) ||
>+ xe_oa_is_valid_b_counter_addr(oa, addr) ||
>+ xe_oa_is_valid_mux_addr(oa, addr);
>+}
>+
> static u32 mask_reg_value(u32 reg, u32 val)
> {
> /*
>@@ -1852,9 +1853,6 @@ xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr),
> int err;
> u32 i;
>
>- if (!n_regs || WARN_ON(!is_valid))
>- return NULL;
>-
> oa_regs = kmalloc_array(n_regs, sizeof(*oa_regs), GFP_KERNEL);
> if (!oa_regs)
> return ERR_PTR(-ENOMEM);
>@@ -1941,9 +1939,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> if (XE_IOCTL_DBG(oa->xe, err))
> return -EFAULT;
>
>- if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
>- (!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
>- (!arg->flex_regs_ptr || !arg->n_flex_regs)) {
>+ if (!arg->regs_ptr || !arg->n_regs) {
> drm_dbg(&oa->xe->drm, "No OA registers given\n");
> return -EINVAL;
> }
>@@ -1964,38 +1960,16 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> /* Last character in oa_config->uuid will be 0 because oa_config is kzalloc */
> memcpy(oa_config->uuid, arg->uuid, sizeof(arg->uuid));
>
>- oa_config->mux_regs_len = arg->n_mux_regs;
>- regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_mux_addr,
>- u64_to_user_ptr(arg->mux_regs_ptr),
>- arg->n_mux_regs);
>+ oa_config->regs_len = arg->n_regs;
>+ regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_config_reg_addr,
>+ u64_to_user_ptr(arg->regs_ptr),
>+ arg->n_regs);
> if (IS_ERR(regs)) {
> drm_dbg(&oa->xe->drm, "Failed to create OA config for mux_regs\n");
> err = PTR_ERR(regs);
> goto reg_err;
> }
>- oa_config->mux_regs = regs;
>-
>- oa_config->b_counter_regs_len = arg->n_boolean_regs;
>- regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_b_counter_addr,
>- u64_to_user_ptr(arg->boolean_regs_ptr),
>- arg->n_boolean_regs);
>- if (IS_ERR(regs)) {
>- drm_dbg(&oa->xe->drm, "Failed to create OA config for b_counter_regs\n");
>- err = PTR_ERR(regs);
>- goto reg_err;
>- }
>- oa_config->b_counter_regs = regs;
>-
>- oa_config->flex_regs_len = arg->n_flex_regs;
>- regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_flex_addr,
>- u64_to_user_ptr(arg->flex_regs_ptr),
>- arg->n_flex_regs);
>- if (IS_ERR(regs)) {
>- drm_dbg(&oa->xe->drm, "Failed to create OA config for flex_regs\n");
>- err = PTR_ERR(regs);
>- goto reg_err;
>- }
>- oa_config->flex_regs = regs;
>+ oa_config->regs = regs;
>
> err = mutex_lock_interruptible(&oa->metrics_lock);
> if (err)
>diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
>index 126692718c888..ac8b23695cc6e 100644
>--- a/drivers/gpu/drm/xe/xe_oa_types.h
>+++ b/drivers/gpu/drm/xe/xe_oa_types.h
>@@ -52,12 +52,8 @@ struct xe_oa_config {
> char uuid[UUID_STRING_LEN + 1];
> int id;
>
>- const struct xe_oa_reg *mux_regs;
>- u32 mux_regs_len;
>- const struct xe_oa_reg *b_counter_regs;
>- u32 b_counter_regs_len;
>- const struct xe_oa_reg *flex_regs;
>- u32 flex_regs_len;
>+ const struct xe_oa_reg *regs;
>+ u32 regs_len;
>
> struct attribute_group sysfs_metric;
> struct attribute *attrs[2];
>diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>index bf0af9474e7ee..fe873dc63fc5a 100644
>--- a/include/uapi/drm/xe_drm.h
>+++ b/include/uapi/drm/xe_drm.h
>@@ -1292,52 +1292,20 @@ struct drm_xe_oa_config {
> char uuid[36];
>
> /**
>- * @n_mux_regs:
>+ * @n_regs:
> *
>- * Number of mux regs in &mux_regs_ptr.
>+ * Number of regs in @regs_ptr.
> */
>- __u32 n_mux_regs;
>+ __u32 n_regs;
>
> /**
>- * @n_boolean_regs:
>+ * @regs_ptr:
> *
>- * Number of boolean regs in &boolean_regs_ptr.
>+ * Pointer to tuples of u32 values (register address, value) for OA
>+ * config registers. Expected length of buffer is (2 * sizeof(u32) *
>+ * @n_regs).
> */
>- __u32 n_boolean_regs;
>-
>- /**
>- * @n_flex_regs:
>- *
>- * Number of flex regs in &flex_regs_ptr.
>- */
>- __u32 n_flex_regs;
>-
>- /**
>- * @mux_regs_ptr:
>- *
>- * Pointer to tuples of u32 values (register address, value) for mux
>- * registers. Expected length of buffer is (2 * sizeof(u32) *
>- * &n_mux_regs).
>- */
>- __u64 mux_regs_ptr;
>-
>- /**
>- * @boolean_regs_ptr:
>- *
>- * Pointer to tuples of u32 values (register address, value) for mux
>- * registers. Expected length of buffer is (2 * sizeof(u32) *
>- * &n_boolean_regs).
>- */
>- __u64 boolean_regs_ptr;
>-
>- /**
>- * @flex_regs_ptr:
>- *
>- * Pointer to tuples of u32 values (register address, value) for mux
>- * registers. Expected length of buffer is (2 * sizeof(u32) *
>- * &n_flex_regs).
>- */
>- __u64 flex_regs_ptr;
>+ __u64 regs_ptr;
> };
>
> /*
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 14/21] drm/xe/uapi: Simplify OA configs in uapi
2023-10-04 2:26 ` Umesh Nerlige Ramappa
@ 2023-10-04 15:44 ` Dixit, Ashutosh
2023-10-04 16:13 ` Rodrigo Vivi
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-04 15:44 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Tue, 03 Oct 2023 19:26:17 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh,
> On Tue, Sep 19, 2023 at 09:10:42AM -0700, Ashutosh Dixit wrote:
> > In OA uapi, there is no reason to have separate mux/boolean/flex registers
> > in 'struct drm_xe_oa_config'. The kernel knows ranges of these registers
> > and can determine which are which when needed without these being provided
> > through the uapi. Therefore combine the three register arrays into a single
> > one in the uapi.
> >
> > Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>
> lgtm
> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Thanks, though just wondering if internally in the driver we should still
maintain the distinction between flex/mux/b_counter registers? Or can we
remove this distinction even internally in the driver and just maintain a
single valid register range per platform? At least at present there seems
to be no reason to maintain 3 different register ranges. So it will
simplify the code a little bit if we just have a single range per
platform (3 ranges can just be maintained in comments). Thoughts?
Thanks.
--
Ashutosh
> > ---
> > drivers/gpu/drm/xe/xe_oa.c | 60 +++++++++-----------------------
> > drivers/gpu/drm/xe/xe_oa_types.h | 8 ++---
> > include/uapi/drm/xe_drm.h | 48 +++++--------------------
> > 3 files changed, 27 insertions(+), 89 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> > index 63db0969a86b2..19ad23b90e6ad 100644
> > --- a/drivers/gpu/drm/xe/xe_oa.c
> > +++ b/drivers/gpu/drm/xe/xe_oa.c
> > @@ -88,9 +88,7 @@ static void xe_oa_config_release(struct kref *ref)
> > struct xe_oa_config *oa_config =
> > container_of(ref, typeof(*oa_config), ref);
> >
> > - kfree(oa_config->flex_regs);
> > - kfree(oa_config->b_counter_regs);
> > - kfree(oa_config->mux_regs);
> > + kfree(oa_config->regs);
> >
> > kfree_rcu(oa_config, rcu);
> > }
> > @@ -970,16 +968,14 @@ static struct xe_oa_config_bo *
> > __xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa_config)
> > {
> > struct xe_oa_config_bo *oa_bo;
> > - size_t config_length = 0;
> > + size_t config_length;
> > struct xe_bb *bb;
> >
> > oa_bo = kzalloc(sizeof(*oa_bo), GFP_KERNEL);
> > if (!oa_bo)
> > return ERR_PTR(-ENOMEM);
> >
> > - config_length += num_lri_dwords(oa_config->mux_regs_len);
> > - config_length += num_lri_dwords(oa_config->b_counter_regs_len);
> > - config_length += num_lri_dwords(oa_config->flex_regs_len);
> > + config_length = num_lri_dwords(oa_config->regs_len);
> > config_length++; /* MI_BATCH_BUFFER_END */
> > config_length = ALIGN(sizeof(u32) * config_length, XE_PAGE_SIZE) / sizeof(u32);
> >
> > @@ -987,9 +983,7 @@ __xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa
> > if (IS_ERR(bb))
> > goto err_free;
> >
> > - write_cs_mi_lri(bb, oa_config->mux_regs, oa_config->mux_regs_len);
> > - write_cs_mi_lri(bb, oa_config->b_counter_regs, oa_config->b_counter_regs_len);
> > - write_cs_mi_lri(bb, oa_config->flex_regs, oa_config->flex_regs_len);
> > + write_cs_mi_lri(bb, oa_config->regs, oa_config->regs_len);
> >
> > oa_bo->bb = bb;
> > oa_bo->oa_config = xe_oa_config_get(oa_config);
> > @@ -1825,6 +1819,13 @@ static bool xe_oa_is_valid_mux_addr(struct xe_oa *oa, u32 addr)
> > return xe_oa_reg_in_range_table(addr, gen12_oa_mux_regs);
> > }
> >
> > +static bool xe_oa_is_valid_config_reg_addr(struct xe_oa *oa, u32 addr)
> > +{
> > + return xe_oa_is_valid_flex_addr(oa, addr) ||
> > + xe_oa_is_valid_b_counter_addr(oa, addr) ||
> > + xe_oa_is_valid_mux_addr(oa, addr);
> > +}
> > +
> > static u32 mask_reg_value(u32 reg, u32 val)
> > {
> > /*
> > @@ -1852,9 +1853,6 @@ xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr),
> > int err;
> > u32 i;
> >
> > - if (!n_regs || WARN_ON(!is_valid))
> > - return NULL;
> > -
> > oa_regs = kmalloc_array(n_regs, sizeof(*oa_regs), GFP_KERNEL);
> > if (!oa_regs)
> > return ERR_PTR(-ENOMEM);
> > @@ -1941,9 +1939,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> > if (XE_IOCTL_DBG(oa->xe, err))
> > return -EFAULT;
> >
> > - if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
> > - (!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
> > - (!arg->flex_regs_ptr || !arg->n_flex_regs)) {
> > + if (!arg->regs_ptr || !arg->n_regs) {
> > drm_dbg(&oa->xe->drm, "No OA registers given\n");
> > return -EINVAL;
> > }
> > @@ -1964,38 +1960,16 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> > /* Last character in oa_config->uuid will be 0 because oa_config is kzalloc */
> > memcpy(oa_config->uuid, arg->uuid, sizeof(arg->uuid));
> >
> > - oa_config->mux_regs_len = arg->n_mux_regs;
> > - regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_mux_addr,
> > - u64_to_user_ptr(arg->mux_regs_ptr),
> > - arg->n_mux_regs);
> > + oa_config->regs_len = arg->n_regs;
> > + regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_config_reg_addr,
> > + u64_to_user_ptr(arg->regs_ptr),
> > + arg->n_regs);
> > if (IS_ERR(regs)) {
> > drm_dbg(&oa->xe->drm, "Failed to create OA config for mux_regs\n");
> > err = PTR_ERR(regs);
> > goto reg_err;
> > }
> > - oa_config->mux_regs = regs;
> > -
> > - oa_config->b_counter_regs_len = arg->n_boolean_regs;
> > - regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_b_counter_addr,
> > - u64_to_user_ptr(arg->boolean_regs_ptr),
> > - arg->n_boolean_regs);
> > - if (IS_ERR(regs)) {
> > - drm_dbg(&oa->xe->drm, "Failed to create OA config for b_counter_regs\n");
> > - err = PTR_ERR(regs);
> > - goto reg_err;
> > - }
> > - oa_config->b_counter_regs = regs;
> > -
> > - oa_config->flex_regs_len = arg->n_flex_regs;
> > - regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_flex_addr,
> > - u64_to_user_ptr(arg->flex_regs_ptr),
> > - arg->n_flex_regs);
> > - if (IS_ERR(regs)) {
> > - drm_dbg(&oa->xe->drm, "Failed to create OA config for flex_regs\n");
> > - err = PTR_ERR(regs);
> > - goto reg_err;
> > - }
> > - oa_config->flex_regs = regs;
> > + oa_config->regs = regs;
> >
> > err = mutex_lock_interruptible(&oa->metrics_lock);
> > if (err)
> > diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
> > index 126692718c888..ac8b23695cc6e 100644
> > --- a/drivers/gpu/drm/xe/xe_oa_types.h
> > +++ b/drivers/gpu/drm/xe/xe_oa_types.h
> > @@ -52,12 +52,8 @@ struct xe_oa_config {
> > char uuid[UUID_STRING_LEN + 1];
> > int id;
> >
> > - const struct xe_oa_reg *mux_regs;
> > - u32 mux_regs_len;
> > - const struct xe_oa_reg *b_counter_regs;
> > - u32 b_counter_regs_len;
> > - const struct xe_oa_reg *flex_regs;
> > - u32 flex_regs_len;
> > + const struct xe_oa_reg *regs;
> > + u32 regs_len;
> >
> > struct attribute_group sysfs_metric;
> > struct attribute *attrs[2];
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index bf0af9474e7ee..fe873dc63fc5a 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -1292,52 +1292,20 @@ struct drm_xe_oa_config {
> > char uuid[36];
> >
> > /**
> > - * @n_mux_regs:
> > + * @n_regs:
> > *
> > - * Number of mux regs in &mux_regs_ptr.
> > + * Number of regs in @regs_ptr.
> > */
> > - __u32 n_mux_regs;
> > + __u32 n_regs;
> >
> > /**
> > - * @n_boolean_regs:
> > + * @regs_ptr:
> > *
> > - * Number of boolean regs in &boolean_regs_ptr.
> > + * Pointer to tuples of u32 values (register address, value) for OA
> > + * config registers. Expected length of buffer is (2 * sizeof(u32) *
> > + * @n_regs).
> > */
> > - __u32 n_boolean_regs;
> > -
> > - /**
> > - * @n_flex_regs:
> > - *
> > - * Number of flex regs in &flex_regs_ptr.
> > - */
> > - __u32 n_flex_regs;
> > -
> > - /**
> > - * @mux_regs_ptr:
> > - *
> > - * Pointer to tuples of u32 values (register address, value) for mux
> > - * registers. Expected length of buffer is (2 * sizeof(u32) *
> > - * &n_mux_regs).
> > - */
> > - __u64 mux_regs_ptr;
> > -
> > - /**
> > - * @boolean_regs_ptr:
> > - *
> > - * Pointer to tuples of u32 values (register address, value) for mux
> > - * registers. Expected length of buffer is (2 * sizeof(u32) *
> > - * &n_boolean_regs).
> > - */
> > - __u64 boolean_regs_ptr;
> > -
> > - /**
> > - * @flex_regs_ptr:
> > - *
> > - * Pointer to tuples of u32 values (register address, value) for mux
> > - * registers. Expected length of buffer is (2 * sizeof(u32) *
> > - * &n_flex_regs).
> > - */
> > - __u64 flex_regs_ptr;
> > + __u64 regs_ptr;
> > };
> >
> > /*
> > --
> > 2.41.0
> >
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 14/21] drm/xe/uapi: Simplify OA configs in uapi
2023-10-04 15:44 ` Dixit, Ashutosh
@ 2023-10-04 16:13 ` Rodrigo Vivi
0 siblings, 0 replies; 88+ messages in thread
From: Rodrigo Vivi @ 2023-10-04 16:13 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
On Wed, Oct 04, 2023 at 08:44:57AM -0700, Dixit, Ashutosh wrote:
> On Tue, 03 Oct 2023 19:26:17 -0700, Umesh Nerlige Ramappa wrote:
> >
>
> Hi Umesh,
>
> > On Tue, Sep 19, 2023 at 09:10:42AM -0700, Ashutosh Dixit wrote:
> > > In OA uapi, there is no reason to have separate mux/boolean/flex registers
> > > in 'struct drm_xe_oa_config'. The kernel knows ranges of these registers
> > > and can determine which are which when needed without these being provided
> > > through the uapi. Therefore combine the three register arrays into a single
> > > one in the uapi.
> > >
> > > Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> >
> > lgtm
> > Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Please do not merge this before syncing with Francois as this might conflict
hard with the big series that is getting ready in sync with UMDs as well.
>
> Thanks, though just wondering if internally in the driver we should still
> maintain the distinction between flex/mux/b_counter registers? Or can we
> remove this distinction even internally in the driver and just maintain a
> single valid register range per platform? At least at present there seems
> to be no reason to maintain 3 different register ranges. So it will
> simplify the code a little bit if we just have a single range per
> platform (3 ranges can just be maintained in comments). Thoughts?
>
> Thanks.
> --
> Ashutosh
>
> > > ---
> > > drivers/gpu/drm/xe/xe_oa.c | 60 +++++++++-----------------------
> > > drivers/gpu/drm/xe/xe_oa_types.h | 8 ++---
> > > include/uapi/drm/xe_drm.h | 48 +++++--------------------
> > > 3 files changed, 27 insertions(+), 89 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> > > index 63db0969a86b2..19ad23b90e6ad 100644
> > > --- a/drivers/gpu/drm/xe/xe_oa.c
> > > +++ b/drivers/gpu/drm/xe/xe_oa.c
> > > @@ -88,9 +88,7 @@ static void xe_oa_config_release(struct kref *ref)
> > > struct xe_oa_config *oa_config =
> > > container_of(ref, typeof(*oa_config), ref);
> > >
> > > - kfree(oa_config->flex_regs);
> > > - kfree(oa_config->b_counter_regs);
> > > - kfree(oa_config->mux_regs);
> > > + kfree(oa_config->regs);
> > >
> > > kfree_rcu(oa_config, rcu);
> > > }
> > > @@ -970,16 +968,14 @@ static struct xe_oa_config_bo *
> > > __xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa_config)
> > > {
> > > struct xe_oa_config_bo *oa_bo;
> > > - size_t config_length = 0;
> > > + size_t config_length;
> > > struct xe_bb *bb;
> > >
> > > oa_bo = kzalloc(sizeof(*oa_bo), GFP_KERNEL);
> > > if (!oa_bo)
> > > return ERR_PTR(-ENOMEM);
> > >
> > > - config_length += num_lri_dwords(oa_config->mux_regs_len);
> > > - config_length += num_lri_dwords(oa_config->b_counter_regs_len);
> > > - config_length += num_lri_dwords(oa_config->flex_regs_len);
> > > + config_length = num_lri_dwords(oa_config->regs_len);
> > > config_length++; /* MI_BATCH_BUFFER_END */
> > > config_length = ALIGN(sizeof(u32) * config_length, XE_PAGE_SIZE) / sizeof(u32);
> > >
> > > @@ -987,9 +983,7 @@ __xe_oa_alloc_config_buffer(struct xe_oa_stream *stream, struct xe_oa_config *oa
> > > if (IS_ERR(bb))
> > > goto err_free;
> > >
> > > - write_cs_mi_lri(bb, oa_config->mux_regs, oa_config->mux_regs_len);
> > > - write_cs_mi_lri(bb, oa_config->b_counter_regs, oa_config->b_counter_regs_len);
> > > - write_cs_mi_lri(bb, oa_config->flex_regs, oa_config->flex_regs_len);
> > > + write_cs_mi_lri(bb, oa_config->regs, oa_config->regs_len);
> > >
> > > oa_bo->bb = bb;
> > > oa_bo->oa_config = xe_oa_config_get(oa_config);
> > > @@ -1825,6 +1819,13 @@ static bool xe_oa_is_valid_mux_addr(struct xe_oa *oa, u32 addr)
> > > return xe_oa_reg_in_range_table(addr, gen12_oa_mux_regs);
> > > }
> > >
> > > +static bool xe_oa_is_valid_config_reg_addr(struct xe_oa *oa, u32 addr)
> > > +{
> > > + return xe_oa_is_valid_flex_addr(oa, addr) ||
> > > + xe_oa_is_valid_b_counter_addr(oa, addr) ||
> > > + xe_oa_is_valid_mux_addr(oa, addr);
> > > +}
> > > +
> > > static u32 mask_reg_value(u32 reg, u32 val)
> > > {
> > > /*
> > > @@ -1852,9 +1853,6 @@ xe_oa_alloc_regs(struct xe_oa *oa, bool (*is_valid)(struct xe_oa *oa, u32 addr),
> > > int err;
> > > u32 i;
> > >
> > > - if (!n_regs || WARN_ON(!is_valid))
> > > - return NULL;
> > > -
> > > oa_regs = kmalloc_array(n_regs, sizeof(*oa_regs), GFP_KERNEL);
> > > if (!oa_regs)
> > > return ERR_PTR(-ENOMEM);
> > > @@ -1941,9 +1939,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> > > if (XE_IOCTL_DBG(oa->xe, err))
> > > return -EFAULT;
> > >
> > > - if ((!arg->mux_regs_ptr || !arg->n_mux_regs) &&
> > > - (!arg->boolean_regs_ptr || !arg->n_boolean_regs) &&
> > > - (!arg->flex_regs_ptr || !arg->n_flex_regs)) {
> > > + if (!arg->regs_ptr || !arg->n_regs) {
> > > drm_dbg(&oa->xe->drm, "No OA registers given\n");
> > > return -EINVAL;
> > > }
> > > @@ -1964,38 +1960,16 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> > > /* Last character in oa_config->uuid will be 0 because oa_config is kzalloc */
> > > memcpy(oa_config->uuid, arg->uuid, sizeof(arg->uuid));
> > >
> > > - oa_config->mux_regs_len = arg->n_mux_regs;
> > > - regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_mux_addr,
> > > - u64_to_user_ptr(arg->mux_regs_ptr),
> > > - arg->n_mux_regs);
> > > + oa_config->regs_len = arg->n_regs;
> > > + regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_config_reg_addr,
> > > + u64_to_user_ptr(arg->regs_ptr),
> > > + arg->n_regs);
> > > if (IS_ERR(regs)) {
> > > drm_dbg(&oa->xe->drm, "Failed to create OA config for mux_regs\n");
> > > err = PTR_ERR(regs);
> > > goto reg_err;
> > > }
> > > - oa_config->mux_regs = regs;
> > > -
> > > - oa_config->b_counter_regs_len = arg->n_boolean_regs;
> > > - regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_b_counter_addr,
> > > - u64_to_user_ptr(arg->boolean_regs_ptr),
> > > - arg->n_boolean_regs);
> > > - if (IS_ERR(regs)) {
> > > - drm_dbg(&oa->xe->drm, "Failed to create OA config for b_counter_regs\n");
> > > - err = PTR_ERR(regs);
> > > - goto reg_err;
> > > - }
> > > - oa_config->b_counter_regs = regs;
> > > -
> > > - oa_config->flex_regs_len = arg->n_flex_regs;
> > > - regs = xe_oa_alloc_regs(oa, xe_oa_is_valid_flex_addr,
> > > - u64_to_user_ptr(arg->flex_regs_ptr),
> > > - arg->n_flex_regs);
> > > - if (IS_ERR(regs)) {
> > > - drm_dbg(&oa->xe->drm, "Failed to create OA config for flex_regs\n");
> > > - err = PTR_ERR(regs);
> > > - goto reg_err;
> > > - }
> > > - oa_config->flex_regs = regs;
> > > + oa_config->regs = regs;
> > >
> > > err = mutex_lock_interruptible(&oa->metrics_lock);
> > > if (err)
> > > diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
> > > index 126692718c888..ac8b23695cc6e 100644
> > > --- a/drivers/gpu/drm/xe/xe_oa_types.h
> > > +++ b/drivers/gpu/drm/xe/xe_oa_types.h
> > > @@ -52,12 +52,8 @@ struct xe_oa_config {
> > > char uuid[UUID_STRING_LEN + 1];
> > > int id;
> > >
> > > - const struct xe_oa_reg *mux_regs;
> > > - u32 mux_regs_len;
> > > - const struct xe_oa_reg *b_counter_regs;
> > > - u32 b_counter_regs_len;
> > > - const struct xe_oa_reg *flex_regs;
> > > - u32 flex_regs_len;
> > > + const struct xe_oa_reg *regs;
> > > + u32 regs_len;
> > >
> > > struct attribute_group sysfs_metric;
> > > struct attribute *attrs[2];
> > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > index bf0af9474e7ee..fe873dc63fc5a 100644
> > > --- a/include/uapi/drm/xe_drm.h
> > > +++ b/include/uapi/drm/xe_drm.h
> > > @@ -1292,52 +1292,20 @@ struct drm_xe_oa_config {
> > > char uuid[36];
> > >
> > > /**
> > > - * @n_mux_regs:
> > > + * @n_regs:
> > > *
> > > - * Number of mux regs in &mux_regs_ptr.
> > > + * Number of regs in @regs_ptr.
> > > */
> > > - __u32 n_mux_regs;
> > > + __u32 n_regs;
> > >
> > > /**
> > > - * @n_boolean_regs:
> > > + * @regs_ptr:
> > > *
> > > - * Number of boolean regs in &boolean_regs_ptr.
> > > + * Pointer to tuples of u32 values (register address, value) for OA
> > > + * config registers. Expected length of buffer is (2 * sizeof(u32) *
> > > + * @n_regs).
> > > */
> > > - __u32 n_boolean_regs;
> > > -
> > > - /**
> > > - * @n_flex_regs:
> > > - *
> > > - * Number of flex regs in &flex_regs_ptr.
> > > - */
> > > - __u32 n_flex_regs;
> > > -
> > > - /**
> > > - * @mux_regs_ptr:
> > > - *
> > > - * Pointer to tuples of u32 values (register address, value) for mux
> > > - * registers. Expected length of buffer is (2 * sizeof(u32) *
> > > - * &n_mux_regs).
> > > - */
> > > - __u64 mux_regs_ptr;
> > > -
> > > - /**
> > > - * @boolean_regs_ptr:
> > > - *
> > > - * Pointer to tuples of u32 values (register address, value) for mux
> > > - * registers. Expected length of buffer is (2 * sizeof(u32) *
> > > - * &n_boolean_regs).
> > > - */
> > > - __u64 boolean_regs_ptr;
> > > -
> > > - /**
> > > - * @flex_regs_ptr:
> > > - *
> > > - * Pointer to tuples of u32 values (register address, value) for mux
> > > - * registers. Expected length of buffer is (2 * sizeof(u32) *
> > > - * &n_flex_regs).
> > > - */
> > > - __u64 flex_regs_ptr;
> > > + __u64 regs_ptr;
> > > };
> > >
> > > /*
> > > --
> > > 2.41.0
> > >
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 15/21] drm/xe/uapi: Remove OA format names from OA uapi
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (13 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 14/21] drm/xe/uapi: Simplify OA configs in uapi Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-04 2:33 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 16/21] drm/xe/oa: Make xe_oa_timestamp_frequency per gt Ashutosh Dixit
` (14 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
OA format names (in enum drm_xe_oa_format) have an overhead in that the
uapi header has to be updated each time a HW introduces a new
format. Instead of directly using OA format names, switch to using the same
fields Bspec uses to specify formats. The fields change much less often
than the format names. The format names are still internally maintained,
just not exchanged through the uapi.
Bspec: 52198, 60942
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 52 +++++++++++++++++++++-----------
drivers/gpu/drm/xe/xe_oa_types.h | 23 ++++++++++++--
include/uapi/drm/xe_drm.h | 33 ++++++++++----------
3 files changed, 72 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 19ad23b90e6ad..d49debe732bbd 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -53,10 +53,10 @@ static const struct xe_oa_format oa_formats[] = {
[XE_OA_FORMAT_A12] = { 0, 64 },
[XE_OA_FORMAT_A12_B8_C8] = { 2, 128 },
[XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
- [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
+ [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256, XE_OA_FMT_TYPE_OAR },
[XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
- [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, TYPE_OAM, HDR_64_BIT },
- [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
+ [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
+ [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
};
struct xe_oa_open_properties {
@@ -65,7 +65,7 @@ struct xe_oa_open_properties {
u64 exec_q_id;
int metrics_set;
- int oa_format;
+ enum xe_oa_format_name oa_format;
bool oa_periodic;
int oa_period_exponent;
@@ -1529,13 +1529,6 @@ static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent)
return div_u64(nom + den - 1, den);
}
-static bool oa_format_valid(struct xe_oa *oa, u64 format)
-{
- if (format >= XE_OA_FORMAT_MAX)
- return false;
- return test_bit(format, oa->format_mask);
-}
-
static bool engine_supports_oa(const struct xe_hw_engine *hwe)
{
return hwe->oa_group;
@@ -1543,7 +1536,32 @@ static bool engine_supports_oa(const struct xe_hw_engine *hwe)
static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
{
- return hwe->oa_group && hwe->oa_group->type == type;
+ switch (hwe->oa_group->type) {
+ case TYPE_OAG:
+ return type == XE_OA_FMT_TYPE_OAG || type == XE_OA_FMT_TYPE_OAR;
+ case TYPE_OAM:
+ return type == XE_OA_FMT_TYPE_OAM || type == XE_OA_FMT_TYPE_OAM_MPEC;
+ default:
+ return false;
+ }
+}
+
+static int decode_oa_format(struct xe_oa *oa, u64 prop, enum xe_oa_format_name *name)
+{
+ u32 counter_sel = FIELD_GET(XE_OA_MASK_COUNTER_SEL, prop);
+ u32 type = FIELD_GET(XE_OA_MASK_FMT_TYPE, prop);
+ int idx;
+
+ for_each_set_bit(idx, oa->format_mask, XE_OA_FORMAT_MAX) {
+ const struct xe_oa_format *f = &oa->oa_formats[idx];
+
+ if (type == f->type && counter_sel == f->format) {
+ *name = idx;
+ return 0;
+ }
+ }
+
+ return -EINVAL;
}
#define OA_EXPONENT_MAX 31
@@ -1600,12 +1618,12 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
props->metrics_set = value;
break;
case DRM_XE_OA_PROP_OA_FORMAT:
- if (!oa_format_valid(oa, value)) {
- drm_dbg(&oa->xe->drm, "Unsupported OA report format %llu\n",
+ ret = decode_oa_format(oa, value, &props->oa_format);
+ if (ret) {
+ drm_dbg(&oa->xe->drm, "Unsupported OA report format %#llx\n",
value);
- return -EINVAL;
+ return ret;
}
- props->oa_format = value;
break;
case DRM_XE_OA_PROP_OA_EXPONENT:
if (value > OA_EXPONENT_MAX) {
@@ -2227,7 +2245,7 @@ u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
hwe->oa_group->oa_unit_id : U16_MAX;
}
-static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
+static void oa_format_add(struct xe_oa *oa, enum xe_oa_format_name format)
{
__set_bit(format, oa->format_mask);
}
diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index ac8b23695cc6e..3cc1d88fe4a51 100644
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -24,7 +24,7 @@ enum {
OA_GROUP_INVALID = U32_MAX,
};
-enum oa_type {
+enum oa_unit_type {
TYPE_OAG,
TYPE_OAM,
};
@@ -34,6 +34,25 @@ enum report_header {
HDR_64_BIT,
};
+enum xe_oa_format_name {
+ XE_OA_FORMAT_C4_B8 = 7,
+
+ /* Gen8+ */
+ XE_OA_FORMAT_A12,
+ XE_OA_FORMAT_A12_B8_C8,
+ XE_OA_FORMAT_A32u40_A4u32_B8_C8,
+
+ /* DG2 */
+ XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
+ XE_OA_FORMAT_A24u40_A14u32_B8_C8,
+
+ /* MTL OAM */
+ XE_OAM_FORMAT_MPEC8u64_B8_C8,
+ XE_OAM_FORMAT_MPEC8u32_B8_C8,
+
+ XE_OA_FORMAT_MAX,
+};
+
struct xe_oa_format {
u32 format;
int size;
@@ -96,7 +115,7 @@ struct xe_oa_group {
struct xe_oa_regs regs;
/** @type: Type of OA unit - OAM, OAG etc. */
- enum oa_type type;
+ enum oa_unit_type type;
};
/**
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index fe873dc63fc5a..77949c5abcee1 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1124,23 +1124,13 @@ struct drm_xe_perf_param {
__u64 param;
};
-enum drm_xe_oa_format {
- XE_OA_FORMAT_C4_B8 = 7,
-
- /* Gen8+ */
- XE_OA_FORMAT_A12,
- XE_OA_FORMAT_A12_B8_C8,
- XE_OA_FORMAT_A32u40_A4u32_B8_C8,
-
- /* DG2 */
- XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
- XE_OA_FORMAT_A24u40_A14u32_B8_C8,
-
- /* MTL OAM */
- XE_OAM_FORMAT_MPEC8u64_B8_C8,
- XE_OAM_FORMAT_MPEC8u32_B8_C8,
-
- XE_OA_FORMAT_MAX /* non-ABI */
+enum drm_xe_oa_format_type {
+ XE_OA_FMT_TYPE_OAG,
+ XE_OA_FMT_TYPE_OAR,
+ XE_OA_FMT_TYPE_OAM,
+ XE_OA_FMT_TYPE_OAC,
+ XE_OA_FMT_TYPE_OAM_MPEC,
+ XE_OA_FMT_TYPE_PEC,
};
enum drm_xe_oa_property_id {
@@ -1167,6 +1157,15 @@ enum drm_xe_oa_property_id {
* The value specifies the size and layout of OA unit reports.
*/
DRM_XE_OA_PROP_OA_FORMAT,
+ /**
+ * OA_FORMAT's are specified the same way as in Bspec, in terms of
+ * the following quantities: a. enum @drm_xe_oa_format_type
+ * b. Counter select c. Counter size and d. BC report
+ */
+#define XE_OA_MASK_FMT_TYPE (0xff << 0)
+#define XE_OA_MASK_COUNTER_SEL (0xff << 8)
+#define XE_OA_MASK_COUNTER_SIZE (0xff << 16)
+#define XE_OA_MASK_BC_REPORT (0xff << 24)
/**
* Specifying this property implicitly requests periodic OA unit
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 15/21] drm/xe/uapi: Remove OA format names from OA uapi
2023-09-19 16:10 ` [Intel-xe] [PATCH 15/21] drm/xe/uapi: Remove OA format names from OA uapi Ashutosh Dixit
@ 2023-10-04 2:33 ` Umesh Nerlige Ramappa
2023-10-05 6:13 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-04 2:33 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:43AM -0700, Ashutosh Dixit wrote:
>OA format names (in enum drm_xe_oa_format) have an overhead in that the
>uapi header has to be updated each time a HW introduces a new
>format. Instead of directly using OA format names, switch to using the same
>fields Bspec uses to specify formats. The fields change much less often
>than the format names. The format names are still internally maintained,
>just not exchanged through the uapi.
I am rethinking this now. Maybe we should retain the same thing that
existed in i915 - the enum of formats. I see some resistance to this
change from UMDs like Mesa. If the enum is easier for UMDs, let's just
retain that.
As for updating the UApi for each platform, we must make sure hardware
retains a backwards compatible OA format for new platforms. That's
outside the scope of this activity though.
Sorry about the churn, since I suggested this. Let me know if you think
otherwise.
Thanks,
Umesh
>
>Bspec: 52198, 60942
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>---
> drivers/gpu/drm/xe/xe_oa.c | 52 +++++++++++++++++++++-----------
> drivers/gpu/drm/xe/xe_oa_types.h | 23 ++++++++++++--
> include/uapi/drm/xe_drm.h | 33 ++++++++++----------
> 3 files changed, 72 insertions(+), 36 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 19ad23b90e6ad..d49debe732bbd 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -53,10 +53,10 @@ static const struct xe_oa_format oa_formats[] = {
> [XE_OA_FORMAT_A12] = { 0, 64 },
> [XE_OA_FORMAT_A12_B8_C8] = { 2, 128 },
> [XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
>- [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
>+ [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256, XE_OA_FMT_TYPE_OAR },
> [XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
>- [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, TYPE_OAM, HDR_64_BIT },
>- [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
>+ [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
>+ [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
> };
>
> struct xe_oa_open_properties {
>@@ -65,7 +65,7 @@ struct xe_oa_open_properties {
> u64 exec_q_id;
>
> int metrics_set;
>- int oa_format;
>+ enum xe_oa_format_name oa_format;
> bool oa_periodic;
> int oa_period_exponent;
>
>@@ -1529,13 +1529,6 @@ static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent)
> return div_u64(nom + den - 1, den);
> }
>
>-static bool oa_format_valid(struct xe_oa *oa, u64 format)
>-{
>- if (format >= XE_OA_FORMAT_MAX)
>- return false;
>- return test_bit(format, oa->format_mask);
>-}
>-
> static bool engine_supports_oa(const struct xe_hw_engine *hwe)
> {
> return hwe->oa_group;
>@@ -1543,7 +1536,32 @@ static bool engine_supports_oa(const struct xe_hw_engine *hwe)
>
> static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
> {
>- return hwe->oa_group && hwe->oa_group->type == type;
>+ switch (hwe->oa_group->type) {
>+ case TYPE_OAG:
>+ return type == XE_OA_FMT_TYPE_OAG || type == XE_OA_FMT_TYPE_OAR;
>+ case TYPE_OAM:
>+ return type == XE_OA_FMT_TYPE_OAM || type == XE_OA_FMT_TYPE_OAM_MPEC;
>+ default:
>+ return false;
>+ }
>+}
>+
>+static int decode_oa_format(struct xe_oa *oa, u64 prop, enum xe_oa_format_name *name)
>+{
>+ u32 counter_sel = FIELD_GET(XE_OA_MASK_COUNTER_SEL, prop);
>+ u32 type = FIELD_GET(XE_OA_MASK_FMT_TYPE, prop);
>+ int idx;
>+
>+ for_each_set_bit(idx, oa->format_mask, XE_OA_FORMAT_MAX) {
>+ const struct xe_oa_format *f = &oa->oa_formats[idx];
>+
>+ if (type == f->type && counter_sel == f->format) {
>+ *name = idx;
>+ return 0;
>+ }
>+ }
>+
>+ return -EINVAL;
> }
>
> #define OA_EXPONENT_MAX 31
>@@ -1600,12 +1618,12 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
> props->metrics_set = value;
> break;
> case DRM_XE_OA_PROP_OA_FORMAT:
>- if (!oa_format_valid(oa, value)) {
>- drm_dbg(&oa->xe->drm, "Unsupported OA report format %llu\n",
>+ ret = decode_oa_format(oa, value, &props->oa_format);
>+ if (ret) {
>+ drm_dbg(&oa->xe->drm, "Unsupported OA report format %#llx\n",
> value);
>- return -EINVAL;
>+ return ret;
> }
>- props->oa_format = value;
> break;
> case DRM_XE_OA_PROP_OA_EXPONENT:
> if (value > OA_EXPONENT_MAX) {
>@@ -2227,7 +2245,7 @@ u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
> hwe->oa_group->oa_unit_id : U16_MAX;
> }
>
>-static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
>+static void oa_format_add(struct xe_oa *oa, enum xe_oa_format_name format)
> {
> __set_bit(format, oa->format_mask);
> }
>diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
>index ac8b23695cc6e..3cc1d88fe4a51 100644
>--- a/drivers/gpu/drm/xe/xe_oa_types.h
>+++ b/drivers/gpu/drm/xe/xe_oa_types.h
>@@ -24,7 +24,7 @@ enum {
> OA_GROUP_INVALID = U32_MAX,
> };
>
>-enum oa_type {
>+enum oa_unit_type {
> TYPE_OAG,
> TYPE_OAM,
> };
>@@ -34,6 +34,25 @@ enum report_header {
> HDR_64_BIT,
> };
>
>+enum xe_oa_format_name {
>+ XE_OA_FORMAT_C4_B8 = 7,
>+
>+ /* Gen8+ */
>+ XE_OA_FORMAT_A12,
>+ XE_OA_FORMAT_A12_B8_C8,
>+ XE_OA_FORMAT_A32u40_A4u32_B8_C8,
>+
>+ /* DG2 */
>+ XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
>+ XE_OA_FORMAT_A24u40_A14u32_B8_C8,
>+
>+ /* MTL OAM */
>+ XE_OAM_FORMAT_MPEC8u64_B8_C8,
>+ XE_OAM_FORMAT_MPEC8u32_B8_C8,
>+
>+ XE_OA_FORMAT_MAX,
>+};
>+
> struct xe_oa_format {
> u32 format;
> int size;
>@@ -96,7 +115,7 @@ struct xe_oa_group {
> struct xe_oa_regs regs;
>
> /** @type: Type of OA unit - OAM, OAG etc. */
>- enum oa_type type;
>+ enum oa_unit_type type;
> };
>
> /**
>diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>index fe873dc63fc5a..77949c5abcee1 100644
>--- a/include/uapi/drm/xe_drm.h
>+++ b/include/uapi/drm/xe_drm.h
>@@ -1124,23 +1124,13 @@ struct drm_xe_perf_param {
> __u64 param;
> };
>
>-enum drm_xe_oa_format {
>- XE_OA_FORMAT_C4_B8 = 7,
>-
>- /* Gen8+ */
>- XE_OA_FORMAT_A12,
>- XE_OA_FORMAT_A12_B8_C8,
>- XE_OA_FORMAT_A32u40_A4u32_B8_C8,
>-
>- /* DG2 */
>- XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
>- XE_OA_FORMAT_A24u40_A14u32_B8_C8,
>-
>- /* MTL OAM */
>- XE_OAM_FORMAT_MPEC8u64_B8_C8,
>- XE_OAM_FORMAT_MPEC8u32_B8_C8,
>-
>- XE_OA_FORMAT_MAX /* non-ABI */
>+enum drm_xe_oa_format_type {
>+ XE_OA_FMT_TYPE_OAG,
>+ XE_OA_FMT_TYPE_OAR,
>+ XE_OA_FMT_TYPE_OAM,
>+ XE_OA_FMT_TYPE_OAC,
>+ XE_OA_FMT_TYPE_OAM_MPEC,
>+ XE_OA_FMT_TYPE_PEC,
> };
>
> enum drm_xe_oa_property_id {
>@@ -1167,6 +1157,15 @@ enum drm_xe_oa_property_id {
> * The value specifies the size and layout of OA unit reports.
> */
> DRM_XE_OA_PROP_OA_FORMAT,
>+ /**
>+ * OA_FORMAT's are specified the same way as in Bspec, in terms of
>+ * the following quantities: a. enum @drm_xe_oa_format_type
>+ * b. Counter select c. Counter size and d. BC report
>+ */
>+#define XE_OA_MASK_FMT_TYPE (0xff << 0)
>+#define XE_OA_MASK_COUNTER_SEL (0xff << 8)
>+#define XE_OA_MASK_COUNTER_SIZE (0xff << 16)
>+#define XE_OA_MASK_BC_REPORT (0xff << 24)
>
> /**
> * Specifying this property implicitly requests periodic OA unit
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 15/21] drm/xe/uapi: Remove OA format names from OA uapi
2023-10-04 2:33 ` Umesh Nerlige Ramappa
@ 2023-10-05 6:13 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 6:13 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Tue, 03 Oct 2023 19:33:45 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh,
> On Tue, Sep 19, 2023 at 09:10:43AM -0700, Ashutosh Dixit wrote:
> > OA format names (in enum drm_xe_oa_format) have an overhead in that the
> > uapi header has to be updated each time a HW introduces a new
> > format. Instead of directly using OA format names, switch to using the same
> > fields Bspec uses to specify formats. The fields change much less often
> > than the format names. The format names are still internally maintained,
> > just not exchanged through the uapi.
>
> I am rethinking this now. Maybe we should retain the same thing that
> existed in i915 - the enum of formats. I see some resistance to this change
> from UMDs like Mesa. If the enum is easier for UMDs, let's just retain
> that.
I will not resist strongly against going back to the format enum's but I
would like to run this patch with the UMD's first before deciding (since
they haven't really seen this patch). As said in the commit message above
the change here (a) follows Bspec (b) is more relient to changes each time
a new format is introduced. Also the format enum's can be maintained
internally in both the kernel and in userland, the format enum just don't
come through the uapi.
The kernel change can of course be seen below in this patch.
The IGT userspace change is seen the "tests/xe/oa: Use OA format fields,
not format names" patch here:
https://gitlab.freedesktop.org/adixit/igt-gpu-tools/-/commits/xe-oa
Let me run this past the UMD's and then decide on this.
Thanks.
--
Ashutosh
>
> As for updating the UApi for each platform, we must make sure hardware
> retains a backwards compatible OA format for new platforms. That's outside
> the scope of this activity though.
>
> Sorry about the churn, since I suggested this. Let me know if you think
> otherwise.
>
> Thanks,
> Umesh
>
> >
> > Bspec: 52198, 60942
> >
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_oa.c | 52 +++++++++++++++++++++-----------
> > drivers/gpu/drm/xe/xe_oa_types.h | 23 ++++++++++++--
> > include/uapi/drm/xe_drm.h | 33 ++++++++++----------
> > 3 files changed, 72 insertions(+), 36 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> > index 19ad23b90e6ad..d49debe732bbd 100644
> > --- a/drivers/gpu/drm/xe/xe_oa.c
> > +++ b/drivers/gpu/drm/xe/xe_oa.c
> > @@ -53,10 +53,10 @@ static const struct xe_oa_format oa_formats[] = {
> > [XE_OA_FORMAT_A12] = { 0, 64 },
> > [XE_OA_FORMAT_A12_B8_C8] = { 2, 128 },
> > [XE_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
> > - [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
> > + [XE_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256, XE_OA_FMT_TYPE_OAR },
> > [XE_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
> > - [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, TYPE_OAM, HDR_64_BIT },
> > - [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, TYPE_OAM, HDR_64_BIT },
> > + [XE_OAM_FORMAT_MPEC8u64_B8_C8] = { 1, 192, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
> > + [XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
> > };
> >
> > struct xe_oa_open_properties {
> > @@ -65,7 +65,7 @@ struct xe_oa_open_properties {
> > u64 exec_q_id;
> >
> > int metrics_set;
> > - int oa_format;
> > + enum xe_oa_format_name oa_format;
> > bool oa_periodic;
> > int oa_period_exponent;
> >
> > @@ -1529,13 +1529,6 @@ static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent)
> > return div_u64(nom + den - 1, den);
> > }
> >
> > -static bool oa_format_valid(struct xe_oa *oa, u64 format)
> > -{
> > - if (format >= XE_OA_FORMAT_MAX)
> > - return false;
> > - return test_bit(format, oa->format_mask);
> > -}
> > -
> > static bool engine_supports_oa(const struct xe_hw_engine *hwe)
> > {
> > return hwe->oa_group;
> > @@ -1543,7 +1536,32 @@ static bool engine_supports_oa(const struct xe_hw_engine *hwe)
> >
> > static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
> > {
> > - return hwe->oa_group && hwe->oa_group->type == type;
> > + switch (hwe->oa_group->type) {
> > + case TYPE_OAG:
> > + return type == XE_OA_FMT_TYPE_OAG || type == XE_OA_FMT_TYPE_OAR;
> > + case TYPE_OAM:
> > + return type == XE_OA_FMT_TYPE_OAM || type == XE_OA_FMT_TYPE_OAM_MPEC;
> > + default:
> > + return false;
> > + }
> > +}
> > +
> > +static int decode_oa_format(struct xe_oa *oa, u64 prop, enum xe_oa_format_name *name)
> > +{
> > + u32 counter_sel = FIELD_GET(XE_OA_MASK_COUNTER_SEL, prop);
> > + u32 type = FIELD_GET(XE_OA_MASK_FMT_TYPE, prop);
> > + int idx;
> > +
> > + for_each_set_bit(idx, oa->format_mask, XE_OA_FORMAT_MAX) {
> > + const struct xe_oa_format *f = &oa->oa_formats[idx];
> > +
> > + if (type == f->type && counter_sel == f->format) {
> > + *name = idx;
> > + return 0;
> > + }
> > + }
> > +
> > + return -EINVAL;
> > }
> >
> > #define OA_EXPONENT_MAX 31
> > @@ -1600,12 +1618,12 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
> > props->metrics_set = value;
> > break;
> > case DRM_XE_OA_PROP_OA_FORMAT:
> > - if (!oa_format_valid(oa, value)) {
> > - drm_dbg(&oa->xe->drm, "Unsupported OA report format %llu\n",
> > + ret = decode_oa_format(oa, value, &props->oa_format);
> > + if (ret) {
> > + drm_dbg(&oa->xe->drm, "Unsupported OA report format %#llx\n",
> > value);
> > - return -EINVAL;
> > + return ret;
> > }
> > - props->oa_format = value;
> > break;
> > case DRM_XE_OA_PROP_OA_EXPONENT:
> > if (value > OA_EXPONENT_MAX) {
> > @@ -2227,7 +2245,7 @@ u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
> > hwe->oa_group->oa_unit_id : U16_MAX;
> > }
> >
> > -static void oa_format_add(struct xe_oa *oa, enum drm_xe_oa_format format)
> > +static void oa_format_add(struct xe_oa *oa, enum xe_oa_format_name format)
> > {
> > __set_bit(format, oa->format_mask);
> > }
> > diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
> > index ac8b23695cc6e..3cc1d88fe4a51 100644
> > --- a/drivers/gpu/drm/xe/xe_oa_types.h
> > +++ b/drivers/gpu/drm/xe/xe_oa_types.h
> > @@ -24,7 +24,7 @@ enum {
> > OA_GROUP_INVALID = U32_MAX,
> > };
> >
> > -enum oa_type {
> > +enum oa_unit_type {
> > TYPE_OAG,
> > TYPE_OAM,
> > };
> > @@ -34,6 +34,25 @@ enum report_header {
> > HDR_64_BIT,
> > };
> >
> > +enum xe_oa_format_name {
> > + XE_OA_FORMAT_C4_B8 = 7,
> > +
> > + /* Gen8+ */
> > + XE_OA_FORMAT_A12,
> > + XE_OA_FORMAT_A12_B8_C8,
> > + XE_OA_FORMAT_A32u40_A4u32_B8_C8,
> > +
> > + /* DG2 */
> > + XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
> > + XE_OA_FORMAT_A24u40_A14u32_B8_C8,
> > +
> > + /* MTL OAM */
> > + XE_OAM_FORMAT_MPEC8u64_B8_C8,
> > + XE_OAM_FORMAT_MPEC8u32_B8_C8,
> > +
> > + XE_OA_FORMAT_MAX,
> > +};
> > +
> > struct xe_oa_format {
> > u32 format;
> > int size;
> > @@ -96,7 +115,7 @@ struct xe_oa_group {
> > struct xe_oa_regs regs;
> >
> > /** @type: Type of OA unit - OAM, OAG etc. */
> > - enum oa_type type;
> > + enum oa_unit_type type;
> > };
> >
> > /**
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index fe873dc63fc5a..77949c5abcee1 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -1124,23 +1124,13 @@ struct drm_xe_perf_param {
> > __u64 param;
> > };
> >
> > -enum drm_xe_oa_format {
> > - XE_OA_FORMAT_C4_B8 = 7,
> > -
> > - /* Gen8+ */
> > - XE_OA_FORMAT_A12,
> > - XE_OA_FORMAT_A12_B8_C8,
> > - XE_OA_FORMAT_A32u40_A4u32_B8_C8,
> > -
> > - /* DG2 */
> > - XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
> > - XE_OA_FORMAT_A24u40_A14u32_B8_C8,
> > -
> > - /* MTL OAM */
> > - XE_OAM_FORMAT_MPEC8u64_B8_C8,
> > - XE_OAM_FORMAT_MPEC8u32_B8_C8,
> > -
> > - XE_OA_FORMAT_MAX /* non-ABI */
> > +enum drm_xe_oa_format_type {
> > + XE_OA_FMT_TYPE_OAG,
> > + XE_OA_FMT_TYPE_OAR,
> > + XE_OA_FMT_TYPE_OAM,
> > + XE_OA_FMT_TYPE_OAC,
> > + XE_OA_FMT_TYPE_OAM_MPEC,
> > + XE_OA_FMT_TYPE_PEC,
> > };
> >
> > enum drm_xe_oa_property_id {
> > @@ -1167,6 +1157,15 @@ enum drm_xe_oa_property_id {
> > * The value specifies the size and layout of OA unit reports.
> > */
> > DRM_XE_OA_PROP_OA_FORMAT,
> > + /**
> > + * OA_FORMAT's are specified the same way as in Bspec, in terms of
> > + * the following quantities: a. enum @drm_xe_oa_format_type
> > + * b. Counter select c. Counter size and d. BC report
> > + */
> > +#define XE_OA_MASK_FMT_TYPE (0xff << 0)
> > +#define XE_OA_MASK_COUNTER_SEL (0xff << 8)
> > +#define XE_OA_MASK_COUNTER_SIZE (0xff << 16)
> > +#define XE_OA_MASK_BC_REPORT (0xff << 24)
> >
> > /**
> > * Specifying this property implicitly requests periodic OA unit
> > --
> > 2.41.0
> >
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 16/21] drm/xe/oa: Make xe_oa_timestamp_frequency per gt
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (14 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 15/21] drm/xe/uapi: Remove OA format names from OA uapi Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-09-21 20:45 ` Rodrigo Vivi
2023-09-19 16:10 ` [Intel-xe] [PATCH 17/21] drm/xe/oa: Remove filtering reports on context id Ashutosh Dixit
` (13 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Clock freq's can be different for different gt's.
Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 44 +++++++++++++++++------------------
drivers/gpu/drm/xe/xe_oa.h | 2 +-
drivers/gpu/drm/xe/xe_query.c | 2 +-
3 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index d49debe732bbd..8648652e05aa5 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -1496,7 +1496,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
* platforms OA unit ignores the CTC_SHIFT and the 2 timestamps differ. In such
* cases, return the adjusted CS timestamp frequency to the user.
*/
-u32 xe_oa_timestamp_frequency(struct xe_device *xe)
+u32 xe_oa_timestamp_frequency(struct xe_gt *gt)
{
u32 reg, shift;
@@ -1505,26 +1505,26 @@ u32 xe_oa_timestamp_frequency(struct xe_device *xe)
* Wa_14015568240:pvc
* Wa_14015846243:mtl
*/
- switch (xe->info.platform) {
+ switch (gt->tile->xe->info.platform) {
case XE_DG2:
case XE_PVC:
case XE_METEORLAKE:
- xe_device_mem_access_get(xe);
- reg = xe_mmio_read32(xe_root_mmio_gt(xe), RPM_CONFIG0);
- xe_device_mem_access_put(xe);
+ xe_device_mem_access_get(gt->tile->xe);
+ reg = xe_mmio_read32(gt, RPM_CONFIG0);
+ xe_device_mem_access_put(gt->tile->xe);
shift = REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
- return xe_root_mmio_gt(xe)->info.clock_freq << (3 - shift);
+ return gt->info.clock_freq << (3 - shift);
default:
- return xe_root_mmio_gt(xe)->info.clock_freq;
+ return gt->info.clock_freq;
}
}
-static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent)
+static u64 oa_exponent_to_ns(struct xe_gt *gt, int exponent)
{
u64 nom = (2ULL << exponent) * NSEC_PER_SEC;
- u32 den = xe_oa_timestamp_frequency(oa->xe);
+ u32 den = xe_oa_timestamp_frequency(gt);
return div_u64(nom + den - 1, den);
}
@@ -1591,7 +1591,6 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
instance = 0;
for (i = 0; i < n_props; i++) {
- u64 oa_period, oa_freq_hz;
u64 id, value;
ret = get_user(id, uprop);
@@ -1631,18 +1630,6 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
OA_EXPONENT_MAX);
return -EINVAL;
}
-
- BUILD_BUG_ON(sizeof(oa_period) != 8);
- oa_period = oa_exponent_to_ns(oa, value);
-
- oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
- if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
- drm_dbg(&oa->xe->drm,
- "OA exponent would exceed the max sampling frequency (sysctl dev.xe.oa_max_sample_rate) %uHz without CAP_PERFMON or CAP_SYS_ADMIN privileges\n",
- xe_oa_max_sample_rate);
- return -EACCES;
- }
-
props->oa_periodic = true;
props->oa_period_exponent = value;
break;
@@ -1701,6 +1688,19 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
return -EINVAL;
}
+ if (props->oa_periodic) {
+ u64 oa_period, oa_freq_hz;
+
+ oa_period = oa_exponent_to_ns(props->hwe->gt, props->oa_period_exponent);
+ oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
+ if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
+ drm_dbg(&oa->xe->drm,
+ "OA exponent would exceed the max sampling frequency (sysctl dev.xe.oa_max_sample_rate) %uHz without CAP_PERFMON or CAP_SYS_ADMIN privileges\n",
+ xe_oa_max_sample_rate);
+ return -EACCES;
+ }
+ }
+
return 0;
}
diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
index 1f3d05067f19d..cc6f64bc24ddf 100644
--- a/drivers/gpu/drm/xe/xe_oa.h
+++ b/drivers/gpu/drm/xe/xe_oa.h
@@ -22,7 +22,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
-u32 xe_oa_timestamp_frequency(struct xe_device *xe);
+u32 xe_oa_timestamp_frequency(struct xe_gt *gt);
u16 xe_oa_unit_id(struct xe_hw_engine *hwe);
#endif
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 4a3a9c11e8cc4..ad280bac9eed4 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -244,7 +244,7 @@ static int query_gts(struct xe_device *xe, struct drm_xe_device_query *query)
gts->gts[id].type = XE_QUERY_GT_TYPE_MAIN;
gts->gts[id].instance = id;
gts->gts[id].clock_freq = gt->info.clock_freq;
- gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(xe);
+ gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
if (!IS_DGFX(xe))
gts->gts[id].native_mem_regions = 0x1;
else
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 16/21] drm/xe/oa: Make xe_oa_timestamp_frequency per gt
2023-09-19 16:10 ` [Intel-xe] [PATCH 16/21] drm/xe/oa: Make xe_oa_timestamp_frequency per gt Ashutosh Dixit
@ 2023-09-21 20:45 ` Rodrigo Vivi
2023-09-21 21:58 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Rodrigo Vivi @ 2023-09-21 20:45 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:44AM -0700, Ashutosh Dixit wrote:
> Clock freq's can be different for different gt's.
>
> Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> ---
> drivers/gpu/drm/xe/xe_oa.c | 44 +++++++++++++++++------------------
> drivers/gpu/drm/xe/xe_oa.h | 2 +-
> drivers/gpu/drm/xe/xe_query.c | 2 +-
> 3 files changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index d49debe732bbd..8648652e05aa5 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -1496,7 +1496,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
> * platforms OA unit ignores the CTC_SHIFT and the 2 timestamps differ. In such
> * cases, return the adjusted CS timestamp frequency to the user.
> */
> -u32 xe_oa_timestamp_frequency(struct xe_device *xe)
> +u32 xe_oa_timestamp_frequency(struct xe_gt *gt)
> {
> u32 reg, shift;
>
> @@ -1505,26 +1505,26 @@ u32 xe_oa_timestamp_frequency(struct xe_device *xe)
> * Wa_14015568240:pvc
> * Wa_14015846243:mtl
> */
> - switch (xe->info.platform) {
> + switch (gt->tile->xe->info.platform) {
> case XE_DG2:
> case XE_PVC:
> case XE_METEORLAKE:
> - xe_device_mem_access_get(xe);
> - reg = xe_mmio_read32(xe_root_mmio_gt(xe), RPM_CONFIG0);
> - xe_device_mem_access_put(xe);
> + xe_device_mem_access_get(gt->tile->xe);
> + reg = xe_mmio_read32(gt, RPM_CONFIG0);
> + xe_device_mem_access_put(gt->tile->xe);
>
> shift = REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
> - return xe_root_mmio_gt(xe)->info.clock_freq << (3 - shift);
> + return gt->info.clock_freq << (3 - shift);
>
> default:
> - return xe_root_mmio_gt(xe)->info.clock_freq;
> + return gt->info.clock_freq;
> }
> }
>
> -static u64 oa_exponent_to_ns(struct xe_oa *oa, int exponent)
> +static u64 oa_exponent_to_ns(struct xe_gt *gt, int exponent)
> {
> u64 nom = (2ULL << exponent) * NSEC_PER_SEC;
> - u32 den = xe_oa_timestamp_frequency(oa->xe);
> + u32 den = xe_oa_timestamp_frequency(gt);
>
> return div_u64(nom + den - 1, den);
> }
> @@ -1591,7 +1591,6 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
> instance = 0;
>
> for (i = 0; i < n_props; i++) {
> - u64 oa_period, oa_freq_hz;
> u64 id, value;
>
> ret = get_user(id, uprop);
> @@ -1631,18 +1630,6 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
> OA_EXPONENT_MAX);
> return -EINVAL;
> }
> -
> - BUILD_BUG_ON(sizeof(oa_period) != 8);
> - oa_period = oa_exponent_to_ns(oa, value);
> -
> - oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
> - if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
> - drm_dbg(&oa->xe->drm,
> - "OA exponent would exceed the max sampling frequency (sysctl dev.xe.oa_max_sample_rate) %uHz without CAP_PERFMON or CAP_SYS_ADMIN privileges\n",
> - xe_oa_max_sample_rate);
> - return -EACCES;
> - }
> -
> props->oa_periodic = true;
> props->oa_period_exponent = value;
> break;
> @@ -1701,6 +1688,19 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
> return -EINVAL;
> }
>
> + if (props->oa_periodic) {
> + u64 oa_period, oa_freq_hz;
> +
> + oa_period = oa_exponent_to_ns(props->hwe->gt, props->oa_period_exponent);
> + oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
> + if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
> + drm_dbg(&oa->xe->drm,
> + "OA exponent would exceed the max sampling frequency (sysctl dev.xe.oa_max_sample_rate) %uHz without CAP_PERFMON or CAP_SYS_ADMIN privileges\n",
> + xe_oa_max_sample_rate);
> + return -EACCES;
> + }
> + }
> +
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
> index 1f3d05067f19d..cc6f64bc24ddf 100644
> --- a/drivers/gpu/drm/xe/xe_oa.h
> +++ b/drivers/gpu/drm/xe/xe_oa.h
> @@ -22,7 +22,7 @@ int xe_oa_add_config_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file);
> int xe_oa_remove_config_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file);
> -u32 xe_oa_timestamp_frequency(struct xe_device *xe);
> +u32 xe_oa_timestamp_frequency(struct xe_gt *gt);
> u16 xe_oa_unit_id(struct xe_hw_engine *hwe);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 4a3a9c11e8cc4..ad280bac9eed4 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -244,7 +244,7 @@ static int query_gts(struct xe_device *xe, struct drm_xe_device_query *query)
> gts->gts[id].type = XE_QUERY_GT_TYPE_MAIN;
> gts->gts[id].instance = id;
> gts->gts[id].clock_freq = gt->info.clock_freq;
first look it here ^
> - gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(xe);
> + gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
Then please notice that we are trying to kill the duplications on the uapi [1]
and now notice that this series is adding yet another duplication:
+u32 xe_oa_timestamp_frequency(struct xe_gt *gt)
+ return gt->info.clock_freq;
(copied from above)
[1] - https://lore.kernel.org/all/20230920192940.135004-20-rodrigo.vivi@intel.com/
> if (!IS_DGFX(xe))
> gts->gts[id].native_mem_regions = 0x1;
> else
> --
> 2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 16/21] drm/xe/oa: Make xe_oa_timestamp_frequency per gt
2023-09-21 20:45 ` Rodrigo Vivi
@ 2023-09-21 21:58 ` Dixit, Ashutosh
2023-09-22 19:10 ` Rodrigo Vivi
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-09-21 21:58 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-xe
On Thu, 21 Sep 2023 13:45:54 -0700, Rodrigo Vivi wrote:
>
Hi Rodrigo,
> On Tue, Sep 19, 2023 at 09:10:44AM -0700, Ashutosh Dixit wrote:
> > Clock freq's can be different for different gt's.
> >
> > Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_oa.c | 44 +++++++++++++++++------------------
> > drivers/gpu/drm/xe/xe_oa.h | 2 +-
> > drivers/gpu/drm/xe/xe_query.c | 2 +-
> > 3 files changed, 24 insertions(+), 24 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> > index d49debe732bbd..8648652e05aa5 100644
> > --- a/drivers/gpu/drm/xe/xe_oa.c
> > +++ b/drivers/gpu/drm/xe/xe_oa.c
> > @@ -1496,7 +1496,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
> > * platforms OA unit ignores the CTC_SHIFT and the 2 timestamps differ. In such
> > * cases, return the adjusted CS timestamp frequency to the user.
> > */
> > -u32 xe_oa_timestamp_frequency(struct xe_device *xe)
> > +u32 xe_oa_timestamp_frequency(struct xe_gt *gt)
> > {
> > u32 reg, shift;
> >
> > @@ -1505,26 +1505,26 @@ u32 xe_oa_timestamp_frequency(struct xe_device *xe)
> > * Wa_14015568240:pvc
> > * Wa_14015846243:mtl
> > */
> > - switch (xe->info.platform) {
> > + switch (gt->tile->xe->info.platform) {
> > case XE_DG2:
> > case XE_PVC:
> > case XE_METEORLAKE:
> > - xe_device_mem_access_get(xe);
> > - reg = xe_mmio_read32(xe_root_mmio_gt(xe), RPM_CONFIG0);
> > - xe_device_mem_access_put(xe);
> > + xe_device_mem_access_get(gt->tile->xe);
> > + reg = xe_mmio_read32(gt, RPM_CONFIG0);
> > + xe_device_mem_access_put(gt->tile->xe);
> >
> > shift = REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
> > - return xe_root_mmio_gt(xe)->info.clock_freq << (3 - shift);
> > + return gt->info.clock_freq << (3 - shift);
> >
> > default:
> > - return xe_root_mmio_gt(xe)->info.clock_freq;
> > + return gt->info.clock_freq;
> > }
> > }
/snip/
> > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > index 4a3a9c11e8cc4..ad280bac9eed4 100644
> > --- a/drivers/gpu/drm/xe/xe_query.c
> > +++ b/drivers/gpu/drm/xe/xe_query.c
> > @@ -244,7 +244,7 @@ static int query_gts(struct xe_device *xe, struct drm_xe_device_query *query)
> > gts->gts[id].type = XE_QUERY_GT_TYPE_MAIN;
> > gts->gts[id].instance = id;
> > gts->gts[id].clock_freq = gt->info.clock_freq;
>
> first look it here ^
>
> > - gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(xe);
> > + gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
>
> Then please notice that we are trying to kill the duplications on the uapi [1]
> and now notice that this series is adding yet another duplication:
>
> +u32 xe_oa_timestamp_frequency(struct xe_gt *gt)
> + return gt->info.clock_freq;
> (copied from above)
>
> [1] - https://lore.kernel.org/all/20230920192940.135004-20-rodrigo.vivi@intel.com/
Well it's duplicated on some platforms but not on others. If it helps,
there is another proposal which will move all OA related information
(including oa_timestamp_freq) into a separate drm_xe_query_oa_info struct
(so out of the current uapi struct's into drm_xe_query_oa_info). See:
https://patchwork.freedesktop.org/patch/558367/?series=121084&rev=6
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 16/21] drm/xe/oa: Make xe_oa_timestamp_frequency per gt
2023-09-21 21:58 ` Dixit, Ashutosh
@ 2023-09-22 19:10 ` Rodrigo Vivi
0 siblings, 0 replies; 88+ messages in thread
From: Rodrigo Vivi @ 2023-09-22 19:10 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
On Thu, Sep 21, 2023 at 02:58:14PM -0700, Dixit, Ashutosh wrote:
> On Thu, 21 Sep 2023 13:45:54 -0700, Rodrigo Vivi wrote:
> >
>
> Hi Rodrigo,
>
> > On Tue, Sep 19, 2023 at 09:10:44AM -0700, Ashutosh Dixit wrote:
> > > Clock freq's can be different for different gt's.
> > >
> > > Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_oa.c | 44 +++++++++++++++++------------------
> > > drivers/gpu/drm/xe/xe_oa.h | 2 +-
> > > drivers/gpu/drm/xe/xe_query.c | 2 +-
> > > 3 files changed, 24 insertions(+), 24 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> > > index d49debe732bbd..8648652e05aa5 100644
> > > --- a/drivers/gpu/drm/xe/xe_oa.c
> > > +++ b/drivers/gpu/drm/xe/xe_oa.c
> > > @@ -1496,7 +1496,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
> > > * platforms OA unit ignores the CTC_SHIFT and the 2 timestamps differ. In such
> > > * cases, return the adjusted CS timestamp frequency to the user.
> > > */
> > > -u32 xe_oa_timestamp_frequency(struct xe_device *xe)
> > > +u32 xe_oa_timestamp_frequency(struct xe_gt *gt)
> > > {
> > > u32 reg, shift;
> > >
> > > @@ -1505,26 +1505,26 @@ u32 xe_oa_timestamp_frequency(struct xe_device *xe)
> > > * Wa_14015568240:pvc
> > > * Wa_14015846243:mtl
> > > */
> > > - switch (xe->info.platform) {
> > > + switch (gt->tile->xe->info.platform) {
> > > case XE_DG2:
> > > case XE_PVC:
> > > case XE_METEORLAKE:
> > > - xe_device_mem_access_get(xe);
> > > - reg = xe_mmio_read32(xe_root_mmio_gt(xe), RPM_CONFIG0);
> > > - xe_device_mem_access_put(xe);
> > > + xe_device_mem_access_get(gt->tile->xe);
> > > + reg = xe_mmio_read32(gt, RPM_CONFIG0);
> > > + xe_device_mem_access_put(gt->tile->xe);
> > >
> > > shift = REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);
> > > - return xe_root_mmio_gt(xe)->info.clock_freq << (3 - shift);
> > > + return gt->info.clock_freq << (3 - shift);
> > >
> > > default:
> > > - return xe_root_mmio_gt(xe)->info.clock_freq;
> > > + return gt->info.clock_freq;
> > > }
> > > }
>
> /snip/
>
> > > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > > index 4a3a9c11e8cc4..ad280bac9eed4 100644
> > > --- a/drivers/gpu/drm/xe/xe_query.c
> > > +++ b/drivers/gpu/drm/xe/xe_query.c
> > > @@ -244,7 +244,7 @@ static int query_gts(struct xe_device *xe, struct drm_xe_device_query *query)
> > > gts->gts[id].type = XE_QUERY_GT_TYPE_MAIN;
> > > gts->gts[id].instance = id;
> > > gts->gts[id].clock_freq = gt->info.clock_freq;
> >
> > first look it here ^
> >
> > > - gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(xe);
> > > + gts->gts[id].oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
> >
> > Then please notice that we are trying to kill the duplications on the uapi [1]
> > and now notice that this series is adding yet another duplication:
> >
> > +u32 xe_oa_timestamp_frequency(struct xe_gt *gt)
> > + return gt->info.clock_freq;
> > (copied from above)
> >
> > [1] - https://lore.kernel.org/all/20230920192940.135004-20-rodrigo.vivi@intel.com/
>
> Well it's duplicated on some platforms but not on others.
Oh, I see now. Thanks for the explanation.
> If it helps,
> there is another proposal which will move all OA related information
> (including oa_timestamp_freq) into a separate drm_xe_query_oa_info struct
> (so out of the current uapi struct's into drm_xe_query_oa_info). See:
>
> https://patchwork.freedesktop.org/patch/558367/?series=121084&rev=6
yeap, the individual query looks good.
>
> Thanks.
> --
> Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 17/21] drm/xe/oa: Remove filtering reports on context id
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (15 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 16/21] drm/xe/oa: Make xe_oa_timestamp_frequency per gt Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-14 1:01 ` Umesh Nerlige Ramappa
2023-10-20 7:30 ` [Intel-xe] [17/21] " Lionel Landwerlin
2023-09-19 16:10 ` [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions Ashutosh Dixit
` (12 subsequent siblings)
29 siblings, 2 replies; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
At present XE OA code does not obtain context id's from GuC. Even if these
context id's were available it is not clear if included reports for
userspace should be filtered on context id's. Till these issues are
resolved remove filtering reports based on context id's.
Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 33 +++-----------------------------
drivers/gpu/drm/xe/xe_oa_types.h | 9 ---------
2 files changed, 3 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 8648652e05aa5..077698a0c5628 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -184,13 +184,6 @@ static void oa_timestamp_clear(struct xe_oa_stream *stream, u32 *report)
report[1] = 0;
}
-static u32 oa_context_id(struct xe_oa_stream *stream, u32 *report)
-{
- u32 ctx_id = oa_report_header_64bit(stream) ? report[4] : report[2];
-
- return ctx_id & stream->specific_ctx_id_mask;
-}
-
static void oa_context_id_squash(struct xe_oa_stream *stream, u32 *report)
{
if (oa_report_header_64bit(stream))
@@ -368,7 +361,7 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
for (; OA_TAKEN(tail, head); head = (head + report_size) & mask) {
u8 *report = oa_buf_base + head;
- u32 ctx_id, *report32 = (void *)report;
+ u32 *report32 = (void *)report;
u64 reason;
/*
@@ -379,7 +372,6 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
* this field and it is valid to have a reason field of zero.
*/
reason = oa_report_reason(stream, report);
- ctx_id = oa_context_id(stream, report32);
/*
* Squash whatever is in the CTX_ID field if it's marked as invalid to be
@@ -388,10 +380,8 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
* Note: we don't clear the valid_ctx_bit so userspace can understand that
* the ID has been squashed by the kernel.
*/
- if (oa_report_ctx_invalid(stream, report)) {
- ctx_id = INVALID_CTX_ID;
+ if (oa_report_ctx_invalid(stream, report))
oa_context_id_squash(stream, report32);
- }
/*
* NB: The OA unit does not support clock gating off for a specific
@@ -419,21 +409,10 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
* since it's not-uncommon for periodic samples to identify a switch
* before any 'context switch' report.
*/
- if (!stream->exec_q || stream->specific_ctx_id == ctx_id ||
- stream->oa_buffer.last_ctx_id == stream->specific_ctx_id ||
- reason & OAREPORT_REASON_CTX_SWITCH) {
- /*
- * While filtering for a single context we avoid
- * leaking the IDs of other contexts.
- */
- if (stream->exec_q && stream->specific_ctx_id != ctx_id)
- oa_context_id_squash(stream, report32);
-
+ if (!stream->exec_q || reason & OAREPORT_REASON_CTX_SWITCH) {
ret = xe_oa_append_sample(stream, buf, count, offset, report);
if (ret)
break;
-
- stream->oa_buffer.last_ctx_id = ctx_id;
}
if (is_power_of_2(report_size)) {
@@ -497,12 +476,6 @@ static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
/* Mark that we need updated tail pointers to read from... */
stream->oa_buffer.tail = 0;
- /*
- * Reset state used to recognise context switches, affecting which reports we will
- * forward to userspace while filtering for a single context.
- */
- stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;
-
spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
/* Zero out the OA buffer since we rely on zero report id and timestamp fields */
diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index 3cc1d88fe4a51..7566fef55b0ab 100644
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -222,12 +222,6 @@ struct xe_oa_stream {
*/
struct llist_head oa_config_bos;
- /** @specific_ctx_id: id of the context used for filtering reports */
- u32 specific_ctx_id;
-
- /** @specific_ctx_id_mask: The mask used to masking specific_ctx_id bits */
- u32 specific_ctx_id_mask;
-
/**
* @poll_check_timer: High resolution timer that will periodically
* check for data in the circular OA buffer for notifying userspace
@@ -261,9 +255,6 @@ struct xe_oa_stream {
/** @vaddr: mapped vaddr of the OA buffer */
u8 *vaddr;
- /** @last_ctx_id: last context id for OA data added */
- u32 last_ctx_id;
-
/**
* @ptr_lock: Locks reads and writes to all head/tail state
*
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 17/21] drm/xe/oa: Remove filtering reports on context id
2023-09-19 16:10 ` [Intel-xe] [PATCH 17/21] drm/xe/oa: Remove filtering reports on context id Ashutosh Dixit
@ 2023-10-14 1:01 ` Umesh Nerlige Ramappa
2023-10-20 7:30 ` [Intel-xe] [17/21] " Lionel Landwerlin
1 sibling, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-14 1:01 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:45AM -0700, Ashutosh Dixit wrote:
>At present XE OA code does not obtain context id's from GuC. Even if these
>context id's were available it is not clear if included reports for
>userspace should be filtered on context id's. Till these issues are
>resolved remove filtering reports based on context id's.
>
>Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
For review, it would be easier to just drop whatever is not used rather
than adding it in earlier patches and removing it later. I guess you
want to highlight what has changed between i915 and Xe, but I guess we
can review everything as new code and refer to i915 offline.
Thanks,
Umesh
>---
> drivers/gpu/drm/xe/xe_oa.c | 33 +++-----------------------------
> drivers/gpu/drm/xe/xe_oa_types.h | 9 ---------
> 2 files changed, 3 insertions(+), 39 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 8648652e05aa5..077698a0c5628 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -184,13 +184,6 @@ static void oa_timestamp_clear(struct xe_oa_stream *stream, u32 *report)
> report[1] = 0;
> }
>
>-static u32 oa_context_id(struct xe_oa_stream *stream, u32 *report)
>-{
>- u32 ctx_id = oa_report_header_64bit(stream) ? report[4] : report[2];
>-
>- return ctx_id & stream->specific_ctx_id_mask;
>-}
>-
> static void oa_context_id_squash(struct xe_oa_stream *stream, u32 *report)
> {
> if (oa_report_header_64bit(stream))
>@@ -368,7 +361,7 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
>
> for (; OA_TAKEN(tail, head); head = (head + report_size) & mask) {
> u8 *report = oa_buf_base + head;
>- u32 ctx_id, *report32 = (void *)report;
>+ u32 *report32 = (void *)report;
> u64 reason;
>
> /*
>@@ -379,7 +372,6 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * this field and it is valid to have a reason field of zero.
> */
> reason = oa_report_reason(stream, report);
>- ctx_id = oa_context_id(stream, report32);
>
> /*
> * Squash whatever is in the CTX_ID field if it's marked as invalid to be
>@@ -388,10 +380,8 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * Note: we don't clear the valid_ctx_bit so userspace can understand that
> * the ID has been squashed by the kernel.
> */
>- if (oa_report_ctx_invalid(stream, report)) {
>- ctx_id = INVALID_CTX_ID;
>+ if (oa_report_ctx_invalid(stream, report))
> oa_context_id_squash(stream, report32);
>- }
>
> /*
> * NB: The OA unit does not support clock gating off for a specific
>@@ -419,21 +409,10 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * since it's not-uncommon for periodic samples to identify a switch
> * before any 'context switch' report.
> */
>- if (!stream->exec_q || stream->specific_ctx_id == ctx_id ||
>- stream->oa_buffer.last_ctx_id == stream->specific_ctx_id ||
>- reason & OAREPORT_REASON_CTX_SWITCH) {
>- /*
>- * While filtering for a single context we avoid
>- * leaking the IDs of other contexts.
>- */
>- if (stream->exec_q && stream->specific_ctx_id != ctx_id)
>- oa_context_id_squash(stream, report32);
>-
>+ if (!stream->exec_q || reason & OAREPORT_REASON_CTX_SWITCH) {
> ret = xe_oa_append_sample(stream, buf, count, offset, report);
> if (ret)
> break;
>-
>- stream->oa_buffer.last_ctx_id = ctx_id;
> }
>
> if (is_power_of_2(report_size)) {
>@@ -497,12 +476,6 @@ static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
> /* Mark that we need updated tail pointers to read from... */
> stream->oa_buffer.tail = 0;
>
>- /*
>- * Reset state used to recognise context switches, affecting which reports we will
>- * forward to userspace while filtering for a single context.
>- */
>- stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;
>-
> spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
>
> /* Zero out the OA buffer since we rely on zero report id and timestamp fields */
>diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
>index 3cc1d88fe4a51..7566fef55b0ab 100644
>--- a/drivers/gpu/drm/xe/xe_oa_types.h
>+++ b/drivers/gpu/drm/xe/xe_oa_types.h
>@@ -222,12 +222,6 @@ struct xe_oa_stream {
> */
> struct llist_head oa_config_bos;
>
>- /** @specific_ctx_id: id of the context used for filtering reports */
>- u32 specific_ctx_id;
>-
>- /** @specific_ctx_id_mask: The mask used to masking specific_ctx_id bits */
>- u32 specific_ctx_id_mask;
>-
> /**
> * @poll_check_timer: High resolution timer that will periodically
> * check for data in the circular OA buffer for notifying userspace
>@@ -261,9 +255,6 @@ struct xe_oa_stream {
> /** @vaddr: mapped vaddr of the OA buffer */
> u8 *vaddr;
>
>- /** @last_ctx_id: last context id for OA data added */
>- u32 last_ctx_id;
>-
> /**
> * @ptr_lock: Locks reads and writes to all head/tail state
> *
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [17/21] drm/xe/oa: Remove filtering reports on context id
2023-09-19 16:10 ` [Intel-xe] [PATCH 17/21] drm/xe/oa: Remove filtering reports on context id Ashutosh Dixit
2023-10-14 1:01 ` Umesh Nerlige Ramappa
@ 2023-10-20 7:30 ` Lionel Landwerlin
2023-10-20 17:00 ` Umesh Nerlige Ramappa
1 sibling, 1 reply; 88+ messages in thread
From: Lionel Landwerlin @ 2023-10-20 7:30 UTC (permalink / raw)
To: Ashutosh Dixit, intel-xe
[-- Attachment #1: Type: text/plain, Size: 5182 bytes --]
On 19/09/2023 19:10, Ashutosh Dixit wrote:
> At present XE OA code does not obtain context id's from GuC. Even if these
> context id's were available it is not clear if included reports for
> userspace should be filtered on context id's. Till these issues are
> resolved remove filtering reports based on context id's.
If you're removing this, then the opening of the perf stream should
always be a privileged operation.
I guess this also makes DRM_XE_OA_PROP_EXEC_QUEUE_ID useless?
It should probably be removed from the uapi.
-Lionel
>
> Suggested-by: Umesh Nerlige Ramappa<umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Ashutosh Dixit<ashutosh.dixit@intel.com>
> ---
> drivers/gpu/drm/xe/xe_oa.c | 33 +++-----------------------------
> drivers/gpu/drm/xe/xe_oa_types.h | 9 ---------
> 2 files changed, 3 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index 8648652e05aa5..077698a0c5628 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -184,13 +184,6 @@ static void oa_timestamp_clear(struct xe_oa_stream *stream, u32 *report)
> report[1] = 0;
> }
>
> -static u32 oa_context_id(struct xe_oa_stream *stream, u32 *report)
> -{
> - u32 ctx_id = oa_report_header_64bit(stream) ? report[4] : report[2];
> -
> - return ctx_id & stream->specific_ctx_id_mask;
> -}
> -
> static void oa_context_id_squash(struct xe_oa_stream *stream, u32 *report)
> {
> if (oa_report_header_64bit(stream))
> @@ -368,7 +361,7 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
>
> for (; OA_TAKEN(tail, head); head = (head + report_size) & mask) {
> u8 *report = oa_buf_base + head;
> - u32 ctx_id, *report32 = (void *)report;
> + u32 *report32 = (void *)report;
> u64 reason;
>
> /*
> @@ -379,7 +372,6 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * this field and it is valid to have a reason field of zero.
> */
> reason = oa_report_reason(stream, report);
> - ctx_id = oa_context_id(stream, report32);
>
> /*
> * Squash whatever is in the CTX_ID field if it's marked as invalid to be
> @@ -388,10 +380,8 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * Note: we don't clear the valid_ctx_bit so userspace can understand that
> * the ID has been squashed by the kernel.
> */
> - if (oa_report_ctx_invalid(stream, report)) {
> - ctx_id = INVALID_CTX_ID;
> + if (oa_report_ctx_invalid(stream, report))
> oa_context_id_squash(stream, report32);
> - }
>
> /*
> * NB: The OA unit does not support clock gating off for a specific
> @@ -419,21 +409,10 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * since it's not-uncommon for periodic samples to identify a switch
> * before any 'context switch' report.
> */
> - if (!stream->exec_q || stream->specific_ctx_id == ctx_id ||
> - stream->oa_buffer.last_ctx_id == stream->specific_ctx_id ||
> - reason & OAREPORT_REASON_CTX_SWITCH) {
> - /*
> - * While filtering for a single context we avoid
> - * leaking the IDs of other contexts.
> - */
> - if (stream->exec_q && stream->specific_ctx_id != ctx_id)
> - oa_context_id_squash(stream, report32);
> -
> + if (!stream->exec_q || reason & OAREPORT_REASON_CTX_SWITCH) {
> ret = xe_oa_append_sample(stream, buf, count, offset, report);
> if (ret)
> break;
> -
> - stream->oa_buffer.last_ctx_id = ctx_id;
> }
>
> if (is_power_of_2(report_size)) {
> @@ -497,12 +476,6 @@ static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
> /* Mark that we need updated tail pointers to read from... */
> stream->oa_buffer.tail = 0;
>
> - /*
> - * Reset state used to recognise context switches, affecting which reports we will
> - * forward to userspace while filtering for a single context.
> - */
> - stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;
> -
> spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
>
> /* Zero out the OA buffer since we rely on zero report id and timestamp fields */
> diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
> index 3cc1d88fe4a51..7566fef55b0ab 100644
> --- a/drivers/gpu/drm/xe/xe_oa_types.h
> +++ b/drivers/gpu/drm/xe/xe_oa_types.h
> @@ -222,12 +222,6 @@ struct xe_oa_stream {
> */
> struct llist_head oa_config_bos;
>
> - /** @specific_ctx_id: id of the context used for filtering reports */
> - u32 specific_ctx_id;
> -
> - /** @specific_ctx_id_mask: The mask used to masking specific_ctx_id bits */
> - u32 specific_ctx_id_mask;
> -
> /**
> * @poll_check_timer: High resolution timer that will periodically
> * check for data in the circular OA buffer for notifying userspace
> @@ -261,9 +255,6 @@ struct xe_oa_stream {
> /** @vaddr: mapped vaddr of the OA buffer */
> u8 *vaddr;
>
> - /** @last_ctx_id: last context id for OA data added */
> - u32 last_ctx_id;
> -
> /**
> * @ptr_lock: Locks reads and writes to all head/tail state
> *
[-- Attachment #2: Type: text/html, Size: 5913 bytes --]
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [17/21] drm/xe/oa: Remove filtering reports on context id
2023-10-20 7:30 ` [Intel-xe] [17/21] " Lionel Landwerlin
@ 2023-10-20 17:00 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-20 17:00 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-xe
On Fri, Oct 20, 2023 at 10:30:15AM +0300, Lionel Landwerlin wrote:
> On 19/09/2023 19:10, Ashutosh Dixit wrote:
>
> At present XE OA code does not obtain context id's from GuC. Even if these
> context id's were available it is not clear if included reports for
> userspace should be filtered on context id's. Till these issues are
> resolved remove filtering reports based on context id's.
>
> If you're removing this, then the opening of the perf stream should always
> be a privileged operation.
Maybe I didn't understand the filtering use case in i915 correctly.
The OA buffer access is/was always privileged. Filtering was only
squashing out the irrelevant contexts in the OA buffer. However those
squashed contexts are also copied over to the user buffer. My thought
was to just return everything unsquashed since this is a privileged
operation.
>
> I guess this also makes DRM_XE_OA_PROP_EXEC_QUEUE_ID useless?
>
> It should probably be removed from the uapi.
DRM_XE_OA_PROP_EXEC_QUEUE_ID was still used to enable OAR on a specific
context. If we drop this, we could enable it on all RCS instances. The
problem comes when OAC is used. If there are multiple CCS instances on a
tile, OAC can only be enabled on one instance.
Thanks,
Umesh
>
> -Lionel
>
>
> Suggested-by: Umesh Nerlige Ramappa [1]<umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Ashutosh Dixit [2]<ashutosh.dixit@intel.com>
> ---
> drivers/gpu/drm/xe/xe_oa.c | 33 +++-----------------------------
> drivers/gpu/drm/xe/xe_oa_types.h | 9 ---------
> 2 files changed, 3 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index 8648652e05aa5..077698a0c5628 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -184,13 +184,6 @@ static void oa_timestamp_clear(struct xe_oa_stream *stream, u32 *report)
> report[1] = 0;
> }
>
> -static u32 oa_context_id(struct xe_oa_stream *stream, u32 *report)
> -{
> - u32 ctx_id = oa_report_header_64bit(stream) ? report[4] : report[2];
> -
> - return ctx_id & stream->specific_ctx_id_mask;
> -}
> -
> static void oa_context_id_squash(struct xe_oa_stream *stream, u32 *report)
> {
> if (oa_report_header_64bit(stream))
> @@ -368,7 +361,7 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
>
> for (; OA_TAKEN(tail, head); head = (head + report_size) & mask) {
> u8 *report = oa_buf_base + head;
> - u32 ctx_id, *report32 = (void *)report;
> + u32 *report32 = (void *)report;
> u64 reason;
>
> /*
> @@ -379,7 +372,6 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * this field and it is valid to have a reason field of zero.
> */
> reason = oa_report_reason(stream, report);
> - ctx_id = oa_context_id(stream, report32);
>
> /*
> * Squash whatever is in the CTX_ID field if it's marked as invalid to be
> @@ -388,10 +380,8 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * Note: we don't clear the valid_ctx_bit so userspace can understand that
> * the ID has been squashed by the kernel.
> */
> - if (oa_report_ctx_invalid(stream, report)) {
> - ctx_id = INVALID_CTX_ID;
> + if (oa_report_ctx_invalid(stream, report))
> oa_context_id_squash(stream, report32);
> - }
>
> /*
> * NB: The OA unit does not support clock gating off for a specific
> @@ -419,21 +409,10 @@ static int xe_oa_append_reports(struct xe_oa_stream *stream, char __user *buf,
> * since it's not-uncommon for periodic samples to identify a switch
> * before any 'context switch' report.
> */
> - if (!stream->exec_q || stream->specific_ctx_id == ctx_id ||
> - stream->oa_buffer.last_ctx_id == stream->specific_ctx_id ||
> - reason & OAREPORT_REASON_CTX_SWITCH) {
> - /*
> - * While filtering for a single context we avoid
> - * leaking the IDs of other contexts.
> - */
> - if (stream->exec_q && stream->specific_ctx_id != ctx_id)
> - oa_context_id_squash(stream, report32);
> -
> + if (!stream->exec_q || reason & OAREPORT_REASON_CTX_SWITCH) {
> ret = xe_oa_append_sample(stream, buf, count, offset, report);
> if (ret)
> break;
> -
> - stream->oa_buffer.last_ctx_id = ctx_id;
> }
>
> if (is_power_of_2(report_size)) {
> @@ -497,12 +476,6 @@ static void xe_oa_init_oa_buffer(struct xe_oa_stream *stream)
> /* Mark that we need updated tail pointers to read from... */
> stream->oa_buffer.tail = 0;
>
> - /*
> - * Reset state used to recognise context switches, affecting which reports we will
> - * forward to userspace while filtering for a single context.
> - */
> - stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;
> -
> spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
>
> /* Zero out the OA buffer since we rely on zero report id and timestamp fields */
> diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
> index 3cc1d88fe4a51..7566fef55b0ab 100644
> --- a/drivers/gpu/drm/xe/xe_oa_types.h
> +++ b/drivers/gpu/drm/xe/xe_oa_types.h
> @@ -222,12 +222,6 @@ struct xe_oa_stream {
> */
> struct llist_head oa_config_bos;
>
> - /** @specific_ctx_id: id of the context used for filtering reports */
> - u32 specific_ctx_id;
> -
> - /** @specific_ctx_id_mask: The mask used to masking specific_ctx_id bits */
> - u32 specific_ctx_id_mask;
> -
> /**
> * @poll_check_timer: High resolution timer that will periodically
> * check for data in the circular OA buffer for notifying userspace
> @@ -261,9 +255,6 @@ struct xe_oa_stream {
> /** @vaddr: mapped vaddr of the OA buffer */
> u8 *vaddr;
>
> - /** @last_ctx_id: last context id for OA data added */
> - u32 last_ctx_id;
> -
> /**
> * @ptr_lock: Locks reads and writes to all head/tail state
> *
>
>References
>
> Visible links
> 1. mailto:umesh.nerlige.ramappa@intel.com
> 2. mailto:ashutosh.dixit@intel.com
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (16 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 17/21] drm/xe/oa: Remove filtering reports on context id Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-04 0:23 ` Dixit, Ashutosh
` (2 more replies)
2023-09-19 16:10 ` [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION Ashutosh Dixit
` (11 subsequent siblings)
29 siblings, 3 replies; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
- Add drm_xe_query_oa_info to query information about OA units
- Discontinue DRM_XE_OA_PROP_GLOBAL_SSEU since it is no longer needed
- Add DRM_XE_OA_PROP_OA_BUFFER_SIZE to configure OA buffer size
- Add output parameter 'config_syncobj' to signal userland when stream
configuration is complete.
- Add extensions field to structs to make structs future extensible
The implementation of these uapi features will follow later. At present the
emphasis is to finalize the uapi header.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
include/uapi/drm/xe_drm.h | 72 +++++++++++++++++++++++++++++++++++----
1 file changed, 66 insertions(+), 6 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 77949c5abcee1..3b106bed42ea6 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -395,6 +395,7 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_GTS 3
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
+#define DRM_XE_DEVICE_QUERY_OA_INFO 6
/** @query: The type of data to query */
__u32 query;
@@ -1133,6 +1134,48 @@ enum drm_xe_oa_format_type {
XE_OA_FMT_TYPE_PEC,
};
+/**
+ * struct drm_xe_query_oa_info - describe OA units
+ *
+ * If a query is made with a struct drm_xe_device_query where .query
+ * is equal to DRM_XE_DEVICE_QUERY_OA_INFO, then the reply uses struct
+ * drm_xe_query_oa_info in .data.
+ */
+struct drm_xe_query_oa_info {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @oa_unit_count: number of OA units returned in oau[] */
+ __u32 oa_unit_count;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @reserved: MBZ */
+ __u64 reserved[4];
+
+ /** @oau: OA units returned for this device */
+ struct drm_xe_query_oa_unit {
+ /** @oa_unit_id: OA unit ID */
+ __u16 oa_unit_id;
+
+ /** @gt_id: GT ID for this OA unit */
+ __u16 gt_id;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @oa_timestamp_freq: OA timestamp freq */
+ __u64 oa_timestamp_freq;
+
+ /** @reserved: MBZ */
+ __u64 reserved[4];
+
+ /** @eci: engines attached to this OA unit */
+ struct drm_xe_engine_class_instance eci[];
+ } oau[];
+};
+
enum drm_xe_oa_property_id {
/**
* Open the stream for a specific exec queue id (as used with
@@ -1185,13 +1228,11 @@ enum drm_xe_oa_property_id {
DRM_XE_OA_PROP_HOLD_PREEMPTION,
/**
- * Specifying this pins all contexts to the specified SSEU power
- * configuration for the duration of the recording.
- *
- * This parameter's value is a pointer to a struct
- * drm_xe_gem_context_param_sseu (TBD).
+ * Specify a global OA buffer size to be allocated in bytes. The
+ * size specified must be supported by HW (powers of 2 ranging from
+ * 128 KB to 128Mb depending on the platform)
*/
- DRM_XE_OA_PROP_GLOBAL_SSEU,
+ DRM_XE_OA_PROP_OA_BUFFER_SIZE,
/**
* This optional parameter specifies the timer interval in nanoseconds
@@ -1223,6 +1264,22 @@ enum drm_xe_oa_property_id {
};
struct drm_xe_oa_open_param {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /**
+ * @config_syncobj: (Output) handle to configuration syncobj
+ *
+ * Handle to a syncobj which the kernel will signal after stream
+ * configuration or re-configuration is complete (after return from
+ * the ioctl). This handle can be provided as a dependency to the
+ * next XE exec ioctl.
+ */
+ __u32 config_syncobj;
+
+ __u32 reserved;
+
+ /** @flags: Flags */
__u32 flags;
#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
@@ -1283,6 +1340,9 @@ enum drm_xe_oa_record_type {
};
struct drm_xe_oa_config {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
/**
* @uuid:
*
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions
2023-09-19 16:10 ` [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions Ashutosh Dixit
@ 2023-10-04 0:23 ` Dixit, Ashutosh
2023-10-05 22:33 ` Dixit, Ashutosh
2023-10-20 7:28 ` [Intel-xe] [18/21] " Lionel Landwerlin
2 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-04 0:23 UTC (permalink / raw)
To: intel-xe
On Tue, 19 Sep 2023 09:10:46 -0700, Ashutosh Dixit wrote:
>
> struct drm_xe_oa_open_param {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /**
> + * @config_syncobj: (Output) handle to configuration syncobj
> + *
> + * Handle to a syncobj which the kernel will signal after stream
> + * configuration or re-configuration is complete (after return from
> + * the ioctl). This handle can be provided as a dependency to the
> + * next XE exec ioctl.
> + */
> + __u32 config_syncobj;
> +
I am reworking this fence part and will post this in the next rev. Please
don't review this yet. Other uapi changes in this series can be reviewed
now.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions
2023-09-19 16:10 ` [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions Ashutosh Dixit
2023-10-04 0:23 ` Dixit, Ashutosh
@ 2023-10-05 22:33 ` Dixit, Ashutosh
2023-10-12 3:14 ` Umesh Nerlige Ramappa
2023-10-20 7:28 ` [Intel-xe] [18/21] " Lionel Landwerlin
2 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 22:33 UTC (permalink / raw)
To: intel-xe
On Tue, 19 Sep 2023 09:10:46 -0700, Ashutosh Dixit wrote:
>
> +/**
> + * struct drm_xe_query_oa_info - describe OA units
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_OA_INFO, then the reply uses struct
> + * drm_xe_query_oa_info in .data.
> + */
> +struct drm_xe_query_oa_info {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @oa_unit_count: number of OA units returned in oau[] */
> + __u32 oa_unit_count;
> +
> + /** @pad: MBZ */
> + __u32 pad;
After discussions with Umesh, we will add a 'capabilities' bitmask here.
Umesh, could you please see if anything else should be added to this
struct?
Thanks.
--
Ashutosh
> +
> + /** @reserved: MBZ */
> + __u64 reserved[4];
> +
> + /** @oau: OA units returned for this device */
> + struct drm_xe_query_oa_unit {
> + /** @oa_unit_id: OA unit ID */
> + __u16 oa_unit_id;
> +
> + /** @gt_id: GT ID for this OA unit */
> + __u16 gt_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @oa_timestamp_freq: OA timestamp freq */
> + __u64 oa_timestamp_freq;
> +
> + /** @reserved: MBZ */
> + __u64 reserved[4];
> +
> + /** @eci: engines attached to this OA unit */
> + struct drm_xe_engine_class_instance eci[];
> + } oau[];
> +};
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions
2023-10-05 22:33 ` Dixit, Ashutosh
@ 2023-10-12 3:14 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-12 3:14 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
On Thu, Oct 05, 2023 at 03:33:04PM -0700, Dixit, Ashutosh wrote:
>On Tue, 19 Sep 2023 09:10:46 -0700, Ashutosh Dixit wrote:
>>
>> +/**
>> + * struct drm_xe_query_oa_info - describe OA units
>> + *
>> + * If a query is made with a struct drm_xe_device_query where .query
>> + * is equal to DRM_XE_DEVICE_QUERY_OA_INFO, then the reply uses struct
>> + * drm_xe_query_oa_info in .data.
>> + */
>> +struct drm_xe_query_oa_info {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /** @oa_unit_count: number of OA units returned in oau[] */
>> + __u32 oa_unit_count;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>
>After discussions with Umesh, we will add a 'capabilities' bitmask here.
>
>Umesh, could you please see if anything else should be added to this
>struct?
Nothing that I can think of now.
Thanks,
Umesh
>
>Thanks.
>--
>Ashutosh
>
>> +
>> + /** @reserved: MBZ */
>> + __u64 reserved[4];
>> +
>> + /** @oau: OA units returned for this device */
>> + struct drm_xe_query_oa_unit {
>> + /** @oa_unit_id: OA unit ID */
>> + __u16 oa_unit_id;
>> +
>> + /** @gt_id: GT ID for this OA unit */
>> + __u16 gt_id;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /** @oa_timestamp_freq: OA timestamp freq */
>> + __u64 oa_timestamp_freq;
>> +
>> + /** @reserved: MBZ */
>> + __u64 reserved[4];
>> +
>> + /** @eci: engines attached to this OA unit */
>> + struct drm_xe_engine_class_instance eci[];
>> + } oau[];
>> +};
^ permalink raw reply [flat|nested] 88+ messages in thread
* Re: [Intel-xe] [18/21] drm/xe/uapi: More OA uapi fixes/additions
2023-09-19 16:10 ` [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions Ashutosh Dixit
2023-10-04 0:23 ` Dixit, Ashutosh
2023-10-05 22:33 ` Dixit, Ashutosh
@ 2023-10-20 7:28 ` Lionel Landwerlin
2023-10-27 20:28 ` Dixit, Ashutosh
2 siblings, 1 reply; 88+ messages in thread
From: Lionel Landwerlin @ 2023-10-20 7:28 UTC (permalink / raw)
To: Ashutosh Dixit, intel-xe
On 19/09/2023 19:10, Ashutosh Dixit wrote:
> - Add drm_xe_query_oa_info to query information about OA units
> - Discontinue DRM_XE_OA_PROP_GLOBAL_SSEU since it is no longer needed
> - Add DRM_XE_OA_PROP_OA_BUFFER_SIZE to configure OA buffer size
> - Add output parameter 'config_syncobj' to signal userland when stream
> configuration is complete.
> - Add extensions field to structs to make structs future extensible
>
> The implementation of these uapi features will follow later. At present the
> emphasis is to finalize the uapi header.
>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> ---
> include/uapi/drm/xe_drm.h | 72 +++++++++++++++++++++++++++++++++++----
> 1 file changed, 66 insertions(+), 6 deletions(-)
>
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 77949c5abcee1..3b106bed42ea6 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -395,6 +395,7 @@ struct drm_xe_device_query {
> #define DRM_XE_DEVICE_QUERY_GTS 3
> #define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> +#define DRM_XE_DEVICE_QUERY_OA_INFO 6
> /** @query: The type of data to query */
> __u32 query;
>
> @@ -1133,6 +1134,48 @@ enum drm_xe_oa_format_type {
> XE_OA_FMT_TYPE_PEC,
> };
>
> +/**
> + * struct drm_xe_query_oa_info - describe OA units
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_OA_INFO, then the reply uses struct
> + * drm_xe_query_oa_info in .data.
> + */
> +struct drm_xe_query_oa_info {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @oa_unit_count: number of OA units returned in oau[] */
> + __u32 oa_unit_count;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: MBZ */
> + __u64 reserved[4];
> +
> + /** @oau: OA units returned for this device */
> + struct drm_xe_query_oa_unit {
> + /** @oa_unit_id: OA unit ID */
> + __u16 oa_unit_id;
> +
> + /** @gt_id: GT ID for this OA unit */
> + __u16 gt_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @oa_timestamp_freq: OA timestamp freq */
> + __u64 oa_timestamp_freq;
> +
> + /** @reserved: MBZ */
> + __u64 reserved[4];
> +
> + /** @eci: engines attached to this OA unit */
> + struct drm_xe_engine_class_instance eci[];
> + } oau[];
> +};
> +
> enum drm_xe_oa_property_id {
> /**
> * Open the stream for a specific exec queue id (as used with
> @@ -1185,13 +1228,11 @@ enum drm_xe_oa_property_id {
> DRM_XE_OA_PROP_HOLD_PREEMPTION,
>
> /**
> - * Specifying this pins all contexts to the specified SSEU power
> - * configuration for the duration of the recording.
> - *
> - * This parameter's value is a pointer to a struct
> - * drm_xe_gem_context_param_sseu (TBD).
> + * Specify a global OA buffer size to be allocated in bytes. The
> + * size specified must be supported by HW (powers of 2 ranging from
> + * 128 KB to 128Mb depending on the platform)
> */
> - DRM_XE_OA_PROP_GLOBAL_SSEU,
> + DRM_XE_OA_PROP_OA_BUFFER_SIZE,
>
> /**
> * This optional parameter specifies the timer interval in nanoseconds
> @@ -1223,6 +1264,22 @@ enum drm_xe_oa_property_id {
> };
>
> struct drm_xe_oa_open_param {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /**
> + * @config_syncobj: (Output) handle to configuration syncobj
> + *
> + * Handle to a syncobj which the kernel will signal after stream
> + * configuration or re-configuration is complete (after return from
> + * the ioctl). This handle can be provided as a dependency to the
> + * next XE exec ioctl.
> + */
> + __u32 config_syncobj;
So you're adding this, but there is no implementation for it?
> +
> + __u32 reserved;
> +
> + /** @flags: Flags */
> __u32 flags;
> #define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
> #define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
> @@ -1283,6 +1340,9 @@ enum drm_xe_oa_record_type {
> };
>
> struct drm_xe_oa_config {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> /**
> * @uuid:
> *
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [18/21] drm/xe/uapi: More OA uapi fixes/additions
2023-10-20 7:28 ` [Intel-xe] [18/21] " Lionel Landwerlin
@ 2023-10-27 20:28 ` Dixit, Ashutosh
2023-10-30 10:06 ` Lionel Landwerlin
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-27 20:28 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-xe
On Fri, 20 Oct 2023 00:28:01 -0700, Lionel Landwerlin wrote:
>
> > struct drm_xe_oa_open_param {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /**
> > + * @config_syncobj: (Output) handle to configuration syncobj
> > + *
> > + * Handle to a syncobj which the kernel will signal after stream
> > + * configuration or re-configuration is complete (after return from
> > + * the ioctl). This handle can be provided as a dependency to the
> > + * next XE exec ioctl.
> > + */
> > + __u32 config_syncobj;
>
> So you're adding this, but there is no implementation for it?
Not yet, but there will be. Actually the plan is to do this:
struct drm_xe_oa_open_param {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @num_syncs: Amount of struct drm_xe_sync in array. */
__u32 num_syncs;
/** @syncs: Pointer to struct drm_xe_sync array. */
__u64 syncs;
Which is exactly the same as what we see in drm_xe_vm_bind or
drm_xe_exec. So the plan is to make perf_open behave exactly like an
xe_exec which can be pipelined with other operations.
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [18/21] drm/xe/uapi: More OA uapi fixes/additions
2023-10-27 20:28 ` Dixit, Ashutosh
@ 2023-10-30 10:06 ` Lionel Landwerlin
2023-10-31 2:08 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Lionel Landwerlin @ 2023-10-30 10:06 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
On 27/10/2023 23:28, Dixit, Ashutosh wrote:
> On Fri, 20 Oct 2023 00:28:01 -0700, Lionel Landwerlin wrote:
>>> struct drm_xe_oa_open_param {
>>> + /** @extensions: Pointer to the first extension struct, if any */
>>> + __u64 extensions;
>>> +
>>> + /**
>>> + * @config_syncobj: (Output) handle to configuration syncobj
>>> + *
>>> + * Handle to a syncobj which the kernel will signal after stream
>>> + * configuration or re-configuration is complete (after return from
>>> + * the ioctl). This handle can be provided as a dependency to the
>>> + * next XE exec ioctl.
>>> + */
>>> + __u32 config_syncobj;
>> So you're adding this, but there is no implementation for it?
> Not yet, but there will be. Actually the plan is to do this:
>
> struct drm_xe_oa_open_param {
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> /** @num_syncs: Amount of struct drm_xe_sync in array. */
> __u32 num_syncs;
>
> /** @syncs: Pointer to struct drm_xe_sync array. */
> __u64 syncs;
>
> Which is exactly the same as what we see in drm_xe_vm_bind or
> drm_xe_exec. So the plan is to make perf_open behave exactly like an
> xe_exec which can be pipelined with other operations.
I don't think this is going to work because it means we have to close
and reopen the stream every time we want to change the configuration.
It would need to be a separate ioctl on the perf file descriptor to be
usable.
Otherwise we can't really pipeline anything since we have to drain the
buffer until we can close it and reopen a new file descriptor.
-Lionel
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [18/21] drm/xe/uapi: More OA uapi fixes/additions
2023-10-30 10:06 ` Lionel Landwerlin
@ 2023-10-31 2:08 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-31 2:08 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-xe
On Mon, 30 Oct 2023 03:06:23 -0700, Lionel Landwerlin wrote:
>
Hi Lionel,
> On 27/10/2023 23:28, Dixit, Ashutosh wrote:
> > On Fri, 20 Oct 2023 00:28:01 -0700, Lionel Landwerlin wrote:
> >>> struct drm_xe_oa_open_param {
> >>> + /** @extensions: Pointer to the first extension struct, if any */
> >>> + __u64 extensions;
> >>> +
> >>> + /**
> >>> + * @config_syncobj: (Output) handle to configuration syncobj
> >>> + *
> >>> + * Handle to a syncobj which the kernel will signal after stream
> >>> + * configuration or re-configuration is complete (after return from
> >>> + * the ioctl). This handle can be provided as a dependency to the
> >>> + * next XE exec ioctl.
> >>> + */
> >>> + __u32 config_syncobj;
> >> So you're adding this, but there is no implementation for it?
> > Not yet, but there will be. Actually the plan is to do this:
> >
> > struct drm_xe_oa_open_param {
> > /** @extensions: Pointer to the first extension struct, if any */
> > __u64 extensions;
> >
> > /** @num_syncs: Amount of struct drm_xe_sync in array. */
> > __u32 num_syncs;
> >
> > /** @syncs: Pointer to struct drm_xe_sync array. */
> > __u64 syncs;
> >
> > Which is exactly the same as what we see in drm_xe_vm_bind or
> > drm_xe_exec. So the plan is to make perf_open behave exactly like an
> > xe_exec which can be pipelined with other operations.
>
> I don't think this is going to work because it means we have to close and
> reopen the stream every time we want to change the configuration.
>
> It would need to be a separate ioctl on the perf file descriptor to be
> usable.
I didn't mention it, but the plan is the provide the same sync mechanism
also on the perf fd stream reconfiguration ioctl.
> Otherwise we can't really pipeline anything since we have to drain the
> buffer until we can close it and reopen a new file descriptor.
This I don't understand, since the disable-reconfigure-enable sequence on
the perf fd also resets OA buffer head/tail pointers (lose contents of the
OA buffer). So not sure why we don't need to "drain the buffer" in this
case.
Of course, secretly I am hoping if it's possible to eliminate these
disable-reconfigure-enable ioctl's on the perf fd and just do stream_close
followed by reconfigure + stream_open. I don't quite understand why this is
not possible.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (17 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 18/21] drm/xe/uapi: More OA uapi fixes/additions Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-09-19 17:02 ` Dixit, Ashutosh
2023-10-20 7:36 ` [Intel-xe] [19/21] " Lionel Landwerlin
2023-09-19 16:10 ` [Intel-xe] [PATCH 20/21] drm/xe/uapi: Use OA unit id to identify OA unit Ashutosh Dixit
` (10 subsequent siblings)
29 siblings, 2 replies; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
OA version was previously used to track which OA properties were introduced
at which version. However OA version is an outlier in that a similar
version is not used anywhere else in the kernel.
For XE, we will track addition of new properties by means of
xe_user_extension. Userland can either maintain a mapping of OA properties
against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
"discover" OA properties.
Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 5 -----
drivers/gpu/drm/xe/xe_oa.h | 1 -
drivers/gpu/drm/xe/xe_query.c | 1 -
include/uapi/drm/xe_drm.h | 3 +--
4 files changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 077698a0c5628..7cb900fc88f58 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -2331,11 +2331,6 @@ static struct ctl_table oa_ctl_table[] = {
{}
};
-int xe_oa_ioctl_version(struct xe_device *xe)
-{
- return 1;
-}
-
int xe_oa_sysctl_register(void)
{
sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
index cc6f64bc24ddf..c5a2745ab7cfe 100644
--- a/drivers/gpu/drm/xe/xe_oa.h
+++ b/drivers/gpu/drm/xe/xe_oa.h
@@ -12,7 +12,6 @@ int xe_oa_init(struct xe_device *xe);
void xe_oa_fini(struct xe_device *xe);
void xe_oa_register(struct xe_device *xe);
void xe_oa_unregister(struct xe_device *xe);
-int xe_oa_ioctl_version(struct xe_device *xe);
int xe_oa_sysctl_register(void);
void xe_oa_sysctl_unregister(void);
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index ad280bac9eed4..8246ce4e24ce5 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -202,7 +202,6 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
hweight_long(xe->info.mem_region_mask);
config->info[XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY] =
xe_exec_queue_device_get_max_priority(xe);
- config->info[XE_QUERY_OA_IOCTL_VERSION] = xe_oa_ioctl_version(xe);
if (copy_to_user(query_ptr, config, size)) {
kfree(config);
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 3b106bed42ea6..b0563cfc351ee 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -259,8 +259,7 @@ struct drm_xe_query_config {
#define XE_QUERY_CONFIG_GT_COUNT 4
#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
#define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
-#define XE_QUERY_OA_IOCTL_VERSION 7
-#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_OA_IOCTL_VERSION + 1)
+#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY + 1)
/** @info: array of elements containing the config info */
__u64 info[];
};
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-09-19 16:10 ` [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION Ashutosh Dixit
@ 2023-09-19 17:02 ` Dixit, Ashutosh
2023-10-04 2:37 ` Umesh Nerlige Ramappa
2023-10-20 7:36 ` [Intel-xe] [19/21] " Lionel Landwerlin
1 sibling, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-09-19 17:02 UTC (permalink / raw)
To: intel-xe
On Tue, 19 Sep 2023 09:10:47 -0700, Ashutosh Dixit wrote:
>
> OA version was previously used to track which OA properties were introduced
> at which version. However OA version is an outlier in that a similar
> version is not used anywhere else in the kernel.
This is not strictly true. E.g. AMD's include/uapi/linux/kfd_ioctl.h
contains KFD_IOCTL_MAJOR_VERSION/KFD_IOCTL_MINOR_VERSION.
> For XE, we will track addition of new properties by means of
> xe_user_extension. Userland can either maintain a mapping of OA properties
> against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
> "discover" OA properties.
But let's see if we need a version for OA or the kernel version itself is
sufficient.
>
> Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* Re: [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-09-19 17:02 ` Dixit, Ashutosh
@ 2023-10-04 2:37 ` Umesh Nerlige Ramappa
2023-10-05 3:28 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-04 2:37 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
On Tue, Sep 19, 2023 at 10:02:53AM -0700, Dixit, Ashutosh wrote:
>On Tue, 19 Sep 2023 09:10:47 -0700, Ashutosh Dixit wrote:
>>
>> OA version was previously used to track which OA properties were introduced
>> at which version. However OA version is an outlier in that a similar
>> version is not used anywhere else in the kernel.
>
>This is not strictly true. E.g. AMD's include/uapi/linux/kfd_ioctl.h
>contains KFD_IOCTL_MAJOR_VERSION/KFD_IOCTL_MINOR_VERSION.
>
>> For XE, we will track addition of new properties by means of
>> xe_user_extension. Userland can either maintain a mapping of OA properties
>> against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
>> "discover" OA properties.
>
>But let's see if we need a version for OA or the kernel version itself is
>sufficient.
>
>>
>> Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
ok, if there is precedence for a version, no harm adding it, but I agree
that we should see if there are ways to do this with the generic OA
query. For features that are added with extensions, it's taken care of
inherently. Sometimes there are features that are internal to the
implementation that the user might want to know. Those may need to be
exposed via capabilities/flags in the generic oa/perf query.
Umesh
>
>Thanks.
>--
>Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* Re: [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-10-04 2:37 ` Umesh Nerlige Ramappa
@ 2023-10-05 3:28 ` Dixit, Ashutosh
2023-10-05 19:35 ` Umesh Nerlige Ramappa
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 3:28 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Tue, 03 Oct 2023 19:37:58 -0700, Umesh Nerlige Ramappa wrote:
>
> On Tue, Sep 19, 2023 at 10:02:53AM -0700, Dixit, Ashutosh wrote:
> > On Tue, 19 Sep 2023 09:10:47 -0700, Ashutosh Dixit wrote:
> >>
> >> OA version was previously used to track which OA properties were introduced
> >> at which version. However OA version is an outlier in that a similar
> >> version is not used anywhere else in the kernel.
> >
> > This is not strictly true. E.g. AMD's include/uapi/linux/kfd_ioctl.h
> > contains KFD_IOCTL_MAJOR_VERSION/KFD_IOCTL_MINOR_VERSION.
> >
> >> For XE, we will track addition of new properties by means of
> >> xe_user_extension. Userland can either maintain a mapping of OA properties
> >> against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
> >> "discover" OA properties.
> >
> > But let's see if we need a version for OA or the kernel version itself is
> > sufficient.
> >
> >>
> >> Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> >> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>
> ok, if there is precedence for a version, no harm adding it, but I agree
> that we should see if there are ways to do this with the generic OA
> query. For features that are added with extensions, it's taken care of
> inherently.
Afaiu, in this case userland is still relying on return codes from the
kernel to discover available features, whereas a version or capability
flags allow userland to know available features a priori without
"discovery" by means of return codes.
> Sometimes there are features that are internal to the implementation that
> the user might want to know. Those may need to be exposed via
> capabilities/flags in the generic oa/perf query.
I agree that capability flags do appear to be a better option than a
version. But in i915 we could update the version without modifying the uapi
header, which we cannot do if we have capability flags (we'd e.g. at least
have to expose a new capability bit). Is modifying the uapi header a
concern?
Both the version and capability flags can be easily included in the oa_info
struct we are considering now.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* Re: [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-10-05 3:28 ` Dixit, Ashutosh
@ 2023-10-05 19:35 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-05 19:35 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
On Wed, Oct 04, 2023 at 08:28:59PM -0700, Dixit, Ashutosh wrote:
>On Tue, 03 Oct 2023 19:37:58 -0700, Umesh Nerlige Ramappa wrote:
>>
>> On Tue, Sep 19, 2023 at 10:02:53AM -0700, Dixit, Ashutosh wrote:
>> > On Tue, 19 Sep 2023 09:10:47 -0700, Ashutosh Dixit wrote:
>> >>
>> >> OA version was previously used to track which OA properties were introduced
>> >> at which version. However OA version is an outlier in that a similar
>> >> version is not used anywhere else in the kernel.
>> >
>> > This is not strictly true. E.g. AMD's include/uapi/linux/kfd_ioctl.h
>> > contains KFD_IOCTL_MAJOR_VERSION/KFD_IOCTL_MINOR_VERSION.
>> >
>> >> For XE, we will track addition of new properties by means of
>> >> xe_user_extension. Userland can either maintain a mapping of OA properties
>> >> against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
>> >> "discover" OA properties.
>> >
>> > But let's see if we need a version for OA or the kernel version itself is
>> > sufficient.
>> >
>> >>
>> >> Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> >> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>>
>> ok, if there is precedence for a version, no harm adding it, but I agree
>> that we should see if there are ways to do this with the generic OA
>> query. For features that are added with extensions, it's taken care of
>> inherently.
>
>Afaiu, in this case userland is still relying on return codes from the
>kernel to discover available features, whereas a version or capability
>flags allow userland to know available features a priori without
>"discovery" by means of return codes.
>
>> Sometimes there are features that are internal to the implementation that
>> the user might want to know. Those may need to be exposed via
>> capabilities/flags in the generic oa/perf query.
>
>I agree that capability flags do appear to be a better option than a
>version. But in i915 we could update the version without modifying the uapi
>header, which we cannot do if we have capability flags (we'd e.g. at least
>have to expose a new capability bit). Is modifying the uapi header a
>concern?
>
IMO, capability is still a uApi, so any such flags should be part of the
header.
Thanks,
Umesh
>Both the version and capability flags can be easily included in the oa_info
>struct we are considering now.
>
>Thanks.
>--
>Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* Re: [Intel-xe] [19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-09-19 16:10 ` [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION Ashutosh Dixit
2023-09-19 17:02 ` Dixit, Ashutosh
@ 2023-10-20 7:36 ` Lionel Landwerlin
2023-10-23 23:02 ` Umesh Nerlige Ramappa
1 sibling, 1 reply; 88+ messages in thread
From: Lionel Landwerlin @ 2023-10-20 7:36 UTC (permalink / raw)
To: Ashutosh Dixit, intel-xe
On 19/09/2023 19:10, Ashutosh Dixit wrote:
> OA version was previously used to track which OA properties were introduced
> at which version. However OA version is an outlier in that a similar
> version is not used anywhere else in the kernel.
>
> For XE, we will track addition of new properties by means of
> xe_user_extension. Userland can either maintain a mapping of OA properties
> against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
> "discover" OA properties.
As a userspace driver this terrible.
You're making us write more code because we have to discover every
single piece of implementation tweaks ever made to the kernel driver.
Yes OA version was an outlier in that it was better than the rest of
kernel API.
By reading a single value we could make decisions about how to
communicate with the kernel driver.
Having xe_user_extension here is not helping, we still have to fuzz our
way around the kernel to figure out what feature level is available.
-Lionel
>
> Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> ---
> drivers/gpu/drm/xe/xe_oa.c | 5 -----
> drivers/gpu/drm/xe/xe_oa.h | 1 -
> drivers/gpu/drm/xe/xe_query.c | 1 -
> include/uapi/drm/xe_drm.h | 3 +--
> 4 files changed, 1 insertion(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index 077698a0c5628..7cb900fc88f58 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -2331,11 +2331,6 @@ static struct ctl_table oa_ctl_table[] = {
> {}
> };
>
> -int xe_oa_ioctl_version(struct xe_device *xe)
> -{
> - return 1;
> -}
> -
> int xe_oa_sysctl_register(void)
> {
> sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
> diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
> index cc6f64bc24ddf..c5a2745ab7cfe 100644
> --- a/drivers/gpu/drm/xe/xe_oa.h
> +++ b/drivers/gpu/drm/xe/xe_oa.h
> @@ -12,7 +12,6 @@ int xe_oa_init(struct xe_device *xe);
> void xe_oa_fini(struct xe_device *xe);
> void xe_oa_register(struct xe_device *xe);
> void xe_oa_unregister(struct xe_device *xe);
> -int xe_oa_ioctl_version(struct xe_device *xe);
> int xe_oa_sysctl_register(void);
> void xe_oa_sysctl_unregister(void);
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index ad280bac9eed4..8246ce4e24ce5 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -202,7 +202,6 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> hweight_long(xe->info.mem_region_mask);
> config->info[XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY] =
> xe_exec_queue_device_get_max_priority(xe);
> - config->info[XE_QUERY_OA_IOCTL_VERSION] = xe_oa_ioctl_version(xe);
>
> if (copy_to_user(query_ptr, config, size)) {
> kfree(config);
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 3b106bed42ea6..b0563cfc351ee 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -259,8 +259,7 @@ struct drm_xe_query_config {
> #define XE_QUERY_CONFIG_GT_COUNT 4
> #define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> #define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
> -#define XE_QUERY_OA_IOCTL_VERSION 7
> -#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_OA_IOCTL_VERSION + 1)
> +#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY + 1)
> /** @info: array of elements containing the config info */
> __u64 info[];
> };
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-10-20 7:36 ` [Intel-xe] [19/21] " Lionel Landwerlin
@ 2023-10-23 23:02 ` Umesh Nerlige Ramappa
2023-10-24 4:08 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-23 23:02 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-xe
On Fri, Oct 20, 2023 at 10:36:37AM +0300, Lionel Landwerlin wrote:
>On 19/09/2023 19:10, Ashutosh Dixit wrote:
>>OA version was previously used to track which OA properties were introduced
>>at which version. However OA version is an outlier in that a similar
>>version is not used anywhere else in the kernel.
>>
>>For XE, we will track addition of new properties by means of
>>xe_user_extension. Userland can either maintain a mapping of OA properties
>>against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
>>"discover" OA properties.
>
>
>As a userspace driver this terrible.
>
>You're making us write more code because we have to discover every
>single piece of implementation tweaks ever made to the kernel driver.
>
>Yes OA version was an outlier in that it was better than the rest of
>kernel API.
>
>By reading a single value we could make decisions about how to
>communicate with the kernel driver.
>
>
>Having xe_user_extension here is not helping, we still have to fuzz
>our way around the kernel to figure out what feature level is
>available.
Hi Lionel, Ashutosh,
I don't want to change interfaces to make it more difficult for the
UMDs. Do you think capabilities could help achieve what you want? We
could have a bitmask of feature availability and the bitmask could be
part of the xe oa query.
If that's seen as an unnecessary uApi impact, then I am ok with version
being returned in the oa info query.
My primary concerns with the version in i915 were
(1) version bumps would need documentation even when version bump did
not have explicit uApi change. I couldn't find a good place in
i915_drm.h to put such documentation. I think capabilities would be self
documenting and it would be explicitly added to the uApi header.
(2) sometimes before upstreaming a feature, we maintained an internal
version for the feature that was using a different range of versions.
This would cause some grief when rebasing since the versions need to be
increasing in the order of commits. If we had a bitmask, we can manage
it better since there is no need to have an increasing value.
Suggestions welcome.
Thanks,
Umesh
>
>-Lionel
>
>
>>
>>Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>>---
>> drivers/gpu/drm/xe/xe_oa.c | 5 -----
>> drivers/gpu/drm/xe/xe_oa.h | 1 -
>> drivers/gpu/drm/xe/xe_query.c | 1 -
>> include/uapi/drm/xe_drm.h | 3 +--
>> 4 files changed, 1 insertion(+), 9 deletions(-)
>>
>>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>>index 077698a0c5628..7cb900fc88f58 100644
>>--- a/drivers/gpu/drm/xe/xe_oa.c
>>+++ b/drivers/gpu/drm/xe/xe_oa.c
>>@@ -2331,11 +2331,6 @@ static struct ctl_table oa_ctl_table[] = {
>> {}
>> };
>>-int xe_oa_ioctl_version(struct xe_device *xe)
>>-{
>>- return 1;
>>-}
>>-
>> int xe_oa_sysctl_register(void)
>> {
>> sysctl_header = register_sysctl("dev/xe", oa_ctl_table);
>>diff --git a/drivers/gpu/drm/xe/xe_oa.h b/drivers/gpu/drm/xe/xe_oa.h
>>index cc6f64bc24ddf..c5a2745ab7cfe 100644
>>--- a/drivers/gpu/drm/xe/xe_oa.h
>>+++ b/drivers/gpu/drm/xe/xe_oa.h
>>@@ -12,7 +12,6 @@ int xe_oa_init(struct xe_device *xe);
>> void xe_oa_fini(struct xe_device *xe);
>> void xe_oa_register(struct xe_device *xe);
>> void xe_oa_unregister(struct xe_device *xe);
>>-int xe_oa_ioctl_version(struct xe_device *xe);
>> int xe_oa_sysctl_register(void);
>> void xe_oa_sysctl_unregister(void);
>>diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
>>index ad280bac9eed4..8246ce4e24ce5 100644
>>--- a/drivers/gpu/drm/xe/xe_query.c
>>+++ b/drivers/gpu/drm/xe/xe_query.c
>>@@ -202,7 +202,6 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
>> hweight_long(xe->info.mem_region_mask);
>> config->info[XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY] =
>> xe_exec_queue_device_get_max_priority(xe);
>>- config->info[XE_QUERY_OA_IOCTL_VERSION] = xe_oa_ioctl_version(xe);
>> if (copy_to_user(query_ptr, config, size)) {
>> kfree(config);
>>diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>>index 3b106bed42ea6..b0563cfc351ee 100644
>>--- a/include/uapi/drm/xe_drm.h
>>+++ b/include/uapi/drm/xe_drm.h
>>@@ -259,8 +259,7 @@ struct drm_xe_query_config {
>> #define XE_QUERY_CONFIG_GT_COUNT 4
>> #define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
>> #define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
>>-#define XE_QUERY_OA_IOCTL_VERSION 7
>>-#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_OA_IOCTL_VERSION + 1)
>>+#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY + 1)
>> /** @info: array of elements containing the config info */
>> __u64 info[];
>> };
>
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-10-23 23:02 ` Umesh Nerlige Ramappa
@ 2023-10-24 4:08 ` Dixit, Ashutosh
2023-10-24 15:54 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-24 4:08 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: francois.dugast, intel-xe, Rodrigo Vivi
On Mon, 23 Oct 2023 16:02:53 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh/Lionel,
> On Fri, Oct 20, 2023 at 10:36:37AM +0300, Lionel Landwerlin wrote:
> > On 19/09/2023 19:10, Ashutosh Dixit wrote:
> >> OA version was previously used to track which OA properties were introduced
> >> at which version. However OA version is an outlier in that a similar
> >> version is not used anywhere else in the kernel.
> >>
> >> For XE, we will track addition of new properties by means of
> >> xe_user_extension. Userland can either maintain a mapping of OA properties
> >> against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
> >> "discover" OA properties.
> >
> >
> > As a userspace driver this terrible.
> >
> > You're making us write more code because we have to discover every single
> > piece of implementation tweaks ever made to the kernel driver.
> >
> > Yes OA version was an outlier in that it was better than the rest of
> > kernel API.
> >
> > By reading a single value we could make decisions about how to
> > communicate with the kernel driver.
> >
> >
> > Having xe_user_extension here is not helping, we still have to fuzz our
> > way around the kernel to figure out what feature level is available.
>
> Hi Lionel, Ashutosh,
>
> I don't want to change interfaces to make it more difficult for the
> UMDs. Do you think capabilities could help achieve what you want? We could
> have a bitmask of feature availability and the bitmask could be part of the
> xe oa query.
>
> If that's seen as an unnecessary uApi impact, then I am ok with version
> being returned in the oa info query.
>
> My primary concerns with the version in i915 were
>
> (1) version bumps would need documentation even when version bump did not
> have explicit uApi change. I couldn't find a good place in i915_drm.h to
> put such documentation. I think capabilities would be self documenting and
> it would be explicitly added to the uApi header.
> (2) sometimes before upstreaming a feature, we maintained an internal
> version for the feature that was using a different range of versions. This
> would cause some grief when rebasing since the versions need to be
> increasing in the order of commits. If we had a bitmask, we can manage it
> better since there is no need to have an increasing value.
>
> Suggestions welcome.
My 2 cents on this is that we should have uniform interfaces across Xe,
rather than have special treatment for OA. Or is OA special? Why? Because
we haven't absracted HW well? Why do OA interfaces have to change
frequently that we are talking about an OA version or OA capabilities when
other interfaces/subsystems don't seem to need these?
To me it seems capabilities should not be in the uapi since capabilities
can be constructed entirely in userspace by "probing" for available user
extensions (so capabilities seem redundant/duplicated). KMD can make it
easier for UMD's by returning unique return codes when particular
extensions are not present.
I am copying other people who are defining the uapi in Xe for comments,
hopefully we'll hear something. As I said the best way would be to do
things uniformly across various subsystems so UMD's can also build and use
common user xspace API's.
Francois/Matt/Rodrigo: could you please chime in here about how UMD's are
supposed to handle extensions when uapi changes happen.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* Re: [Intel-xe] [19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION
2023-10-24 4:08 ` Dixit, Ashutosh
@ 2023-10-24 15:54 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-24 15:54 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: francois.dugast, intel-xe, Rodrigo Vivi
On Mon, 23 Oct 2023 21:08:52 -0700, Dixit, Ashutosh wrote:
>
> On Mon, 23 Oct 2023 16:02:53 -0700, Umesh Nerlige Ramappa wrote:
> >
>
> Hi Umesh/Lionel,
>
> > On Fri, Oct 20, 2023 at 10:36:37AM +0300, Lionel Landwerlin wrote:
> > > On 19/09/2023 19:10, Ashutosh Dixit wrote:
> > >> OA version was previously used to track which OA properties were introduced
> > >> at which version. However OA version is an outlier in that a similar
> > >> version is not used anywhere else in the kernel.
> > >>
> > >> For XE, we will track addition of new properties by means of
> > >> xe_user_extension. Userland can either maintain a mapping of OA properties
> > >> against the kernel version, or rely on return codes (e.g. ENOTSUPP) to
> > >> "discover" OA properties.
> > >
> > >
> > > As a userspace driver this terrible.
> > >
> > > You're making us write more code because we have to discover every single
> > > piece of implementation tweaks ever made to the kernel driver.
> > >
> > > Yes OA version was an outlier in that it was better than the rest of
> > > kernel API.
> > >
> > > By reading a single value we could make decisions about how to
> > > communicate with the kernel driver.
> > >
> > >
> > > Having xe_user_extension here is not helping, we still have to fuzz our
> > > way around the kernel to figure out what feature level is available.
> >
> > Hi Lionel, Ashutosh,
> >
> > I don't want to change interfaces to make it more difficult for the
> > UMDs. Do you think capabilities could help achieve what you want? We could
> > have a bitmask of feature availability and the bitmask could be part of the
> > xe oa query.
> >
> > If that's seen as an unnecessary uApi impact, then I am ok with version
> > being returned in the oa info query.
> >
> > My primary concerns with the version in i915 were
> >
> > (1) version bumps would need documentation even when version bump did not
> > have explicit uApi change. I couldn't find a good place in i915_drm.h to
> > put such documentation. I think capabilities would be self documenting and
> > it would be explicitly added to the uApi header.
> > (2) sometimes before upstreaming a feature, we maintained an internal
> > version for the feature that was using a different range of versions. This
> > would cause some grief when rebasing since the versions need to be
> > increasing in the order of commits. If we had a bitmask, we can manage it
> > better since there is no need to have an increasing value.
> >
> > Suggestions welcome.
>
> My 2 cents on this is that we should have uniform interfaces across Xe,
> rather than have special treatment for OA. Or is OA special? Why? Because
> we haven't absracted HW well? Why do OA interfaces have to change
> frequently that we are talking about an OA version or OA capabilities when
> other interfaces/subsystems don't seem to need these?
>
> To me it seems capabilities should not be in the uapi since capabilities
> can be constructed entirely in userspace by "probing" for available user
> extensions (so capabilities seem redundant/duplicated). KMD can make it
> easier for UMD's by returning unique return codes when particular
> extensions are not present.
That said, we could probably go with capabilities if needed. An extension N
would be represented by a capability BIT(N). What we don't want to do is
add the same extension twice in xe_drm.h, once as an extension and a second
time as a capability.
>
> I am copying other people who are defining the uapi in Xe for comments,
> hopefully we'll hear something. As I said the best way would be to do
> things uniformly across various subsystems so UMD's can also build and use
> common user xspace API's.
>
> Francois/Matt/Rodrigo: could you please chime in here about how UMD's are
> supposed to handle extensions when uapi changes happen.
>
> Thanks.
> --
> Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 20/21] drm/xe/uapi: Use OA unit id to identify OA unit
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (18 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 19/21] drm/xe/uapi: Drop OA_IOCTL_VERSION Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-10-04 22:37 ` Umesh Nerlige Ramappa
2023-09-19 16:10 ` [Intel-xe] [PATCH 21/21] drm/xe/uapi: Convert OA property key/value pairs to a struct Ashutosh Dixit
` (9 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Previous uapi uses an indirect way (the engine class/instance of an engine
connected to an OA unit) to identify an OA unit. Replace this by directly
using the OA unit ID to identify the OA unit.
With this change DRM_XE_OA_PROP_OA_ENGINE_CLASS property is not needed any
more and removed. DRM_XE_OA_PROP_OA_ENGINE_INSTANCE is still used with
DRM_XE_OA_PROP_EXEC_QUEUE_ID.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 267 +++++++++++++++++++++----------------
include/uapi/drm/xe_drm.h | 22 ++-
2 files changed, 160 insertions(+), 129 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 7cb900fc88f58..ded52d5aabea6 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -60,9 +60,13 @@ static const struct xe_oa_format oa_formats[] = {
};
struct xe_oa_open_properties {
+ u16 oa_unit_id;
bool sample;
+
bool single_exec_q;
u64 exec_q_id;
+ struct xe_exec_queue *exec_q;
+ u16 instance;
int metrics_set;
enum xe_oa_format_name oa_format;
@@ -1287,6 +1291,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
struct xe_oa *oa = stream->oa;
int ret;
+ stream->exec_q = props->exec_q;
stream->poll_oa_period = props->poll_oa_period;
stream->hwe = props->hwe;
stream->gt = stream->hwe->gt;
@@ -1377,61 +1382,27 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
static int
xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
struct drm_xe_oa_open_param *param,
- struct xe_oa_open_properties *props,
- struct drm_file *file)
+ struct xe_oa_open_properties *props)
{
- struct xe_file *xef = to_xe_file(file);
- struct xe_oa_stream *stream = NULL;
- struct xe_exec_queue *q = NULL;
+ struct xe_oa_stream *stream;
unsigned long f_flags = 0;
- bool privileged_op = true;
int stream_fd;
int ret;
- if (props->single_exec_q) {
- q = xe_exec_queue_lookup(xef, props->exec_q_id);
- if (XE_IOCTL_DBG(oa->xe, !q)) {
- ret = -ENOENT;
- goto err_exec_q;
- }
- }
-
- /*
- * The OAR unit only monitors the RCS on a per context basis. Relax
- * requirements if the user doesn't request global stream access,
- * i.e. query based sampling using MI_REPORT_PERF_COUNT
- */
- if (q && !props->sample)
- privileged_op = false;
-
- if (privileged_op && xe_oa_stream_paranoid && !perfmon_capable()) {
- drm_dbg(&oa->xe->drm, "Insufficient privileges to open xe perf stream\n");
- ret = -EACCES;
- goto err_exec_q;
- }
-
- if (!props->sample && !q) {
- drm_dbg(&oa->xe->drm, "Only OA report sampling supported\n");
- ret = -EINVAL;
- goto err_exec_q;
- }
-
/* We currently only allow exclusive access */
if (props->hwe->oa_group->exclusive_stream) {
drm_dbg(&oa->xe->drm, "OA unit already in use\n");
ret = -EBUSY;
- goto err_exec_q;
+ goto exit;
}
stream = kzalloc(sizeof(*stream), GFP_KERNEL);
if (!stream) {
ret = -ENOMEM;
- goto err_exec_q;
+ goto exit;
}
stream->oa = oa;
- stream->exec_q = q;
-
ret = xe_oa_stream_init(stream, props);
if (ret)
goto err_free;
@@ -1458,9 +1429,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
xe_oa_stream_destroy(stream);
err_free:
kfree(stream);
-err_exec_q:
- if (q)
- xe_exec_queue_put(q);
+exit:
return ret;
}
@@ -1502,11 +1471,6 @@ static u64 oa_exponent_to_ns(struct xe_gt *gt, int exponent)
return div_u64(nom + den - 1, den);
}
-static bool engine_supports_oa(const struct xe_hw_engine *hwe)
-{
- return hwe->oa_group;
-}
-
static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
{
switch (hwe->oa_group->type) {
@@ -1537,20 +1501,134 @@ static int decode_oa_format(struct xe_oa *oa, u64 prop, enum xe_oa_format_name *
return -EINVAL;
}
+u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
+{
+ return hwe->oa_group && hwe->oa_group->num_engines ?
+ hwe->oa_group->oa_unit_id : U16_MAX;
+}
+
+static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_properties *props)
+{
+ struct xe_gt *gt;
+ int i, ret = 0;
+
+ if (props->exec_q) {
+ /* When we have an exec_q, get hwe from the exec_q */
+ for_each_gt(gt, oa->xe, i) {
+ props->hwe = xe_gt_hw_engine(gt, props->exec_q->class,
+ props->instance, false);
+ if (props->hwe)
+ break;
+ }
+ if (props->hwe && (xe_oa_unit_id(props->hwe) != props->oa_unit_id)) {
+ drm_dbg(&oa->xe->drm, "OA unit ID mismatch for exec_q\n");
+ ret = -EINVAL;
+ }
+ } else {
+ struct xe_hw_engine *hwe;
+ enum xe_hw_engine_id id;
+
+ /* Else just get the first hwe attached to the oa unit */
+ for_each_gt(gt, oa->xe, i) {
+ for_each_hw_engine(hwe, gt, id) {
+ if (xe_oa_unit_id(hwe) == props->oa_unit_id) {
+ props->hwe = hwe;
+ goto out;
+ }
+ }
+ }
+ }
+out:
+ if (!props->hwe) {
+ drm_dbg(&oa->xe->drm, "Unable to find hwe for OA unit ID %d\n",
+ props->oa_unit_id);
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static int xe_oa_validate_properties(struct xe_oa *oa,
+ struct xe_oa_open_properties *props,
+ struct drm_file *file)
+{
+ struct xe_file *xef = to_xe_file(file);
+ const struct xe_oa_format *f;
+ bool privileged_op = true;
+ int ret;
+
+ if (props->single_exec_q) {
+ props->exec_q = xe_exec_queue_lookup(xef, props->exec_q_id);
+ if (XE_IOCTL_DBG(oa->xe, !props->exec_q)) {
+ ret = -ENOENT;
+ goto err_exec_q;
+ }
+ }
+
+ /*
+ * The OAR unit only monitors the RCS on a per context basis. Relax
+ * requirements if the user doesn't request global stream access,
+ * i.e. query based sampling using MI_REPORT_PERF_COUNT
+ */
+ if (props->exec_q && !props->sample)
+ privileged_op = false;
+
+ if (privileged_op && xe_oa_stream_paranoid && !perfmon_capable()) {
+ drm_dbg(&oa->xe->drm, "Insufficient privileges to open xe perf stream\n");
+ ret = -EACCES;
+ goto err_exec_q;
+ }
+
+ if (!props->exec_q && !props->sample) {
+ drm_dbg(&oa->xe->drm, "Only OA report sampling supported\n");
+ ret = -EINVAL;
+ goto err_exec_q;
+ }
+
+ ret = xe_oa_assign_hwe(oa, props);
+ if (ret)
+ goto err_exec_q;
+
+ f = &oa->oa_formats[props->oa_format];
+ if (!props->oa_format || !f->size ||
+ !engine_supports_oa_format(props->hwe, f->type)) {
+ drm_dbg(&oa->xe->drm, "Invalid OA format %d type %d size %d for class %d\n",
+ props->oa_format, f->type, f->size, props->hwe->class);
+ ret = -EINVAL;
+ goto err_exec_q;
+ }
+
+ if (props->oa_periodic) {
+ u64 oa_period, oa_freq_hz;
+
+ oa_period = oa_exponent_to_ns(props->hwe->gt, props->oa_period_exponent);
+ oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
+ if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
+ drm_dbg(&oa->xe->drm,
+ "OA exponent would exceed the max sampling frequency (sysctl dev.xe.oa_max_sample_rate) %uHz without CAP_PERFMON or CAP_SYS_ADMIN privileges\n",
+ xe_oa_max_sample_rate);
+ ret = -EACCES;
+ goto err_exec_q;
+ }
+ }
+
+ return 0;
+
+err_exec_q:
+ if (props->exec_q)
+ xe_exec_queue_put(props->exec_q);
+ return ret;
+}
+
#define OA_EXPONENT_MAX 31
static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
- u32 n_props,
+ u32 n_props, struct drm_file *file,
struct xe_oa_open_properties *props)
{
- const struct xe_oa_format *f;
u64 __user *uprop = uprops;
- bool config_instance = false;
- bool config_class = false;
- u8 class, instance;
- struct xe_gt *gt;
- u32 i;
int ret;
+ u32 i;
if (!n_props || n_props >= DRM_XE_OA_PROP_MAX) {
drm_dbg(&oa->xe->drm, "Invalid number of xe perf properties given\n");
@@ -1559,10 +1637,6 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
props->poll_oa_period = DEFAULT_POLL_PERIOD_NS;
- /* Defaults when class:instance is not passed */
- class = XE_ENGINE_CLASS_RENDER;
- instance = 0;
-
for (i = 0; i < n_props; i++) {
u64 id, value;
@@ -1575,9 +1649,12 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
return ret;
switch ((enum drm_xe_oa_property_id)id) {
- case DRM_XE_OA_PROP_EXEC_QUEUE_ID:
- props->single_exec_q = true;
- props->exec_q_id = value;
+ case DRM_XE_OA_PROP_OA_UNIT_ID:
+ if (value >= oa->oa_unit_ids) {
+ drm_dbg(&oa->xe->drm, "OA unit ID out of range %lld\n", value);
+ return -EINVAL;
+ }
+ props->oa_unit_id = value;
break;
case DRM_XE_OA_PROP_SAMPLE_OA:
props->sample = value;
@@ -1614,13 +1691,12 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
}
props->poll_oa_period = value;
break;
- case DRM_XE_OA_PROP_OA_ENGINE_CLASS:
- class = (u8)value;
- config_class = true;
+ case DRM_XE_OA_PROP_EXEC_QUEUE_ID:
+ props->single_exec_q = true;
+ props->exec_q_id = value;
break;
case DRM_XE_OA_PROP_OA_ENGINE_INSTANCE:
- instance = (u8)value;
- config_instance = true;
+ props->instance = value;
break;
default:
drm_dbg(&oa->xe->drm, "Unknown xe oa property ID %lld\n", id);
@@ -1630,49 +1706,9 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
uprop += 2;
}
- if ((config_class && !config_instance) ||
- (config_instance && !config_class)) {
- drm_dbg(&oa->xe->drm, "OA engine class/instance parameters must be passed together\n");
- return -EINVAL;
- }
-
- for_each_gt(gt, oa->xe, i) {
- props->hwe = xe_gt_hw_engine(gt, class, instance, false);
- if (props->hwe)
- break;
- }
- if (!props->hwe) {
- drm_dbg(&oa->xe->drm, "OA engine class and instance invalid %d:%d\n",
- class, instance);
- return -EINVAL;
- }
-
- if (!engine_supports_oa(props->hwe)) {
- drm_dbg(&oa->xe->drm, "Engine not supported by OA %d:%d\n",
- class, instance);
- return -EINVAL;
- }
-
- f = &oa->oa_formats[props->oa_format];
- if (!props->oa_format || !f->size ||
- !engine_supports_oa_format(props->hwe, f->type)) {
- drm_dbg(&oa->xe->drm, "Invalid OA format %d type %d size %d for class %d\n",
- props->oa_format, f->type, f->size, props->hwe->class);
- return -EINVAL;
- }
-
- if (props->oa_periodic) {
- u64 oa_period, oa_freq_hz;
-
- oa_period = oa_exponent_to_ns(props->hwe->gt, props->oa_period_exponent);
- oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
- if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
- drm_dbg(&oa->xe->drm,
- "OA exponent would exceed the max sampling frequency (sysctl dev.xe.oa_max_sample_rate) %uHz without CAP_PERFMON or CAP_SYS_ADMIN privileges\n",
- xe_oa_max_sample_rate);
- return -EACCES;
- }
- }
+ ret = xe_oa_validate_properties(oa, props, file);
+ if (ret)
+ return ret;
return 0;
}
@@ -1702,17 +1738,20 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data, struct drm_file
}
ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param.properties_ptr),
- param.num_properties,
- &props);
+ param.num_properties, file, &props);
if (ret)
return ret;
gt = props.hwe->gt;
mutex_lock(>->oa.lock);
- ret = xe_oa_stream_open_ioctl_locked(oa, ¶m, &props, file);
+ ret = xe_oa_stream_open_ioctl_locked(oa, ¶m, &props);
mutex_unlock(>->oa.lock);
+ /* Drop exec_q reference taken in read_properties/validate_properties on error */
+ if (ret < 0 && props.exec_q)
+ xe_exec_queue_put(props.exec_q);
+
return ret;
}
@@ -2212,12 +2251,6 @@ static int xe_oa_init_engine_groups(struct xe_oa *oa)
return 0;
}
-u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
-{
- return hwe->oa_group && hwe->oa_group->num_engines ?
- hwe->oa_group->oa_unit_id : U16_MAX;
-}
-
static void oa_format_add(struct xe_oa *oa, enum xe_oa_format_name format)
{
__set_bit(format, oa->format_mask);
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index b0563cfc351ee..c0018abee4052 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1177,11 +1177,11 @@ struct drm_xe_query_oa_info {
enum drm_xe_oa_property_id {
/**
- * Open the stream for a specific exec queue id (as used with
- * drm_xe_exec). A stream opened for a specific exec queue id this
- * way won't typically require root privileges.
+ * ID of the OA unit on which to open the OA stream, see
+ * @oa_unit_id in 'struct drm_xe_engine_class_instance'. Defaults
+ * to 0 if not provided.
*/
- DRM_XE_OA_PROP_EXEC_QUEUE_ID = 1,
+ DRM_XE_OA_PROP_OA_UNIT_ID = 1,
/**
* A value of 1 requests the inclusion of raw OA unit reports as
@@ -1245,17 +1245,15 @@ enum drm_xe_oa_property_id {
DRM_XE_OA_PROP_POLL_OA_PERIOD,
/**
- * Multiple engines may be mapped to the same OA unit. The OA unit is
- * identified by class:instance of any engine mapped to it.
- *
- * This parameter specifies the engine class and must be passed along
- * with DRM_XE_OA_PROP_OA_ENGINE_INSTANCE.
+ * Open the stream for a specific exec queue id (as used with
+ * drm_xe_exec). A stream opened for a specific exec queue id this
+ * way won't typically require root privileges.
*/
- DRM_XE_OA_PROP_OA_ENGINE_CLASS,
+ DRM_XE_OA_PROP_EXEC_QUEUE_ID,
/**
- * This parameter specifies the engine instance and must be passed along
- * with DRM_XE_OA_PROP_OA_ENGINE_CLASS.
+ * This parameter specifies the engine instance and can be passed along
+ * with DRM_XE_OA_PROP_EXEC_QUEUE_ID or will default to 0.
*/
DRM_XE_OA_PROP_OA_ENGINE_INSTANCE,
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 20/21] drm/xe/uapi: Use OA unit id to identify OA unit
2023-09-19 16:10 ` [Intel-xe] [PATCH 20/21] drm/xe/uapi: Use OA unit id to identify OA unit Ashutosh Dixit
@ 2023-10-04 22:37 ` Umesh Nerlige Ramappa
2023-10-05 3:04 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-04 22:37 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
On Tue, Sep 19, 2023 at 09:10:48AM -0700, Ashutosh Dixit wrote:
>Previous uapi uses an indirect way (the engine class/instance of an engine
>connected to an OA unit) to identify an OA unit. Replace this by directly
>using the OA unit ID to identify the OA unit.
>
>With this change DRM_XE_OA_PROP_OA_ENGINE_CLASS property is not needed any
>more and removed. DRM_XE_OA_PROP_OA_ENGINE_INSTANCE is still used with
>DRM_XE_OA_PROP_EXEC_QUEUE_ID.
>
>Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>---
> drivers/gpu/drm/xe/xe_oa.c | 267 +++++++++++++++++++++----------------
> include/uapi/drm/xe_drm.h | 22 ++-
> 2 files changed, 160 insertions(+), 129 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
>index 7cb900fc88f58..ded52d5aabea6 100644
>--- a/drivers/gpu/drm/xe/xe_oa.c
>+++ b/drivers/gpu/drm/xe/xe_oa.c
>@@ -60,9 +60,13 @@ static const struct xe_oa_format oa_formats[] = {
> };
>
> struct xe_oa_open_properties {
>+ u16 oa_unit_id;
> bool sample;
>+
> bool single_exec_q;
> u64 exec_q_id;
>+ struct xe_exec_queue *exec_q;
>+ u16 instance;
>
> int metrics_set;
> enum xe_oa_format_name oa_format;
>@@ -1287,6 +1291,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> struct xe_oa *oa = stream->oa;
> int ret;
>
>+ stream->exec_q = props->exec_q;
> stream->poll_oa_period = props->poll_oa_period;
> stream->hwe = props->hwe;
> stream->gt = stream->hwe->gt;
>@@ -1377,61 +1382,27 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
> static int
> xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
> struct drm_xe_oa_open_param *param,
>- struct xe_oa_open_properties *props,
>- struct drm_file *file)
>+ struct xe_oa_open_properties *props)
> {
>- struct xe_file *xef = to_xe_file(file);
>- struct xe_oa_stream *stream = NULL;
>- struct xe_exec_queue *q = NULL;
>+ struct xe_oa_stream *stream;
> unsigned long f_flags = 0;
>- bool privileged_op = true;
> int stream_fd;
> int ret;
>
>- if (props->single_exec_q) {
>- q = xe_exec_queue_lookup(xef, props->exec_q_id);
>- if (XE_IOCTL_DBG(oa->xe, !q)) {
>- ret = -ENOENT;
>- goto err_exec_q;
>- }
>- }
>-
>- /*
>- * The OAR unit only monitors the RCS on a per context basis. Relax
>- * requirements if the user doesn't request global stream access,
>- * i.e. query based sampling using MI_REPORT_PERF_COUNT
>- */
>- if (q && !props->sample)
>- privileged_op = false;
>-
>- if (privileged_op && xe_oa_stream_paranoid && !perfmon_capable()) {
>- drm_dbg(&oa->xe->drm, "Insufficient privileges to open xe perf stream\n");
>- ret = -EACCES;
>- goto err_exec_q;
>- }
>-
>- if (!props->sample && !q) {
>- drm_dbg(&oa->xe->drm, "Only OA report sampling supported\n");
>- ret = -EINVAL;
>- goto err_exec_q;
>- }
>-
> /* We currently only allow exclusive access */
> if (props->hwe->oa_group->exclusive_stream) {
> drm_dbg(&oa->xe->drm, "OA unit already in use\n");
> ret = -EBUSY;
>- goto err_exec_q;
>+ goto exit;
> }
>
> stream = kzalloc(sizeof(*stream), GFP_KERNEL);
> if (!stream) {
> ret = -ENOMEM;
>- goto err_exec_q;
>+ goto exit;
> }
>
> stream->oa = oa;
>- stream->exec_q = q;
>-
> ret = xe_oa_stream_init(stream, props);
> if (ret)
> goto err_free;
>@@ -1458,9 +1429,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
> xe_oa_stream_destroy(stream);
> err_free:
> kfree(stream);
>-err_exec_q:
>- if (q)
>- xe_exec_queue_put(q);
>+exit:
> return ret;
> }
>
>@@ -1502,11 +1471,6 @@ static u64 oa_exponent_to_ns(struct xe_gt *gt, int exponent)
> return div_u64(nom + den - 1, den);
> }
>
>-static bool engine_supports_oa(const struct xe_hw_engine *hwe)
>-{
>- return hwe->oa_group;
>-}
>-
> static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
> {
> switch (hwe->oa_group->type) {
>@@ -1537,20 +1501,134 @@ static int decode_oa_format(struct xe_oa *oa, u64 prop, enum xe_oa_format_name *
> return -EINVAL;
> }
>
>+u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
>+{
>+ return hwe->oa_group && hwe->oa_group->num_engines ?
>+ hwe->oa_group->oa_unit_id : U16_MAX;
>+}
>+
>+static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_properties *props)
>+{
>+ struct xe_gt *gt;
>+ int i, ret = 0;
>+
>+ if (props->exec_q) {
>+ /* When we have an exec_q, get hwe from the exec_q */
>+ for_each_gt(gt, oa->xe, i) {
>+ props->hwe = xe_gt_hw_engine(gt, props->exec_q->class,
>+ props->instance, false);
>+ if (props->hwe)
>+ break;
>+ }
>+ if (props->hwe && (xe_oa_unit_id(props->hwe) != props->oa_unit_id)) {
>+ drm_dbg(&oa->xe->drm, "OA unit ID mismatch for exec_q\n");
>+ ret = -EINVAL;
>+ }
>+ } else {
>+ struct xe_hw_engine *hwe;
>+ enum xe_hw_engine_id id;
>+
>+ /* Else just get the first hwe attached to the oa unit */
>+ for_each_gt(gt, oa->xe, i) {
>+ for_each_hw_engine(hwe, gt, id) {
>+ if (xe_oa_unit_id(hwe) == props->oa_unit_id) {
>+ props->hwe = hwe;
>+ goto out;
>+ }
>+ }
>+ }
>+ }
I think both the if and else blocks above will get you the same hwe
object, so you can just pick the else code to assign hwe.
Are we allowing the user to pass either oa_unit_id OR exec_q/instance? I
think based on the HW requirement we should enable OAR/OAG together, so
maybe enforce that the user passes both params. Thoughts?
Thanks,
Umesh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 20/21] drm/xe/uapi: Use OA unit id to identify OA unit
2023-10-04 22:37 ` Umesh Nerlige Ramappa
@ 2023-10-05 3:04 ` Dixit, Ashutosh
2023-10-05 3:09 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 3:04 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Wed, 04 Oct 2023 15:37:51 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh,
> On Tue, Sep 19, 2023 at 09:10:48AM -0700, Ashutosh Dixit wrote:
> > Previous uapi uses an indirect way (the engine class/instance of an engine
> > connected to an OA unit) to identify an OA unit. Replace this by directly
> > using the OA unit ID to identify the OA unit.
> >
> > With this change DRM_XE_OA_PROP_OA_ENGINE_CLASS property is not needed any
> > more and removed. DRM_XE_OA_PROP_OA_ENGINE_INSTANCE is still used with
> > DRM_XE_OA_PROP_EXEC_QUEUE_ID.
/snip/
> > +static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_properties *props)
> > +{
> > + struct xe_gt *gt;
> > + int i, ret = 0;
> > +
> > + if (props->exec_q) {
> > + /* When we have an exec_q, get hwe from the exec_q */
> > + for_each_gt(gt, oa->xe, i) {
> > + props->hwe = xe_gt_hw_engine(gt, props->exec_q->class,
> > + props->instance, false);
> > + if (props->hwe)
> > + break;
> > + }
> > + if (props->hwe && (xe_oa_unit_id(props->hwe) != props->oa_unit_id)) {
> > + drm_dbg(&oa->xe->drm, "OA unit ID mismatch for exec_q\n");
> > + ret = -EINVAL;
> > + }
> > + } else {
> > + struct xe_hw_engine *hwe;
> > + enum xe_hw_engine_id id;
> > +
> > + /* Else just get the first hwe attached to the oa unit */
> > + for_each_gt(gt, oa->xe, i) {
> > + for_each_hw_engine(hwe, gt, id) {
> > + if (xe_oa_unit_id(hwe) == props->oa_unit_id) {
> > + props->hwe = hwe;
> > + goto out;
> > + }
> > + }
> > + }
> > + }
>
> I think both the if and else blocks above will get you the same hwe object,
> so you can just pick the else code to assign hwe.
Not when there are multiple hwe's attached to a single OA unit (I am
thinking media/compute), correct?
> Are we allowing the user to pass either oa_unit_id OR exec_q/instance?
No. oa_unit_id is the basic entity used to identify the OA unit. If
userland is only using OAG they can skip exec_q. If exec_q is specified,
the code above checks if exec_q/instance lands on the same OA unit as the
oa_unit_id.
So oa_unit_id is always provided (for both OAG/OAR) and optionally
exec_q/instance can be provided (for OAR).
i915 had basically <class, instance, exec_q> and this XE uapi has
<oa_unit_id, exec_q, instance> so the semantics here is almost the same as
i915.
> I think based on the HW requirement we should enable OAR/OAG together, so
> maybe enforce that the user passes both params. Thoughts?
I don't think it will fly since in some cases user is only interested in
OAG (global data for all contexts) so no point forcing them to also passing
in exec_q/instance. The user may not even have a specific exec_q in such
case to pass into the uapi.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 20/21] drm/xe/uapi: Use OA unit id to identify OA unit
2023-10-05 3:04 ` Dixit, Ashutosh
@ 2023-10-05 3:09 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 3:09 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-xe
On Wed, 04 Oct 2023 20:04:23 -0700, Dixit, Ashutosh wrote:
>
> On Wed, 04 Oct 2023 15:37:51 -0700, Umesh Nerlige Ramappa wrote:
> >
>
> Hi Umesh,
>
> > On Tue, Sep 19, 2023 at 09:10:48AM -0700, Ashutosh Dixit wrote:
> > > Previous uapi uses an indirect way (the engine class/instance of an engine
> > > connected to an OA unit) to identify an OA unit. Replace this by directly
> > > using the OA unit ID to identify the OA unit.
> > >
> > > With this change DRM_XE_OA_PROP_OA_ENGINE_CLASS property is not needed any
> > > more and removed. DRM_XE_OA_PROP_OA_ENGINE_INSTANCE is still used with
> > > DRM_XE_OA_PROP_EXEC_QUEUE_ID.
>
> /snip/
>
> > > +static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_properties *props)
> > > +{
> > > + struct xe_gt *gt;
> > > + int i, ret = 0;
> > > +
> > > + if (props->exec_q) {
> > > + /* When we have an exec_q, get hwe from the exec_q */
> > > + for_each_gt(gt, oa->xe, i) {
> > > + props->hwe = xe_gt_hw_engine(gt, props->exec_q->class,
> > > + props->instance, false);
> > > + if (props->hwe)
> > > + break;
> > > + }
> > > + if (props->hwe && (xe_oa_unit_id(props->hwe) != props->oa_unit_id)) {
> > > + drm_dbg(&oa->xe->drm, "OA unit ID mismatch for exec_q\n");
> > > + ret = -EINVAL;
> > > + }
> > > + } else {
> > > + struct xe_hw_engine *hwe;
> > > + enum xe_hw_engine_id id;
> > > +
> > > + /* Else just get the first hwe attached to the oa unit */
> > > + for_each_gt(gt, oa->xe, i) {
> > > + for_each_hw_engine(hwe, gt, id) {
> > > + if (xe_oa_unit_id(hwe) == props->oa_unit_id) {
> > > + props->hwe = hwe;
> > > + goto out;
> > > + }
> > > + }
> > > + }
> > > + }
> >
> > I think both the if and else blocks above will get you the same hwe object,
> > so you can just pick the else code to assign hwe.
>
> Not when there are multiple hwe's attached to a single OA unit (I am
> thinking media/compute), correct?
>
> > Are we allowing the user to pass either oa_unit_id OR exec_q/instance?
>
> No. oa_unit_id is the basic entity used to identify the OA unit. If
> userland is only using OAG they can skip exec_q. If exec_q is specified,
> the code above checks if exec_q/instance lands on the same OA unit as the
> oa_unit_id.
>
> So oa_unit_id is always provided (for both OAG/OAR) and optionally
> exec_q/instance can be provided (for OAR).
>
> i915 had basically <class, instance, exec_q> and this XE uapi has
> <oa_unit_id, exec_q, instance> so the semantics here is almost the same as
> i915.
>
> > I think based on the HW requirement we should enable OAR/OAG together, so
> > maybe enforce that the user passes both params. Thoughts?
>
> I don't think it will fly since in some cases user is only interested in
> OAG (global data for all contexts) so no point forcing them to also passing
> in exec_q/instance. The user may not even have a specific exec_q in such
> case to pass into the uapi.
There are some additional considerations for the future about this: I think
we should really not need exec_q_id in the OA uapi. We should be able to
enable OAR functionality on all exec_q/instance combos (both which are
present and which may be created while OA is enabled) which can be
scheduled on that OAR unit. This would enable an OA MI_RPC query to be
issued on any exec queue which exists while the OA stream is open. OAR
registers are part of the context image so this looks feasible to me.
The instance field is interesting since I believe compute has a limitation
that OAC can only be enabled on a single hwe at a time. So even if we don't
have an exec_q, instance can be used to identify which hwe instance we are
enabling OAC on. So the semantics of instance will change in this case: at
present instance is the context image instance on which OAR/OAC is enabled,
later it will reflect the HW limitation of the engine instance.
Though we may not be do this immediately because of other priorities. So
currently we do single exec_q but can deprecate that if we can ever get
"any exec_q" to work.
Something like that (not completely thought through yet). Let's not worry
about this now but just wanted to write out my thoughts about this in case
you had any feedback.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] [PATCH 21/21] drm/xe/uapi: Convert OA property key/value pairs to a struct
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (19 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 20/21] drm/xe/uapi: Use OA unit id to identify OA unit Ashutosh Dixit
@ 2023-09-19 16:10 ` Ashutosh Dixit
2023-09-21 23:53 ` Dixit, Ashutosh
2023-09-19 16:19 ` [Intel-xe] ✓ CI.Patch_applied: success for Add OA functionality to Xe (rev6) Patchwork
` (8 subsequent siblings)
29 siblings, 1 reply; 88+ messages in thread
From: Ashutosh Dixit @ 2023-09-19 16:10 UTC (permalink / raw)
To: intel-xe
Change OA uapi to take a param struct rather than property key value
pairs. A param struct is simpler and param structs can be extenended in the
future using xe_user_extension so there seems to be no reason to use
property key value pairs.
Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_oa.c | 244 ++++++++++++-------------------
drivers/gpu/drm/xe/xe_oa_types.h | 4 +-
include/uapi/drm/xe_drm.h | 127 ++++++++--------
3 files changed, 151 insertions(+), 224 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index ded52d5aabea6..dfadc336c1876 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -59,23 +59,10 @@ static const struct xe_oa_format oa_formats[] = {
[XE_OAM_FORMAT_MPEC8u32_B8_C8] = { 2, 128, XE_OA_FMT_TYPE_OAM_MPEC, HDR_64_BIT },
};
-struct xe_oa_open_properties {
- u16 oa_unit_id;
- bool sample;
-
- bool single_exec_q;
- u64 exec_q_id;
+struct xe_oa_derived_params {
struct xe_exec_queue *exec_q;
- u16 instance;
-
- int metrics_set;
enum xe_oa_format_name oa_format;
- bool oa_periodic;
- int oa_period_exponent;
-
struct xe_hw_engine *hwe;
-
- u64 poll_oa_period;
};
struct xe_oa_config_bo {
@@ -272,7 +259,7 @@ static enum hrtimer_restart xe_oa_poll_check_timer_cb(struct hrtimer *hrtimer)
wake_up(&stream->poll_wq);
}
- hrtimer_forward_now(hrtimer, ns_to_ktime(stream->poll_oa_period));
+ hrtimer_forward_now(hrtimer, ns_to_ktime(stream->poll_period_ns));
return HRTIMER_RESTART;
}
@@ -1077,7 +1064,7 @@ static void xe_oa_stream_enable(struct xe_oa_stream *stream)
if (stream->sample)
hrtimer_start(&stream->poll_check_timer,
- ns_to_ktime(stream->poll_oa_period),
+ ns_to_ktime(stream->poll_period_ns),
HRTIMER_MODE_REL_PINNED);
}
@@ -1284,24 +1271,26 @@ static int xe_oa_set_ctx_ctrl_offset(struct xe_oa_stream *stream)
}
static int xe_oa_stream_init(struct xe_oa_stream *stream,
- struct xe_oa_open_properties *props)
+ struct drm_xe_oa_open_param *param,
+ struct xe_oa_derived_params *dp)
{
- struct xe_oa_group *g = props->hwe->oa_group;
- struct xe_gt *gt = props->hwe->gt;
+ struct xe_oa_group *g = dp->hwe->oa_group;
+ struct xe_gt *gt = dp->hwe->gt;
struct xe_oa *oa = stream->oa;
int ret;
- stream->exec_q = props->exec_q;
- stream->poll_oa_period = props->poll_oa_period;
- stream->hwe = props->hwe;
+ stream->exec_q = dp->exec_q;
+ stream->poll_period_ns = param->poll_period_us ?
+ param->poll_period_us * NSEC_PER_USEC : DEFAULT_POLL_PERIOD_NS;
+ stream->hwe = dp->hwe;
stream->gt = stream->hwe->gt;
stream->sample_size = sizeof(struct drm_xe_oa_record_header);
- stream->oa_buffer.format = &oa->oa_formats[props->oa_format];
+ stream->oa_buffer.format = &oa->oa_formats[dp->oa_format];
- stream->sample = props->sample;
+ stream->sample = param->sample_oa;
stream->sample_size += stream->oa_buffer.format->size;
- stream->periodic = props->oa_periodic;
- stream->period_exponent = props->oa_period_exponent;
+ stream->periodic = param->period_exponent > 0;
+ stream->period_exponent = param->period_exponent;
if (stream->exec_q && engine_supports_mi_query(stream->hwe)) {
/* If we don't find the context offset, just return error */
@@ -1314,9 +1303,9 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
}
}
- stream->oa_config = xe_oa_get_oa_config(oa, props->metrics_set);
+ stream->oa_config = xe_oa_get_oa_config(oa, param->metric_set);
if (!stream->oa_config) {
- drm_dbg(&oa->xe->drm, "Invalid OA config id=%i\n", props->metrics_set);
+ drm_dbg(&oa->xe->drm, "Invalid OA config id=%i\n", param->metric_set);
ret = -EINVAL;
goto exit;
}
@@ -1382,7 +1371,7 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
static int
xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
struct drm_xe_oa_open_param *param,
- struct xe_oa_open_properties *props)
+ struct xe_oa_derived_params *dp)
{
struct xe_oa_stream *stream;
unsigned long f_flags = 0;
@@ -1390,7 +1379,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
int ret;
/* We currently only allow exclusive access */
- if (props->hwe->oa_group->exclusive_stream) {
+ if (dp->hwe->oa_group->exclusive_stream) {
drm_dbg(&oa->xe->drm, "OA unit already in use\n");
ret = -EBUSY;
goto exit;
@@ -1403,13 +1392,13 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
}
stream->oa = oa;
- ret = xe_oa_stream_init(stream, props);
+ ret = xe_oa_stream_init(stream, param, dp);
if (ret)
goto err_free;
- if (param->flags & XE_OA_FLAG_FD_CLOEXEC)
+ if (param->open_flags & XE_OA_FLAG_FD_CLOEXEC)
f_flags |= O_CLOEXEC;
- if (param->flags & XE_OA_FLAG_FD_NONBLOCK)
+ if (param->open_flags & XE_OA_FLAG_FD_NONBLOCK)
f_flags |= O_NONBLOCK;
stream_fd = anon_inode_getfd("[xe_oa]", &xe_oa_fops, stream, f_flags);
@@ -1418,7 +1407,7 @@ xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
goto err_destroy;
}
- if (!(param->flags & XE_OA_FLAG_DISABLED))
+ if (!(param->open_flags & XE_OA_FLAG_DISABLED))
xe_oa_enable_locked(stream);
/* Hold a reference on the drm device till stream_fd is released */
@@ -1483,10 +1472,10 @@ static bool engine_supports_oa_format(const struct xe_hw_engine *hwe, int type)
}
}
-static int decode_oa_format(struct xe_oa *oa, u64 prop, enum xe_oa_format_name *name)
+static int decode_oa_format(struct xe_oa *oa, u64 fmt, enum xe_oa_format_name *name)
{
- u32 counter_sel = FIELD_GET(XE_OA_MASK_COUNTER_SEL, prop);
- u32 type = FIELD_GET(XE_OA_MASK_FMT_TYPE, prop);
+ u32 counter_sel = FIELD_GET(XE_OA_MASK_COUNTER_SEL, fmt);
+ u32 type = FIELD_GET(XE_OA_MASK_FMT_TYPE, fmt);
int idx;
for_each_set_bit(idx, oa->format_mask, XE_OA_FORMAT_MAX) {
@@ -1507,20 +1496,21 @@ u16 xe_oa_unit_id(struct xe_hw_engine *hwe)
hwe->oa_group->oa_unit_id : U16_MAX;
}
-static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_properties *props)
+static int xe_oa_assign_hwe(struct xe_oa *oa, struct drm_xe_oa_open_param *param,
+ struct xe_oa_derived_params *dp)
{
struct xe_gt *gt;
int i, ret = 0;
- if (props->exec_q) {
+ if (dp->exec_q) {
/* When we have an exec_q, get hwe from the exec_q */
for_each_gt(gt, oa->xe, i) {
- props->hwe = xe_gt_hw_engine(gt, props->exec_q->class,
- props->instance, false);
- if (props->hwe)
+ dp->hwe = xe_gt_hw_engine(gt, dp->exec_q->class,
+ param->engine_instance, false);
+ if (dp->hwe)
break;
}
- if (props->hwe && (xe_oa_unit_id(props->hwe) != props->oa_unit_id)) {
+ if (dp->hwe && (xe_oa_unit_id(dp->hwe) != param->oa_unit_id)) {
drm_dbg(&oa->xe->drm, "OA unit ID mismatch for exec_q\n");
ret = -EINVAL;
}
@@ -1531,35 +1521,35 @@ static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_properties *prop
/* Else just get the first hwe attached to the oa unit */
for_each_gt(gt, oa->xe, i) {
for_each_hw_engine(hwe, gt, id) {
- if (xe_oa_unit_id(hwe) == props->oa_unit_id) {
- props->hwe = hwe;
+ if (xe_oa_unit_id(hwe) == param->oa_unit_id) {
+ dp->hwe = hwe;
goto out;
}
}
}
}
out:
- if (!props->hwe) {
+ if (!dp->hwe) {
drm_dbg(&oa->xe->drm, "Unable to find hwe for OA unit ID %d\n",
- props->oa_unit_id);
+ param->oa_unit_id);
ret = -EINVAL;
}
return ret;
}
-static int xe_oa_validate_properties(struct xe_oa *oa,
- struct xe_oa_open_properties *props,
- struct drm_file *file)
+static int __xe_oa_open_check_params(struct xe_oa *oa, struct drm_file *file,
+ struct drm_xe_oa_open_param *param,
+ struct xe_oa_derived_params *dp)
{
struct xe_file *xef = to_xe_file(file);
const struct xe_oa_format *f;
bool privileged_op = true;
int ret;
- if (props->single_exec_q) {
- props->exec_q = xe_exec_queue_lookup(xef, props->exec_q_id);
- if (XE_IOCTL_DBG(oa->xe, !props->exec_q)) {
+ if (param->exec_queue_id > 0) {
+ dp->exec_q = xe_exec_queue_lookup(xef, param->exec_queue_id);
+ if (XE_IOCTL_DBG(oa->xe, !dp->exec_q)) {
ret = -ENOENT;
goto err_exec_q;
}
@@ -1570,7 +1560,7 @@ static int xe_oa_validate_properties(struct xe_oa *oa,
* requirements if the user doesn't request global stream access,
* i.e. query based sampling using MI_REPORT_PERF_COUNT
*/
- if (props->exec_q && !props->sample)
+ if (dp->exec_q && !param->sample_oa)
privileged_op = false;
if (privileged_op && xe_oa_stream_paranoid && !perfmon_capable()) {
@@ -1579,29 +1569,29 @@ static int xe_oa_validate_properties(struct xe_oa *oa,
goto err_exec_q;
}
- if (!props->exec_q && !props->sample) {
+ if (!dp->exec_q && !param->sample_oa) {
drm_dbg(&oa->xe->drm, "Only OA report sampling supported\n");
ret = -EINVAL;
goto err_exec_q;
}
- ret = xe_oa_assign_hwe(oa, props);
+ ret = xe_oa_assign_hwe(oa, param, dp);
if (ret)
goto err_exec_q;
- f = &oa->oa_formats[props->oa_format];
- if (!props->oa_format || !f->size ||
- !engine_supports_oa_format(props->hwe, f->type)) {
+ f = &oa->oa_formats[dp->oa_format];
+ if (!dp->oa_format || !f->size ||
+ !engine_supports_oa_format(dp->hwe, f->type)) {
drm_dbg(&oa->xe->drm, "Invalid OA format %d type %d size %d for class %d\n",
- props->oa_format, f->type, f->size, props->hwe->class);
+ dp->oa_format, f->type, f->size, dp->hwe->class);
ret = -EINVAL;
goto err_exec_q;
}
- if (props->oa_periodic) {
+ if (param->period_exponent > 0) {
u64 oa_period, oa_freq_hz;
- oa_period = oa_exponent_to_ns(props->hwe->gt, props->oa_period_exponent);
+ oa_period = oa_exponent_to_ns(dp->hwe->gt, param->period_exponent);
oa_freq_hz = div64_u64(NSEC_PER_SEC, oa_period);
if (oa_freq_hz > xe_oa_max_sample_rate && !perfmon_capable()) {
drm_dbg(&oa->xe->drm,
@@ -1615,98 +1605,54 @@ static int xe_oa_validate_properties(struct xe_oa *oa,
return 0;
err_exec_q:
- if (props->exec_q)
- xe_exec_queue_put(props->exec_q);
+ if (dp->exec_q)
+ xe_exec_queue_put(dp->exec_q);
return ret;
}
+static int xe_oa_open_check_params(struct xe_oa *oa, struct drm_file *file,
+ struct drm_xe_oa_open_param *param,
+ struct xe_oa_derived_params *dp)
+{
#define OA_EXPONENT_MAX 31
-static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
- u32 n_props, struct drm_file *file,
- struct xe_oa_open_properties *props)
-{
- u64 __user *uprop = uprops;
+ u32 known_open_flags;
int ret;
- u32 i;
- if (!n_props || n_props >= DRM_XE_OA_PROP_MAX) {
- drm_dbg(&oa->xe->drm, "Invalid number of xe perf properties given\n");
+ if (param->oa_unit_id >= oa->oa_unit_ids) {
+ drm_dbg(&oa->xe->drm, "OA unit ID out of range %d\n", param->oa_unit_id);
return -EINVAL;
}
- props->poll_oa_period = DEFAULT_POLL_PERIOD_NS;
-
- for (i = 0; i < n_props; i++) {
- u64 id, value;
+ ret = decode_oa_format(oa, param->oa_format, &dp->oa_format);
+ if (ret) {
+ drm_dbg(&oa->xe->drm, "Unsupported OA report format %#llx\n", param->oa_format);
+ return ret;
+ }
- ret = get_user(id, uprop);
- if (ret)
- return ret;
+ /* FIXME: not needed, check and remove */
+ if (!param->metric_set) {
+ drm_dbg(&oa->xe->drm, "Unknown OA metric set ID %d\n", param->metric_set);
+ return -EINVAL;
+ }
- ret = get_user(value, uprop + 1);
- if (ret)
- return ret;
+ if (param->period_exponent > OA_EXPONENT_MAX) {
+ drm_dbg(&oa->xe->drm, "OA timer exponent too high (> %u)\n", OA_EXPONENT_MAX);
+ return -EINVAL;
+ }
- switch ((enum drm_xe_oa_property_id)id) {
- case DRM_XE_OA_PROP_OA_UNIT_ID:
- if (value >= oa->oa_unit_ids) {
- drm_dbg(&oa->xe->drm, "OA unit ID out of range %lld\n", value);
- return -EINVAL;
- }
- props->oa_unit_id = value;
- break;
- case DRM_XE_OA_PROP_SAMPLE_OA:
- props->sample = value;
- break;
- case DRM_XE_OA_PROP_OA_METRICS_SET:
- if (!value) {
- drm_dbg(&oa->xe->drm, "Unknown OA metric set ID\n");
- return -EINVAL;
- }
- props->metrics_set = value;
- break;
- case DRM_XE_OA_PROP_OA_FORMAT:
- ret = decode_oa_format(oa, value, &props->oa_format);
- if (ret) {
- drm_dbg(&oa->xe->drm, "Unsupported OA report format %#llx\n",
- value);
- return ret;
- }
- break;
- case DRM_XE_OA_PROP_OA_EXPONENT:
- if (value > OA_EXPONENT_MAX) {
- drm_dbg(&oa->xe->drm, "OA timer exponent too high (> %u)\n",
- OA_EXPONENT_MAX);
- return -EINVAL;
- }
- props->oa_periodic = true;
- props->oa_period_exponent = value;
- break;
- case DRM_XE_OA_PROP_POLL_OA_PERIOD:
- if (value < 100000 /* 100us */) {
- drm_dbg(&oa->xe->drm, "OA timer too small (%lluns < 100us)\n",
- value);
- return -EINVAL;
- }
- props->poll_oa_period = value;
- break;
- case DRM_XE_OA_PROP_EXEC_QUEUE_ID:
- props->single_exec_q = true;
- props->exec_q_id = value;
- break;
- case DRM_XE_OA_PROP_OA_ENGINE_INSTANCE:
- props->instance = value;
- break;
- default:
- drm_dbg(&oa->xe->drm, "Unknown xe oa property ID %lld\n", id);
- return -EINVAL;
- }
+ if (param->poll_period_us && param->poll_period_us < 100) {
+ drm_dbg(&oa->xe->drm, "OA timer too small (%dus < 100us)\n", param->poll_period_us);
+ return -EINVAL;
+ }
- uprop += 2;
+ known_open_flags = XE_OA_FLAG_FD_CLOEXEC | XE_OA_FLAG_FD_NONBLOCK | XE_OA_FLAG_DISABLED;
+ if (param->open_flags & ~known_open_flags) {
+ drm_dbg(&oa->xe->drm, "Unknown open_flag %#x\n", param->open_flags);
+ return -EINVAL;
}
- ret = xe_oa_validate_properties(oa, props, file);
+ ret = __xe_oa_open_check_params(oa, file, param, dp);
if (ret)
return ret;
@@ -1716,9 +1662,8 @@ static int xe_oa_read_properties_unlocked(struct xe_oa *oa, u64 __user *uprops,
int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
{
struct xe_oa *oa = &to_xe_device(dev)->oa;
- struct xe_oa_open_properties props = {};
+ struct xe_oa_derived_params dp = {};
struct drm_xe_oa_open_param param;
- u32 known_open_flags;
struct xe_gt *gt;
int ret;
@@ -1731,26 +1676,19 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, void *data, struct drm_file
if (XE_IOCTL_DBG(oa->xe, ret))
return -EFAULT;
- known_open_flags = XE_OA_FLAG_FD_CLOEXEC | XE_OA_FLAG_FD_NONBLOCK | XE_OA_FLAG_DISABLED;
- if (param.flags & ~known_open_flags) {
- drm_dbg(&oa->xe->drm, "Unknown drm_xe_oa_open_param flag\n");
- return -EINVAL;
- }
-
- ret = xe_oa_read_properties_unlocked(oa, u64_to_user_ptr(param.properties_ptr),
- param.num_properties, file, &props);
+ ret = xe_oa_open_check_params(oa, file, ¶m, &dp);
if (ret)
return ret;
- gt = props.hwe->gt;
+ gt = dp.hwe->gt;
mutex_lock(>->oa.lock);
- ret = xe_oa_stream_open_ioctl_locked(oa, ¶m, &props);
+ ret = xe_oa_stream_open_ioctl_locked(oa, ¶m, &dp);
mutex_unlock(>->oa.lock);
- /* Drop exec_q reference taken in read_properties/validate_properties on error */
- if (ret < 0 && props.exec_q)
- xe_exec_queue_put(props.exec_q);
+ /* On error, drop reference taken in validate_params/xe_exec_queue_lookup */
+ if (ret < 0 && dp.exec_q)
+ xe_exec_queue_put(dp.exec_q);
return ret;
}
diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index 7566fef55b0ab..f37f3ef6d80eb 100644
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -293,10 +293,10 @@ struct xe_oa_stream {
} oa_buffer;
/**
- * @poll_oa_period: The period in nanoseconds at which the OA
+ * @poll_period_ns: The period in nanoseconds at which the OA
* buffer should be checked for available data.
*/
- u64 poll_oa_period;
+ u64 poll_period_ns;
/**
* @override_gucrc: GuC RC has been overridden for the perf stream,
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index c0018abee4052..8ba11c4eb36b5 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1175,30 +1175,26 @@ struct drm_xe_query_oa_info {
} oau[];
};
-enum drm_xe_oa_property_id {
- /**
- * ID of the OA unit on which to open the OA stream, see
- * @oa_unit_id in 'struct drm_xe_engine_class_instance'. Defaults
- * to 0 if not provided.
- */
- DRM_XE_OA_PROP_OA_UNIT_ID = 1,
+struct drm_xe_oa_open_param {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
/**
- * A value of 1 requests the inclusion of raw OA unit reports as
- * part of stream samples.
+ * @oa_unit_id: ID of the OA unit on which to open the OA stream,
+ * see @oa_unit_id in struct @drm_xe_engine_class_instance
*/
- DRM_XE_OA_PROP_SAMPLE_OA,
+ __u32 oa_unit_id;
/**
- * The value specifies which set of OA unit metrics should be
- * configured, defining the contents of any OA unit reports.
+ * @sample_oa: A value of 1 requests the inclusion of raw OA unit
+ * reports as part of stream samples
*/
- DRM_XE_OA_PROP_OA_METRICS_SET,
+ __u32 sample_oa;
/**
- * The value specifies the size and layout of OA unit reports.
+ * @oa_format: The value specifies the size and layout of OA unit reports
*/
- DRM_XE_OA_PROP_OA_FORMAT,
+ __u64 oa_format;
/**
* OA_FORMAT's are specified the same way as in Bspec, in terms of
* the following quantities: a. enum @drm_xe_oa_format_type
@@ -1210,86 +1206,79 @@ enum drm_xe_oa_property_id {
#define XE_OA_MASK_BC_REPORT (0xff << 24)
/**
- * Specifying this property implicitly requests periodic OA unit
- * sampling and (at least on Haswell) the sampling frequency is derived
- * from this exponent as follows:
- *
- * 80ns * 2^(period_exponent + 1)
+ * @metric_set: specifies which set of OA unit metrics should be
+ * configured, defining the contents of any OA unit reports. Metric
+ * set ID is returned by the XE_PERF_ADD_CONFIG op of the PREF ioctl
*/
- DRM_XE_OA_PROP_OA_EXPONENT,
+ __u32 metric_set;
/**
- * Specifying this property is only valid when specify a context to
- * filter with DRM_XE_OA_PROP_ENGINE_ID. Specifying this property
- * will hold preemption of the particular engine we want to gather
- * performance data about.
+ * @period_exponent: Specifying this property implicitly requests
+ * periodic OA unit sampling. The sampling period is:
+ *
+ * 2^(period_exponent + 1) / @oa_timestamp_freq
+ *
+ * Set period_exponent *negative* to disable periodic sampling
*/
- DRM_XE_OA_PROP_HOLD_PREEMPTION,
+ __s32 period_exponent;
/**
- * Specify a global OA buffer size to be allocated in bytes. The
- * size specified must be supported by HW (powers of 2 ranging from
- * 128 KB to 128Mb depending on the platform)
+ * @oa_buffer_size: Specify a global OA buffer size to be allocated
+ * in bytes. The size specified must be supported by HW (powers of
+ * 2 ranging from 128 KB to 128Mb depending on the platform). A
+ * value of 0 will choose a default size of 16 MB.
*/
- DRM_XE_OA_PROP_OA_BUFFER_SIZE,
+ __u32 oa_buffer_size;
/**
- * This optional parameter specifies the timer interval in nanoseconds
- * at which the xe driver will check the OA buffer for available data.
- * Minimum allowed value is 100 microseconds. A default value is used by
- * the driver if this parameter is not specified. Note that larger timer
- * values will reduce cpu consumption during OA perf captures. However,
- * excessively large values would potentially result in OA buffer
- * overwrites as captures reach end of the OA buffer.
+ * @poll_period: Specify timer interval in micro-seconds at which
+ * the xe driver will check the OA buffer for available
+ * data. Minimum allowed value is 100 microseconds. A value of 0
+ * selects a default value is used by the driver. Note that larger
+ * timer values will reduce cpu consumption during OA perf
+ * captures. However, excessively large values would potentially
+ * result in OA buffer overwrites as captures reach end of the OA
+ * buffer.
*/
- DRM_XE_OA_PROP_POLL_OA_PERIOD,
+ __u32 poll_period_us;
+
+ /** @open_flags: Flags */
+ __u32 open_flags;
+#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
+#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
+#define XE_OA_FLAG_DISABLED (1 << 2)
/**
- * Open the stream for a specific exec queue id (as used with
- * drm_xe_exec). A stream opened for a specific exec queue id this
- * way won't typically require root privileges.
+ * @exec_queue_id: Open the stream for a specific exec queue id (as
+ * used with drm_xe_exec). A stream opened for a specific exec
+ * queue id this way won't typically require root
+ * privileges. Pass a value <= 0 to not specify an exec queue id.
*/
- DRM_XE_OA_PROP_EXEC_QUEUE_ID,
+ __s32 exec_queue_id;
/**
- * This parameter specifies the engine instance and can be passed along
- * with DRM_XE_OA_PROP_EXEC_QUEUE_ID or will default to 0.
+ * @engine_instance: engine instance to use with @exec_queue_id.
*/
- DRM_XE_OA_PROP_OA_ENGINE_INSTANCE,
+ __u32 engine_instance;
- DRM_XE_OA_PROP_MAX /* non-ABI */
-};
-
-struct drm_xe_oa_open_param {
- /** @extensions: Pointer to the first extension struct, if any */
- __u64 extensions;
+ /**
+ * @hold_preemption: If true, this will disable preemption for the
+ * exec queue selected with @exec_queue_id
+ */
+ __u32 hold_preemption;
/**
- * @config_syncobj: (Output) handle to configuration syncobj
+ * @config_syncobj: (output) handle to configuration syncobj
*
* Handle to a syncobj which the kernel will signal after stream
* configuration or re-configuration is complete (after return from
* the ioctl). This handle can be provided as a dependency to the
- * next XE exec ioctl.
+ * next xe exec ioctl to synchronize xe exec with oa config changes
*/
__u32 config_syncobj;
- __u32 reserved;
-
- /** @flags: Flags */
- __u32 flags;
-#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
-#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
-#define XE_OA_FLAG_DISABLED (1 << 2)
-
- /** The number of u64 (id, value) pairs */
- __u32 num_properties;
-
- /**
- * Pointer to array of u64 (id, value) pairs configuring the stream
- * to open.
- */
- __u64 properties_ptr;
+ /** @reserved: reserved (MBZ) */
+ __u64 reserved[4];
};
struct drm_xe_oa_record_header {
--
2.41.0
^ permalink raw reply related [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 21/21] drm/xe/uapi: Convert OA property key/value pairs to a struct
2023-09-19 16:10 ` [Intel-xe] [PATCH 21/21] drm/xe/uapi: Convert OA property key/value pairs to a struct Ashutosh Dixit
@ 2023-09-21 23:53 ` Dixit, Ashutosh
2023-10-05 5:37 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-09-21 23:53 UTC (permalink / raw)
To: intel-xe
On Tue, 19 Sep 2023 09:10:49 -0700, Ashutosh Dixit wrote:
>
> Change OA uapi to take a param struct rather than property key value
> pairs. A param struct is simpler and param structs can be extenended in the
> future using xe_user_extension so there seems to be no reason to use
> property key value pairs.
There are two ways of doing this:
1. In this patch we have collected all OA properties into a single
struct. The assumption is that any future changes would be handled via
'struct drm_xe_ext_set_property' chained structs (basically using
xe_user_extension):
https://patchwork.freedesktop.org/patch/558715/
2. The second way to do it would be to use chained 'struct
drm_xe_ext_set_property' from the beginning as is being done for
DRM_XE_EXEC_QUEUE_SET_PROPERTY. This is basically the same as the
earlier OA property key/value pairs except that the properties are now
input via chained structs.
This second way is a uniform way of specifying property values whereas
the first way in non-uniform.
Just thought I'll point this out when we decide about this uapi during the
code review.
Thanks.
--
Ashutosh
> Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
/snip/
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index c0018abee4052..8ba11c4eb36b5 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -1175,30 +1175,26 @@ struct drm_xe_query_oa_info {
> } oau[];
> };
>
> -enum drm_xe_oa_property_id {
> - /**
> - * ID of the OA unit on which to open the OA stream, see
> - * @oa_unit_id in 'struct drm_xe_engine_class_instance'. Defaults
> - * to 0 if not provided.
> - */
> - DRM_XE_OA_PROP_OA_UNIT_ID = 1,
> +struct drm_xe_oa_open_param {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
>
> /**
> - * A value of 1 requests the inclusion of raw OA unit reports as
> - * part of stream samples.
> + * @oa_unit_id: ID of the OA unit on which to open the OA stream,
> + * see @oa_unit_id in struct @drm_xe_engine_class_instance
> */
> - DRM_XE_OA_PROP_SAMPLE_OA,
> + __u32 oa_unit_id;
>
> /**
> - * The value specifies which set of OA unit metrics should be
> - * configured, defining the contents of any OA unit reports.
> + * @sample_oa: A value of 1 requests the inclusion of raw OA unit
> + * reports as part of stream samples
> */
> - DRM_XE_OA_PROP_OA_METRICS_SET,
> + __u32 sample_oa;
>
> /**
> - * The value specifies the size and layout of OA unit reports.
> + * @oa_format: The value specifies the size and layout of OA unit reports
> */
> - DRM_XE_OA_PROP_OA_FORMAT,
> + __u64 oa_format;
> /**
> * OA_FORMAT's are specified the same way as in Bspec, in terms of
> * the following quantities: a. enum @drm_xe_oa_format_type
> @@ -1210,86 +1206,79 @@ enum drm_xe_oa_property_id {
> #define XE_OA_MASK_BC_REPORT (0xff << 24)
>
> /**
> - * Specifying this property implicitly requests periodic OA unit
> - * sampling and (at least on Haswell) the sampling frequency is derived
> - * from this exponent as follows:
> - *
> - * 80ns * 2^(period_exponent + 1)
> + * @metric_set: specifies which set of OA unit metrics should be
> + * configured, defining the contents of any OA unit reports. Metric
> + * set ID is returned by the XE_PERF_ADD_CONFIG op of the PREF ioctl
> */
> - DRM_XE_OA_PROP_OA_EXPONENT,
> + __u32 metric_set;
>
> /**
> - * Specifying this property is only valid when specify a context to
> - * filter with DRM_XE_OA_PROP_ENGINE_ID. Specifying this property
> - * will hold preemption of the particular engine we want to gather
> - * performance data about.
> + * @period_exponent: Specifying this property implicitly requests
> + * periodic OA unit sampling. The sampling period is:
> + *
> + * 2^(period_exponent + 1) / @oa_timestamp_freq
> + *
> + * Set period_exponent *negative* to disable periodic sampling
> */
> - DRM_XE_OA_PROP_HOLD_PREEMPTION,
> + __s32 period_exponent;
>
> /**
> - * Specify a global OA buffer size to be allocated in bytes. The
> - * size specified must be supported by HW (powers of 2 ranging from
> - * 128 KB to 128Mb depending on the platform)
> + * @oa_buffer_size: Specify a global OA buffer size to be allocated
> + * in bytes. The size specified must be supported by HW (powers of
> + * 2 ranging from 128 KB to 128Mb depending on the platform). A
> + * value of 0 will choose a default size of 16 MB.
> */
> - DRM_XE_OA_PROP_OA_BUFFER_SIZE,
> + __u32 oa_buffer_size;
>
> /**
> - * This optional parameter specifies the timer interval in nanoseconds
> - * at which the xe driver will check the OA buffer for available data.
> - * Minimum allowed value is 100 microseconds. A default value is used by
> - * the driver if this parameter is not specified. Note that larger timer
> - * values will reduce cpu consumption during OA perf captures. However,
> - * excessively large values would potentially result in OA buffer
> - * overwrites as captures reach end of the OA buffer.
> + * @poll_period: Specify timer interval in micro-seconds at which
> + * the xe driver will check the OA buffer for available
> + * data. Minimum allowed value is 100 microseconds. A value of 0
> + * selects a default value is used by the driver. Note that larger
> + * timer values will reduce cpu consumption during OA perf
> + * captures. However, excessively large values would potentially
> + * result in OA buffer overwrites as captures reach end of the OA
> + * buffer.
> */
> - DRM_XE_OA_PROP_POLL_OA_PERIOD,
> + __u32 poll_period_us;
> +
> + /** @open_flags: Flags */
> + __u32 open_flags;
> +#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
> +#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
> +#define XE_OA_FLAG_DISABLED (1 << 2)
>
> /**
> - * Open the stream for a specific exec queue id (as used with
> - * drm_xe_exec). A stream opened for a specific exec queue id this
> - * way won't typically require root privileges.
> + * @exec_queue_id: Open the stream for a specific exec queue id (as
> + * used with drm_xe_exec). A stream opened for a specific exec
> + * queue id this way won't typically require root
> + * privileges. Pass a value <= 0 to not specify an exec queue id.
> */
> - DRM_XE_OA_PROP_EXEC_QUEUE_ID,
> + __s32 exec_queue_id;
>
> /**
> - * This parameter specifies the engine instance and can be passed along
> - * with DRM_XE_OA_PROP_EXEC_QUEUE_ID or will default to 0.
> + * @engine_instance: engine instance to use with @exec_queue_id.
> */
> - DRM_XE_OA_PROP_OA_ENGINE_INSTANCE,
> + __u32 engine_instance;
>
> - DRM_XE_OA_PROP_MAX /* non-ABI */
> -};
> -
> -struct drm_xe_oa_open_param {
> - /** @extensions: Pointer to the first extension struct, if any */
> - __u64 extensions;
> + /**
> + * @hold_preemption: If true, this will disable preemption for the
> + * exec queue selected with @exec_queue_id
> + */
> + __u32 hold_preemption;
>
> /**
> - * @config_syncobj: (Output) handle to configuration syncobj
> + * @config_syncobj: (output) handle to configuration syncobj
> *
> * Handle to a syncobj which the kernel will signal after stream
> * configuration or re-configuration is complete (after return from
> * the ioctl). This handle can be provided as a dependency to the
> - * next XE exec ioctl.
> + * next xe exec ioctl to synchronize xe exec with oa config changes
> */
> __u32 config_syncobj;
>
> - __u32 reserved;
> -
> - /** @flags: Flags */
> - __u32 flags;
> -#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
> -#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
> -#define XE_OA_FLAG_DISABLED (1 << 2)
> -
> - /** The number of u64 (id, value) pairs */
> - __u32 num_properties;
> -
> - /**
> - * Pointer to array of u64 (id, value) pairs configuring the stream
> - * to open.
> - */
> - __u64 properties_ptr;
> + /** @reserved: reserved (MBZ) */
> + __u64 reserved[4];
> };
>
> struct drm_xe_oa_record_header {
> --
> 2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 21/21] drm/xe/uapi: Convert OA property key/value pairs to a struct
2023-09-21 23:53 ` Dixit, Ashutosh
@ 2023-10-05 5:37 ` Dixit, Ashutosh
2023-10-05 19:26 ` Umesh Nerlige Ramappa
0 siblings, 1 reply; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-05 5:37 UTC (permalink / raw)
To: intel-xe
On Thu, 21 Sep 2023 16:53:20 -0700, Dixit, Ashutosh wrote:
>
Hi Umesh,
> On Tue, 19 Sep 2023 09:10:49 -0700, Ashutosh Dixit wrote:
> >
> > Change OA uapi to take a param struct rather than property key value
> > pairs. A param struct is simpler and param structs can be extenended in the
> > future using xe_user_extension so there seems to be no reason to use
> > property key value pairs.
>
> There are two ways of doing this:
>
> 1. In this patch we have collected all OA properties into a single
> struct. The assumption is that any future changes would be handled via
> 'struct drm_xe_ext_set_property' chained structs (basically using
> xe_user_extension):
>
> https://patchwork.freedesktop.org/patch/558715/
>
> 2. The second way to do it would be to use chained 'struct
> drm_xe_ext_set_property' from the beginning as is being done for
> DRM_XE_EXEC_QUEUE_SET_PROPERTY. This is basically the same as the
> earlier OA property key/value pairs except that the properties are now
> input via chained structs.
>
> This second way is a uniform way of specifying property values whereas
> the first way in non-uniform.
>
> Just thought I'll point this out when we decide about this uapi during the
> code review.
Since we are almost certain that the OA uapi will need to be extended in
the future, for the sake of uniformity maybe we should go with the approach
2. above (this patch implements approach 1.)? Something to keep in mind for
the review of this patch. This is what I was referring to earlier today.
Thanks.
--
Ashutosh
>
> > Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>
> /snip/
>
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index c0018abee4052..8ba11c4eb36b5 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -1175,30 +1175,26 @@ struct drm_xe_query_oa_info {
> > } oau[];
> > };
> >
> > -enum drm_xe_oa_property_id {
> > - /**
> > - * ID of the OA unit on which to open the OA stream, see
> > - * @oa_unit_id in 'struct drm_xe_engine_class_instance'. Defaults
> > - * to 0 if not provided.
> > - */
> > - DRM_XE_OA_PROP_OA_UNIT_ID = 1,
> > +struct drm_xe_oa_open_param {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> >
> > /**
> > - * A value of 1 requests the inclusion of raw OA unit reports as
> > - * part of stream samples.
> > + * @oa_unit_id: ID of the OA unit on which to open the OA stream,
> > + * see @oa_unit_id in struct @drm_xe_engine_class_instance
> > */
> > - DRM_XE_OA_PROP_SAMPLE_OA,
> > + __u32 oa_unit_id;
> >
> > /**
> > - * The value specifies which set of OA unit metrics should be
> > - * configured, defining the contents of any OA unit reports.
> > + * @sample_oa: A value of 1 requests the inclusion of raw OA unit
> > + * reports as part of stream samples
> > */
> > - DRM_XE_OA_PROP_OA_METRICS_SET,
> > + __u32 sample_oa;
> >
> > /**
> > - * The value specifies the size and layout of OA unit reports.
> > + * @oa_format: The value specifies the size and layout of OA unit reports
> > */
> > - DRM_XE_OA_PROP_OA_FORMAT,
> > + __u64 oa_format;
> > /**
> > * OA_FORMAT's are specified the same way as in Bspec, in terms of
> > * the following quantities: a. enum @drm_xe_oa_format_type
> > @@ -1210,86 +1206,79 @@ enum drm_xe_oa_property_id {
> > #define XE_OA_MASK_BC_REPORT (0xff << 24)
> >
> > /**
> > - * Specifying this property implicitly requests periodic OA unit
> > - * sampling and (at least on Haswell) the sampling frequency is derived
> > - * from this exponent as follows:
> > - *
> > - * 80ns * 2^(period_exponent + 1)
> > + * @metric_set: specifies which set of OA unit metrics should be
> > + * configured, defining the contents of any OA unit reports. Metric
> > + * set ID is returned by the XE_PERF_ADD_CONFIG op of the PREF ioctl
> > */
> > - DRM_XE_OA_PROP_OA_EXPONENT,
> > + __u32 metric_set;
> >
> > /**
> > - * Specifying this property is only valid when specify a context to
> > - * filter with DRM_XE_OA_PROP_ENGINE_ID. Specifying this property
> > - * will hold preemption of the particular engine we want to gather
> > - * performance data about.
> > + * @period_exponent: Specifying this property implicitly requests
> > + * periodic OA unit sampling. The sampling period is:
> > + *
> > + * 2^(period_exponent + 1) / @oa_timestamp_freq
> > + *
> > + * Set period_exponent *negative* to disable periodic sampling
> > */
> > - DRM_XE_OA_PROP_HOLD_PREEMPTION,
> > + __s32 period_exponent;
> >
> > /**
> > - * Specify a global OA buffer size to be allocated in bytes. The
> > - * size specified must be supported by HW (powers of 2 ranging from
> > - * 128 KB to 128Mb depending on the platform)
> > + * @oa_buffer_size: Specify a global OA buffer size to be allocated
> > + * in bytes. The size specified must be supported by HW (powers of
> > + * 2 ranging from 128 KB to 128Mb depending on the platform). A
> > + * value of 0 will choose a default size of 16 MB.
> > */
> > - DRM_XE_OA_PROP_OA_BUFFER_SIZE,
> > + __u32 oa_buffer_size;
> >
> > /**
> > - * This optional parameter specifies the timer interval in nanoseconds
> > - * at which the xe driver will check the OA buffer for available data.
> > - * Minimum allowed value is 100 microseconds. A default value is used by
> > - * the driver if this parameter is not specified. Note that larger timer
> > - * values will reduce cpu consumption during OA perf captures. However,
> > - * excessively large values would potentially result in OA buffer
> > - * overwrites as captures reach end of the OA buffer.
> > + * @poll_period: Specify timer interval in micro-seconds at which
> > + * the xe driver will check the OA buffer for available
> > + * data. Minimum allowed value is 100 microseconds. A value of 0
> > + * selects a default value is used by the driver. Note that larger
> > + * timer values will reduce cpu consumption during OA perf
> > + * captures. However, excessively large values would potentially
> > + * result in OA buffer overwrites as captures reach end of the OA
> > + * buffer.
> > */
> > - DRM_XE_OA_PROP_POLL_OA_PERIOD,
> > + __u32 poll_period_us;
> > +
> > + /** @open_flags: Flags */
> > + __u32 open_flags;
> > +#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
> > +#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
> > +#define XE_OA_FLAG_DISABLED (1 << 2)
> >
> > /**
> > - * Open the stream for a specific exec queue id (as used with
> > - * drm_xe_exec). A stream opened for a specific exec queue id this
> > - * way won't typically require root privileges.
> > + * @exec_queue_id: Open the stream for a specific exec queue id (as
> > + * used with drm_xe_exec). A stream opened for a specific exec
> > + * queue id this way won't typically require root
> > + * privileges. Pass a value <= 0 to not specify an exec queue id.
> > */
> > - DRM_XE_OA_PROP_EXEC_QUEUE_ID,
> > + __s32 exec_queue_id;
> >
> > /**
> > - * This parameter specifies the engine instance and can be passed along
> > - * with DRM_XE_OA_PROP_EXEC_QUEUE_ID or will default to 0.
> > + * @engine_instance: engine instance to use with @exec_queue_id.
> > */
> > - DRM_XE_OA_PROP_OA_ENGINE_INSTANCE,
> > + __u32 engine_instance;
> >
> > - DRM_XE_OA_PROP_MAX /* non-ABI */
> > -};
> > -
> > -struct drm_xe_oa_open_param {
> > - /** @extensions: Pointer to the first extension struct, if any */
> > - __u64 extensions;
> > + /**
> > + * @hold_preemption: If true, this will disable preemption for the
> > + * exec queue selected with @exec_queue_id
> > + */
> > + __u32 hold_preemption;
> >
> > /**
> > - * @config_syncobj: (Output) handle to configuration syncobj
> > + * @config_syncobj: (output) handle to configuration syncobj
> > *
> > * Handle to a syncobj which the kernel will signal after stream
> > * configuration or re-configuration is complete (after return from
> > * the ioctl). This handle can be provided as a dependency to the
> > - * next XE exec ioctl.
> > + * next xe exec ioctl to synchronize xe exec with oa config changes
> > */
> > __u32 config_syncobj;
> >
> > - __u32 reserved;
> > -
> > - /** @flags: Flags */
> > - __u32 flags;
> > -#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
> > -#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
> > -#define XE_OA_FLAG_DISABLED (1 << 2)
> > -
> > - /** The number of u64 (id, value) pairs */
> > - __u32 num_properties;
> > -
> > - /**
> > - * Pointer to array of u64 (id, value) pairs configuring the stream
> > - * to open.
> > - */
> > - __u64 properties_ptr;
> > + /** @reserved: reserved (MBZ) */
> > + __u64 reserved[4];
> > };
> >
> > struct drm_xe_oa_record_header {
> > --
> > 2.41.0
> >
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 21/21] drm/xe/uapi: Convert OA property key/value pairs to a struct
2023-10-05 5:37 ` Dixit, Ashutosh
@ 2023-10-05 19:26 ` Umesh Nerlige Ramappa
0 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-05 19:26 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
On Wed, Oct 04, 2023 at 10:37:09PM -0700, Dixit, Ashutosh wrote:
>On Thu, 21 Sep 2023 16:53:20 -0700, Dixit, Ashutosh wrote:
>>
>
>Hi Umesh,
>
>> On Tue, 19 Sep 2023 09:10:49 -0700, Ashutosh Dixit wrote:
>> >
>> > Change OA uapi to take a param struct rather than property key value
>> > pairs. A param struct is simpler and param structs can be extenended in the
>> > future using xe_user_extension so there seems to be no reason to use
>> > property key value pairs.
>>
>> There are two ways of doing this:
>>
>> 1. In this patch we have collected all OA properties into a single
>> struct. The assumption is that any future changes would be handled via
>> 'struct drm_xe_ext_set_property' chained structs (basically using
>> xe_user_extension):
>>
>> https://patchwork.freedesktop.org/patch/558715/
>>
>> 2. The second way to do it would be to use chained 'struct
>> drm_xe_ext_set_property' from the beginning as is being done for
>> DRM_XE_EXEC_QUEUE_SET_PROPERTY. This is basically the same as the
>> earlier OA property key/value pairs except that the properties are now
>> input via chained structs.
>>
>> This second way is a uniform way of specifying property values whereas
>> the first way in non-uniform.
>>
>> Just thought I'll point this out when we decide about this uapi during the
>> code review.
>
>Since we are almost certain that the OA uapi will need to be extended in
>the future, for the sake of uniformity maybe we should go with the approach
>2. above (this patch implements approach 1.)? Something to keep in mind for
>the review of this patch. This is what I was referring to earlier today.
Let's go with 2 then. I will skip reviewing this.
>
>Thanks.
>--
>Ashutosh
>
>>
>> > Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>>
>> /snip/
>>
>> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>> > index c0018abee4052..8ba11c4eb36b5 100644
>> > --- a/include/uapi/drm/xe_drm.h
>> > +++ b/include/uapi/drm/xe_drm.h
>> > @@ -1175,30 +1175,26 @@ struct drm_xe_query_oa_info {
>> > } oau[];
>> > };
>> >
>> > -enum drm_xe_oa_property_id {
>> > - /**
>> > - * ID of the OA unit on which to open the OA stream, see
>> > - * @oa_unit_id in 'struct drm_xe_engine_class_instance'. Defaults
>> > - * to 0 if not provided.
>> > - */
>> > - DRM_XE_OA_PROP_OA_UNIT_ID = 1,
>> > +struct drm_xe_oa_open_param {
>> > + /** @extensions: Pointer to the first extension struct, if any */
>> > + __u64 extensions;
>> >
>> > /**
>> > - * A value of 1 requests the inclusion of raw OA unit reports as
>> > - * part of stream samples.
>> > + * @oa_unit_id: ID of the OA unit on which to open the OA stream,
>> > + * see @oa_unit_id in struct @drm_xe_engine_class_instance
>> > */
>> > - DRM_XE_OA_PROP_SAMPLE_OA,
>> > + __u32 oa_unit_id;
>> >
>> > /**
>> > - * The value specifies which set of OA unit metrics should be
>> > - * configured, defining the contents of any OA unit reports.
>> > + * @sample_oa: A value of 1 requests the inclusion of raw OA unit
>> > + * reports as part of stream samples
>> > */
>> > - DRM_XE_OA_PROP_OA_METRICS_SET,
>> > + __u32 sample_oa;
>> >
>> > /**
>> > - * The value specifies the size and layout of OA unit reports.
>> > + * @oa_format: The value specifies the size and layout of OA unit reports
>> > */
>> > - DRM_XE_OA_PROP_OA_FORMAT,
>> > + __u64 oa_format;
>> > /**
>> > * OA_FORMAT's are specified the same way as in Bspec, in terms of
>> > * the following quantities: a. enum @drm_xe_oa_format_type
>> > @@ -1210,86 +1206,79 @@ enum drm_xe_oa_property_id {
>> > #define XE_OA_MASK_BC_REPORT (0xff << 24)
>> >
>> > /**
>> > - * Specifying this property implicitly requests periodic OA unit
>> > - * sampling and (at least on Haswell) the sampling frequency is derived
>> > - * from this exponent as follows:
>> > - *
>> > - * 80ns * 2^(period_exponent + 1)
>> > + * @metric_set: specifies which set of OA unit metrics should be
>> > + * configured, defining the contents of any OA unit reports. Metric
>> > + * set ID is returned by the XE_PERF_ADD_CONFIG op of the PREF ioctl
>> > */
>> > - DRM_XE_OA_PROP_OA_EXPONENT,
>> > + __u32 metric_set;
>> >
>> > /**
>> > - * Specifying this property is only valid when specify a context to
>> > - * filter with DRM_XE_OA_PROP_ENGINE_ID. Specifying this property
>> > - * will hold preemption of the particular engine we want to gather
>> > - * performance data about.
>> > + * @period_exponent: Specifying this property implicitly requests
>> > + * periodic OA unit sampling. The sampling period is:
>> > + *
>> > + * 2^(period_exponent + 1) / @oa_timestamp_freq
>> > + *
>> > + * Set period_exponent *negative* to disable periodic sampling
>> > */
>> > - DRM_XE_OA_PROP_HOLD_PREEMPTION,
>> > + __s32 period_exponent;
>> >
>> > /**
>> > - * Specify a global OA buffer size to be allocated in bytes. The
>> > - * size specified must be supported by HW (powers of 2 ranging from
>> > - * 128 KB to 128Mb depending on the platform)
>> > + * @oa_buffer_size: Specify a global OA buffer size to be allocated
>> > + * in bytes. The size specified must be supported by HW (powers of
>> > + * 2 ranging from 128 KB to 128Mb depending on the platform). A
>> > + * value of 0 will choose a default size of 16 MB.
>> > */
>> > - DRM_XE_OA_PROP_OA_BUFFER_SIZE,
>> > + __u32 oa_buffer_size;
>> >
>> > /**
>> > - * This optional parameter specifies the timer interval in nanoseconds
>> > - * at which the xe driver will check the OA buffer for available data.
>> > - * Minimum allowed value is 100 microseconds. A default value is used by
>> > - * the driver if this parameter is not specified. Note that larger timer
>> > - * values will reduce cpu consumption during OA perf captures. However,
>> > - * excessively large values would potentially result in OA buffer
>> > - * overwrites as captures reach end of the OA buffer.
>> > + * @poll_period: Specify timer interval in micro-seconds at which
>> > + * the xe driver will check the OA buffer for available
>> > + * data. Minimum allowed value is 100 microseconds. A value of 0
>> > + * selects a default value is used by the driver. Note that larger
>> > + * timer values will reduce cpu consumption during OA perf
>> > + * captures. However, excessively large values would potentially
>> > + * result in OA buffer overwrites as captures reach end of the OA
>> > + * buffer.
>> > */
>> > - DRM_XE_OA_PROP_POLL_OA_PERIOD,
>> > + __u32 poll_period_us;
>> > +
>> > + /** @open_flags: Flags */
>> > + __u32 open_flags;
>> > +#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
>> > +#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
>> > +#define XE_OA_FLAG_DISABLED (1 << 2)
>> >
>> > /**
>> > - * Open the stream for a specific exec queue id (as used with
>> > - * drm_xe_exec). A stream opened for a specific exec queue id this
>> > - * way won't typically require root privileges.
>> > + * @exec_queue_id: Open the stream for a specific exec queue id (as
>> > + * used with drm_xe_exec). A stream opened for a specific exec
>> > + * queue id this way won't typically require root
>> > + * privileges. Pass a value <= 0 to not specify an exec queue id.
>> > */
>> > - DRM_XE_OA_PROP_EXEC_QUEUE_ID,
>> > + __s32 exec_queue_id;
>> >
>> > /**
>> > - * This parameter specifies the engine instance and can be passed along
>> > - * with DRM_XE_OA_PROP_EXEC_QUEUE_ID or will default to 0.
>> > + * @engine_instance: engine instance to use with @exec_queue_id.
>> > */
>> > - DRM_XE_OA_PROP_OA_ENGINE_INSTANCE,
>> > + __u32 engine_instance;
>> >
>> > - DRM_XE_OA_PROP_MAX /* non-ABI */
>> > -};
>> > -
>> > -struct drm_xe_oa_open_param {
>> > - /** @extensions: Pointer to the first extension struct, if any */
>> > - __u64 extensions;
>> > + /**
>> > + * @hold_preemption: If true, this will disable preemption for the
>> > + * exec queue selected with @exec_queue_id
>> > + */
>> > + __u32 hold_preemption;
>> >
>> > /**
>> > - * @config_syncobj: (Output) handle to configuration syncobj
>> > + * @config_syncobj: (output) handle to configuration syncobj
>> > *
>> > * Handle to a syncobj which the kernel will signal after stream
>> > * configuration or re-configuration is complete (after return from
>> > * the ioctl). This handle can be provided as a dependency to the
>> > - * next XE exec ioctl.
>> > + * next xe exec ioctl to synchronize xe exec with oa config changes
>> > */
>> > __u32 config_syncobj;
>> >
>> > - __u32 reserved;
>> > -
>> > - /** @flags: Flags */
>> > - __u32 flags;
>> > -#define XE_OA_FLAG_FD_CLOEXEC (1 << 0)
>> > -#define XE_OA_FLAG_FD_NONBLOCK (1 << 1)
>> > -#define XE_OA_FLAG_DISABLED (1 << 2)
>> > -
>> > - /** The number of u64 (id, value) pairs */
>> > - __u32 num_properties;
>> > -
>> > - /**
>> > - * Pointer to array of u64 (id, value) pairs configuring the stream
>> > - * to open.
>> > - */
>> > - __u64 properties_ptr;
>> > + /** @reserved: reserved (MBZ) */
>> > + __u64 reserved[4];
>> > };
>> >
>> > struct drm_xe_oa_record_header {
>> > --
>> > 2.41.0
>> >
^ permalink raw reply [flat|nested] 88+ messages in thread
* [Intel-xe] ✓ CI.Patch_applied: success for Add OA functionality to Xe (rev6)
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (20 preceding siblings ...)
2023-09-19 16:10 ` [Intel-xe] [PATCH 21/21] drm/xe/uapi: Convert OA property key/value pairs to a struct Ashutosh Dixit
@ 2023-09-19 16:19 ` Patchwork
2023-09-19 16:19 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
` (7 subsequent siblings)
29 siblings, 0 replies; 88+ messages in thread
From: Patchwork @ 2023-09-19 16:19 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
== Series Details ==
Series: Add OA functionality to Xe (rev6)
URL : https://patchwork.freedesktop.org/series/121084/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: fac2e20c7 Revert "FIXME: drm/i915/hpd: skip intel_hpd_poll_fini() for non-display paths"
=== git am output follows ===
Applying: drm/xe/uapi: Introduce OA (observability architecture) uapi
Applying: drm/xe/oa: Add OA types
Applying: drm/xe/oa: Add registers and GPU commands used by OA
Applying: drm/xe/oa: Module init/exit and probe/remove
Applying: drm/xe/oa: Add/remove config ioctl's
Applying: drm/xe/oa: Start implementing OA stream open ioctl
Applying: drm/xe/oa: OA stream initialization
Applying: drm/xe/oa: Expose OA stream fd
Applying: drm/xe/oa: Read file_operation
Applying: drm/xe/oa: Implement queries
Applying: drm/xe/oa: Override GuC RC with OA on PVC
Applying: drm/xe/uapi: "Perf" layer to support multiple perf counter stream types
Applying: drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
Applying: drm/xe/uapi: Simplify OA configs in uapi
Applying: drm/xe/uapi: Remove OA format names from OA uapi
Applying: drm/xe/oa: Make xe_oa_timestamp_frequency per gt
Applying: drm/xe/oa: Remove filtering reports on context id
Applying: drm/xe/uapi: More OA uapi fixes/additions
Applying: drm/xe/uapi: Drop OA_IOCTL_VERSION
Applying: drm/xe/uapi: Use OA unit id to identify OA unit
Applying: drm/xe/uapi: Convert OA property key/value pairs to a struct
^ permalink raw reply [flat|nested] 88+ messages in thread* [Intel-xe] ✗ CI.checkpatch: warning for Add OA functionality to Xe (rev6)
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (21 preceding siblings ...)
2023-09-19 16:19 ` [Intel-xe] ✓ CI.Patch_applied: success for Add OA functionality to Xe (rev6) Patchwork
@ 2023-09-19 16:19 ` Patchwork
2023-09-19 16:21 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
` (6 subsequent siblings)
29 siblings, 0 replies; 88+ messages in thread
From: Patchwork @ 2023-09-19 16:19 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
== Series Details ==
Series: Add OA functionality to Xe (rev6)
URL : https://patchwork.freedesktop.org/series/121084/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 91586655208548314519f3e7cb8aa67226ed179c
Author: Ashutosh Dixit <ashutosh.dixit@intel.com>
Date: Tue Sep 19 09:10:49 2023 -0700
drm/xe/uapi: Convert OA property key/value pairs to a struct
Change OA uapi to take a param struct rather than property key value
pairs. A param struct is simpler and param structs can be extenended in the
future using xe_user_extension so there seems to be no reason to use
property key value pairs.
Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
+ /mt/dim checkpatch fac2e20c785bd790c250e4f4799dfa28e44e7082 drm-intel
d26d60548 drm/xe/uapi: Introduce OA (observability architecture) uapi
-:38: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#38: FILE: include/uapi/drm/xe_drm.h:133:
+#define DRM_IOCTL_XE_OA_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_OPEN, struct drm_xe_oa_open_param)
-:39: WARNING:LONG_LINE: line length of 121 exceeds 100 columns
#39: FILE: include/uapi/drm/xe_drm.h:134:
+#define DRM_IOCTL_XE_OA_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_ADD_CONFIG, struct drm_xe_oa_config)
-:40: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#40: FILE: include/uapi/drm/xe_drm.h:135:
+#define DRM_IOCTL_XE_OA_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OA_REMOVE_CONFIG, __u64)
total: 0 errors, 3 warnings, 0 checks, 291 lines checked
a75037184 drm/xe/oa: Add OA types
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:17: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#17:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 295 lines checked
e003a1a12 drm/xe/oa: Add registers and GPU commands used by OA
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:74: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#74:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 219 lines checked
fb603a692 drm/xe/oa: Module init/exit and probe/remove
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:156: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#156:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 430 lines checked
07959d2ac drm/xe/oa: Add/remove config ioctl's
9d835612f drm/xe/oa: Start implementing OA stream open ioctl
16aba32a9 drm/xe/oa: OA stream initialization
779cd1d01 drm/xe/oa: Expose OA stream fd
724ef3c8a drm/xe/oa: Read file_operation
28086b4b9 drm/xe/oa: Implement queries
b725b4c7e drm/xe/oa: Override GuC RC with OA on PVC
091754c18 drm/xe/uapi: "Perf" layer to support multiple perf counter stream types
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:181: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#181:
new file mode 100644
-:286: WARNING:LONG_LINE: line length of 118 exceeds 100 columns
#286: FILE: include/uapi/drm/xe_drm.h:133:
+#define DRM_IOCTL_XE_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_OPEN, struct drm_xe_perf_param)
-:287: WARNING:LONG_LINE: line length of 124 exceeds 100 columns
#287: FILE: include/uapi/drm/xe_drm.h:134:
+#define DRM_IOCTL_XE_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_ADD_CONFIG, struct drm_xe_perf_param)
-:288: WARNING:LONG_LINE: line length of 127 exceeds 100 columns
#288: FILE: include/uapi/drm/xe_drm.h:135:
+#define DRM_IOCTL_XE_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF_REMOVE_CONFIG, struct drm_xe_perf_param)
total: 0 errors, 4 warnings, 0 checks, 289 lines checked
608a27016 drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
-:124: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#124: FILE: include/uapi/drm/xe_drm.h:131:
+#define DRM_IOCTL_XE_PERF DRM_IOW(DRM_COMMAND_BASE + DRM_XE_PERF, struct drm_xe_perf_param)
total: 0 errors, 1 warnings, 0 checks, 112 lines checked
ac80af02e drm/xe/uapi: Simplify OA configs in uapi
53b7fa776 drm/xe/uapi: Remove OA format names from OA uapi
0904e0bef drm/xe/oa: Make xe_oa_timestamp_frequency per gt
fd2e16bcb drm/xe/oa: Remove filtering reports on context id
8516dd55c drm/xe/uapi: More OA uapi fixes/additions
5a9b1d54b drm/xe/uapi: Drop OA_IOCTL_VERSION
28114c1e1 drm/xe/uapi: Use OA unit id to identify OA unit
915866552 drm/xe/uapi: Convert OA property key/value pairs to a struct
^ permalink raw reply [flat|nested] 88+ messages in thread* [Intel-xe] ✓ CI.KUnit: success for Add OA functionality to Xe (rev6)
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (22 preceding siblings ...)
2023-09-19 16:19 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
@ 2023-09-19 16:21 ` Patchwork
2023-09-19 16:28 ` [Intel-xe] ✓ CI.Build: " Patchwork
` (5 subsequent siblings)
29 siblings, 0 replies; 88+ messages in thread
From: Patchwork @ 2023-09-19 16:21 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
== Series Details ==
Series: Add OA functionality to Xe (rev6)
URL : https://patchwork.freedesktop.org/series/121084/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
stty: 'standard input': Inappropriate ioctl for device
[16:19:55] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:19:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
[16:20:19] Starting KUnit Kernel (1/1)...
[16:20:19] ============================================================
[16:20:19] ==================== xe_bo (2 subtests) ====================
[16:20:19] [SKIPPED] xe_ccs_migrate_kunit
[16:20:19] [SKIPPED] xe_bo_evict_kunit
[16:20:19] ===================== [SKIPPED] xe_bo ======================
[16:20:19] ================== xe_dma_buf (1 subtest) ==================
[16:20:19] [SKIPPED] xe_dma_buf_kunit
[16:20:19] =================== [SKIPPED] xe_dma_buf ===================
[16:20:19] ================== xe_migrate (1 subtest) ==================
[16:20:19] [SKIPPED] xe_migrate_sanity_kunit
[16:20:19] =================== [SKIPPED] xe_migrate ===================
[16:20:19] =================== xe_pci (2 subtests) ====================
[16:20:19] [PASSED] xe_gmdid_graphics_ip
[16:20:19] [PASSED] xe_gmdid_media_ip
[16:20:19] ===================== [PASSED] xe_pci ======================
[16:20:19] ==================== xe_rtp (1 subtest) ====================
[16:20:19] ================== xe_rtp_process_tests ===================
[16:20:19] [PASSED] coalesce-same-reg
[16:20:19] [PASSED] no-match-no-add
[16:20:19] [PASSED] no-match-no-add-multiple-rules
[16:20:19] [PASSED] two-regs-two-entries
[16:20:19] [PASSED] clr-one-set-other
[16:20:19] [PASSED] set-field
[16:20:19] [PASSED] conflict-duplicate
[16:20:19] [PASSED] conflict-not-disjoint
[16:20:19] [PASSED] conflict-reg-type
[16:20:19] ============== [PASSED] xe_rtp_process_tests ===============
[16:20:19] ===================== [PASSED] xe_rtp ======================
[16:20:19] ==================== xe_wa (1 subtest) =====================
[16:20:19] ======================== xe_wa_gt =========================
[16:20:19] [PASSED] TIGERLAKE (B0)
[16:20:19] [PASSED] DG1 (A0)
[16:20:19] [PASSED] DG1 (B0)
[16:20:19] [PASSED] ALDERLAKE_S (A0)
[16:20:19] [PASSED] ALDERLAKE_S (B0)
[16:20:19] [PASSED] ALDERLAKE_S (C0)
[16:20:19] [PASSED] ALDERLAKE_S (D0)
[16:20:19] [PASSED] ALDERLAKE_P (A0)
[16:20:19] [PASSED] ALDERLAKE_P (B0)
[16:20:19] [PASSED] ALDERLAKE_P (C0)
[16:20:19] [PASSED] DG2_G10 (A0)
[16:20:19] [PASSED] DG2_G10 (A1)
[16:20:19] [PASSED] DG2_G10 (B0)
[16:20:19] [PASSED] DG2_G10 (C0)
[16:20:19] [PASSED] DG2_G11 (A0)
[16:20:19] [PASSED] DG2_G11 (B0)
[16:20:19] [PASSED] DG2_G11 (B1)
[16:20:19] [PASSED] DG2_G12 (A0)
[16:20:19] [PASSED] DG2_G12 (A1)
[16:20:19] [PASSED] PVC (B0)
[16:20:19] [PASSED] PVC (B1)
[16:20:19] [PASSED] PVC (C0)
[16:20:19] ==================== [PASSED] xe_wa_gt =====================
[16:20:19] ====================== [PASSED] xe_wa ======================
[16:20:19] ============================================================
[16:20:19] Testing complete. Ran 37 tests: passed: 33, skipped: 4
[16:20:19] Elapsed time: 23.804s total, 4.164s configuring, 19.521s building, 0.101s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:20:19] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:20:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
[16:20:40] Starting KUnit Kernel (1/1)...
[16:20:40] ============================================================
[16:20:40] ============ drm_test_pick_cmdline (2 subtests) ============
[16:20:40] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[16:20:40] =============== drm_test_pick_cmdline_named ===============
[16:20:40] [PASSED] NTSC
[16:20:40] [PASSED] NTSC-J
[16:20:40] [PASSED] PAL
[16:20:40] [PASSED] PAL-M
[16:20:40] =========== [PASSED] drm_test_pick_cmdline_named ===========
[16:20:40] ============== [PASSED] drm_test_pick_cmdline ==============
[16:20:40] ================== drm_buddy (6 subtests) ==================
[16:20:40] [PASSED] drm_test_buddy_alloc_limit
[16:20:40] [PASSED] drm_test_buddy_alloc_range
[16:20:40] [PASSED] drm_test_buddy_alloc_optimistic
[16:20:40] [PASSED] drm_test_buddy_alloc_pessimistic
[16:20:40] [PASSED] drm_test_buddy_alloc_smoke
[16:20:40] [PASSED] drm_test_buddy_alloc_pathological
[16:20:40] ==================== [PASSED] drm_buddy ====================
[16:20:40] ============= drm_cmdline_parser (40 subtests) =============
[16:20:40] [PASSED] drm_test_cmdline_force_d_only
[16:20:40] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:20:40] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:20:40] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:20:40] [PASSED] drm_test_cmdline_force_e_only
[16:20:40] [PASSED] drm_test_cmdline_res
[16:20:40] [PASSED] drm_test_cmdline_res_vesa
[16:20:40] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:20:40] [PASSED] drm_test_cmdline_res_rblank
[16:20:40] [PASSED] drm_test_cmdline_res_bpp
[16:20:40] [PASSED] drm_test_cmdline_res_refresh
[16:20:40] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:20:40] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:20:40] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:20:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:20:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:20:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:20:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:20:40] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:20:40] [PASSED] drm_test_cmdline_res_margins_force_on
[16:20:40] [PASSED] drm_test_cmdline_res_vesa_margins
[16:20:40] [PASSED] drm_test_cmdline_name
[16:20:40] [PASSED] drm_test_cmdline_name_bpp
[16:20:40] [PASSED] drm_test_cmdline_name_option
[16:20:40] [PASSED] drm_test_cmdline_name_bpp_option
[16:20:40] [PASSED] drm_test_cmdline_rotate_0
[16:20:40] [PASSED] drm_test_cmdline_rotate_90
[16:20:40] [PASSED] drm_test_cmdline_rotate_180
[16:20:40] [PASSED] drm_test_cmdline_rotate_270
[16:20:40] [PASSED] drm_test_cmdline_hmirror
[16:20:40] [PASSED] drm_test_cmdline_vmirror
[16:20:40] [PASSED] drm_test_cmdline_margin_options
[16:20:40] [PASSED] drm_test_cmdline_multiple_options
[16:20:40] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:20:40] [PASSED] drm_test_cmdline_extra_and_option
[16:20:40] [PASSED] drm_test_cmdline_freestanding_options
[16:20:40] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:20:40] [PASSED] drm_test_cmdline_panel_orientation
[16:20:40] ================ drm_test_cmdline_invalid =================
[16:20:40] [PASSED] margin_only
[16:20:40] [PASSED] interlace_only
[16:20:40] [PASSED] res_missing_x
[16:20:40] [PASSED] res_missing_y
[16:20:40] [PASSED] res_bad_y
[16:20:40] [PASSED] res_missing_y_bpp
[16:20:40] [PASSED] res_bad_bpp
[16:20:40] [PASSED] res_bad_refresh
[16:20:40] [PASSED] res_bpp_refresh_force_on_off
[16:20:40] [PASSED] res_invalid_mode
[16:20:40] [PASSED] res_bpp_wrong_place_mode
[16:20:40] [PASSED] name_bpp_refresh
[16:20:40] [PASSED] name_refresh
[16:20:40] [PASSED] name_refresh_wrong_mode
[16:20:40] [PASSED] name_refresh_invalid_mode
[16:20:40] [PASSED] rotate_multiple
[16:20:40] [PASSED] rotate_invalid_val
[16:20:40] [PASSED] rotate_truncated
[16:20:40] [PASSED] invalid_option
[16:20:40] [PASSED] invalid_tv_option
[16:20:40] [PASSED] truncated_tv_option
[16:20:40] ============ [PASSED] drm_test_cmdline_invalid =============
[16:20:40] =============== drm_test_cmdline_tv_options ===============
[16:20:40] [PASSED] NTSC
[16:20:40] [PASSED] NTSC_443
[16:20:40] [PASSED] NTSC_J
[16:20:40] [PASSED] PAL
[16:20:40] [PASSED] PAL_M
[16:20:40] [PASSED] PAL_N
[16:20:40] [PASSED] SECAM
[16:20:40] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:20:40] =============== [PASSED] drm_cmdline_parser ================
[16:20:40] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:20:40] ========== drm_test_get_tv_mode_from_name_valid ===========
[16:20:40] [PASSED] NTSC
[16:20:40] [PASSED] NTSC-443
[16:20:40] [PASSED] NTSC-J
[16:20:40] [PASSED] PAL
[16:20:40] [PASSED] PAL-M
[16:20:40] [PASSED] PAL-N
[16:20:40] [PASSED] SECAM
[16:20:40] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:20:40] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:20:40] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:20:40] ============= drm_damage_helper (21 subtests) ==============
[16:20:40] [PASSED] drm_test_damage_iter_no_damage
[16:20:40] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:20:40] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:20:40] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:20:40] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:20:40] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:20:40] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:20:40] [PASSED] drm_test_damage_iter_simple_damage
[16:20:40] [PASSED] drm_test_damage_iter_single_damage
[16:20:40] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:20:40] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:20:40] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:20:40] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:20:40] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:20:40] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:20:40] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:20:40] [PASSED] drm_test_damage_iter_damage
[16:20:40] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:20:40] [PASSED] drm_test_damage_iter_damage_one_outside
[16:20:40] [PASSED] drm_test_damage_iter_damage_src_moved
[16:20:40] [PASSED] drm_test_damage_iter_damage_not_visible
[16:20:40] ================ [PASSED] drm_damage_helper ================
[16:20:40] ============== drm_dp_mst_helper (2 subtests) ==============
[16:20:40] ============== drm_test_dp_mst_calc_pbn_mode ==============
[16:20:40] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:20:40] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:20:40] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:20:40] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:20:40] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:20:40] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:20:40] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[16:20:40] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:20:40] [PASSED] DP_POWER_UP_PHY with port number
[16:20:40] [PASSED] DP_POWER_DOWN_PHY with port number
[16:20:40] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:20:40] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:20:40] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:20:40] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:20:40] [PASSED] DP_QUERY_PAYLOAD with port number
[16:20:40] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:20:40] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:20:40] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:20:40] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:20:40] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:20:40] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:20:40] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:20:40] [PASSED] DP_REMOTE_I2C_READ with port number
[16:20:40] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:20:40] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:20:40] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:20:40] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:20:40] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:20:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:20:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:20:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:20:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:20:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:20:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:20:40] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:20:40] ================ [PASSED] drm_dp_mst_helper ================
[16:20:40] =========== drm_format_helper_test (11 subtests) ===========
[16:20:40] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:20:40] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:20:40] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:20:40] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:20:40] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:20:40] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:20:40] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:20:40] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:20:40] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:20:40] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:20:40] ============== drm_test_fb_xrgb8888_to_mono ===============
[16:20:40] [PASSED] single_pixel_source_buffer
[16:20:40] [PASSED] single_pixel_clip_rectangle
[16:20:40] [PASSED] well_known_colors
[16:20:40] [PASSED] destination_pitch
[16:20:40] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:20:40] ============= [PASSED] drm_format_helper_test ==============
[16:20:40] ================= drm_format (18 subtests) =================
[16:20:40] [PASSED] drm_test_format_block_width_invalid
[16:20:40] [PASSED] drm_test_format_block_width_one_plane
[16:20:40] [PASSED] drm_test_format_block_width_two_plane
[16:20:40] [PASSED] drm_test_format_block_width_three_plane
[16:20:40] [PASSED] drm_test_format_block_width_tiled
[16:20:40] [PASSED] drm_test_format_block_height_invalid
[16:20:40] [PASSED] drm_test_format_block_height_one_plane
[16:20:40] [PASSED] drm_test_format_block_height_two_plane
[16:20:40] [PASSED] drm_test_format_block_height_three_plane
[16:20:40] [PASSED] drm_test_format_block_height_tiled
[16:20:40] [PASSED] drm_test_format_min_pitch_invalid
[16:20:40] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:20:40] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:20:40] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:20:40] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:20:40] [PASSED] drm_test_format_min_pitch_two_plane
[16:20:40] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:20:40] [PASSED] drm_test_format_min_pitch_tiled
[16:20:40] =================== [PASSED] drm_format ====================
[16:20:40] =============== drm_framebuffer (1 subtest) ================
[16:20:40] =============== drm_test_framebuffer_create ===============
[16:20:40] [PASSED] ABGR8888 normal sizes
[16:20:40] [PASSED] ABGR8888 max sizes
[16:20:40] [PASSED] ABGR8888 pitch greater than min required
[16:20:40] [PASSED] ABGR8888 pitch less than min required
[16:20:40] [PASSED] ABGR8888 Invalid width
[16:20:40] [PASSED] ABGR8888 Invalid buffer handle
[16:20:40] [PASSED] No pixel format
[16:20:40] [PASSED] ABGR8888 Width 0
[16:20:40] [PASSED] ABGR8888 Height 0
[16:20:40] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:20:40] [PASSED] ABGR8888 Large buffer offset
[16:20:40] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:20:40] [PASSED] ABGR8888 Valid buffer modifier
[16:20:40] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:20:40] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:20:40] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:20:40] [PASSED] NV12 Normal sizes
[16:20:40] [PASSED] NV12 Max sizes
[16:20:40] [PASSED] NV12 Invalid pitch
[16:20:40] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:20:40] [PASSED] NV12 different modifier per-plane
[16:20:40] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:20:40] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:20:40] [PASSED] NV12 Modifier for inexistent plane
[16:20:40] [PASSED] NV12 Handle for inexistent plane
[16:20:40] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:20:40] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:20:40] [PASSED] YVU420 Normal sizes
[16:20:40] [PASSED] YVU420 Max sizes
[16:20:40] [PASSED] YVU420 Invalid pitch
[16:20:40] [PASSED] YVU420 Different pitches
[16:20:40] [PASSED] YVU420 Different buffer offsets/pitches
[16:20:40] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:20:40] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:20:40] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:20:40] [PASSED] YVU420 Valid modifier
[16:20:40] [PASSED] YVU420 Different modifiers per plane
[16:20:40] [PASSED] YVU420 Modifier for inexistent plane
[16:20:40] [PASSED] X0L2 Normal sizes
[16:20:40] [PASSED] X0L2 Max sizes
[16:20:40] [PASSED] X0L2 Invalid pitch
[16:20:40] [PASSED] X0L2 Pitch greater than minimum required
stty: 'standard input': Inappropriate ioctl for device
[16:20:40] [PASSED] X0L2 Handle for inexistent plane
[16:20:40] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:20:40] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:20:40] [PASSED] X0L2 Valid modifier
[16:20:40] [PASSED] X0L2 Modifier for inexistent plane
[16:20:40] =========== [PASSED] drm_test_framebuffer_create ===========
[16:20:40] ================= [PASSED] drm_framebuffer =================
[16:20:40] =============== drm-test-managed (1 subtest) ===============
[16:20:40] [PASSED] drm_test_managed_run_action
[16:20:40] ================ [PASSED] drm-test-managed =================
[16:20:40] =================== drm_mm (19 subtests) ===================
[16:20:40] [PASSED] drm_test_mm_init
[16:20:40] [PASSED] drm_test_mm_debug
[16:20:50] [PASSED] drm_test_mm_reserve
[16:20:59] [PASSED] drm_test_mm_insert
[16:21:00] [PASSED] drm_test_mm_replace
[16:21:00] [PASSED] drm_test_mm_insert_range
[16:21:00] [PASSED] drm_test_mm_frag
[16:21:00] [PASSED] drm_test_mm_align
[16:21:00] [PASSED] drm_test_mm_align32
[16:21:00] [PASSED] drm_test_mm_align64
[16:21:01] [PASSED] drm_test_mm_evict
[16:21:01] [PASSED] drm_test_mm_evict_range
[16:21:01] [PASSED] drm_test_mm_topdown
[16:21:01] [PASSED] drm_test_mm_bottomup
[16:21:01] [PASSED] drm_test_mm_lowest
[16:21:01] [PASSED] drm_test_mm_highest
[16:21:01] [PASSED] drm_test_mm_color
[16:21:02] [PASSED] drm_test_mm_color_evict
[16:21:02] [PASSED] drm_test_mm_color_evict_range
[16:21:02] ===================== [PASSED] drm_mm ======================
[16:21:02] ============= drm_modes_analog_tv (4 subtests) =============
[16:21:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:21:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:21:02] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:21:02] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:21:02] =============== [PASSED] drm_modes_analog_tv ===============
[16:21:02] ============== drm_plane_helper (2 subtests) ===============
[16:21:02] =============== drm_test_check_plane_state ================
[16:21:02] [PASSED] clipping_simple
[16:21:02] [PASSED] clipping_rotate_reflect
[16:21:02] [PASSED] positioning_simple
[16:21:02] [PASSED] upscaling
[16:21:02] [PASSED] downscaling
[16:21:02] [PASSED] rounding1
[16:21:02] [PASSED] rounding2
[16:21:02] [PASSED] rounding3
[16:21:02] [PASSED] rounding4
[16:21:02] =========== [PASSED] drm_test_check_plane_state ============
[16:21:02] =========== drm_test_check_invalid_plane_state ============
[16:21:02] [PASSED] positioning_invalid
[16:21:02] [PASSED] upscaling_invalid
[16:21:02] [PASSED] downscaling_invalid
[16:21:02] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:21:02] ================ [PASSED] drm_plane_helper =================
[16:21:02] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:21:02] ====== drm_test_connector_helper_tv_get_modes_check =======
[16:21:02] [PASSED] None
[16:21:02] [PASSED] PAL
[16:21:02] [PASSED] NTSC
[16:21:02] [PASSED] Both, NTSC Default
[16:21:02] [PASSED] Both, PAL Default
[16:21:02] [PASSED] Both, NTSC Default, with PAL on command-line
[16:21:02] [PASSED] Both, PAL Default, with NTSC on command-line
[16:21:02] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:21:02] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:21:02] ================== drm_rect (9 subtests) ===================
[16:21:02] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:21:02] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:21:02] [PASSED] drm_test_rect_clip_scaled_clipped
[16:21:02] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:21:02] ================= drm_test_rect_intersect =================
[16:21:02] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:21:02] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:21:02] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:21:02] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:21:02] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:21:02] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:21:02] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:21:02] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:21:02] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:21:02] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:21:02] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:21:02] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:21:02] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:21:02] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:21:02] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:21:02] ============= [PASSED] drm_test_rect_intersect =============
[16:21:02] ================ drm_test_rect_calc_hscale ================
[16:21:02] [PASSED] normal use
[16:21:02] [PASSED] out of max range
[16:21:02] [PASSED] out of min range
[16:21:02] [PASSED] zero dst
[16:21:02] [PASSED] negative src
[16:21:02] [PASSED] negative dst
[16:21:02] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:21:02] ================ drm_test_rect_calc_vscale ================
[16:21:02] [PASSED] normal use
[16:21:02] [PASSED] out of max range
[16:21:02] [PASSED] out of min range
[16:21:02] [PASSED] zero dst
[16:21:02] [PASSED] negative src
[16:21:02] [PASSED] negative dst
[16:21:02] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:21:02] ================== drm_test_rect_rotate ===================
[16:21:02] [PASSED] reflect-x
[16:21:02] [PASSED] reflect-y
[16:21:02] [PASSED] rotate-0
[16:21:02] [PASSED] rotate-90
[16:21:02] [PASSED] rotate-180
[16:21:02] [PASSED] rotate-270
[16:21:02] ============== [PASSED] drm_test_rect_rotate ===============
[16:21:02] ================ drm_test_rect_rotate_inv =================
[16:21:02] [PASSED] reflect-x
[16:21:02] [PASSED] reflect-y
[16:21:02] [PASSED] rotate-0
[16:21:02] [PASSED] rotate-90
[16:21:02] [PASSED] rotate-180
[16:21:02] [PASSED] rotate-270
[16:21:02] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:21:02] ==================== [PASSED] drm_rect =====================
[16:21:02] ================== drm_exec (7 subtests) ===================
[16:21:02] [PASSED] sanitycheck
[16:21:02] [PASSED] test_lock
[16:21:02] [PASSED] test_lock_unlock
[16:21:02] [PASSED] test_duplicates
[16:21:02] [PASSED] test_prepare
[16:21:02] [PASSED] test_prepare_array
[16:21:02] [PASSED] test_multiple_loops
[16:21:02] ==================== [PASSED] drm_exec =====================
[16:21:02] ============================================================
[16:21:02] Testing complete. Ran 340 tests: passed: 340
[16:21:02] Elapsed time: 43.418s total, 1.655s configuring, 19.486s building, 22.249s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 88+ messages in thread* [Intel-xe] ✓ CI.Build: success for Add OA functionality to Xe (rev6)
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (23 preceding siblings ...)
2023-09-19 16:21 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
@ 2023-09-19 16:28 ` Patchwork
2023-09-19 16:28 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
` (4 subsequent siblings)
29 siblings, 0 replies; 88+ messages in thread
From: Patchwork @ 2023-09-19 16:28 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
== Series Details ==
Series: Add OA functionality to Xe (rev6)
URL : https://patchwork.freedesktop.org/series/121084/
State : success
== Summary ==
+ trap cleanup EXIT
+ cd /kernel
+ git clone https://gitlab.freedesktop.org/drm/xe/ci.git .ci
Cloning into '.ci'...
++ date +%s
+ echo -e '\e[0Ksection_start:1695140474:build_x86_64[collapsed=true]\r\e[0KBuild x86-64'
+ mkdir -p build64-default
^[[0Ksection_start:1695140474:build_x86_64[collapsed=true]
^[[0KBuild x86-64
+ cp .ci/kernel/kconfig build64-default/.config
+ make O=build64-default olddefconfig
make[1]: Entering directory '/kernel/build64-default'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTLD scripts/kconfig/conf
#
# configuration written to .config
#
make[1]: Leaving directory '/kernel/build64-default'
++ nproc
+ make O=build64-default -j48
make[1]: Entering directory '/kernel/build64-default'
GEN Makefile
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
SYSHDR arch/x86/include/generated/asm/unistd_32_ia32.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
GEN arch/x86/include/generated/asm/orc_hash.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
SYSHDR arch/x86/include/generated/asm/unistd_64_x32.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
SYSTBL arch/x86/include/generated/asm/syscalls_64.h
WRAP arch/x86/include/generated/uapi/asm/param.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
WRAP arch/x86/include/generated/asm/export.h
WRAP arch/x86/include/generated/asm/early_ioremap.h
HOSTCC arch/x86/tools/relocs_32.o
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
HOSTCC arch/x86/tools/relocs_64.o
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
WRAP arch/x86/include/generated/asm/local64.h
WRAP arch/x86/include/generated/asm/mmiowb.h
HOSTCC arch/x86/tools/relocs_common.o
WRAP arch/x86/include/generated/asm/module.lds.h
WRAP arch/x86/include/generated/asm/rwonce.h
WRAP arch/x86/include/generated/asm/unaligned.h
UPD include/generated/uapi/linux/version.h
UPD include/config/kernel.release
UPD include/generated/compile.h
HOSTCC scripts/kallsyms
HOSTCC scripts/sorttable
HOSTCC scripts/asn1_compiler
HOSTCC scripts/unifdef
UPD include/generated/utsrelease.h
DESCEND objtool
HOSTCC /kernel/build64-default/tools/objtool/fixdep.o
HOSTLD /kernel/build64-default/tools/objtool/fixdep-in.o
LINK /kernel/build64-default/tools/objtool/fixdep
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/exec-cmd.h
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/help.h
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/pager.h
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/parse-options.h
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/run-command.h
CC /kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /kernel/build64-default/tools/objtool/libsubcmd/help.o
INSTALL libsubcmd_headers
CC /kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
HOSTLD arch/x86/tools/relocs
CC /kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
HDRINST usr/include/video/edid.h
HDRINST usr/include/video/sisfb.h
HDRINST usr/include/video/uvesafb.h
HDRINST usr/include/drm/amdgpu_drm.h
HDRINST usr/include/drm/qaic_accel.h
HDRINST usr/include/drm/vgem_drm.h
HDRINST usr/include/drm/i915_drm.h
HDRINST usr/include/drm/virtgpu_drm.h
HDRINST usr/include/drm/xe_drm.h
HDRINST usr/include/drm/omap_drm.h
HDRINST usr/include/drm/radeon_drm.h
HDRINST usr/include/drm/tegra_drm.h
HDRINST usr/include/drm/drm_mode.h
HDRINST usr/include/drm/ivpu_accel.h
HDRINST usr/include/drm/drm_sarea.h
HDRINST usr/include/drm/exynos_drm.h
HDRINST usr/include/drm/v3d_drm.h
HDRINST usr/include/drm/qxl_drm.h
HDRINST usr/include/drm/drm_fourcc.h
HDRINST usr/include/drm/nouveau_drm.h
HDRINST usr/include/drm/habanalabs_accel.h
HDRINST usr/include/drm/vmwgfx_drm.h
HDRINST usr/include/drm/msm_drm.h
HDRINST usr/include/drm/etnaviv_drm.h
HDRINST usr/include/drm/vc4_drm.h
HDRINST usr/include/drm/panfrost_drm.h
HDRINST usr/include/drm/lima_drm.h
HDRINST usr/include/drm/drm.h
HDRINST usr/include/mtd/inftl-user.h
HDRINST usr/include/drm/armada_drm.h
HDRINST usr/include/mtd/nftl-user.h
HDRINST usr/include/mtd/mtd-user.h
HDRINST usr/include/mtd/ubi-user.h
HDRINST usr/include/mtd/mtd-abi.h
HDRINST usr/include/xen/gntdev.h
HDRINST usr/include/xen/gntalloc.h
HDRINST usr/include/xen/evtchn.h
HDRINST usr/include/xen/privcmd.h
HDRINST usr/include/asm-generic/auxvec.h
HDRINST usr/include/asm-generic/bitsperlong.h
HDRINST usr/include/asm-generic/posix_types.h
HDRINST usr/include/asm-generic/ioctls.h
HDRINST usr/include/asm-generic/mman.h
HDRINST usr/include/asm-generic/shmbuf.h
HDRINST usr/include/asm-generic/bpf_perf_event.h
HDRINST usr/include/asm-generic/poll.h
HDRINST usr/include/asm-generic/types.h
HDRINST usr/include/asm-generic/msgbuf.h
HDRINST usr/include/asm-generic/swab.h
HDRINST usr/include/asm-generic/statfs.h
HDRINST usr/include/asm-generic/unistd.h
HDRINST usr/include/asm-generic/hugetlb_encode.h
HDRINST usr/include/asm-generic/resource.h
HDRINST usr/include/asm-generic/param.h
HDRINST usr/include/asm-generic/termbits-common.h
HDRINST usr/include/asm-generic/sockios.h
HDRINST usr/include/asm-generic/kvm_para.h
HDRINST usr/include/asm-generic/errno.h
HDRINST usr/include/asm-generic/termios.h
HDRINST usr/include/asm-generic/mman-common.h
HDRINST usr/include/asm-generic/ioctl.h
HDRINST usr/include/asm-generic/socket.h
UPD scripts/mod/devicetable-offsets.h
HDRINST usr/include/asm-generic/signal-defs.h
HDRINST usr/include/asm-generic/termbits.h
HDRINST usr/include/asm-generic/int-ll64.h
HDRINST usr/include/asm-generic/signal.h
HDRINST usr/include/asm-generic/siginfo.h
HDRINST usr/include/asm-generic/stat.h
HDRINST usr/include/asm-generic/int-l64.h
HDRINST usr/include/asm-generic/errno-base.h
HDRINST usr/include/asm-generic/fcntl.h
HDRINST usr/include/asm-generic/setup.h
HDRINST usr/include/asm-generic/ipcbuf.h
HDRINST usr/include/asm-generic/sembuf.h
HDRINST usr/include/asm-generic/ucontext.h
HDRINST usr/include/rdma/mlx5_user_ioctl_cmds.h
HDRINST usr/include/rdma/irdma-abi.h
HDRINST usr/include/rdma/mana-abi.h
HDRINST usr/include/rdma/hfi/hfi1_user.h
HDRINST usr/include/rdma/hfi/hfi1_ioctl.h
HDRINST usr/include/rdma/rdma_user_rxe.h
HDRINST usr/include/rdma/rdma_user_ioctl.h
HDRINST usr/include/rdma/mlx5_user_ioctl_verbs.h
HDRINST usr/include/rdma/bnxt_re-abi.h
HDRINST usr/include/rdma/hns-abi.h
HDRINST usr/include/rdma/qedr-abi.h
HDRINST usr/include/rdma/ib_user_ioctl_cmds.h
HDRINST usr/include/rdma/vmw_pvrdma-abi.h
HDRINST usr/include/rdma/ib_user_sa.h
HDRINST usr/include/rdma/ib_user_ioctl_verbs.h
HDRINST usr/include/rdma/rvt-abi.h
MKELF scripts/mod/elfconfig.h
HDRINST usr/include/rdma/mlx5-abi.h
HDRINST usr/include/rdma/rdma_netlink.h
HDRINST usr/include/rdma/erdma-abi.h
HDRINST usr/include/rdma/rdma_user_ioctl_cmds.h
HDRINST usr/include/rdma/rdma_user_cm.h
HOSTCC scripts/mod/modpost.o
HDRINST usr/include/rdma/ib_user_verbs.h
HDRINST usr/include/rdma/efa-abi.h
HDRINST usr/include/rdma/siw-abi.h
HOSTCC scripts/mod/file2alias.o
HDRINST usr/include/rdma/mlx4-abi.h
HOSTCC scripts/mod/sumversion.o
HDRINST usr/include/rdma/mthca-abi.h
HDRINST usr/include/rdma/ib_user_mad.h
HDRINST usr/include/rdma/ocrdma-abi.h
HDRINST usr/include/rdma/cxgb4-abi.h
HDRINST usr/include/misc/xilinx_sdfec.h
HDRINST usr/include/misc/uacce/hisi_qm.h
HDRINST usr/include/misc/uacce/uacce.h
HDRINST usr/include/misc/cxl.h
HDRINST usr/include/misc/ocxl.h
HDRINST usr/include/misc/fastrpc.h
HDRINST usr/include/misc/pvpanic.h
HDRINST usr/include/linux/i8k.h
HDRINST usr/include/linux/acct.h
HDRINST usr/include/linux/atmmpc.h
HDRINST usr/include/linux/fs.h
HDRINST usr/include/linux/cifs/cifs_mount.h
HDRINST usr/include/linux/cifs/cifs_netlink.h
HDRINST usr/include/linux/if_packet.h
HDRINST usr/include/linux/route.h
HDRINST usr/include/linux/patchkey.h
HDRINST usr/include/linux/tc_ematch/tc_em_cmp.h
HDRINST usr/include/linux/tc_ematch/tc_em_ipt.h
HDRINST usr/include/linux/tc_ematch/tc_em_meta.h
HDRINST usr/include/linux/tc_ematch/tc_em_nbyte.h
HDRINST usr/include/linux/tc_ematch/tc_em_text.h
HDRINST usr/include/linux/virtio_pmem.h
HDRINST usr/include/linux/rkisp1-config.h
HDRINST usr/include/linux/vhost.h
HDRINST usr/include/linux/cec-funcs.h
HDRINST usr/include/linux/ppdev.h
HDRINST usr/include/linux/isdn/capicmd.h
HDRINST usr/include/linux/virtio_fs.h
HDRINST usr/include/linux/netfilter_ipv6.h
HDRINST usr/include/linux/lirc.h
HDRINST usr/include/linux/mroute6.h
HDRINST usr/include/linux/nl80211-vnd-intel.h
HDRINST usr/include/linux/ivtvfb.h
HDRINST usr/include/linux/auxvec.h
HDRINST usr/include/linux/dm-log-userspace.h
HDRINST usr/include/linux/dccp.h
HDRINST usr/include/linux/virtio_scmi.h
HDRINST usr/include/linux/atmarp.h
HDRINST usr/include/linux/arcfb.h
HDRINST usr/include/linux/nbd-netlink.h
HDRINST usr/include/linux/sched/types.h
HDRINST usr/include/linux/tcp.h
HDRINST usr/include/linux/neighbour.h
HDRINST usr/include/linux/dlm_device.h
HDRINST usr/include/linux/wmi.h
HDRINST usr/include/linux/btrfs_tree.h
HDRINST usr/include/linux/virtio_crypto.h
HDRINST usr/include/linux/vbox_err.h
HDRINST usr/include/linux/edd.h
HDRINST usr/include/linux/loop.h
HDRINST usr/include/linux/nvme_ioctl.h
HDRINST usr/include/linux/mmtimer.h
HDRINST usr/include/linux/if_pppol2tp.h
HDRINST usr/include/linux/mtio.h
HDRINST usr/include/linux/if_arcnet.h
HDRINST usr/include/linux/romfs_fs.h
HDRINST usr/include/linux/posix_types.h
HDRINST usr/include/linux/rtc.h
HDRINST usr/include/linux/landlock.h
HDRINST usr/include/linux/gpio.h
HDRINST usr/include/linux/selinux_netlink.h
HDRINST usr/include/linux/pps.h
HDRINST usr/include/linux/ndctl.h
HDRINST usr/include/linux/virtio_gpu.h
HDRINST usr/include/linux/android/binderfs.h
HDRINST usr/include/linux/android/binder.h
HDRINST usr/include/linux/virtio_vsock.h
HDRINST usr/include/linux/sound.h
HDRINST usr/include/linux/vtpm_proxy.h
HDRINST usr/include/linux/nfs_fs.h
HDRINST usr/include/linux/elf-fdpic.h
HDRINST usr/include/linux/adfs_fs.h
HDRINST usr/include/linux/target_core_user.h
HDRINST usr/include/linux/netlink_diag.h
HDRINST usr/include/linux/const.h
HDRINST usr/include/linux/firewire-cdev.h
HDRINST usr/include/linux/vdpa.h
HDRINST usr/include/linux/if_infiniband.h
HDRINST usr/include/linux/serial.h
HDRINST usr/include/linux/iio/types.h
HDRINST usr/include/linux/iio/buffer.h
HDRINST usr/include/linux/iio/events.h
HDRINST usr/include/linux/major.h
HDRINST usr/include/linux/baycom.h
HDRINST usr/include/linux/atmppp.h
HDRINST usr/include/linux/ipv6_route.h
HDRINST usr/include/linux/spi/spidev.h
HDRINST usr/include/linux/spi/spi.h
HDRINST usr/include/linux/virtio_ring.h
HDRINST usr/include/linux/hdlc/ioctl.h
HDRINST usr/include/linux/remoteproc_cdev.h
HDRINST usr/include/linux/hyperv.h
HDRINST usr/include/linux/rpl_iptunnel.h
HDRINST usr/include/linux/sync_file.h
HDRINST usr/include/linux/igmp.h
HDRINST usr/include/linux/v4l2-dv-timings.h
HDRINST usr/include/linux/virtio_i2c.h
HDRINST usr/include/linux/xfrm.h
HDRINST usr/include/linux/capability.h
HDRINST usr/include/linux/gtp.h
HDRINST usr/include/linux/xdp_diag.h
HDRINST usr/include/linux/pkt_cls.h
HDRINST usr/include/linux/suspend_ioctls.h
HDRINST usr/include/linux/vt.h
HDRINST usr/include/linux/loadpin.h
HDRINST usr/include/linux/dlm_plock.h
HDRINST usr/include/linux/fb.h
HDRINST usr/include/linux/max2175.h
HDRINST usr/include/linux/sunrpc/debug.h
HDRINST usr/include/linux/gsmmux.h
HDRINST usr/include/linux/watchdog.h
HDRINST usr/include/linux/vhost_types.h
HDRINST usr/include/linux/vduse.h
HDRINST usr/include/linux/ila.h
HDRINST usr/include/linux/tdx-guest.h
HDRINST usr/include/linux/close_range.h
HDRINST usr/include/linux/ivtv.h
HDRINST usr/include/linux/cryptouser.h
HDRINST usr/include/linux/netfilter/xt_string.h
HDRINST usr/include/linux/netfilter/nfnetlink_compat.h
HDRINST usr/include/linux/netfilter/nf_nat.h
HDRINST usr/include/linux/netfilter/xt_recent.h
HDRINST usr/include/linux/netfilter/xt_addrtype.h
HDRINST usr/include/linux/netfilter/nf_conntrack_tcp.h
HDRINST usr/include/linux/netfilter/xt_MARK.h
HDRINST usr/include/linux/netfilter/xt_SYNPROXY.h
HDRINST usr/include/linux/netfilter/xt_multiport.h
HDRINST usr/include/linux/netfilter/nfnetlink.h
HDRINST usr/include/linux/netfilter/xt_cgroup.h
HDRINST usr/include/linux/netfilter/nf_synproxy.h
HDRINST usr/include/linux/netfilter/xt_TCPOPTSTRIP.h
HDRINST usr/include/linux/netfilter/nfnetlink_log.h
HDRINST usr/include/linux/netfilter/xt_TPROXY.h
HDRINST usr/include/linux/netfilter/xt_u32.h
HDRINST usr/include/linux/netfilter/nfnetlink_osf.h
HDRINST usr/include/linux/netfilter/xt_ecn.h
HDRINST usr/include/linux/netfilter/xt_esp.h
HDRINST usr/include/linux/netfilter/nfnetlink_hook.h
HDRINST usr/include/linux/netfilter/xt_mac.h
HDRINST usr/include/linux/netfilter/xt_comment.h
HDRINST usr/include/linux/netfilter/xt_NFQUEUE.h
HDRINST usr/include/linux/netfilter/xt_osf.h
HDRINST usr/include/linux/netfilter/nf_conntrack_sctp.h
HDRINST usr/include/linux/netfilter/xt_hashlimit.h
HDRINST usr/include/linux/netfilter/xt_socket.h
HDRINST usr/include/linux/netfilter/xt_connmark.h
HDRINST usr/include/linux/netfilter/xt_sctp.h
HDRINST usr/include/linux/netfilter/xt_tcpudp.h
HDRINST usr/include/linux/netfilter/xt_DSCP.h
HDRINST usr/include/linux/netfilter/xt_time.h
HDRINST usr/include/linux/netfilter/xt_IDLETIMER.h
HDRINST usr/include/linux/netfilter/xt_policy.h
HDRINST usr/include/linux/netfilter/xt_rpfilter.h
HDRINST usr/include/linux/netfilter/xt_nfacct.h
HDRINST usr/include/linux/netfilter/xt_SECMARK.h
HDRINST usr/include/linux/netfilter/xt_length.h
HDRINST usr/include/linux/netfilter/nfnetlink_cthelper.h
HDRINST usr/include/linux/netfilter/xt_quota.h
HDRINST usr/include/linux/netfilter/xt_CLASSIFY.h
HDRINST usr/include/linux/netfilter/xt_ipcomp.h
HDRINST usr/include/linux/netfilter/xt_iprange.h
HDRINST usr/include/linux/netfilter/xt_bpf.h
HDRINST usr/include/linux/netfilter/xt_LOG.h
HDRINST usr/include/linux/netfilter/xt_rateest.h
HDRINST usr/include/linux/netfilter/xt_CONNSECMARK.h
HDRINST usr/include/linux/netfilter/xt_HMARK.h
HDRINST usr/include/linux/netfilter/xt_CONNMARK.h
HDRINST usr/include/linux/netfilter/xt_pkttype.h
HDRINST usr/include/linux/netfilter/xt_ipvs.h
HDRINST usr/include/linux/netfilter/xt_devgroup.h
HDRINST usr/include/linux/netfilter/xt_AUDIT.h
HDRINST usr/include/linux/netfilter/xt_realm.h
HDRINST usr/include/linux/netfilter/nf_conntrack_common.h
HDRINST usr/include/linux/netfilter/xt_set.h
HDRINST usr/include/linux/netfilter/xt_LED.h
HDRINST usr/include/linux/netfilter/xt_connlabel.h
HDRINST usr/include/linux/netfilter/xt_owner.h
HDRINST usr/include/linux/netfilter/xt_dccp.h
HDRINST usr/include/linux/netfilter/xt_limit.h
HDRINST usr/include/linux/netfilter/xt_conntrack.h
HDRINST usr/include/linux/netfilter/xt_TEE.h
HDRINST usr/include/linux/netfilter/xt_RATEEST.h
HDRINST usr/include/linux/netfilter/xt_connlimit.h
HDRINST usr/include/linux/netfilter/ipset/ip_set.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_list.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_hash.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_bitmap.h
HDRINST usr/include/linux/netfilter/x_tables.h
HDRINST usr/include/linux/netfilter/xt_dscp.h
HDRINST usr/include/linux/netfilter/nf_conntrack_ftp.h
HDRINST usr/include/linux/netfilter/xt_cluster.h
HDRINST usr/include/linux/netfilter/nf_conntrack_tuple_common.h
HDRINST usr/include/linux/netfilter/nf_log.h
HDRINST usr/include/linux/netfilter/xt_tcpmss.h
HDRINST usr/include/linux/netfilter/xt_NFLOG.h
HDRINST usr/include/linux/netfilter/xt_l2tp.h
HDRINST usr/include/linux/netfilter/xt_helper.h
HDRINST usr/include/linux/netfilter/xt_statistic.h
HDRINST usr/include/linux/netfilter/nfnetlink_queue.h
HDRINST usr/include/linux/netfilter/nfnetlink_cttimeout.h
HDRINST usr/include/linux/netfilter/xt_CT.h
HDRINST usr/include/linux/netfilter/xt_CHECKSUM.h
HDRINST usr/include/linux/netfilter/xt_connbytes.h
HDRINST usr/include/linux/netfilter/xt_state.h
HDRINST usr/include/linux/netfilter/nf_tables.h
HDRINST usr/include/linux/netfilter/xt_mark.h
HDRINST usr/include/linux/netfilter/xt_cpu.h
HDRINST usr/include/linux/netfilter/nf_tables_compat.h
HDRINST usr/include/linux/netfilter/xt_physdev.h
HDRINST usr/include/linux/netfilter/nfnetlink_conntrack.h
HDRINST usr/include/linux/netfilter/nfnetlink_acct.h
HDRINST usr/include/linux/netfilter/xt_TCPMSS.h
HDRINST usr/include/linux/tty_flags.h
HDRINST usr/include/linux/if_phonet.h
HDRINST usr/include/linux/elf-em.h
HDRINST usr/include/linux/vm_sockets.h
HDRINST usr/include/linux/dlmconstants.h
HDRINST usr/include/linux/bsg.h
HDRINST usr/include/linux/matroxfb.h
HDRINST usr/include/linux/sysctl.h
HDRINST usr/include/linux/unix_diag.h
HDRINST usr/include/linux/pcitest.h
HDRINST usr/include/linux/mman.h
HDRINST usr/include/linux/if_plip.h
HDRINST usr/include/linux/virtio_balloon.h
HDRINST usr/include/linux/pidfd.h
HDRINST usr/include/linux/f2fs.h
HDRINST usr/include/linux/x25.h
HDRINST usr/include/linux/if_cablemodem.h
HDRINST usr/include/linux/utsname.h
HDRINST usr/include/linux/counter.h
HDRINST usr/include/linux/atm_tcp.h
HDRINST usr/include/linux/atalk.h
HDRINST usr/include/linux/virtio_rng.h
HDRINST usr/include/linux/vboxguest.h
HDRINST usr/include/linux/bpf_perf_event.h
HDRINST usr/include/linux/ipmi_ssif_bmc.h
HDRINST usr/include/linux/nfs_mount.h
HDRINST usr/include/linux/sonet.h
HDRINST usr/include/linux/netfilter.h
HDRINST usr/include/linux/keyctl.h
HDRINST usr/include/linux/nl80211.h
HDRINST usr/include/linux/misc/bcm_vk.h
HDRINST usr/include/linux/audit.h
HDRINST usr/include/linux/tipc_config.h
HDRINST usr/include/linux/tipc_sockets_diag.h
HDRINST usr/include/linux/futex.h
HDRINST usr/include/linux/sev-guest.h
HDRINST usr/include/linux/ublk_cmd.h
HDRINST usr/include/linux/types.h
HDRINST usr/include/linux/virtio_input.h
HDRINST usr/include/linux/if_slip.h
HDRINST usr/include/linux/personality.h
HDRINST usr/include/linux/openat2.h
HDRINST usr/include/linux/poll.h
HDRINST usr/include/linux/posix_acl.h
HDRINST usr/include/linux/smc_diag.h
HDRINST usr/include/linux/snmp.h
HDRINST usr/include/linux/errqueue.h
HDRINST usr/include/linux/if_tunnel.h
HDRINST usr/include/linux/fanotify.h
HDRINST usr/include/linux/kernel.h
HDRINST usr/include/linux/rtnetlink.h
HDRINST usr/include/linux/rpl.h
HDRINST usr/include/linux/memfd.h
HDRINST usr/include/linux/serial_core.h
HDRINST usr/include/linux/dns_resolver.h
HDRINST usr/include/linux/pr.h
HDRINST usr/include/linux/atm_eni.h
HDRINST usr/include/linux/lp.h
HDRINST usr/include/linux/virtio_mem.h
HDRINST usr/include/linux/ultrasound.h
HDRINST usr/include/linux/sctp.h
HDRINST usr/include/linux/uio.h
HDRINST usr/include/linux/tcp_metrics.h
HDRINST usr/include/linux/wwan.h
HDRINST usr/include/linux/atmbr2684.h
HDRINST usr/include/linux/in_route.h
HDRINST usr/include/linux/qemu_fw_cfg.h
HDRINST usr/include/linux/if_macsec.h
HDRINST usr/include/linux/usb/charger.h
HDRINST usr/include/linux/usb/g_uvc.h
HDRINST usr/include/linux/usb/gadgetfs.h
HDRINST usr/include/linux/usb/raw_gadget.h
HDRINST usr/include/linux/usb/cdc-wdm.h
HDRINST usr/include/linux/usb/g_printer.h
HDRINST usr/include/linux/usb/midi.h
HDRINST usr/include/linux/usb/tmc.h
HDRINST usr/include/linux/usb/video.h
HDRINST usr/include/linux/usb/functionfs.h
HDRINST usr/include/linux/usb/audio.h
HDRINST usr/include/linux/usb/ch11.h
HDRINST usr/include/linux/usb/ch9.h
HDRINST usr/include/linux/usb/cdc.h
HDRINST usr/include/linux/jffs2.h
HDRINST usr/include/linux/ax25.h
HDRINST usr/include/linux/auto_fs.h
HDRINST usr/include/linux/tiocl.h
HDRINST usr/include/linux/scc.h
HDRINST usr/include/linux/psci.h
HDRINST usr/include/linux/swab.h
HDRINST usr/include/linux/cec.h
HDRINST usr/include/linux/kfd_ioctl.h
HDRINST usr/include/linux/smc.h
HDRINST usr/include/linux/qrtr.h
HDRINST usr/include/linux/screen_info.h
HDRINST usr/include/linux/nfsacl.h
HDRINST usr/include/linux/seg6_hmac.h
HDRINST usr/include/linux/gameport.h
HDRINST usr/include/linux/wireless.h
HDRINST usr/include/linux/fdreg.h
HDRINST usr/include/linux/cciss_defs.h
HDRINST usr/include/linux/serial_reg.h
HDRINST usr/include/linux/perf_event.h
HDRINST usr/include/linux/in6.h
HDRINST usr/include/linux/hid.h
HDRINST usr/include/linux/netlink.h
HDRINST usr/include/linux/fuse.h
HDRINST usr/include/linux/magic.h
HDRINST usr/include/linux/ioam6_iptunnel.h
HDRINST usr/include/linux/stm.h
HDRINST usr/include/linux/vsockmon.h
HDRINST usr/include/linux/seg6.h
HDRINST usr/include/linux/idxd.h
HDRINST usr/include/linux/nitro_enclaves.h
HDRINST usr/include/linux/ptrace.h
HDRINST usr/include/linux/ioam6_genl.h
HDRINST usr/include/linux/qnx4_fs.h
HDRINST usr/include/linux/fsl_mc.h
HDRINST usr/include/linux/net_tstamp.h
HDRINST usr/include/linux/msg.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_TTL.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ttl.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ah.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ECN.h
HDRINST usr/include/linux/netfilter_ipv4/ip_tables.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ecn.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_CLUSTERIP.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_REJECT.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_LOG.h
HDRINST usr/include/linux/sem.h
HDRINST usr/include/linux/net_namespace.h
HDRINST usr/include/linux/radeonfb.h
HDRINST usr/include/linux/tee.h
HDRINST usr/include/linux/udp.h
HDRINST usr/include/linux/virtio_bt.h
HDRINST usr/include/linux/v4l2-subdev.h
HDRINST usr/include/linux/posix_acl_xattr.h
HDRINST usr/include/linux/v4l2-mediabus.h
HDRINST usr/include/linux/atmapi.h
HDRINST usr/include/linux/raid/md_p.h
HDRINST usr/include/linux/raid/md_u.h
HDRINST usr/include/linux/zorro_ids.h
HDRINST usr/include/linux/nbd.h
HDRINST usr/include/linux/isst_if.h
HDRINST usr/include/linux/rxrpc.h
HDRINST usr/include/linux/unistd.h
HDRINST usr/include/linux/if_arp.h
HDRINST usr/include/linux/atm_zatm.h
HDRINST usr/include/linux/io_uring.h
HDRINST usr/include/linux/if_fddi.h
HDRINST usr/include/linux/bpqether.h
HDRINST usr/include/linux/sysinfo.h
HDRINST usr/include/linux/auto_dev-ioctl.h
HDRINST usr/include/linux/nfs4_mount.h
HDRINST usr/include/linux/keyboard.h
HDRINST usr/include/linux/virtio_mmio.h
HDRINST usr/include/linux/input.h
HDRINST usr/include/linux/qnxtypes.h
HDRINST usr/include/linux/mdio.h
HDRINST usr/include/linux/lwtunnel.h
HDRINST usr/include/linux/gfs2_ondisk.h
HDRINST usr/include/linux/eventfd.h
HDRINST usr/include/linux/nfs4.h
HDRINST usr/include/linux/ptp_clock.h
HDRINST usr/include/linux/nubus.h
HDRINST usr/include/linux/if_bonding.h
HDRINST usr/include/linux/kcov.h
HDRINST usr/include/linux/fadvise.h
HDRINST usr/include/linux/taskstats.h
HDRINST usr/include/linux/veth.h
HDRINST usr/include/linux/atm.h
HDRINST usr/include/linux/ipmi.h
HDRINST usr/include/linux/kdev_t.h
HDRINST usr/include/linux/mount.h
HDRINST usr/include/linux/shm.h
HDRINST usr/include/linux/resource.h
HDRINST usr/include/linux/prctl.h
HDRINST usr/include/linux/watch_queue.h
HDRINST usr/include/linux/phonet.h
HDRINST usr/include/linux/sched.h
HDRINST usr/include/linux/random.h
HDRINST usr/include/linux/tty.h
HDRINST usr/include/linux/apm_bios.h
HDRINST usr/include/linux/fd.h
HDRINST usr/include/linux/um_timetravel.h
HDRINST usr/include/linux/tls.h
HDRINST usr/include/linux/rpmsg_types.h
HDRINST usr/include/linux/pfrut.h
HDRINST usr/include/linux/mei.h
HDRINST usr/include/linux/fsi.h
HDRINST usr/include/linux/rds.h
HDRINST usr/include/linux/if_x25.h
HDRINST usr/include/linux/param.h
HDRINST usr/include/linux/netdevice.h
HDRINST usr/include/linux/binfmts.h
HDRINST usr/include/linux/if_pppox.h
HDRINST usr/include/linux/sockios.h
HDRINST usr/include/linux/kcm.h
HDRINST usr/include/linux/virtio_9p.h
HDRINST usr/include/linux/genwqe/genwqe_card.h
HDRINST usr/include/linux/if_tun.h
HDRINST usr/include/linux/ext4.h
HDRINST usr/include/linux/if_ether.h
HDRINST usr/include/linux/kvm_para.h
HDRINST usr/include/linux/kernel-page-flags.h
HDRINST usr/include/linux/cdrom.h
HDRINST usr/include/linux/un.h
HDRINST usr/include/linux/module.h
HDRINST usr/include/linux/mqueue.h
HDRINST usr/include/linux/a.out.h
HDRINST usr/include/linux/input-event-codes.h
HDRINST usr/include/linux/coda.h
HDRINST usr/include/linux/rio_mport_cdev.h
HDRINST usr/include/linux/ipsec.h
HDRINST usr/include/linux/blkpg.h
HDRINST usr/include/linux/blkzoned.h
HDRINST usr/include/linux/netfilter_bridge/ebt_arpreply.h
HDRINST usr/include/linux/netfilter_bridge/ebt_redirect.h
HDRINST usr/include/linux/netfilter_bridge/ebt_nflog.h
HDRINST usr/include/linux/netfilter_bridge/ebt_802_3.h
HDRINST usr/include/linux/netfilter_bridge/ebt_nat.h
HDRINST usr/include/linux/netfilter_bridge/ebt_mark_m.h
HDRINST usr/include/linux/netfilter_bridge/ebtables.h
HDRINST usr/include/linux/netfilter_bridge/ebt_vlan.h
HDRINST usr/include/linux/netfilter_bridge/ebt_limit.h
HDRINST usr/include/linux/netfilter_bridge/ebt_log.h
HDRINST usr/include/linux/netfilter_bridge/ebt_stp.h
HDRINST usr/include/linux/netfilter_bridge/ebt_pkttype.h
HDRINST usr/include/linux/netfilter_bridge/ebt_ip.h
HDRINST usr/include/linux/netfilter_bridge/ebt_ip6.h
HDRINST usr/include/linux/netfilter_bridge/ebt_arp.h
HDRINST usr/include/linux/netfilter_bridge/ebt_mark_t.h
HDRINST usr/include/linux/netfilter_bridge/ebt_among.h
HDRINST usr/include/linux/reiserfs_fs.h
HDRINST usr/include/linux/cciss_ioctl.h
HDRINST usr/include/linux/fsmap.h
HDRINST usr/include/linux/smiapp.h
HDRINST usr/include/linux/switchtec_ioctl.h
HDRINST usr/include/linux/atmdev.h
HDRINST usr/include/linux/hpet.h
HDRINST usr/include/linux/virtio_config.h
HDRINST usr/include/linux/string.h
HDRINST usr/include/linux/kfd_sysfs.h
HDRINST usr/include/linux/inet_diag.h
HDRINST usr/include/linux/netdev.h
HDRINST usr/include/linux/xattr.h
HDRINST usr/include/linux/iommufd.h
HDRINST usr/include/linux/user_events.h
HDRINST usr/include/linux/errno.h
HDRINST usr/include/linux/icmp.h
HDRINST usr/include/linux/i2o-dev.h
HDRINST usr/include/linux/pg.h
HDRINST usr/include/linux/if_bridge.h
HDRINST usr/include/linux/thermal.h
HDRINST usr/include/linux/uinput.h
HDRINST usr/include/linux/handshake.h
HDRINST usr/include/linux/dqblk_xfs.h
HDRINST usr/include/linux/v4l2-common.h
HDRINST usr/include/linux/nvram.h
HDRINST usr/include/linux/if_vlan.h
HDRINST usr/include/linux/uhid.h
HDRINST usr/include/linux/omap3isp.h
HDRINST usr/include/linux/rose.h
HDRINST usr/include/linux/phantom.h
HDRINST usr/include/linux/ipmi_msgdefs.h
HDRINST usr/include/linux/bcm933xx_hcs.h
HDRINST usr/include/linux/bpf.h
HDRINST usr/include/linux/mempolicy.h
HDRINST usr/include/linux/efs_fs_sb.h
HDRINST usr/include/linux/nexthop.h
HDRINST usr/include/linux/net_dropmon.h
HDRINST usr/include/linux/surface_aggregator/cdev.h
HDRINST usr/include/linux/surface_aggregator/dtx.h
HDRINST usr/include/linux/net.h
HDRINST usr/include/linux/mii.h
HDRINST usr/include/linux/virtio_pcidev.h
HDRINST usr/include/linux/termios.h
HDRINST usr/include/linux/cgroupstats.h
HDRINST usr/include/linux/mpls.h
HDRINST usr/include/linux/iommu.h
HDRINST usr/include/linux/toshiba.h
HDRINST usr/include/linux/virtio_scsi.h
HDRINST usr/include/linux/zorro.h
LD /kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
HDRINST usr/include/linux/chio.h
HDRINST usr/include/linux/pkt_sched.h
HDRINST usr/include/linux/cramfs_fs.h
HDRINST usr/include/linux/nfs3.h
HDRINST usr/include/linux/vfio_ccw.h
HDRINST usr/include/linux/atm_nicstar.h
HDRINST usr/include/linux/ncsi.h
HDRINST usr/include/linux/virtio_net.h
HDRINST usr/include/linux/ioctl.h
HDRINST usr/include/linux/stddef.h
HDRINST usr/include/linux/limits.h
HDRINST usr/include/linux/ipmi_bmc.h
HDRINST usr/include/linux/netfilter_arp.h
HDRINST usr/include/linux/if_addr.h
HDRINST usr/include/linux/rpmsg.h
HDRINST usr/include/linux/media-bus-format.h
HDRINST usr/include/linux/kernelcapi.h
HDRINST usr/include/linux/ppp_defs.h
HDRINST usr/include/linux/ethtool.h
HDRINST usr/include/linux/aspeed-video.h
HDRINST usr/include/linux/hdlc.h
HDRINST usr/include/linux/fscrypt.h
HDRINST usr/include/linux/batadv_packet.h
HDRINST usr/include/linux/uuid.h
HDRINST usr/include/linux/capi.h
HDRINST usr/include/linux/mptcp.h
HDRINST usr/include/linux/hidraw.h
HDRINST usr/include/linux/virtio_console.h
HDRINST usr/include/linux/irqnr.h
HDRINST usr/include/linux/coresight-stm.h
HDRINST usr/include/linux/cxl_mem.h
HDRINST usr/include/linux/iso_fs.h
HDRINST usr/include/linux/virtio_blk.h
HDRINST usr/include/linux/udf_fs_i.h
HDRINST usr/include/linux/coff.h
HDRINST usr/include/linux/dma-buf.h
HDRINST usr/include/linux/ife.h
HDRINST usr/include/linux/agpgart.h
AR /kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
HDRINST usr/include/linux/socket.h
HDRINST usr/include/linux/nilfs2_ondisk.h
HDRINST usr/include/linux/connector.h
HDRINST usr/include/linux/auto_fs4.h
HDRINST usr/include/linux/map_to_7segment.h
HDRINST usr/include/linux/bt-bmc.h
HDRINST usr/include/linux/tc_act/tc_skbedit.h
HDRINST usr/include/linux/tc_act/tc_ctinfo.h
HDRINST usr/include/linux/tc_act/tc_defact.h
HDRINST usr/include/linux/tc_act/tc_gact.h
HDRINST usr/include/linux/tc_act/tc_vlan.h
HDRINST usr/include/linux/tc_act/tc_skbmod.h
HDRINST usr/include/linux/tc_act/tc_sample.h
HDRINST usr/include/linux/tc_act/tc_gate.h
HDRINST usr/include/linux/tc_act/tc_tunnel_key.h
HDRINST usr/include/linux/tc_act/tc_mirred.h
HDRINST usr/include/linux/tc_act/tc_nat.h
HDRINST usr/include/linux/tc_act/tc_csum.h
HDRINST usr/include/linux/tc_act/tc_connmark.h
HDRINST usr/include/linux/tc_act/tc_ife.h
HDRINST usr/include/linux/tc_act/tc_mpls.h
HDRINST usr/include/linux/tc_act/tc_ct.h
HDRINST usr/include/linux/tc_act/tc_pedit.h
HDRINST usr/include/linux/tc_act/tc_bpf.h
HDRINST usr/include/linux/tc_act/tc_ipt.h
HDRINST usr/include/linux/netrom.h
HDRINST usr/include/linux/joystick.h
HDRINST usr/include/linux/falloc.h
HDRINST usr/include/linux/cycx_cfm.h
HDRINST usr/include/linux/omapfb.h
HDRINST usr/include/linux/msdos_fs.h
HDRINST usr/include/linux/virtio_types.h
HDRINST usr/include/linux/mroute.h
HDRINST usr/include/linux/psample.h
HDRINST usr/include/linux/ipv6.h
HDRINST usr/include/linux/dw100.h
HDRINST usr/include/linux/psp-sev.h
HDRINST usr/include/linux/vfio.h
HDRINST usr/include/linux/if_ppp.h
HDRINST usr/include/linux/byteorder/big_endian.h
HDRINST usr/include/linux/byteorder/little_endian.h
HDRINST usr/include/linux/comedi.h
HDRINST usr/include/linux/scif_ioctl.h
HDRINST usr/include/linux/timerfd.h
HDRINST usr/include/linux/time_types.h
HDRINST usr/include/linux/firewire-constants.h
HDRINST usr/include/linux/virtio_snd.h
HDRINST usr/include/linux/ppp-ioctl.h
HDRINST usr/include/linux/fib_rules.h
HDRINST usr/include/linux/gen_stats.h
HDRINST usr/include/linux/virtio_iommu.h
HDRINST usr/include/linux/genetlink.h
HDRINST usr/include/linux/uvcvideo.h
HDRINST usr/include/linux/pfkeyv2.h
HDRINST usr/include/linux/soundcard.h
HDRINST usr/include/linux/times.h
HDRINST usr/include/linux/nfc.h
HDRINST usr/include/linux/affs_hardblocks.h
HDRINST usr/include/linux/nilfs2_api.h
HDRINST usr/include/linux/caif/caif_socket.h
HDRINST usr/include/linux/rseq.h
HDRINST usr/include/linux/caif/if_caif.h
CC /kernel/build64-default/tools/objtool/weak.o
HDRINST usr/include/linux/i2c-dev.h
CC /kernel/build64-default/tools/objtool/check.o
HDRINST usr/include/linux/cuda.h
CC /kernel/build64-default/tools/objtool/special.o
HDRINST usr/include/linux/mei_uuid.h
HDRINST usr/include/linux/cn_proc.h
MKDIR /kernel/build64-default/tools/objtool/arch/x86/
CC /kernel/build64-default/tools/objtool/builtin-check.o
HDRINST usr/include/linux/parport.h
MKDIR /kernel/build64-default/tools/objtool/arch/x86/lib/
HDRINST usr/include/linux/v4l2-controls.h
CC /kernel/build64-default/tools/objtool/elf.o
CC /kernel/build64-default/tools/objtool/objtool.o
HDRINST usr/include/linux/hsi/cs-protocol.h
HDRINST usr/include/linux/hsi/hsi_char.h
CC /kernel/build64-default/tools/objtool/orc_gen.o
HDRINST usr/include/linux/seg6_genl.h
CC /kernel/build64-default/tools/objtool/arch/x86/special.o
GEN /kernel/build64-default/tools/objtool/arch/x86/lib/inat-tables.c
CC /kernel/build64-default/tools/objtool/orc_dump.o
HDRINST usr/include/linux/am437x-vpfe.h
CC /kernel/build64-default/tools/objtool/libstring.o
CC /kernel/build64-default/tools/objtool/libctype.o
HDRINST usr/include/linux/amt.h
HDRINST usr/include/linux/netconf.h
CC /kernel/build64-default/tools/objtool/str_error_r.o
CC /kernel/build64-default/tools/objtool/librbtree.o
HDRINST usr/include/linux/erspan.h
HDRINST usr/include/linux/nsfs.h
HDRINST usr/include/linux/xilinx-v4l2-controls.h
HDRINST usr/include/linux/aspeed-p2a-ctrl.h
HDRINST usr/include/linux/vfio_zdev.h
HDRINST usr/include/linux/serio.h
HDRINST usr/include/linux/acrn.h
HDRINST usr/include/linux/nfs2.h
HDRINST usr/include/linux/virtio_pci.h
HDRINST usr/include/linux/ipc.h
HDRINST usr/include/linux/ethtool_netlink.h
HDRINST usr/include/linux/kd.h
HDRINST usr/include/linux/elf.h
HDRINST usr/include/linux/videodev2.h
HDRINST usr/include/linux/if_alg.h
HDRINST usr/include/linux/sonypi.h
HDRINST usr/include/linux/fsverity.h
HDRINST usr/include/linux/if.h
HDRINST usr/include/linux/btrfs.h
HDRINST usr/include/linux/vm_sockets_diag.h
HDRINST usr/include/linux/netfilter_bridge.h
HDRINST usr/include/linux/packet_diag.h
HDRINST usr/include/linux/netfilter_ipv4.h
HDRINST usr/include/linux/kvm.h
HDRINST usr/include/linux/pci.h
HDRINST usr/include/linux/if_addrlabel.h
HDRINST usr/include/linux/hdlcdrv.h
HDRINST usr/include/linux/cfm_bridge.h
HDRINST usr/include/linux/fiemap.h
HDRINST usr/include/linux/dm-ioctl.h
HDRINST usr/include/linux/aspeed-lpc-ctrl.h
HDRINST usr/include/linux/atmioc.h
HDRINST usr/include/linux/dlm.h
HDRINST usr/include/linux/pci_regs.h
HDRINST usr/include/linux/cachefiles.h
HDRINST usr/include/linux/membarrier.h
HDRINST usr/include/linux/nfs_idmap.h
HDRINST usr/include/linux/ip.h
HDRINST usr/include/linux/atm_he.h
HDRINST usr/include/linux/nfsd/export.h
HDRINST usr/include/linux/nfsd/stats.h
HDRINST usr/include/linux/nfsd/debug.h
HDRINST usr/include/linux/nfsd/cld.h
HDRINST usr/include/linux/ip_vs.h
HDRINST usr/include/linux/vmcore.h
HDRINST usr/include/linux/vbox_vmmdev_types.h
HDRINST usr/include/linux/dvb/osd.h
HDRINST usr/include/linux/dvb/dmx.h
HDRINST usr/include/linux/dvb/net.h
HDRINST usr/include/linux/dvb/frontend.h
HDRINST usr/include/linux/dvb/ca.h
HDRINST usr/include/linux/dvb/version.h
HDRINST usr/include/linux/dvb/video.h
HDRINST usr/include/linux/dvb/audio.h
HDRINST usr/include/linux/nfs.h
HDRINST usr/include/linux/if_link.h
HDRINST usr/include/linux/wait.h
HDRINST usr/include/linux/icmpv6.h
HDRINST usr/include/linux/media.h
HDRINST usr/include/linux/seg6_local.h
HDRINST usr/include/linux/tps6594_pfsm.h
HDRINST usr/include/linux/openvswitch.h
HDRINST usr/include/linux/atmsap.h
HDRINST usr/include/linux/bpfilter.h
CC /kernel/build64-default/tools/objtool/arch/x86/decode.o
HDRINST usr/include/linux/fpga-dfl.h
HDRINST usr/include/linux/userio.h
HDRINST usr/include/linux/signal.h
HDRINST usr/include/linux/map_to_14segment.h
HDRINST usr/include/linux/hdreg.h
HDRINST usr/include/linux/utime.h
HDRINST usr/include/linux/usbdevice_fs.h
HDRINST usr/include/linux/timex.h
HDRINST usr/include/linux/if_fc.h
HDRINST usr/include/linux/reiserfs_xattr.h
HDRINST usr/include/linux/hw_breakpoint.h
HDRINST usr/include/linux/quota.h
HDRINST usr/include/linux/ioprio.h
HDRINST usr/include/linux/eventpoll.h
HDRINST usr/include/linux/atmclip.h
HDRINST usr/include/linux/can.h
HDRINST usr/include/linux/if_team.h
HDRINST usr/include/linux/usbip.h
HDRINST usr/include/linux/stat.h
HDRINST usr/include/linux/fou.h
HDRINST usr/include/linux/hash_info.h
HDRINST usr/include/linux/ppp-comp.h
HDRINST usr/include/linux/ip6_tunnel.h
HDRINST usr/include/linux/tipc_netlink.h
HDRINST usr/include/linux/in.h
HDRINST usr/include/linux/wireguard.h
HDRINST usr/include/linux/btf.h
HDRINST usr/include/linux/batman_adv.h
HDRINST usr/include/linux/fcntl.h
HDRINST usr/include/linux/if_ltalk.h
HDRINST usr/include/linux/i2c.h
HDRINST usr/include/linux/atm_idt77105.h
HDRINST usr/include/linux/kexec.h
HDRINST usr/include/linux/arm_sdei.h
HDRINST usr/include/linux/netfilter_ipv6/ip6_tables.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_ah.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_NPT.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_rt.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_REJECT.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_opts.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_srh.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_LOG.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_mh.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_HL.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_hl.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_frag.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_ipv6header.h
HDRINST usr/include/linux/minix_fs.h
HDRINST usr/include/linux/aio_abi.h
HDRINST usr/include/linux/pktcdvd.h
HDRINST usr/include/linux/libc-compat.h
HDRINST usr/include/linux/atmlec.h
HDRINST usr/include/linux/signalfd.h
HDRINST usr/include/linux/bpf_common.h
HDRINST usr/include/linux/seg6_iptunnel.h
HDRINST usr/include/linux/synclink.h
HDRINST usr/include/linux/mpls_iptunnel.h
HDRINST usr/include/linux/if_xdp.h
HDRINST usr/include/linux/mctp.h
HDRINST usr/include/linux/llc.h
HDRINST usr/include/linux/atmsvc.h
HDRINST usr/include/linux/sed-opal.h
HDRINST usr/include/linux/sock_diag.h
HDRINST usr/include/linux/time.h
HDRINST usr/include/linux/securebits.h
HDRINST usr/include/linux/fsl_hypervisor.h
HDRINST usr/include/linux/if_hippi.h
HDRINST usr/include/linux/seccomp.h
HDRINST usr/include/linux/oom.h
HDRINST usr/include/linux/filter.h
HDRINST usr/include/linux/inotify.h
HDRINST usr/include/linux/rfkill.h
HDRINST usr/include/linux/reboot.h
HDRINST usr/include/linux/can/vxcan.h
HDRINST usr/include/linux/can/j1939.h
HDRINST usr/include/linux/can/netlink.h
HDRINST usr/include/linux/can/bcm.h
HDRINST usr/include/linux/can/raw.h
HDRINST usr/include/linux/can/gw.h
HDRINST usr/include/linux/can/error.h
HDRINST usr/include/linux/can/isotp.h
HDRINST usr/include/linux/if_eql.h
HDRINST usr/include/linux/hiddev.h
HDRINST usr/include/linux/blktrace_api.h
HDRINST usr/include/linux/ccs.h
HDRINST usr/include/linux/ioam6.h
HDRINST usr/include/linux/hsr_netlink.h
HDRINST usr/include/linux/mmc/ioctl.h
HDRINST usr/include/linux/bfs_fs.h
HDRINST usr/include/linux/rio_cm_cdev.h
HDRINST usr/include/linux/uleds.h
HDRINST usr/include/linux/mrp_bridge.h
HDRINST usr/include/linux/adb.h
HDRINST usr/include/linux/pmu.h
HDRINST usr/include/linux/udmabuf.h
HDRINST usr/include/linux/kcmp.h
HDRINST usr/include/linux/dma-heap.h
HDRINST usr/include/linux/userfaultfd.h
HDRINST usr/include/linux/netfilter_arp/arpt_mangle.h
HDRINST usr/include/linux/netfilter_arp/arp_tables.h
HDRINST usr/include/linux/tipc.h
HDRINST usr/include/linux/virtio_ids.h
HDRINST usr/include/linux/l2tp.h
HDRINST usr/include/linux/devlink.h
HDRINST usr/include/linux/virtio_gpio.h
HDRINST usr/include/linux/dcbnl.h
HDRINST usr/include/linux/cyclades.h
HDRINST usr/include/sound/intel/avs/tokens.h
HDRINST usr/include/sound/sof/fw.h
HDRINST usr/include/sound/sof/abi.h
HDRINST usr/include/sound/sof/tokens.h
HDRINST usr/include/sound/sof/header.h
HDRINST usr/include/sound/usb_stream.h
HDRINST usr/include/sound/sfnt_info.h
HDRINST usr/include/sound/asequencer.h
HDRINST usr/include/sound/tlv.h
HDRINST usr/include/sound/asound.h
HDRINST usr/include/sound/asoc.h
HDRINST usr/include/sound/sb16_csp.h
HDRINST usr/include/sound/compress_offload.h
HDRINST usr/include/sound/hdsp.h
HDRINST usr/include/sound/emu10k1.h
HDRINST usr/include/sound/snd_ar_tokens.h
HDRINST usr/include/sound/snd_sst_tokens.h
HDRINST usr/include/sound/asound_fm.h
HDRINST usr/include/sound/hdspm.h
HDRINST usr/include/sound/compress_params.h
HDRINST usr/include/sound/firewire.h
HDRINST usr/include/sound/skl-tplg-interface.h
HDRINST usr/include/scsi/scsi_bsg_ufs.h
HDRINST usr/include/scsi/scsi_netlink_fc.h
HDRINST usr/include/scsi/scsi_bsg_mpi3mr.h
HDRINST usr/include/scsi/fc/fc_ns.h
HDRINST usr/include/scsi/fc/fc_fs.h
HDRINST usr/include/scsi/fc/fc_els.h
HDRINST usr/include/scsi/fc/fc_gs.h
HDRINST usr/include/scsi/scsi_bsg_fc.h
HDRINST usr/include/scsi/cxlflash_ioctl.h
HDRINST usr/include/scsi/scsi_netlink.h
HDRINST usr/include/linux/version.h
HDRINST usr/include/asm/processor-flags.h
HDRINST usr/include/asm/auxvec.h
HDRINST usr/include/asm/svm.h
HDRINST usr/include/asm/bitsperlong.h
HDRINST usr/include/asm/kvm_perf.h
HDRINST usr/include/asm/mce.h
HDRINST usr/include/asm/posix_types.h
HDRINST usr/include/asm/msr.h
HDRINST usr/include/asm/sigcontext32.h
HDRINST usr/include/asm/mman.h
HDRINST usr/include/asm/shmbuf.h
HDRINST usr/include/asm/e820.h
HDRINST usr/include/asm/posix_types_64.h
HDRINST usr/include/asm/vsyscall.h
HDRINST usr/include/asm/msgbuf.h
HDRINST usr/include/asm/swab.h
HDRINST usr/include/asm/statfs.h
HDRINST usr/include/asm/posix_types_x32.h
HDRINST usr/include/asm/ptrace.h
HDRINST usr/include/asm/unistd.h
HDRINST usr/include/asm/ist.h
HDRINST usr/include/asm/prctl.h
HDRINST usr/include/asm/boot.h
HDRINST usr/include/asm/sigcontext.h
HDRINST usr/include/asm/posix_types_32.h
HDRINST usr/include/asm/kvm_para.h
HDRINST usr/include/asm/a.out.h
HDRINST usr/include/asm/mtrr.h
HDRINST usr/include/asm/amd_hsmp.h
HDRINST usr/include/asm/hwcap2.h
HDRINST usr/include/asm/ptrace-abi.h
HDRINST usr/include/asm/vm86.h
HDRINST usr/include/asm/vmx.h
HDRINST usr/include/asm/ldt.h
HDRINST usr/include/asm/perf_regs.h
HDRINST usr/include/asm/kvm.h
HDRINST usr/include/asm/debugreg.h
HDRINST usr/include/asm/signal.h
HDRINST usr/include/asm/bootparam.h
HDRINST usr/include/asm/siginfo.h
HDRINST usr/include/asm/hw_breakpoint.h
HDRINST usr/include/asm/stat.h
HDRINST usr/include/asm/setup.h
HDRINST usr/include/asm/sembuf.h
HDRINST usr/include/asm/sgx.h
HDRINST usr/include/asm/ucontext.h
HDRINST usr/include/asm/byteorder.h
HDRINST usr/include/asm/unistd_64.h
HDRINST usr/include/asm/ioctls.h
HDRINST usr/include/asm/bpf_perf_event.h
HDRINST usr/include/asm/types.h
HDRINST usr/include/asm/poll.h
HDRINST usr/include/asm/resource.h
HDRINST usr/include/asm/param.h
HDRINST usr/include/asm/sockios.h
HDRINST usr/include/asm/errno.h
HDRINST usr/include/asm/unistd_x32.h
HDRINST usr/include/asm/termios.h
HDRINST usr/include/asm/ioctl.h
HDRINST usr/include/asm/socket.h
HDRINST usr/include/asm/unistd_32.h
HDRINST usr/include/asm/termbits.h
HDRINST usr/include/asm/fcntl.h
HDRINST usr/include/asm/ipcbuf.h
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 ../include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 ../include/linux/atomic/atomic-instrumented.h
CHKSHA1 ../include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
LD /kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
UPD include/generated/asm-offsets.h
CALL ../scripts/checksyscalls.sh
LD /kernel/build64-default/tools/objtool/objtool-in.o
LINK /kernel/build64-default/tools/objtool/objtool
LDS scripts/module.lds
CC ipc/compat.o
HOSTCC usr/gen_init_cpio
CC ipc/util.o
CC ipc/msgutil.o
AR certs/built-in.a
CC ipc/msg.o
AS arch/x86/lib/clear_page_64.o
CC ipc/sem.o
CC arch/x86/lib/cmdline.o
AS arch/x86/lib/cmpxchg16b_emu.o
CC ipc/shm.o
CC io_uring/io_uring.o
CC init/main.o
CC ipc/syscall.o
CC arch/x86/lib/copy_mc.o
CC security/commoncap.o
CC ipc/ipc_sysctl.o
CC io_uring/xattr.o
AR arch/x86/video/built-in.a
AS arch/x86/lib/copy_mc_64.o
CC io_uring/nop.o
CC security/min_addr.o
CC ipc/mqueue.o
CC arch/x86/power/cpu.o
CC arch/x86/realmode/init.o
CC arch/x86/pci/i386.o
UPD init/utsversion-tmp.h
AR arch/x86/ia32/built-in.a
AR virt/lib/built-in.a
CC [M] arch/x86/video/fbdev.o
CC security/keys/gc.o
CC net/llc/llc_core.o
AS arch/x86/crypto/aesni-intel_asm.o
AR drivers/irqchip/built-in.a
CC net/core/sock.o
CC block/partitions/core.o
CC net/ethernet/eth.o
CC [M] virt/lib/irqbypass.o
AR arch/x86/net/built-in.a
CC arch/x86/kernel/fpu/init.o
CC arch/x86/events/amd/core.o
CC [M] arch/x86/kvm/../../../virt/kvm/kvm_main.o
AR arch/x86/platform/atom/built-in.a
CC arch/x86/mm/pat/set_memory.o
CC block/bdev.o
CC sound/core/seq/seq.o
CC arch/x86/mm/pat/memtype.o
CC fs/notify/dnotify/dnotify.o
CC arch/x86/pci/init.o
CC arch/x86/platform/efi/memmap.o
CC sound/core/seq/seq_lock.o
CC arch/x86/mm/init.o
CC lib/kunit/test.o
AR arch/x86/platform/ce4100/built-in.a
AR drivers/bus/mhi/built-in.a
CC arch/x86/mm/init_64.o
CC arch/x86/entry/vdso/vma.o
CC mm/kasan/common.o
AR drivers/bus/built-in.a
CC arch/x86/crypto/aesni-intel_glue.o
CC kernel/sched/core.o
CC crypto/api.o
AR drivers/phy/allwinner/built-in.a
AR drivers/phy/amlogic/built-in.a
AR drivers/phy/broadcom/built-in.a
AR drivers/phy/cadence/built-in.a
AR drivers/phy/freescale/built-in.a
CC lib/math/div64.o
AR drivers/phy/hisilicon/built-in.a
AR drivers/phy/ingenic/built-in.a
AR drivers/phy/intel/built-in.a
AR drivers/phy/lantiq/built-in.a
CC lib/math/gcd.o
AR drivers/phy/marvell/built-in.a
AR drivers/phy/mediatek/built-in.a
AR drivers/phy/microchip/built-in.a
AR drivers/phy/motorola/built-in.a
AR drivers/phy/mscc/built-in.a
AR drivers/phy/qualcomm/built-in.a
AR drivers/phy/ralink/built-in.a
CC lib/math/lcm.o
AR drivers/phy/renesas/built-in.a
GEN usr/initramfs_data.cpio
AR drivers/phy/rockchip/built-in.a
AR drivers/phy/samsung/built-in.a
COPY usr/initramfs_inc_data
AS usr/initramfs_data.o
AR drivers/phy/socionext/built-in.a
CC lib/math/int_pow.o
AR usr/built-in.a
AR drivers/phy/st/built-in.a
CC crypto/cipher.o
AS arch/x86/lib/copy_page_64.o
AR drivers/phy/sunplus/built-in.a
AR drivers/phy/tegra/built-in.a
CC lib/math/int_sqrt.o
AR drivers/phy/ti/built-in.a
CC arch/x86/kernel/fpu/bugs.o
AS arch/x86/lib/copy_user_64.o
AR drivers/phy/xilinx/built-in.a
CC drivers/phy/phy-core.o
AS arch/x86/lib/copy_user_uncached_64.o
CC mm/kasan/report.o
CC lib/math/reciprocal_div.o
CC arch/x86/lib/cpu.o
AR virt/built-in.a
CC lib/crypto/memneq.o
CC security/inode.o
CC lib/math/rational.o
CC arch/x86/kernel/fpu/core.o
CC sound/core/seq/seq_clientmgr.o
CC [M] lib/math/prime_numbers.o
AS arch/x86/realmode/rm/header.o
AS arch/x86/realmode/rm/trampoline_64.o
CC ipc/namespace.o
AS arch/x86/realmode/rm/stack.o
CC sound/core/seq/seq_memory.o
CC security/keys/key.o
AS arch/x86/realmode/rm/reboot.o
CC lib/crypto/utils.o
CC arch/x86/pci/mmconfig_64.o
AS arch/x86/realmode/rm/wakeup_asm.o
CC ipc/mq_sysctl.o
AR fs/notify/dnotify/built-in.a
CC fs/notify/inotify/inotify_fsnotify.o
CC arch/x86/realmode/rm/wakemain.o
CC arch/x86/realmode/rm/video-mode.o
CC lib/kunit/resource.o
CC init/do_mounts.o
CC arch/x86/platform/efi/quirks.o
CC lib/crypto/chacha.o
CC fs/notify/fanotify/fanotify.o
CC arch/x86/lib/delay.o
CC net/llc/llc_input.o
AS arch/x86/realmode/rm/copy.o
CC arch/x86/entry/vdso/extable.o
AS arch/x86/realmode/rm/bioscall.o
CC arch/x86/realmode/rm/regs.o
CC arch/x86/power/hibernate_64.o
CC sound/core/sound.o
CC block/partitions/ldm.o
CC sound/core/init.o
CC fs/notify/fanotify/fanotify_user.o
AS arch/x86/power/hibernate_asm_64.o
CC arch/x86/pci/direct.o
CC arch/x86/realmode/rm/video-vga.o
CC arch/x86/mm/pat/memtype_interval.o
CC crypto/compress.o
CC crypto/algapi.o
CC arch/x86/pci/mmconfig-shared.o
CC arch/x86/realmode/rm/video-vesa.o
CC lib/crypto/aes.o
AS arch/x86/crypto/aesni-intel_avx-x86_64.o
CC sound/core/memory.o
CC arch/x86/events/amd/lbr.o
CC arch/x86/realmode/rm/video-bios.o
CC arch/x86/entry/vdso/vdso32-setup.o
AS arch/x86/lib/getuser.o
AR lib/math/built-in.a
CC net/llc/llc_output.o
GEN arch/x86/lib/inat-tables.c
CC init/do_mounts_initrd.o
CC lib/crypto/gf128mul.o
CC sound/core/seq/seq_queue.o
PASYMS arch/x86/realmode/rm/pasyms.h
LDS arch/x86/realmode/rm/realmode.lds
CC arch/x86/lib/insn-eval.o
LD arch/x86/realmode/rm/realmode.elf
CC lib/crypto/blake2s.o
CC fs/notify/inotify/inotify_user.o
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
CC mm/kasan/init.o
AS arch/x86/realmode/rmpiggy.o
AR arch/x86/realmode/built-in.a
AS arch/x86/crypto/aes_ctrby8_avx-x86_64.o
AR net/ethernet/built-in.a
CC lib/kunit/static_stub.o
CC arch/x86/events/intel/core.o
CC net/802/p8022.o
CC net/802/psnap.o
CC net/802/stp.o
AS [M] arch/x86/crypto/ghash-clmulni-intel_asm.o
CC arch/x86/lib/insn.o
CC [M] arch/x86/crypto/ghash-clmulni-intel_glue.o
AR drivers/phy/built-in.a
AR drivers/pinctrl/actions/built-in.a
AR drivers/pinctrl/bcm/built-in.a
AR drivers/pinctrl/cirrus/built-in.a
AR drivers/pinctrl/freescale/built-in.a
CC drivers/pinctrl/intel/pinctrl-baytrail.o
CC arch/x86/pci/fixup.o
CC lib/kunit/string-stream.o
CC arch/x86/events/intel/bts.o
CC drivers/pinctrl/intel/pinctrl-intel.o
LDS arch/x86/entry/vdso/vdso.lds
CC [M] drivers/pinctrl/intel/pinctrl-cherryview.o
AS arch/x86/entry/vdso/vdso-note.o
CC block/fops.o
CC arch/x86/entry/vdso/vclock_gettime.o
CC arch/x86/power/hibernate.o
CC drivers/gpio/gpiolib.o
CC lib/kunit/assert.o
CC security/keys/keyring.o
CC drivers/gpio/gpiolib-devres.o
AR arch/x86/mm/pat/built-in.a
CC arch/x86/mm/fault.o
CC security/keys/keyctl.o
CC arch/x86/platform/efi/efi.o
CC lib/crypto/blake2s-generic.o
AR drivers/pinctrl/mediatek/built-in.a
AS arch/x86/lib/memcpy_64.o
AR drivers/pinctrl/mvebu/built-in.a
AS arch/x86/lib/memmove_64.o
AR drivers/pinctrl/nomadik/built-in.a
AR arch/x86/platform/geode/built-in.a
AR drivers/pinctrl/nuvoton/built-in.a
AR arch/x86/platform/iris/built-in.a
CC arch/x86/kernel/fpu/regset.o
CC arch/x86/pci/acpi.o
CC lib/kunit/try-catch.o
AR drivers/pinctrl/nxp/built-in.a
AS arch/x86/lib/memset_64.o
CC arch/x86/kernel/fpu/signal.o
CC arch/x86/mm/ioremap.o
CC lib/kunit/executor.o
CC arch/x86/lib/misc.o
CC init/initramfs.o
AR drivers/pinctrl/qcom/built-in.a
CC lib/kunit/hooks.o
CC [M] arch/x86/kvm/../../../virt/kvm/eventfd.o
CC arch/x86/events/amd/ibs.o
CC drivers/gpio/gpiolib-legacy.o
AS [M] arch/x86/crypto/crc32-pclmul_asm.o
AR net/llc/built-in.a
CC arch/x86/platform/intel/iosf_mbi.o
CC [M] arch/x86/crypto/crc32-pclmul_glue.o
CC mm/kasan/generic.o
CC arch/x86/pci/legacy.o
CC drivers/gpio/gpiolib-cdev.o
CC sound/core/seq/seq_fifo.o
CC block/partitions/msdos.o
CC net/core/request_sock.o
CC mm/kasan/report_generic.o
CC arch/x86/entry/vdso/vgetcpu.o
CC sound/core/control.o
CC drivers/gpio/gpiolib-sysfs.o
CC arch/x86/lib/pc-conf-reg.o
CC lib/crypto/blake2s-selftest.o
AR ipc/built-in.a
HOSTCC arch/x86/entry/vdso/vdso2c
CC block/partitions/efi.o
AR net/802/built-in.a
CC arch/x86/kernel/cpu/mce/core.o
CC drivers/gpio/gpiolib-acpi.o
CC net/sched/sch_generic.o
AR fs/notify/inotify/built-in.a
CC crypto/scatterwalk.o
CC fs/notify/fsnotify.o
CC arch/x86/kernel/cpu/mtrr/mtrr.o
AR arch/x86/power/built-in.a
CC crypto/proc.o
CC arch/x86/kernel/cpu/mce/severity.o
AS arch/x86/lib/putuser.o
AR fs/notify/fanotify/built-in.a
CC sound/core/misc.o
AS arch/x86/lib/retpoline.o
AR lib/kunit/built-in.a
CC sound/core/seq/seq_prioq.o
CC net/sched/sch_mq.o
CC lib/crypto/des.o
CC arch/x86/lib/usercopy.o
CC arch/x86/kernel/acpi/boot.o
AS [M] arch/x86/crypto/crct10dif-pcl-asm_64.o
CC [M] arch/x86/crypto/crct10dif-pclmul_glue.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
AS arch/x86/entry/vdso/vdso32/note.o
CC kernel/sched/fair.o
CC arch/x86/kernel/acpi/sleep.o
CC drivers/gpio/gpiolib-swnode.o
AS arch/x86/entry/vdso/vdso32/system_call.o
CC block/bio.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
CC arch/x86/pci/irq.o
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
CC arch/x86/platform/efi/efi_64.o
CC mm/kasan/shadow.o
AR arch/x86/platform/intel/built-in.a
AR arch/x86/platform/intel-mid/built-in.a
CC sound/core/device.o
AR arch/x86/platform/intel-quark/built-in.a
CC arch/x86/lib/usercopy_64.o
CC arch/x86/kernel/fpu/xstate.o
CC sound/core/seq/seq_timer.o
CC arch/x86/kernel/apic/apic.o
CC init/calibrate.o
CC [M] drivers/pinctrl/intel/pinctrl-broxton.o
CC arch/x86/kernel/apic/apic_common.o
CC mm/kasan/quarantine.o
LD [M] arch/x86/crypto/ghash-clmulni-intel.o
LD [M] arch/x86/crypto/crc32-pclmul.o
CC arch/x86/kernel/kprobes/core.o
CC arch/x86/kernel/kprobes/opt.o
CC crypto/aead.o
CC arch/x86/kernel/apic/apic_noop.o
CC security/keys/permission.o
CC sound/core/seq/seq_system.o
AR arch/x86/crypto/built-in.a
LD [M] arch/x86/crypto/crct10dif-pclmul.o
AR arch/x86/platform/olpc/built-in.a
CC sound/core/seq/seq_ports.o
CC arch/x86/mm/extable.o
CC arch/x86/kernel/apic/ipi.o
CC arch/x86/events/amd/uncore.o
CC arch/x86/kernel/kprobes/ftrace.o
CC arch/x86/kernel/cpu/mtrr/if.o
CC kernel/sched/build_policy.o
AS arch/x86/kernel/acpi/wakeup_64.o
AR block/partitions/built-in.a
CC arch/x86/kernel/acpi/apei.o
CC block/elevator.o
CC security/keys/process_keys.o
CC fs/notify/notification.o
CC init/init_task.o
CC arch/x86/events/intel/ds.o
LDS arch/x86/kernel/vmlinux.lds
CC fs/nfs_common/grace.o
CC arch/x86/kernel/acpi/cppc.o
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
CC fs/iomap/trace.o
AR arch/x86/platform/scx200/built-in.a
CC [M] drivers/pinctrl/intel/pinctrl-geminilake.o
CC fs/iomap/iter.o
CC [M] drivers/pinctrl/intel/pinctrl-sunrisepoint.o
CC security/keys/request_key.o
CC arch/x86/lib/msr-smp.o
VDSO arch/x86/entry/vdso/vdso64.so.dbg
CC security/device_cgroup.o
CC net/core/skbuff.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
OBJCOPY arch/x86/entry/vdso/vdso64.so
OBJCOPY arch/x86/entry/vdso/vdso32.so
VDSO2C arch/x86/entry/vdso/vdso-image-64.c
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC arch/x86/entry/vdso/vdso-image-64.o
AS arch/x86/platform/efi/efi_stub_64.o
CC lib/crypto/sha1.o
CC security/keys/request_key_auth.o
AR arch/x86/platform/efi/built-in.a
AR arch/x86/platform/ts5500/built-in.a
CC block/blk-core.o
AR arch/x86/platform/uv/built-in.a
AR arch/x86/platform/built-in.a
CC arch/x86/lib/cache-smp.o
AR fs/quota/built-in.a
CC arch/x86/events/intel/knc.o
CC net/sched/sch_frag.o
CC fs/proc/task_mmu.o
AR mm/kasan/built-in.a
CC mm/filemap.o
CC net/core/datagram.o
CC arch/x86/lib/msr.o
CC fs/proc/inode.o
CC arch/x86/entry/vdso/vdso-image-32.o
CC crypto/geniv.o
CC net/sched/sch_api.o
CC net/sched/sch_blackhole.o
CC arch/x86/kernel/cpu/mtrr/generic.o
AR drivers/pinctrl/sprd/built-in.a
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC fs/notify/group.o
CC arch/x86/pci/common.o
CC sound/core/seq/seq_info.o
CC arch/x86/mm/mmap.o
CC [M] arch/x86/kvm/../../../virt/kvm/binary_stats.o
CC arch/x86/kernel/acpi/cstate.o
AR arch/x86/kernel/kprobes/built-in.a
CC arch/x86/events/intel/lbr.o
CC mm/mempool.o
CC init/version.o
AR drivers/pinctrl/intel/built-in.a
AR drivers/pinctrl/sunplus/built-in.a
AR drivers/pinctrl/ti/built-in.a
CC lib/crypto/sha256.o
CC drivers/pinctrl/core.o
CC arch/x86/kernel/cpu/mce/genpool.o
AR arch/x86/entry/vdso/built-in.a
CC arch/x86/entry/vsyscall/vsyscall_64.o
AR fs/nfs_common/built-in.a
AS arch/x86/entry/entry.o
AR arch/x86/events/amd/built-in.a
CC arch/x86/events/intel/p4.o
AS arch/x86/entry/vsyscall/vsyscall_emu_64.o
AR arch/x86/kernel/fpu/built-in.a
AS arch/x86/kernel/head_64.o
CC mm/oom_kill.o
CC net/netlink/af_netlink.o
CC mm/fadvise.o
CC net/netlink/genetlink.o
AR init/built-in.a
AR net/bpf/built-in.a
CC net/ethtool/ioctl.o
CC security/keys/user_defined.o
CC arch/x86/events/intel/p6.o
CC [M] net/netfilter/ipvs/ip_vs_conn.o
AR net/ipv4/netfilter/built-in.a
CC [M] net/ipv4/netfilter/nf_defrag_ipv4.o
CC net/ipv4/route.o
CC net/ethtool/common.o
AR sound/core/seq/built-in.a
CC sound/core/info.o
CC net/ipv4/inetpeer.o
AR drivers/gpio/built-in.a
CC arch/x86/events/intel/pt.o
AR arch/x86/kernel/acpi/built-in.a
CC fs/iomap/buffered-io.o
CC [M] net/netfilter/ipvs/ip_vs_core.o
CC arch/x86/mm/pgtable.o
CC fs/notify/mark.o
AS arch/x86/lib/msr-reg.o
CC arch/x86/kernel/cpu/mce/intel.o
CC crypto/skcipher.o
CC arch/x86/lib/msr-reg-export.o
CC arch/x86/mm/physaddr.o
CC arch/x86/kernel/cpu/mce/threshold.o
CC [M] lib/crypto/arc4.o
CC [M] net/netfilter/ipvs/ip_vs_ctl.o
CC arch/x86/pci/early.o
CC arch/x86/kernel/apic/vector.o
AS arch/x86/lib/hweight.o
CC net/ethtool/netlink.o
CC arch/x86/lib/iomem.o
CC net/ipv4/protocol.o
CC sound/core/isadma.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC net/sched/sch_fifo.o
CC security/keys/compat.o
CC block/blk-sysfs.o
AR arch/x86/entry/vsyscall/built-in.a
AS arch/x86/entry/entry_64.o
CC net/netfilter/core.o
CC arch/x86/entry/syscall_64.o
CC [M] arch/x86/kvm/../../../virt/kvm/vfio.o
CC crypto/seqiv.o
CC io_uring/fs.o
CC arch/x86/kernel/cpu/cacheinfo.o
CC kernel/locking/mutex.o
AR lib/crypto/built-in.a
LD [M] lib/crypto/libarc4.o
CC lib/zlib_inflate/inffast.o
CC kernel/locking/semaphore.o
CC security/keys/proc.o
AS arch/x86/lib/iomap_copy_64.o
CC arch/x86/kernel/cpu/scattered.o
CC arch/x86/lib/inat.o
CC arch/x86/kernel/cpu/mce/apei.o
CC lib/zlib_inflate/inflate.o
CC sound/core/vmaster.o
CC arch/x86/pci/bus_numa.o
CC drivers/pinctrl/pinctrl-utils.o
AR arch/x86/lib/built-in.a
AR arch/x86/lib/lib.a
CC lib/zlib_deflate/deflate.o
CC lib/lzo/lzo1x_compress.o
CC lib/lz4/lz4_compress.o
CC [M] net/ipv4/netfilter/nf_reject_ipv4.o
CC arch/x86/mm/tlb.o
CC lib/lz4/lz4hc_compress.o
CC arch/x86/events/zhaoxin/core.o
CC arch/x86/events/core.o
CC fs/notify/fdinfo.o
CC arch/x86/entry/common.o
CC arch/x86/kernel/cpu/topology.o
CC [M] net/ipv4/netfilter/ip_tables.o
CC kernel/power/qos.o
CC fs/proc/root.o
CC crypto/echainiv.o
CC arch/x86/events/intel/uncore.o
CC kernel/power/main.o
CC drivers/pinctrl/pinmux.o
CC io_uring/splice.o
CC arch/x86/mm/cpu_entry_area.o
CC security/keys/sysctl.o
CC lib/lzo/lzo1x_decompress_safe.o
CC [M] arch/x86/kvm/../../../virt/kvm/coalesced_mmio.o
CC drivers/pinctrl/pinconf.o
CC kernel/printk/printk.o
AR arch/x86/kernel/cpu/mce/built-in.a
CC [M] arch/x86/kvm/../../../virt/kvm/async_pf.o
CC block/blk-flush.o
CC sound/core/ctljack.o
CC arch/x86/pci/amd_bus.o
AR net/sched/built-in.a
CC kernel/printk/printk_safe.o
CC lib/zlib_inflate/infutil.o
CC net/ipv4/ip_input.o
CC mm/maccess.o
CC arch/x86/kernel/cpu/common.o
CC block/blk-settings.o
CC kernel/irq/irqdesc.o
AR fs/notify/built-in.a
CC kernel/locking/rwsem.o
CC arch/x86/kernel/apic/hw_nmi.o
CC lib/zlib_deflate/deftree.o
AS arch/x86/entry/thunk_64.o
AS arch/x86/entry/entry_64_compat.o
CC sound/core/jack.o
AR lib/lzo/built-in.a
CC net/ipv4/ip_fragment.o
CC lib/zlib_inflate/inftrees.o
CC arch/x86/entry/syscall_32.o
CC kernel/irq/handle.o
AR arch/x86/events/zhaoxin/built-in.a
CC kernel/locking/percpu-rwsem.o
AR security/keys/built-in.a
AR security/built-in.a
CC crypto/ahash.o
CC sound/core/timer.o
CC sound/core/hrtimer.o
CC fs/iomap/direct-io.o
CC net/netfilter/nf_log.o
CC fs/proc/base.o
CC lib/zlib_inflate/inflate_syms.o
CC arch/x86/mm/maccess.o
CC net/ipv4/ip_forward.o
CC drivers/pinctrl/pinconf-generic.o
CC io_uring/sync.o
CC kernel/power/console.o
CC sound/core/seq_device.o
CC lib/lz4/lz4_decompress.o
CC arch/x86/mm/pgprot.o
AR arch/x86/pci/built-in.a
CC io_uring/advise.o
CC net/ethtool/bitset.o
CC net/netfilter/nf_queue.o
CC fs/kernfs/mount.o
CC [M] net/ipv4/netfilter/iptable_filter.o
CC [M] arch/x86/kvm/../../../virt/kvm/irqchip.o
CC fs/kernfs/inode.o
CC fs/proc/generic.o
CC arch/x86/kernel/apic/io_apic.o
AR lib/zlib_inflate/built-in.a
CC lib/zstd/zstd_compress_module.o
CC [M] net/netfilter/ipvs/ip_vs_sched.o
CC arch/x86/kernel/head64.o
CC kernel/irq/manage.o
CC lib/zlib_deflate/deflate_syms.o
CC lib/zstd/compress/fse_compress.o
CC block/blk-ioc.o
AR arch/x86/entry/built-in.a
CC kernel/locking/irqflag-debug.o
CC [M] net/netfilter/ipvs/ip_vs_xmit.o
CC arch/x86/kernel/ebda.o
CC mm/page-writeback.o
CC net/netlink/policy.o
CC kernel/locking/mutex-debug.o
CC fs/proc/array.o
AR drivers/pinctrl/built-in.a
CC [M] net/ipv4/netfilter/iptable_mangle.o
AR drivers/pwm/built-in.a
CC arch/x86/mm/hugetlbpage.o
CC drivers/pci/msi/pcidev_msi.o
CC drivers/pci/pcie/portdrv.o
CC arch/x86/mm/kasan_init_64.o
AR lib/zlib_deflate/built-in.a
CC fs/proc/fd.o
CC drivers/video/console/dummycon.o
CC kernel/power/process.o
CC crypto/shash.o
CC drivers/video/console/vgacon.o
CC lib/zstd/compress/hist.o
CC io_uring/filetable.o
CC fs/proc/proc_tty.o
CC arch/x86/events/intel/uncore_nhmex.o
CC lib/zstd/compress/huf_compress.o
CC arch/x86/kernel/cpu/rdrand.o
CC fs/iomap/fiemap.o
CC kernel/locking/lockdep.o
CC drivers/video/logo/logo.o
CC fs/kernfs/dir.o
HOSTCC drivers/video/logo/pnmtologo
CC arch/x86/events/probe.o
CC [M] net/netfilter/ipvs/ip_vs_app.o
CC lib/zstd/compress/zstd_compress.o
CC fs/sysfs/file.o
CC fs/configfs/inode.o
CC fs/configfs/file.o
CC kernel/rcu/update.o
CC arch/x86/kernel/cpu/match.o
CC kernel/locking/lockdep_proc.o
CC [M] arch/x86/kvm/../../../virt/kvm/dirty_ring.o
CC fs/sysfs/dir.o
AR lib/lz4/built-in.a
CC kernel/rcu/sync.o
CC lib/zstd/compress/zstd_compress_literals.o
CC block/blk-map.o
CC net/netlink/diag.o
CC drivers/pci/msi/api.o
CC [M] arch/x86/kvm/../../../virt/kvm/pfncache.o
CC kernel/printk/printk_ringbuffer.o
CC arch/x86/mm/numa.o
CC [M] net/netfilter/ipvs/ip_vs_sync.o
LOGO drivers/video/logo/logo_linux_clut224.c
CC net/ethtool/strset.o
CC drivers/video/logo/logo_linux_clut224.o
CC net/xfrm/xfrm_policy.o
CC arch/x86/kernel/cpu/bugs.o
CC net/xfrm/xfrm_state.o
CC [M] sound/core/control_led.o
AR drivers/video/logo/built-in.a
CC net/ipv4/ip_options.o
CC net/netfilter/nf_sockopt.o
CC drivers/video/backlight/backlight.o
CC arch/x86/events/intel/uncore_snb.o
CC drivers/pci/pcie/rcec.o
CC arch/x86/mm/numa_64.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC kernel/rcu/srcutree.o
CC fs/iomap/seek.o
CC drivers/pci/hotplug/pci_hotplug_core.o
CC [M] net/ipv4/netfilter/iptable_nat.o
CC io_uring/openclose.o
CC kernel/sched/build_utility.o
CC kernel/power/suspend.o
CC arch/x86/kernel/cpu/cpuid-deps.o
CC crypto/akcipher.o
AR drivers/pci/controller/dwc/built-in.a
AR drivers/pci/controller/mobiveil/built-in.a
CC drivers/pci/controller/vmd.o
CC fs/configfs/dir.o
CC kernel/irq/spurious.o
AR drivers/video/console/built-in.a
CC drivers/video/fbdev/core/fb_notify.o
CC fs/sysfs/symlink.o
CC kernel/locking/spinlock.o
CC [M] net/netfilter/ipvs/ip_vs_est.o
CC kernel/printk/sysctl.o
CC drivers/pci/msi/msi.o
CC kernel/irq/resend.o
CC net/core/stream.o
CC arch/x86/kernel/apic/msi.o
CC crypto/sig.o
CC net/netfilter/utils.o
CC net/ethtool/linkinfo.o
CC fs/configfs/symlink.o
CC drivers/pci/pcie/aspm.o
CC [M] sound/core/hwdep.o
CC fs/kernfs/file.o
AR kernel/printk/built-in.a
CC block/blk-merge.o
CC arch/x86/events/intel/uncore_snbep.o
CC fs/iomap/swapfile.o
CC [M] arch/x86/kvm/x86.o
AR net/netlink/built-in.a
CC arch/x86/events/utils.o
CC [M] net/netfilter/ipvs/ip_vs_proto.o
CC fs/proc/cmdline.o
AR drivers/video/backlight/built-in.a
CC fs/configfs/mount.o
CC [M] net/netfilter/nfnetlink.o
CC arch/x86/events/rapl.o
CC lib/xz/xz_dec_syms.o
CC arch/x86/events/msr.o
CC crypto/kpp.o
CC fs/sysfs/mount.o
CC [M] net/netfilter/ipvs/ip_vs_pe.o
CC arch/x86/mm/amdtopology.o
CC drivers/pci/hotplug/acpi_pcihp.o
CC net/unix/af_unix.o
CC net/ethtool/linkmodes.o
CC kernel/irq/chip.o
AR sound/i2c/other/built-in.a
AR sound/i2c/built-in.a
CC lib/xz/xz_dec_stream.o
CC [M] drivers/video/fbdev/core/fb_info.o
CC mm/folio-compat.o
CC [M] net/ipv4/netfilter/ipt_REJECT.o
CC crypto/acompress.o
CC lib/xz/xz_dec_lzma2.o
CC kernel/rcu/tree.o
CC io_uring/uring_cmd.o
CC arch/x86/kernel/apic/x2apic_phys.o
CC net/ipv4/ip_output.o
AR net/ipv6/netfilter/built-in.a
CC [M] net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
CC kernel/power/hibernate.o
CC fs/proc/consoles.o
AR drivers/pci/controller/built-in.a
CC arch/x86/mm/srat.o
AR fs/iomap/built-in.a
CC fs/configfs/item.o
CC arch/x86/kernel/cpu/umwait.o
CC block/blk-timeout.o
CC kernel/rcu/rcu_segcblist.o
CC [M] sound/core/pcm.o
CC drivers/pci/msi/irqdomain.o
CC io_uring/epoll.o
CC drivers/idle/intel_idle.o
CC net/ethtool/rss.o
CC io_uring/statx.o
CC fs/sysfs/group.o
CC net/core/scm.o
CC io_uring/net.o
AR drivers/char/ipmi/built-in.a
CC drivers/pci/hotplug/pciehp_core.o
CC fs/kernfs/symlink.o
CC [M] net/netfilter/ipvs/ip_vs_proto_tcp.o
CC drivers/acpi/acpica/dsargs.o
CC drivers/acpi/numa/srat.o
CC [M] drivers/video/fbdev/core/fbmem.o
CC drivers/pci/pcie/aer.o
CC [M] net/netfilter/nf_conntrack_core.o
CC arch/x86/kernel/apic/x2apic_cluster.o
CC mm/readahead.o
CC fs/proc/cpuinfo.o
AR fs/configfs/built-in.a
CC mm/swap.o
CC lib/xz/xz_dec_bcj.o
CC arch/x86/mm/pkeys.o
CC crypto/scompress.o
CC net/core/gen_stats.o
CC net/ipv6/af_inet6.o
AR drivers/pci/switch/built-in.a
CC arch/x86/mm/pti.o
CC drivers/acpi/apei/apei-base.o
AR drivers/amba/built-in.a
CC drivers/pnp/core.o
CC kernel/irq/dummychip.o
CC drivers/pnp/pnpacpi/core.o
CC arch/x86/kernel/cpu/proc.o
CC drivers/acpi/acpica/dscontrol.o
CC drivers/pnp/pnpacpi/rsparser.o
CC drivers/pnp/card.o
AR drivers/pci/msi/built-in.a
CC kernel/irq/devres.o
CC block/blk-lib.o
AR fs/kernfs/built-in.a
CC drivers/acpi/apei/hest.o
CC net/ipv6/anycast.o
CC [M] net/netfilter/nf_conntrack_standalone.o
AR fs/sysfs/built-in.a
CC net/ipv4/ip_sockglue.o
CC drivers/pci/access.o
CC [M] sound/core/pcm_native.o
CC drivers/pci/hotplug/pciehp_ctrl.o
AR lib/xz/built-in.a
CC [M] net/ipv6/netfilter/nf_conntrack_reasm.o
CC fs/proc/devices.o
CC lib/raid6/algos.o
AR drivers/acpi/numa/built-in.a
CC fs/proc/interrupts.o
CC net/ethtool/linkstate.o
CC kernel/power/snapshot.o
CC arch/x86/kernel/apic/apic_flat_64.o
CC drivers/acpi/acpica/dsdebug.o
CC lib/raid6/recov.o
CC lib/zstd/compress/zstd_compress_sequences.o
CC kernel/irq/autoprobe.o
CC kernel/irq/irqdomain.o
CC crypto/algboss.o
AR drivers/idle/built-in.a
CC kernel/power/swap.o
AR drivers/clk/actions/built-in.a
CC drivers/acpi/acpica/dsfield.o
MKCAP arch/x86/kernel/cpu/capflags.c
CC kernel/power/user.o
AR drivers/clk/analogbits/built-in.a
AR drivers/clk/bcm/built-in.a
AR drivers/clk/imgtec/built-in.a
AR drivers/clk/imx/built-in.a
AR drivers/clk/ingenic/built-in.a
AR arch/x86/mm/built-in.a
AR drivers/clk/mediatek/built-in.a
CC drivers/dma/dw/core.o
AR drivers/clk/microchip/built-in.a
AR drivers/clk/mstar/built-in.a
AR drivers/clk/mvebu/built-in.a
AR drivers/clk/ralink/built-in.a
CC arch/x86/events/intel/uncore_discovery.o
AR drivers/clk/renesas/built-in.a
AR drivers/clk/socfpga/built-in.a
AR drivers/clk/sprd/built-in.a
CC [M] sound/core/pcm_lib.o
AR drivers/clk/starfive/built-in.a
CC drivers/acpi/apei/erst.o
AR drivers/clk/sunxi-ng/built-in.a
CC drivers/dma/dw/dw.o
AR drivers/clk/ti/built-in.a
CC block/blk-mq.o
CC mm/truncate.o
CC net/core/gen_estimator.o
AR drivers/clk/versatile/built-in.a
CC net/core/net_namespace.o
CC drivers/clk/x86/clk-lpss-atom.o
CC lib/zstd/compress/zstd_compress_superblock.o
CC drivers/acpi/apei/bert.o
CC [M] net/netfilter/ipvs/ip_vs_proto_udp.o
CC [M] drivers/video/fbdev/core/fbcmap.o
CC drivers/pci/pcie/err.o
AR drivers/pnp/pnpacpi/built-in.a
CC drivers/pnp/driver.o
CC [M] drivers/video/fbdev/core/modedb.o
CC arch/x86/kernel/apic/probe_64.o
CC net/packet/af_packet.o
CC fs/proc/loadavg.o
CC drivers/pci/hotplug/pciehp_pci.o
CC net/core/secure_seq.o
HOSTCC lib/raid6/mktables
CC drivers/pci/hotplug/pciehp_hpc.o
CC lib/zstd/compress/zstd_double_fast.o
CC drivers/acpi/acpica/dsinit.o
UNROLL lib/raid6/int1.c
UNROLL lib/raid6/int2.c
CC kernel/locking/osq_lock.o
UNROLL lib/raid6/int4.c
UNROLL lib/raid6/int8.c
AR arch/x86/kernel/apic/built-in.a
CC drivers/clk/x86/clk-pmc-atom.o
UNROLL lib/raid6/int16.c
UNROLL lib/raid6/int32.c
CC drivers/acpi/acpica/dsmethod.o
CC lib/raid6/recov_ssse3.o
CC io_uring/msg_ring.o
CC net/ethtool/debug.o
CC net/ipv6/ip6_output.o
CC [M] net/netfilter/ipvs/ip_vs_nfct.o
CC drivers/dma/dw/idma32.o
CC crypto/testmgr.o
CC io_uring/timeout.o
CC io_uring/sqpoll.o
CC kernel/power/poweroff.o
CC net/unix/garbage.o
CC drivers/pnp/resource.o
CC kernel/locking/qspinlock.o
CC fs/proc/meminfo.o
CC [M] sound/core/pcm_misc.o
CC drivers/pci/pcie/aer_inject.o
CC arch/x86/events/intel/cstate.o
CC net/core/flow_dissector.o
CC drivers/pci/bus.o
CC arch/x86/kernel/platform-quirks.o
CC kernel/irq/proc.o
CC net/unix/sysctl_net_unix.o
CC net/ipv4/inet_hashtables.o
CC drivers/acpi/acpica/dsmthdat.o
LD [M] net/ipv6/netfilter/nf_defrag_ipv6.o
CC drivers/pci/pcie/pme.o
CC drivers/acpi/apei/ghes.o
CC drivers/pnp/manager.o
CC net/ipv4/inet_timewait_sock.o
AR drivers/clk/x86/built-in.a
AR drivers/clk/xilinx/built-in.a
CC mm/vmscan.o
CC drivers/clk/clk-devres.o
CC lib/raid6/recov_avx2.o
CC net/xfrm/xfrm_hash.o
AR kernel/power/built-in.a
CC crypto/cmac.o
CC [M] drivers/video/fbdev/core/fbcvt.o
CC net/ipv6/ip6_input.o
CC kernel/locking/rtmutex_api.o
CC [M] net/netfilter/ipvs/ip_vs_rr.o
CC drivers/dma/dw/acpi.o
CC drivers/clk/clk-bulk.o
CC net/key/af_key.o
CC drivers/pci/hotplug/acpiphp_core.o
CC fs/devpts/inode.o
CC drivers/acpi/acpica/dsobject.o
CC net/ethtool/wol.o
CC lib/zstd/compress/zstd_fast.o
AR net/dsa/built-in.a
AR net/bridge/netfilter/built-in.a
CC drivers/clk/clkdev.o
CC net/bridge/br.o
CC net/ethtool/features.o
CC fs/proc/stat.o
CC [M] net/sunrpc/auth_gss/auth_gss.o
CC fs/ext4/balloc.o
CC [M] net/sunrpc/auth_gss/gss_generic_token.o
CC net/core/sysctl_net_core.o
CC net/xfrm/xfrm_input.o
CC drivers/pci/probe.o
CC [M] net/sunrpc/auth_gss/gss_mech_switch.o
CC kernel/irq/migration.o
AR arch/x86/events/intel/built-in.a
CC [M] net/sunrpc/auth_gss/svcauth_gss.o
AR arch/x86/events/built-in.a
LD [M] net/netfilter/ipvs/ip_vs.o
CC net/unix/diag.o
CC io_uring/fdinfo.o
CC net/core/dev.o
CC lib/raid6/mmx.o
CC drivers/pci/pcie/dpc.o
CC lib/raid6/sse1.o
CC drivers/pnp/support.o
CC lib/raid6/sse2.o
CC drivers/pnp/interface.o
CC drivers/pci/host-bridge.o
CC net/xfrm/xfrm_output.o
CC drivers/acpi/acpica/dsopcode.o
CC [M] drivers/video/fbdev/core/fb_cmdline.o
CC drivers/dma/dw/pci.o
CC drivers/pci/hotplug/acpiphp_glue.o
CC drivers/clk/clk.o
AR fs/devpts/built-in.a
CC drivers/clk/clk-divider.o
CC kernel/irq/cpuhotplug.o
CC fs/proc/uptime.o
AR drivers/acpi/apei/built-in.a
CC drivers/dma/hsu/hsu.o
AR drivers/dma/idxd/built-in.a
CC net/ipv4/inet_connection_sock.o
CC [M] sound/core/pcm_memory.o
AR drivers/video/fbdev/omap/built-in.a
CC [M] arch/x86/kvm/emulate.o
CC [M] net/netfilter/nf_conntrack_expect.o
CC net/ethtool/privflags.o
CC drivers/pnp/quirks.o
CC net/ethtool/rings.o
CC net/unix/scm.o
CC drivers/acpi/acpica/dspkginit.o
AR drivers/pci/pcie/built-in.a
CC fs/ext4/bitmap.o
CC fs/ext4/block_validity.o
CC lib/raid6/avx2.o
AR drivers/dma/dw/built-in.a
CC lib/zstd/compress/zstd_lazy.o
CC kernel/locking/spinlock_debug.o
CC [M] drivers/video/fbdev/core/fb_io_fops.o
CC net/bridge/br_device.o
CC fs/proc/util.o
CC fs/proc/version.o
CC kernel/irq/pm.o
AR kernel/sched/built-in.a
AR kernel/livepatch/built-in.a
CC arch/x86/kernel/cpu/powerflags.o
CC kernel/dma/mapping.o
CC arch/x86/kernel/cpu/feat_ctl.o
CC io_uring/tctx.o
CC arch/x86/kernel/cpu/intel.o
CC [M] drivers/video/fbdev/core/fb_backlight.o
AR kernel/rcu/built-in.a
CC drivers/acpi/acpica/dsutils.o
CC lib/zstd/compress/zstd_ldm.o
CC kernel/locking/qrwlock.o
CC [M] sound/core/memalloc.o
CC crypto/hmac.o
CC [M] drivers/video/fbdev/core/fbmon.o
CC lib/raid6/avx512.o
AR drivers/dma/hsu/built-in.a
AR drivers/dma/mediatek/built-in.a
CC fs/jbd2/transaction.o
AR drivers/dma/qcom/built-in.a
CC fs/jbd2/commit.o
AR drivers/dma/ti/built-in.a
AR drivers/dma/xilinx/built-in.a
CC drivers/pnp/system.o
CC [M] drivers/dma/ioat/init.o
CC drivers/dma/dmaengine.o
AR drivers/pci/hotplug/built-in.a
CC [M] drivers/dma/ioat/dma.o
CC drivers/dma/virt-dma.o
CC [M] drivers/dma/ioat/prep.o
CC fs/proc/softirqs.o
CC drivers/pci/remove.o
CC lib/fonts/fonts.o
CC fs/jbd2/recovery.o
CC lib/fonts/font_8x8.o
CC fs/jbd2/checkpoint.o
AR net/unix/built-in.a
CC drivers/pci/pci.o
CC net/8021q/vlan_core.o
CC fs/ext4/dir.o
AR sound/drivers/opl3/built-in.a
CC drivers/acpi/acpica/dswexec.o
AR sound/drivers/opl4/built-in.a
AR sound/drivers/mpu401/built-in.a
CC net/ethtool/channels.o
CC [M] drivers/video/fbdev/core/fb_defio.o
AR kernel/locking/built-in.a
AR sound/drivers/vx/built-in.a
CC lib/zstd/compress/zstd_opt.o
AR sound/drivers/pcsp/built-in.a
AR sound/drivers/built-in.a
CC kernel/irq/msi.o
CC drivers/acpi/acpica/dswload.o
CC drivers/dma/acpi-dma.o
CC net/xfrm/xfrm_sysctl.o
AR drivers/pnp/built-in.a
AR drivers/soc/apple/built-in.a
CC lib/fonts/font_8x16.o
AR drivers/soc/aspeed/built-in.a
AR drivers/soc/bcm/bcm63xx/built-in.a
AR drivers/soc/bcm/built-in.a
CC crypto/vmac.o
AR drivers/soc/fsl/built-in.a
AR drivers/soc/fujitsu/built-in.a
AR drivers/soc/imx/built-in.a
CC net/packet/diag.o
CC io_uring/poll.o
AR drivers/soc/ixp4xx/built-in.a
CC lib/raid6/recov_avx512.o
AR drivers/soc/loongson/built-in.a
AR drivers/soc/mediatek/built-in.a
AR drivers/soc/microchip/built-in.a
CC fs/proc/namespaces.o
AR drivers/soc/nuvoton/built-in.a
AR drivers/soc/pxa/built-in.a
AR drivers/soc/amlogic/built-in.a
CC net/ipv6/addrconf.o
CC [M] net/netfilter/nf_conntrack_helper.o
AR drivers/soc/qcom/built-in.a
CC kernel/dma/direct.o
AR drivers/soc/renesas/built-in.a
AR drivers/soc/rockchip/built-in.a
AR drivers/soc/sifive/built-in.a
AR drivers/soc/sunxi/built-in.a
AR drivers/soc/ti/built-in.a
AR drivers/soc/xilinx/built-in.a
CC net/bridge/br_fdb.o
AR drivers/soc/built-in.a
CC crypto/xcbc.o
CC [M] sound/core/pcm_timer.o
CC drivers/pci/pci-driver.o
CC block/blk-mq-tag.o
CC [M] net/sunrpc/auth_gss/gss_rpc_upcall.o
CC block/blk-stat.o
AR net/key/built-in.a
CC net/dcb/dcbnl.o
CC kernel/dma/ops_helpers.o
CC arch/x86/kernel/cpu/intel_pconfig.o
LD [M] sound/core/snd-ctl-led.o
CC net/bridge/br_forward.o
CC drivers/acpi/acpica/dswload2.o
AR lib/fonts/built-in.a
CC net/l3mdev/l3mdev.o
CC arch/x86/kernel/cpu/tsx.o
CC [M] net/8021q/vlan.o
CC [M] drivers/dma/ioat/dca.o
CC crypto/crypto_null.o
CC [M] drivers/dma/ioat/sysfs.o
CC [M] drivers/video/fbdev/core/fb_chrdev.o
CC net/core/dev_addr_lists.o
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
CC crypto/md5.o
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
TABLE lib/raid6/tables.c
AR drivers/video/fbdev/omap2/omapfb/built-in.a
AR drivers/video/fbdev/omap2/built-in.a
CC [M] net/8021q/vlan_dev.o
CC lib/raid6/int1.o
CC io_uring/cancel.o
CC io_uring/kbuf.o
CC net/ethtool/coalesce.o
CC arch/x86/kernel/cpu/intel_epb.o
CC fs/proc/self.o
CC fs/ext4/ext4_jbd2.o
CC drivers/acpi/acpica/dswscope.o
LD [M] sound/core/snd-hwdep.o
CC net/ipv4/tcp.o
LD [M] sound/core/snd-pcm.o
CC kernel/entry/common.o
CC [M] net/8021q/vlan_netlink.o
CC net/xfrm/xfrm_replay.o
CC fs/proc/thread_self.o
CC fs/jbd2/revoke.o
AR sound/core/built-in.a
AR sound/isa/ad1816a/built-in.a
AR sound/isa/ad1848/built-in.a
AR sound/isa/cs423x/built-in.a
AR sound/isa/es1688/built-in.a
AR sound/isa/galaxy/built-in.a
CC kernel/entry/syscall_user_dispatch.o
AR sound/isa/gus/built-in.a
CC fs/proc/proc_sysctl.o
AR sound/isa/msnd/built-in.a
AR sound/isa/opti9xx/built-in.a
AR sound/isa/sb/built-in.a
CC kernel/irq/affinity.o
AR net/packet/built-in.a
CC mm/shmem.o
AR sound/isa/wavefront/built-in.a
CC kernel/dma/dummy.o
AR sound/isa/wss/built-in.a
CC lib/raid6/int2.o
AR sound/isa/built-in.a
AR sound/pci/ac97/built-in.a
AR sound/pci/ali5451/built-in.a
AR sound/pci/asihpi/built-in.a
AR sound/pci/au88x0/built-in.a
AR sound/pci/aw2/built-in.a
AR sound/pci/ctxfi/built-in.a
AR sound/pci/ca0106/built-in.a
AR sound/pci/cs46xx/built-in.a
AR sound/pci/cs5535audio/built-in.a
CC arch/x86/kernel/cpu/amd.o
AR sound/pci/lola/built-in.a
CC crypto/sha1_generic.o
AR sound/pci/lx6464es/built-in.a
AR sound/pci/echoaudio/built-in.a
AR net/l3mdev/built-in.a
CC io_uring/rsrc.o
AR sound/pci/emu10k1/built-in.a
AR sound/ppc/built-in.a
CC net/handshake/genl.o
AR sound/pci/hda/built-in.a
CC [M] net/bluetooth/af_bluetooth.o
CC [M] sound/pci/hda/hda_bind.o
CC [M] net/bluetooth/hci_core.o
CC drivers/acpi/acpica/dswstate.o
CC block/blk-mq-sysfs.o
CC [M] sound/pci/hda/hda_codec.o
CC [M] net/sunrpc/auth_gss/gss_rpc_xdr.o
LD [M] drivers/dma/ioat/ioatdma.o
CC [M] net/bluetooth/hci_conn.o
AR drivers/dma/built-in.a
CC lib/raid6/int4.o
CC net/ipv6/addrlabel.o
CC arch/x86/kernel/cpu/hygon.o
CC [M] net/netfilter/nf_conntrack_proto.o
CC kernel/dma/contiguous.o
CC kernel/irq/matrix.o
CC [M] drivers/video/fbdev/core/fb_procfs.o
CC net/sunrpc/clnt.o
CC [M] sound/pci/hda/hda_jack.o
CC fs/ramfs/inode.o
CC fs/hugetlbfs/inode.o
CC fs/ramfs/file-mmu.o
CC net/dcb/dcbevent.o
CC drivers/clk/clk-fixed-factor.o
CC [M] net/8021q/vlanproc.o
CC drivers/clk/clk-fixed-rate.o
CC fs/jbd2/journal.o
CC fs/fat/cache.o
CC drivers/acpi/acpica/evevent.o
CC crypto/sha256_generic.o
CC net/ethtool/pause.o
CC fs/fat/dir.o
CC kernel/entry/kvm.o
CC net/handshake/netlink.o
CC net/ethtool/eee.o
CC net/bridge/br_if.o
CC [M] sound/pci/hda/hda_auto_parser.o
CC lib/raid6/int8.o
CC block/blk-mq-cpumap.o
CC kernel/dma/swiotlb.o
CC net/sunrpc/xprt.o
CC [M] drivers/video/fbdev/core/fbsysfs.o
CC arch/x86/kernel/cpu/centaur.o
CC net/xfrm/xfrm_device.o
CC fs/ext4/extents.o
CC kernel/dma/remap.o
CC drivers/clk/clk-gate.o
CC drivers/acpi/acpica/evgpe.o
AR net/8021q/built-in.a
CC [M] drivers/video/fbdev/core/fbcon.o
CC [M] arch/x86/kvm/i8259.o
AR fs/ramfs/built-in.a
CC net/ipv4/tcp_input.o
CC crypto/sha512_generic.o
CC [M] net/sunrpc/auth_gss/trace.o
AR net/dcb/built-in.a
CC drivers/pci/search.o
CC net/handshake/request.o
CC net/ipv6/route.o
CC fs/nfs/client.o
CC fs/exportfs/expfs.o
CC fs/proc/proc_net.o
CC net/handshake/tlshd.o
LD [M] net/8021q/8021q.o
CC net/devres.o
CC [M] net/dns_resolver/dns_key.o
AR kernel/entry/built-in.a
CC drivers/pci/pci-sysfs.o
CC block/blk-mq-sched.o
CC arch/x86/kernel/cpu/zhaoxin.o
CC drivers/clk/clk-multiplier.o
CC [M] net/netfilter/nf_conntrack_proto_generic.o
AR kernel/irq/built-in.a
CC lib/raid6/int16.o
CC [M] net/dns_resolver/dns_query.o
CC drivers/acpi/acpica/evgpeblk.o
CC drivers/video/aperture.o
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC net/ethtool/tsinfo.o
CC io_uring/rw.o
AR fs/hugetlbfs/built-in.a
CC fs/lockd/clntlock.o
CC io_uring/opdef.o
CC fs/nls/nls_base.o
CC io_uring/notif.o
CC [M] net/netfilter/nf_conntrack_proto_tcp.o
CC crypto/sha3_generic.o
CC fs/nls/nls_cp437.o
CC lib/argv_split.o
AR fs/exportfs/built-in.a
CC drivers/acpi/acpica/evgpeinit.o
CC net/core/dst.o
CC drivers/clk/clk-mux.o
AR kernel/dma/built-in.a
CC kernel/module/main.o
CC kernel/time/time.o
CC lib/raid6/int32.o
CC fs/fat/fatent.o
CC net/bridge/br_input.o
CC lib/zstd/zstd_decompress_module.o
CC fs/proc/kcore.o
CC arch/x86/kernel/cpu/vmware.o
CC net/ipv6/ip6_fib.o
LD [M] net/dns_resolver/dns_resolver.o
CC lib/bug.o
CC net/xfrm/xfrm_algo.o
CC [M] sound/pci/hda/hda_sysfs.o
CC lib/zstd/decompress/huf_decompress.o
CC arch/x86/kernel/process_64.o
CC net/handshake/trace.o
CC fs/nls/nls_ascii.o
CC kernel/time/timer.o
CC drivers/acpi/acpica/evgpeutil.o
CC block/ioctl.o
CC net/ethtool/cabletest.o
CC crypto/blake2b_generic.o
CC fs/proc/kmsg.o
CC net/core/netevent.o
CC drivers/clk/clk-composite.o
CC mm/util.o
CC lib/raid6/tables.o
CC mm/mmzone.o
CC fs/nls/nls_iso8859-1.o
CC drivers/pci/rom.o
CC net/socket.o
CC arch/x86/kernel/cpu/hypervisor.o
CC kernel/futex/core.o
CC arch/x86/kernel/cpu/mshyperv.o
CC [M] drivers/video/fbdev/core/bitblit.o
CC drivers/acpi/acpica/evglock.o
CC fs/lockd/clntproc.o
CC kernel/futex/syscalls.o
CC [M] sound/pci/hda/hda_controller.o
CC fs/proc/page.o
CC mm/vmstat.o
CC [M] net/bluetooth/hci_event.o
CC fs/nfs/dir.o
CC fs/nls/nls_utf8.o
CC drivers/acpi/acpica/evhandler.o
CC arch/x86/kernel/signal.o
CC drivers/clk/clk-fractional-divider.o
CC crypto/ecb.o
AR fs/jbd2/built-in.a
CC fs/lockd/clntxdr.o
CC [M] net/bluetooth/mgmt.o
CC [M] net/sunrpc/auth_gss/gss_krb5_mech.o
CC fs/fat/file.o
CC io_uring/io-wq.o
CC net/xfrm/xfrm_user.o
CC kernel/cgroup/cgroup.o
CC drivers/pci/setup-res.o
CC kernel/cgroup/rstat.o
CC kernel/futex/pi.o
CC kernel/cgroup/namespace.o
AR lib/raid6/built-in.a
CC block/genhd.o
CC fs/lockd/host.o
CC kernel/futex/requeue.o
CC crypto/cbc.o
CC kernel/futex/waitwake.o
CC net/ethtool/tunnels.o
AR fs/nls/built-in.a
CC net/bridge/br_ioctl.o
AR net/handshake/built-in.a
CC net/sunrpc/socklib.o
AR fs/unicode/built-in.a
CC drivers/pci/irq.o
CC drivers/acpi/acpica/evmisc.o
CC [M] net/netfilter/nf_conntrack_proto_udp.o
CC kernel/trace/trace_clock.o
CC arch/x86/kernel/cpu/capflags.o
CC kernel/trace/ftrace.o
AR arch/x86/kernel/cpu/built-in.a
CC drivers/acpi/acpica/evregion.o
CC kernel/bpf/core.o
AR sound/arm/built-in.a
CC lib/zstd/decompress/zstd_ddict.o
CC lib/zstd/decompress/zstd_decompress.o
CC [M] drivers/video/fbdev/core/softcursor.o
CC drivers/clk/clk-gpio.o
CC crypto/pcbc.o
AR fs/proc/built-in.a
CC lib/buildid.o
CC [M] net/netfilter/nf_conntrack_proto_icmp.o
CC arch/x86/kernel/signal_64.o
CC net/core/neighbour.o
CC kernel/events/core.o
CC [M] drivers/video/fbdev/core/tileblit.o
CC drivers/pci/vpd.o
CC kernel/events/ring_buffer.o
CC drivers/pci/setup-bus.o
AR kernel/futex/built-in.a
CC kernel/events/callchain.o
CC net/core/rtnetlink.o
CC [M] drivers/video/fbdev/core/cfbfillrect.o
CC [M] net/sunrpc/auth_gss/gss_krb5_seal.o
CC [M] arch/x86/kvm/irq.o
CC block/ioprio.o
CC fs/fat/inode.o
CC drivers/acpi/acpica/evrgnini.o
CC net/bridge/br_stp.o
CC lib/zstd/decompress/zstd_decompress_block.o
CC [M] sound/pci/hda/hda_proc.o
CC crypto/cts.o
AR drivers/clk/built-in.a
CC kernel/module/strict_rwx.o
CC [M] net/sunrpc/auth_gss/gss_krb5_unseal.o
CC kernel/time/hrtimer.o
CC net/ipv6/ipv6_sockglue.o
CC block/badblocks.o
CC block/blk-rq-qos.o
CC fs/fat/misc.o
CC mm/backing-dev.o
CC net/ethtool/fec.o
CC net/ethtool/eeprom.o
CC fs/lockd/svc.o
CC kernel/trace/ring_buffer.o
CC net/ipv6/ndisc.o
CC arch/x86/kernel/traps.o
CC drivers/acpi/acpica/evsci.o
CC kernel/time/timekeeping.o
CC crypto/lrw.o
CC lib/zstd/zstd_common_module.o
CC lib/cmdline.o
CC mm/mm_init.o
AR io_uring/built-in.a
CC drivers/virtio/virtio.o
CC [M] arch/x86/kvm/lapic.o
CC [M] drivers/video/fbdev/core/cfbcopyarea.o
CC kernel/module/kmod.o
CC [M] arch/x86/kvm/i8254.o
CC fs/ext4/extents_status.o
CC fs/nfs/file.o
CC [M] net/netfilter/nf_conntrack_extend.o
CC [M] net/sunrpc/auth_gss/gss_krb5_seqnum.o
CC mm/percpu.o
AR sound/pci/ice1712/built-in.a
CC crypto/xts.o
CC net/ipv6/udp.o
CC drivers/acpi/acpica/evxface.o
CC net/ipv4/tcp_output.o
CC kernel/time/ntp.o
CC block/disk-events.o
CC kernel/trace/trace.o
CC [M] sound/pci/hda/hda_hwdep.o
CC lib/zstd/common/debug.o
CC lib/zstd/common/entropy_common.o
CC drivers/acpi/acpica/evxfevnt.o
CC net/bridge/br_stp_bpdu.o
CC net/ethtool/stats.o
CC drivers/pci/vc.o
CC fs/fat/nfs.o
CC drivers/virtio/virtio_ring.o
CC net/ipv4/tcp_timer.o
CC [M] net/bluetooth/hci_sock.o
CC arch/x86/kernel/idt.o
CC kernel/module/tree_lookup.o
CC crypto/ctr.o
CC [M] net/sunrpc/auth_gss/gss_krb5_wrap.o
CC [M] drivers/video/fbdev/core/cfbimgblt.o
AR sound/sh/built-in.a
AR sound/synth/emux/built-in.a
AR sound/synth/built-in.a
CC fs/lockd/svclock.o
AR sound/usb/misc/built-in.a
AR net/xfrm/built-in.a
CC kernel/module/debug_kmemleak.o
AR sound/usb/usx2y/built-in.a
CC net/compat.o
AR sound/usb/caiaq/built-in.a
AR sound/usb/6fire/built-in.a
AR sound/usb/hiface/built-in.a
AR sound/usb/bcd2000/built-in.a
AR sound/usb/built-in.a
CC net/bridge/br_stp_if.o
CC drivers/acpi/acpica/evxfgpe.o
CC kernel/events/hw_breakpoint.o
CC [M] sound/pci/hda/hda_generic.o
CC block/blk-ia-ranges.o
CC [M] net/netfilter/nf_conntrack_acct.o
CC block/early-lookup.o
CC [M] arch/x86/kvm/ioapic.o
CC kernel/events/uprobes.o
CC net/sunrpc/xprtsock.o
AR kernel/bpf/built-in.a
CC kernel/fork.o
CC kernel/time/clocksource.o
CC crypto/gcm.o
CC fs/fat/namei_vfat.o
CC [M] sound/pci/hda/patch_realtek.o
CC kernel/trace/trace_output.o
CC drivers/pci/mmap.o
CC kernel/module/kallsyms.o
CC arch/x86/kernel/irq.o
CC [M] net/sunrpc/auth_gss/gss_krb5_crypto.o
CC [M] net/netfilter/nf_conntrack_seqadj.o
CC drivers/acpi/acpica/evxfregn.o
CC net/ipv6/udplite.o
CC [M] drivers/video/fbdev/core/sysfillrect.o
CC kernel/module/procfs.o
CC block/bsg.o
CC drivers/pci/setup-irq.o
CC net/ethtool/phc_vclocks.o
CC fs/nfs/getroot.o
CC drivers/pci/proc.o
CC drivers/acpi/acpica/exconcat.o
CC net/ipv6/raw.o
CC drivers/virtio/virtio_anchor.o
CC fs/ext4/file.o
CC net/sysctl_net.o
CC net/bridge/br_stp_timer.o
CC fs/lockd/svcshare.o
CC kernel/time/jiffies.o
CC [M] drivers/video/fbdev/core/syscopyarea.o
CC drivers/pci/slot.o
CC [M] drivers/video/fbdev/core/sysimgblt.o
CC kernel/trace/trace_seq.o
CC [M] net/sunrpc/auth_gss/gss_krb5_keys.o
CC block/bsg-lib.o
CC mm/slab_common.o
CC kernel/module/sysfs.o
CC net/bridge/br_netlink.o
CC net/ethtool/mm.o
CC crypto/pcrypt.o
CC fs/fat/namei_msdos.o
CC drivers/acpi/acpica/exconfig.o
CC net/ethtool/module.o
CC net/ipv6/icmp.o
CC net/ethtool/pse-pd.o
LD [M] net/sunrpc/auth_gss/auth_rpcgss.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC drivers/virtio/virtio_pci_legacy_dev.o
CC kernel/time/timer_list.o
CC net/core/utils.o
CC mm/compaction.o
CC [M] net/bluetooth/hci_sysfs.o
CC [M] arch/x86/kvm/irq_comm.o
CC [M] sound/pci/hda/patch_analog.o
CC [M] net/netfilter/nf_conntrack_proto_icmpv6.o
CC [M] drivers/video/fbdev/core/fb_sys_fops.o
CC drivers/virtio/virtio_pci_modern.o
CC fs/nfs/inode.o
CC net/ipv6/mcast.o
CC kernel/trace/trace_stat.o
CC net/ethtool/plca.o
CC drivers/acpi/acpica/exconvrt.o
CC drivers/pci/pci-acpi.o
CC crypto/cryptd.o
AR kernel/module/built-in.a
CC kernel/exec_domain.o
CC block/blk-cgroup.o
CC net/core/link_watch.o
CC [M] arch/x86/kvm/cpuid.o
LD [M] net/sunrpc/auth_gss/rpcsec_gss_krb5.o
CC block/blk-cgroup-rwstat.o
CC net/sunrpc/sched.o
CC fs/ext4/fsmap.o
CC fs/lockd/svcproc.o
CC fs/lockd/svcsubs.o
CC net/ipv4/tcp_ipv4.o
CC drivers/video/cmdline.o
CC arch/x86/kernel/irq_64.o
CC lib/zstd/common/error_private.o
AR fs/fat/built-in.a
CC [M] arch/x86/kvm/pmu.o
CC kernel/time/timeconv.o
CC net/sunrpc/auth.o
CC kernel/cgroup/cgroup-v1.o
CC drivers/acpi/acpica/excreate.o
CC drivers/video/nomodeset.o
CC arch/x86/kernel/dumpstack_64.o
CC kernel/time/timecounter.o
CC kernel/time/alarmtimer.o
CC drivers/virtio/virtio_pci_common.o
LD [M] drivers/video/fbdev/core/fb.o
CC drivers/virtio/virtio_pci_legacy.o
CC crypto/des_generic.o
AR drivers/video/fbdev/core/built-in.a
CC [M] drivers/video/fbdev/uvesafb.o
AR sound/firewire/built-in.a
CC kernel/cgroup/freezer.o
AR sound/sparc/built-in.a
CC arch/x86/kernel/time.o
CC fs/lockd/mon.o
CC kernel/panic.o
CC drivers/video/hdmi.o
CC [M] drivers/video/fbdev/simplefb.o
AR drivers/video/fbdev/built-in.a
CC kernel/time/posix-timers.o
CC kernel/time/posix-cpu-timers.o
CC drivers/acpi/acpica/exdebug.o
AR net/ethtool/built-in.a
CC kernel/cgroup/legacy_freezer.o
CC [M] net/bluetooth/l2cap_core.o
CC kernel/time/posix-clock.o
CC [M] net/netfilter/nf_conntrack_proto_dccp.o
CC fs/lockd/trace.o
CC block/blk-throttle.o
CC net/ipv6/reassembly.o
CC block/mq-deadline.o
CC [M] net/bluetooth/l2cap_sock.o
CC kernel/trace/trace_printk.o
CC crypto/aes_generic.o
CC arch/x86/kernel/ioport.o
CC kernel/cpu.o
CC drivers/pci/quirks.o
CC mm/show_mem.o
CC [M] drivers/virtio/virtio_mem.o
CC fs/nfs/super.o
CC net/core/filter.o
CC fs/lockd/xdr.o
CC net/bridge/br_netlink_tunnel.o
CC fs/lockd/clnt4xdr.o
CC kernel/trace/pid_list.o
CC drivers/acpi/acpica/exdump.o
CC fs/nfs/io.o
CC net/sunrpc/auth_null.o
CC kernel/cgroup/pids.o
CC kernel/exit.o
CC kernel/cgroup/cpuset.o
CC drivers/pci/ats.o
CC kernel/trace/trace_sched_switch.o
CC [M] arch/x86/kvm/mtrr.o
CC kernel/time/itimer.o
CC net/ipv6/tcp_ipv6.o
CC drivers/acpi/acpica/exfield.o
CC fs/ext4/fsync.o
CC fs/nfs/direct.o
AR drivers/virtio/built-in.a
CC arch/x86/kernel/dumpstack.o
CC drivers/tty/vt/vt_ioctl.o
CC drivers/char/hw_random/core.o
CC [M] sound/pci/hda/patch_hdmi.o
CC drivers/char/hw_random/intel-rng.o
CC mm/interval_tree.o
CC fs/lockd/xdr4.o
CC fs/ext4/hash.o
CC [M] net/netfilter/nf_conntrack_proto_sctp.o
CC net/core/sock_diag.o
CC [M] net/bluetooth/smp.o
CC crypto/deflate.o
CC lib/zstd/common/fse_decompress.o
CC mm/list_lru.o
CC drivers/acpi/acpica/exfldio.o
AR drivers/video/built-in.a
AR drivers/iommu/amd/built-in.a
CC drivers/iommu/intel/dmar.o
CC block/kyber-iosched.o
AR drivers/iommu/arm/arm-smmu/built-in.a
CC drivers/iommu/intel/iommu.o
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
CC drivers/iommu/intel/pasid.o
AR drivers/iommu/arm/built-in.a
CC drivers/iommu/intel/trace.o
AR drivers/gpu/host1x/built-in.a
CC drivers/connector/cn_queue.o
CC drivers/base/power/sysfs.o
CC drivers/base/power/generic_ops.o
AR drivers/gpu/drm/tests/built-in.a
CC [M] drivers/gpu/drm/tests/drm_kunit_helpers.o
CC block/bfq-iosched.o
CC kernel/trace/trace_functions.o
CC net/bridge/br_arp_nd_proxy.o
CC [M] drivers/gpu/drm/tests/drm_buddy_test.o
CC arch/x86/kernel/nmi.o
CC kernel/time/clockevents.o
AR drivers/gpu/drm/arm/built-in.a
AR drivers/gpu/drm/display/built-in.a
CC [M] drivers/gpu/drm/display/drm_display_helper_mod.o
CC [M] arch/x86/kvm/hyperv.o
CC [M] drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
AR drivers/char/hw_random/built-in.a
CC fs/nfs/pagelist.o
CC drivers/char/agp/backend.o
CC drivers/acpi/acpica/exmisc.o
CC drivers/char/agp/generic.o
CC crypto/crc32c_generic.o
CC drivers/base/power/common.o
CC arch/x86/kernel/ldt.o
CC drivers/tty/vt/vc_screen.o
CC kernel/time/tick-common.o
CC lib/cpumask.o
CC drivers/base/firmware_loader/builtin/main.o
CC kernel/time/tick-broadcast.o
CC fs/ext4/ialloc.o
CC net/ipv4/tcp_minisocks.o
CC [M] drivers/gpu/drm/tests/drm_cmdline_parser_test.o
CC [M] net/netfilter/nf_conntrack_netlink.o
AR kernel/events/built-in.a
CC lib/ctype.o
CC lib/zstd/common/zstd_common.o
CC drivers/base/power/qos.o
CC fs/lockd/svc4proc.o
AR lib/zstd/built-in.a
CC drivers/char/agp/isoch.o
CC drivers/iommu/intel/cap_audit.o
CC fs/ext4/indirect.o
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
CC mm/workingset.o
CC net/core/dev_ioctl.o
AR drivers/gpu/drm/renesas/built-in.a
CC drivers/acpi/acpica/exmutex.o
CC mm/debug.o
CC crypto/crct10dif_common.o
CC drivers/pci/iov.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC drivers/base/firmware_loader/main.o
CC drivers/connector/connector.o
CC kernel/softirq.o
CC kernel/trace/trace_preemptirq.o
CC net/ipv4/tcp_cong.o
AR drivers/gpu/vga/built-in.a
CC fs/ext4/inline.o
CC drivers/acpi/acpica/exnames.o
CC crypto/crct10dif_generic.o
CC mm/gup.o
CC [M] drivers/gpu/drm/display/drm_dp_helper.o
CC [M] net/bluetooth/lib.o
CC kernel/resource.o
CC lib/dec_and_lock.o
CC fs/nfs/read.o
CC net/ipv4/tcp_metrics.o
CC drivers/acpi/acpica/exoparg1.o
CC net/bridge/br_sysfs_if.o
CC drivers/tty/vt/selection.o
CC [M] drivers/gpu/drm/tests/drm_connector_test.o
CC kernel/sysctl.o
CC lib/decompress.o
CC crypto/authenc.o
CC arch/x86/kernel/setup.o
CC lib/decompress_bunzip2.o
CC mm/mmap_lock.o
CC kernel/time/tick-broadcast-hrtimer.o
CC drivers/base/power/runtime.o
CC drivers/char/agp/intel-agp.o
CC [M] sound/pci/hda/hda_eld.o
CC drivers/iommu/intel/irq_remapping.o
CC mm/highmem.o
CC kernel/trace/trace_nop.o
CC block/bfq-wf2q.o
CC net/bridge/br_sysfs_br.o
CC drivers/iommu/intel/perfmon.o
CC drivers/connector/cn_proc.o
CC fs/lockd/procfs.o
CC drivers/acpi/acpica/exoparg2.o
CC drivers/pci/pci-label.o
CC kernel/time/tick-oneshot.o
CC net/ipv6/ping.o
AR kernel/cgroup/built-in.a
CC drivers/char/agp/intel-gtt.o
AR drivers/base/firmware_loader/built-in.a
CC drivers/tty/hvc/hvc_console.o
CC [M] drivers/gpu/drm/tests/drm_damage_helper_test.o
CC fs/ntfs/aops.o
CC drivers/tty/serial/8250/8250_core.o
CC drivers/tty/vt/keyboard.o
CC drivers/tty/serial/8250/8250_pnp.o
CC lib/decompress_inflate.o
CC [M] sound/pci/hda/hda_intel.o
CC drivers/acpi/acpica/exoparg3.o
CC drivers/block/loop.o
CC drivers/tty/serial/serial_core.o
CC kernel/trace/trace_functions_graph.o
CC kernel/time/tick-sched.o
AR drivers/misc/eeprom/built-in.a
CC crypto/authencesn.o
CC [M] drivers/gpu/drm/tests/drm_dp_mst_helper_test.o
AR drivers/misc/cb710/built-in.a
AR drivers/misc/ti-st/built-in.a
CC crypto/lzo.o
AR drivers/misc/lis3lv02d/built-in.a
CC kernel/trace/fgraph.o
AR drivers/misc/cardreader/built-in.a
CC kernel/capability.o
CC [M] drivers/misc/mei/hdcp/mei_hdcp.o
CC [M] drivers/misc/mei/pxp/mei_pxp.o
CC fs/ext4/inode.o
CC arch/x86/kernel/x86_init.o
CC drivers/mfd/mfd-core.o
CC fs/nfs/symlink.o
AR fs/lockd/built-in.a
CC drivers/mfd/intel-lpss.o
CC drivers/pci/pci-stub.o
CC drivers/base/power/wakeirq.o
CC [M] drivers/gpu/drm/display/drm_dp_mst_topology.o
CC [M] arch/x86/kvm/debugfs.o
CC lib/decompress_unlz4.o
CC drivers/acpi/acpica/exoparg6.o
CC net/bridge/br_nf_core.o
AR drivers/nfc/built-in.a
CC drivers/base/regmap/regmap.o
CC fs/nfs/unlink.o
CC drivers/base/regmap/regcache.o
AR drivers/tty/hvc/built-in.a
CC net/sunrpc/auth_tls.o
CC net/sunrpc/auth_unix.o
CC [M] drivers/gpu/drm/display/drm_dsc_helper.o
AR drivers/char/agp/built-in.a
CC drivers/char/tpm/tpm-chip.o
CC net/ipv4/tcp_fastopen.o
AR drivers/connector/built-in.a
CC drivers/char/tpm/tpm-dev-common.o
CC drivers/char/tpm/tpm-dev.o
CC drivers/char/tpm/tpm-interface.o
AR drivers/acpi/pmic/built-in.a
AR drivers/base/test/built-in.a
CC drivers/base/component.o
CC crypto/lzo-rle.o
CC fs/ntfs/attrib.o
CC [M] net/netfilter/nf_nat_core.o
CC net/ipv6/exthdrs.o
CC drivers/base/core.o
AR drivers/iommu/intel/built-in.a
CC drivers/tty/serial/8250/8250_port.o
CC block/bfq-cgroup.o
AR drivers/iommu/iommufd/built-in.a
CC drivers/iommu/iommu.o
CC crypto/lz4.o
CC arch/x86/kernel/i8259.o
CC drivers/acpi/acpica/exprep.o
CC drivers/base/power/main.o
CC drivers/pci/vgaarb.o
CC [M] drivers/gpu/drm/display/drm_hdcp_helper.o
CC lib/decompress_unlzma.o
CC [M] drivers/gpu/drm/tests/drm_format_helper_test.o
CC net/bridge/br_multicast.o
CC mm/memory.o
CC drivers/mfd/intel-lpss-pci.o
AR sound/spi/built-in.a
CC net/ipv6/datagram.o
CC kernel/time/vsyscall.o
CC [M] drivers/misc/mei/init.o
CC net/sunrpc/svc.o
CC kernel/trace/blktrace.o
CC drivers/base/bus.o
CC [M] arch/x86/kvm/mmu/mmu.o
CC crypto/lz4hc.o
CC net/bridge/br_mdb.o
CC crypto/xxhash_generic.o
CC [M] net/bluetooth/ecdh_helper.o
CC drivers/tty/vt/consolemap.o
CC drivers/acpi/acpica/exregion.o
CC lib/decompress_unlzo.o
CC [M] drivers/misc/mei/hbm.o
CC arch/x86/kernel/irqinit.o
CC fs/ext4/ioctl.o
CC fs/ntfs/collate.o
CC [M] drivers/misc/mei/interrupt.o
CC drivers/base/dd.o
CC drivers/char/tpm/tpm1-cmd.o
CC kernel/time/timekeeping_debug.o
CC fs/nfs/write.o
LD [M] sound/pci/hda/snd-hda-codec.o
LD [M] sound/pci/hda/snd-hda-codec-generic.o
CC kernel/ptrace.o
CC kernel/user.o
LD [M] sound/pci/hda/snd-hda-codec-realtek.o
CC drivers/mfd/intel-lpss-acpi.o
LD [M] sound/pci/hda/snd-hda-codec-analog.o
CC kernel/trace/trace_events.o
LD [M] sound/pci/hda/snd-hda-codec-hdmi.o
LD [M] sound/pci/hda/snd-hda-intel.o
CC [M] drivers/block/nbd.o
AR sound/pci/korg1212/built-in.a
CC drivers/iommu/iommu-traces.o
AR sound/pci/mixart/built-in.a
CC kernel/time/namespace.o
AR sound/pci/nm256/built-in.a
CC crypto/rng.o
AR sound/pci/oxygen/built-in.a
CC lib/decompress_unxz.o
CC block/blk-mq-pci.o
AR sound/pci/pcxhr/built-in.a
AR sound/pci/riptide/built-in.a
AR sound/pci/rme9652/built-in.a
AR sound/pci/trident/built-in.a
CC drivers/acpi/acpica/exresnte.o
AR sound/pci/ymfpci/built-in.a
AR sound/pci/vx222/built-in.a
AR sound/pci/built-in.a
CC [M] drivers/gpu/drm/tests/drm_format_test.o
AR sound/parisc/built-in.a
AR sound/pcmcia/vx/built-in.a
AR sound/pcmcia/pdaudiocf/built-in.a
AR sound/pcmcia/built-in.a
AR sound/mips/built-in.a
CC lib/decompress_unzstd.o
AR sound/soc/built-in.a
AR sound/atmel/built-in.a
CC kernel/trace/trace_export.o
AR sound/hda/built-in.a
CC [M] net/bluetooth/hci_request.o
CC [M] sound/hda/hda_bus_type.o
CC kernel/trace/trace_event_perf.o
CC [M] drivers/gpu/drm/display/drm_hdmi_helper.o
AR drivers/pci/built-in.a
CC kernel/signal.o
CC fs/ntfs/compress.o
CC net/ipv4/tcp_rate.o
CC drivers/base/regmap/regcache-rbtree.o
CC fs/ntfs/debug.o
CC drivers/mfd/intel_soc_pmic_crc.o
AR sound/x86/built-in.a
CC drivers/tty/serial/serial_base_bus.o
CC arch/x86/kernel/jump_label.o
CC [M] drivers/misc/mei/client.o
HOSTCC drivers/tty/vt/conmakehash
CC drivers/acpi/acpica/exresolv.o
CC net/ipv4/tcp_recovery.o
CC [M] net/netfilter/nf_nat_proto.o
CC drivers/char/tpm/tpm2-cmd.o
CC [M] drivers/misc/mei/main.o
CC block/blk-mq-virtio.o
CC drivers/tty/vt/vt.o
CC lib/dump_stack.o
CC crypto/drbg.o
CC lib/earlycpio.o
CC drivers/tty/serial/8250/8250_dma.o
AR kernel/time/built-in.a
CC drivers/tty/serial/serial_ctrl.o
CC [M] sound/hda/hdac_bus.o
CC block/blk-mq-debugfs.o
CC fs/ntfs/dir.o
CC [M] net/netfilter/nf_nat_helper.o
CC net/ipv4/tcp_ulp.o
CC kernel/sys.o
AR drivers/misc/built-in.a
AR fs/hostfs/built-in.a
CC drivers/iommu/iommu-sysfs.o
AR sound/xen/built-in.a
CC drivers/base/power/wakeup.o
CC drivers/char/tpm/tpmrm-dev.o
AR drivers/block/built-in.a
CC drivers/acpi/acpica/exresop.o
CC drivers/iommu/dma-iommu.o
CC net/ipv6/ip6_flowlabel.o
CC [M] drivers/gpu/drm/tests/drm_framebuffer_test.o
CC net/ipv4/tcp_offload.o
CC arch/x86/kernel/irq_work.o
CC drivers/char/tpm/tpm2-space.o
CC mm/mincore.o
CC [M] drivers/mfd/lpc_sch.o
CC [M] sound/hda/hdac_device.o
CC block/blk-pm.o
CC lib/extable.o
CC [M] drivers/gpu/drm/display/drm_scdc_helper.o
CC [M] net/netfilter/nf_nat_redirect.o
CC drivers/acpi/acpica/exserial.o
CC fs/ntfs/file.o
CC drivers/tty/serial/8250/8250_dwlib.o
CC drivers/iommu/iova.o
CC drivers/base/regmap/regcache-flat.o
CC [M] net/bluetooth/mgmt_util.o
CC [M] drivers/gpu/drm/tests/drm_managed_test.o
CC [M] drivers/gpu/drm/display/drm_dp_aux_dev.o
CC net/bridge/br_multicast_eht.o
CC lib/flex_proportions.o
AR sound/virtio/built-in.a
CC [M] drivers/gpu/drm/tests/drm_mm_test.o
CC net/sunrpc/svcsock.o
AR drivers/tty/ipwireless/built-in.a
CC drivers/tty/tty_io.o
CC drivers/iommu/irq_remapping.o
CC drivers/tty/serial/serial_port.o
CC sound/sound_core.o
CC crypto/jitterentropy.o
CC [M] drivers/mfd/lpc_ich.o
CC block/holder.o
CC drivers/char/tpm/tpm-sysfs.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC arch/x86/kernel/probe_roms.o
CC drivers/acpi/acpica/exstore.o
CC net/ipv6/inet6_connection_sock.o
CC arch/x86/kernel/sys_ia32.o
CC mm/mlock.o
CC drivers/acpi/dptf/int340x_thermal.o
CC lib/idr.o
CC net/ipv4/tcp_plb.o
CC [M] net/netfilter/nf_nat_masquerade.o
CC drivers/acpi/acpica/exstoren.o
CC [M] sound/hda/hdac_sysfs.o
CC drivers/acpi/tables.o
CC drivers/base/regmap/regcache-maple.o
CC crypto/jitterentropy-kcapi.o
CC sound/last.o
CC fs/ntfs/index.o
CC drivers/base/power/wakeup_stats.o
CC [M] sound/hda/hdac_regmap.o
CC kernel/trace/trace_events_filter.o
CC [M] drivers/misc/mei/dma-ring.o
CC drivers/tty/serial/8250/8250_pci.o
CC net/core/tso.o
CC [M] net/netfilter/x_tables.o
CC drivers/tty/serial/earlycon.o
CC [M] arch/x86/kvm/mmu/page_track.o
CC drivers/base/power/domain.o
CC net/ipv4/datagram.o
CC fs/nfs/namespace.o
AR block/built-in.a
AR drivers/iommu/built-in.a
CC drivers/base/power/domain_governor.o
CC drivers/base/power/clock_ops.o
CC fs/ntfs/inode.o
CC net/ipv4/raw.o
AR drivers/acpi/dptf/built-in.a
CC [M] sound/hda/hdac_controller.o
LD [M] drivers/gpu/drm/display/drm_display_helper.o
CC drivers/acpi/acpica/exstorob.o
CC drivers/tty/serial/serial_mctrl_gpio.o
CC drivers/char/tpm/eventlog/common.o
CC [M] arch/x86/kvm/mmu/spte.o
CC [M] drivers/gpu/drm/tests/drm_modes_test.o
CC arch/x86/kernel/signal_32.o
AR drivers/mfd/built-in.a
AR drivers/dax/hmem/built-in.a
CC drivers/dax/super.o
CC arch/x86/kernel/sys_x86_64.o
CC drivers/acpi/acpica/exsystem.o
CC lib/irq_regs.o
CC [M] net/bluetooth/mgmt_config.o
CC crypto/ghash-generic.o
CC arch/x86/kernel/espfix_64.o
CC lib/is_single_threaded.o
CC drivers/base/regmap/regmap-debugfs.o
CC [M] drivers/misc/mei/bus.o
AR drivers/gpu/drm/omapdrm/built-in.a
CC crypto/af_alg.o
AR drivers/gpu/drm/tilcdc/built-in.a
CC drivers/acpi/acpica/extrace.o
CC fs/ntfs/mft.o
CC drivers/acpi/acpica/exutils.o
CC [M] net/bluetooth/hci_codec.o
CC fs/ext4/mballoc.o
CC [M] drivers/misc/mei/bus-fixup.o
CC drivers/base/regmap/regmap-i2c.o
AR drivers/gpu/drm/imx/built-in.a
CC drivers/base/regmap/regmap-irq.o
CC net/ipv6/udp_offload.o
CC [M] arch/x86/kvm/mmu/tdp_iter.o
CC crypto/algif_hash.o
CC drivers/dax/bus.o
CC kernel/trace/trace_events_trigger.o
CC drivers/char/tpm/eventlog/tpm1.o
CC [M] arch/x86/kvm/mmu/tdp_mmu.o
CC lib/klist.o
CC drivers/char/tpm/eventlog/tpm2.o
CC net/bridge/br_vlan.o
COPY drivers/tty/vt/defkeymap.c
CONMK drivers/tty/vt/consolemap_deftbl.c
CC drivers/tty/vt/defkeymap.o
CC [M] net/netfilter/xt_tcpudp.o
CC net/ipv6/seg6.o
CC [M] sound/hda/hdac_stream.o
CC net/ipv4/udp.o
CC net/ipv4/udplite.o
CC net/core/sock_reuseport.o
CC arch/x86/kernel/ksysfs.o
CC net/ipv6/fib6_notifier.o
CC drivers/acpi/acpica/hwacpi.o
CC drivers/tty/n_tty.o
CC drivers/tty/vt/consolemap_deftbl.o
CC [M] arch/x86/kvm/smm.o
AR drivers/tty/vt/built-in.a
CC drivers/char/tpm/tpm_ppi.o
CC drivers/tty/tty_ioctl.o
CC drivers/acpi/acpica/hwesleep.o
CC fs/nfs/mount_clnt.o
CC [M] drivers/gpu/drm/tests/drm_plane_helper_test.o
CC drivers/dma-buf/dma-buf.o
CC [M] drivers/gpu/drm/tests/drm_probe_helper_test.o
CC drivers/dma-buf/dma-fence.o
CC drivers/tty/serial/8250/8250_exar.o
CC fs/nfs/nfstrace.o
CC lib/kobject.o
CC net/sunrpc/svcauth.o
CC kernel/umh.o
AR drivers/gpu/drm/i2c/built-in.a
CC fs/nfs/export.o
AR drivers/gpu/drm/panel/built-in.a
CC fs/ntfs/mst.o
CC net/bridge/br_vlan_tunnel.o
CC [M] drivers/gpu/drm/tests/drm_rect_test.o
CC drivers/char/mem.o
CC lib/kobject_uevent.o
AR drivers/cxl/core/built-in.a
AR drivers/cxl/built-in.a
CC [M] arch/x86/kvm/vmx/vmx.o
AR drivers/macintosh/built-in.a
CC lib/logic_pio.o
CC [M] net/bluetooth/eir.o
CC mm/mmap.o
CC drivers/acpi/acpica/hwgpe.o
AR drivers/base/power/built-in.a
CC [M] drivers/misc/mei/debugfs.o
CC [M] drivers/gpu/drm/tests/drm_exec_test.o
CC arch/x86/kernel/bootflag.o
CC [M] arch/x86/kvm/kvm-asm-offsets.s
CC net/ipv6/rpl.o
CC net/ipv4/udp_offload.o
AR drivers/base/regmap/built-in.a
CC drivers/base/syscore.o
CC [M] net/bluetooth/hci_sync.o
CC drivers/char/tpm/eventlog/acpi.o
CC drivers/dma-buf/dma-fence-array.o
CC [M] drivers/misc/mei/mei-trace.o
CC [M] sound/hda/array.o
CC net/ipv6/ioam6.o
CC [M] net/bluetooth/coredump.o
CC drivers/scsi/scsi.o
AR drivers/dax/built-in.a
CC [M] net/bluetooth/sco.o
CC arch/x86/kernel/e820.o
CC fs/ntfs/namei.o
CC kernel/trace/trace_eprobe.o
CC drivers/scsi/hosts.o
CC lib/maple_tree.o
CC drivers/tty/serial/8250/8250_early.o
CC drivers/nvme/host/core.o
CC drivers/acpi/acpica/hwregs.o
CC [M] net/netfilter/xt_mark.o
CC crypto/algif_skcipher.o
AR drivers/nvme/target/built-in.a
CC [M] drivers/misc/mei/pci-me.o
CC [M] drivers/misc/mei/hw-me.o
CC [M] net/netfilter/xt_nat.o
CC drivers/ata/libata-core.o
CC [M] net/netfilter/xt_REDIRECT.o
CC mm/mmu_gather.o
CC kernel/trace/trace_kprobe.o
CC drivers/char/random.o
AR drivers/gpu/drm/bridge/analogix/built-in.a
AR drivers/gpu/drm/bridge/cadence/built-in.a
AR drivers/gpu/drm/hisilicon/built-in.a
AR drivers/gpu/drm/bridge/imx/built-in.a
CC drivers/dma-buf/dma-fence-chain.o
CC net/core/fib_notifier.o
CC [M] arch/x86/kvm/vmx/pmu_intel.o
AR drivers/gpu/drm/bridge/synopsys/built-in.a
AR drivers/gpu/drm/bridge/built-in.a
AR drivers/gpu/drm/mxsfb/built-in.a
AR drivers/gpu/drm/tiny/built-in.a
AR drivers/gpu/drm/xlnx/built-in.a
CC [M] sound/hda/hdmi_chmap.o
AR drivers/gpu/drm/gud/built-in.a
AR drivers/gpu/drm/solomon/built-in.a
CC drivers/char/tpm/eventlog/efi.o
CC drivers/spi/spi.o
CC [M] drivers/gpu/drm/ttm/ttm_tt.o
CC lib/memcat_p.o
CC fs/ntfs/runlist.o
CC [M] sound/hda/trace.o
CC fs/nfs/sysfs.o
CC drivers/acpi/acpica/hwsleep.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
CC drivers/base/driver.o
CC drivers/net/phy/mdio-boardinfo.o
CC drivers/tty/serial/8250/8250_dw.o
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
CC net/sunrpc/svcauth_unix.o
CC drivers/scsi/scsi_ioctl.o
CC fs/ext4/migrate.o
CC drivers/ata/libata-scsi.o
CC net/sunrpc/addr.o
CC fs/ext4/mmp.o
CC drivers/dma-buf/dma-fence-unwrap.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o
CC drivers/dma-buf/dma-resv.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_device.o
CC drivers/acpi/acpica/hwvalid.o
CC arch/x86/kernel/pci-dma.o
CC crypto/xor.o
CC drivers/char/tpm/tpm_crb.o
CC drivers/base/class.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.o
CC drivers/scsi/scsicam.o
AR drivers/firewire/built-in.a
AR drivers/cdrom/built-in.a
CC [M] net/netfilter/xt_MASQUERADE.o
AR drivers/auxdisplay/built-in.a
CC drivers/usb/common/common.o
CC drivers/usb/core/usb.o
CC net/core/xdp.o
CC drivers/net/phy/mdio_devres.o
CC [M] drivers/gpu/drm/ttm/ttm_bo.o
CC drivers/usb/core/hub.o
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
CC [M] sound/hda/hdac_component.o
CC net/bridge/br_vlan_options.o
CC drivers/acpi/acpica/hwxface.o
CC [M] net/bluetooth/iso.o
CC drivers/usb/common/debug.o
CC fs/ntfs/super.o
CC drivers/tty/serial/8250/8250_lpss.o
CC drivers/tty/serial/8250/8250_mid.o
CC crypto/hash_info.o
AR drivers/usb/phy/built-in.a
CC fs/nfs/fs_context.o
CC drivers/usb/host/pci-quirks.o
CC crypto/simd.o
CC net/ipv6/sysctl_net_ipv6.o
CC drivers/usb/host/ehci-hcd.o
CC arch/x86/kernel/quirks.o
CC drivers/char/misc.o
AR drivers/net/pse-pd/built-in.a
CC drivers/tty/serial/8250/8250_pericom.o
CC [M] drivers/gpu/drm/ttm/ttm_bo_util.o
CC drivers/usb/storage/scsiglue.o
CC drivers/scsi/scsi_error.o
CC [M] drivers/misc/mei/gsc-me.o
CC drivers/usb/storage/protocol.o
CC drivers/base/platform.o
CC drivers/acpi/acpica/hwxfsleep.o
AR drivers/char/tpm/built-in.a
CC drivers/char/virtio_console.o
CC drivers/usb/core/hcd.o
AR drivers/usb/common/built-in.a
CC drivers/net/phy/phy.o
CC [M] drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_kms.o
CC drivers/dma-buf/sync_file.o
CC [M] sound/hda/hdac_i915.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
CC [M] net/netfilter/xt_addrtype.o
CC kernel/trace/error_report-traces.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.o
CC [M] crypto/md4.o
CC drivers/usb/serial/usb-serial.o
CC drivers/usb/core/urb.o
CC net/ipv4/arp.o
CC kernel/trace/power-traces.o
CC net/ipv4/icmp.o
CC fs/ntfs/sysctl.o
CC drivers/acpi/acpica/hwpci.o
CC [M] drivers/gpu/drm/ttm/ttm_bo_vm.o
CC drivers/acpi/acpica/nsaccess.o
AR drivers/tty/serial/8250/built-in.a
AR drivers/tty/serial/built-in.a
CC drivers/tty/tty_ldisc.o
LD [M] drivers/gpu/drm/amd/amdxcp/amdxcp.o
CC arch/x86/kernel/topology.o
AR drivers/usb/misc/built-in.a
CC drivers/usb/host/ehci-pci.o
LD [M] drivers/misc/mei/mei.o
CC mm/mprotect.o
LD [M] drivers/misc/mei/mei-me.o
CC [M] drivers/gpu/drm/i915/i915_driver.o
CC drivers/usb/storage/transport.o
LD [M] drivers/misc/mei/mei-gsc.o
CC [M] drivers/gpu/drm/i915/i915_drm_client.o
CC net/ipv6/xfrm6_policy.o
CC drivers/usb/gadget/udc/core.o
AR drivers/usb/gadget/function/built-in.a
CC [M] drivers/gpu/drm/ttm/ttm_module.o
CC drivers/dma-buf/sw_sync.o
CC net/sunrpc/rpcb_clnt.o
CC [M] sound/hda/intel-dsp-config.o
CC [M] crypto/ccm.o
CC net/bridge/br_mst.o
CC fs/ntfs/unistr.o
CC drivers/acpi/acpica/nsalloc.o
CC net/core/flow_offload.o
CC [M] drivers/gpu/drm/i915/i915_config.o
CC arch/x86/kernel/kdebugfs.o
CC drivers/acpi/acpica/nsarguments.o
CC drivers/base/cpu.o
CC [M] drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC drivers/ata/libata-eh.o
CC [M] drivers/gpu/drm/ttm/ttm_range_manager.o
CC kernel/trace/rpm-traces.o
CC drivers/tty/tty_buffer.o
CC net/core/gro.o
CC [M] net/netfilter/xt_conntrack.o
CC drivers/base/firmware.o
CC drivers/dma-buf/sync_debug.o
AR drivers/usb/gadget/legacy/built-in.a
CC [M] drivers/gpu/drm/ttm/ttm_resource.o
CC drivers/acpi/acpica/nsconvert.o
CC [M] net/netfilter/xt_ipvs.o
CC drivers/scsi/scsi_lib.o
CC drivers/char/hpet.o
CC drivers/nvme/host/ioctl.o
CC [M] sound/hda/intel-nhlt.o
AR drivers/spi/built-in.a
CC net/core/netdev-genl.o
CC [M] net/bluetooth/a2mp.o
CC arch/x86/kernel/alternative.o
CC fs/nfs/sysctl.o
CC fs/ext4/move_extent.o
CC fs/ntfs/upcase.o
CC drivers/base/init.o
CC drivers/net/phy/phy-c45.o
CC drivers/usb/storage/usb.o
CC [M] drivers/dma-buf/selftest.o
CC drivers/usb/serial/generic.o
CC drivers/usb/core/message.o
CC drivers/char/nvram.o
CC drivers/input/serio/serio.o
CC net/ipv6/xfrm6_state.o
CC drivers/input/serio/i8042.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_crtc.o
CC [M] crypto/arc4.o
CC fs/ext4/namei.o
CC drivers/acpi/acpica/nsdump.o
CC [M] drivers/dma-buf/st-dma-fence.o
CC kernel/trace/trace_dynevent.o
CC drivers/base/map.o
CC drivers/tty/tty_port.o
CC mm/mremap.o
CC net/sunrpc/timer.o
CC drivers/usb/storage/initializers.o
CC drivers/usb/storage/sierra_ms.o
CC drivers/usb/gadget/udc/trace.o
CC [M] sound/hda/intel-sdw-acpi.o
CC [M] net/bridge/br_netfilter_hooks.o
CC [M] drivers/gpu/drm/ttm/ttm_pool.o
AR fs/ntfs/built-in.a
CC drivers/usb/gadget/usbstring.o
CC drivers/base/devres.o
CC net/ipv4/devinet.o
CC [M] crypto/ecc.o
CC drivers/usb/host/ohci-hcd.o
CC drivers/acpi/acpica/nseval.o
CC [M] drivers/gpu/drm/i915/i915_getparam.o
CC [M] drivers/gpu/drm/i915/i915_ioctl.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.o
AR drivers/char/built-in.a
LD [M] sound/hda/snd-hda-core.o
CC [M] drivers/gpu/drm/amd/amdgpu/atom.o
CC drivers/base/attribute_container.o
CC drivers/input/serio/libps2.o
CC mm/msync.o
CC fs/nfs/nfs2super.o
CC net/ipv6/xfrm6_input.o
CC drivers/input/keyboard/atkbd.o
CC drivers/usb/serial/bus.o
LD [M] net/netfilter/nf_conntrack.o
CC fs/nfs/proc.o
CC drivers/nvme/host/sysfs.o
LD [M] net/netfilter/nf_nat.o
CC drivers/usb/core/driver.o
AR net/netfilter/built-in.a
CC [M] drivers/dma-buf/st-dma-fence-chain.o
LD [M] sound/hda/snd-intel-dspcfg.o
CC fs/nfs/nfs2xdr.o
CC mm/page_vma_mapped.o
LD [M] sound/hda/snd-intel-sdw-acpi.o
AR sound/built-in.a
CC drivers/nvme/host/pr.o
CC fs/ext4/page-io.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fence.o
CC kernel/trace/trace_probe.o
CC drivers/acpi/acpica/nsinit.o
CC drivers/usb/storage/option_ms.o
CC [M] crypto/essiv.o
CC [M] drivers/dma-buf/st-dma-fence-unwrap.o
CC drivers/tty/tty_mutex.o
CC drivers/net/phy/phy-core.o
CC net/core/netdev-genl-gen.o
CC [M] net/bluetooth/amp.o
CC arch/x86/kernel/i8253.o
CC net/sunrpc/xdr.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.o
CC net/ipv6/xfrm6_output.o
CC [M] drivers/gpu/drm/ttm/ttm_device.o
CC drivers/base/transport_class.o
CC [M] crypto/ecdh.o
CC [M] drivers/gpu/drm/i915/i915_irq.o
CC drivers/usb/serial/console.o
CC drivers/tty/tty_ldsem.o
AR drivers/usb/gadget/udc/built-in.a
CC drivers/usb/gadget/config.o
AR drivers/input/serio/built-in.a
CC arch/x86/kernel/hw_breakpoint.o
CC [M] arch/x86/kvm/vmx/vmcs12.o
CC drivers/acpi/acpica/nsload.o
CC [M] drivers/gpu/drm/ttm/ttm_sys_manager.o
CC net/ipv6/xfrm6_protocol.o
CC drivers/scsi/scsi_lib_dma.o
CC drivers/usb/storage/usual-tables.o
CC net/sunrpc/sunrpc_syms.o
CC drivers/acpi/acpica/nsnames.o
CC net/ipv6/netfilter.o
CC drivers/rtc/lib.o
CC lib/nmi_backtrace.o
CC drivers/base/topology.o
CC drivers/nvme/host/trace.o
CC mm/pagewalk.o
CC net/core/gso.o
CC drivers/base/container.o
CC [M] drivers/gpu/drm/xe/tests/xe_bo_test.o
CC [M] drivers/dma-buf/st-dma-resv.o
CC drivers/tty/tty_baudrate.o
CC [M] drivers/gpu/drm/xe/tests/xe_dma_buf_test.o
AR drivers/input/keyboard/built-in.a
AR drivers/input/mouse/built-in.a
CC drivers/input/input.o
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC net/ipv6/fib6_rules.o
CC lib/plist.o
CC drivers/usb/core/config.o
CC net/ipv6/proc.o
CC drivers/acpi/acpica/nsobject.o
CC [M] drivers/gpu/drm/ttm/ttm_agp_backend.o
CC drivers/nvme/host/fault_inject.o
CC [M] net/bridge/br_netfilter_ipv6.o
AR drivers/usb/storage/built-in.a
CC drivers/net/phy/phy_device.o
CC drivers/rtc/class.o
CC drivers/usb/serial/ftdi_sio.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC drivers/scsi/scsi_scan.o
CC fs/nfs/nfs3super.o
CC drivers/usb/gadget/epautoconf.o
CC drivers/base/property.o
CC net/sunrpc/cache.o
CC arch/x86/kernel/tsc.o
CC [M] arch/x86/kvm/vmx/hyperv.o
CC [M] crypto/ecdh_helper.o
CC [M] drivers/usb/class/usbtmc.o
CC drivers/ata/libata-transport.o
CC [M] arch/x86/kvm/vmx/nested.o
CC [M] drivers/gpu/drm/xe/tests/xe_migrate_test.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_object.o
AR drivers/dma-buf/built-in.a
LD [M] drivers/dma-buf/dmabuf_selftests.o
CC lib/radix-tree.o
CC mm/pgtable-generic.o
CC net/ipv4/af_inet.o
CC drivers/net/phy/linkmode.o
CC [M] net/bluetooth/hci_debugfs.o
CC drivers/tty/tty_jobctrl.o
CC kernel/trace/trace_uprobe.o
CC drivers/acpi/acpica/nsparse.o
CC drivers/acpi/blacklist.o
CC [M] drivers/gpu/drm/xe/tests/xe_pci_test.o
CC arch/x86/kernel/tsc_msr.o
CC [M] arch/x86/kvm/vmx/posted_intr.o
LD [M] crypto/ecdh_generic.o
CC mm/rmap.o
LD [M] drivers/gpu/drm/ttm/ttm.o
AR crypto/built-in.a
CC [M] drivers/gpu/drm/xe/tests/xe_rtp_test.o
CC net/ipv6/syncookies.o
CC drivers/base/cacheinfo.o
CC drivers/usb/core/file.o
CC lib/ratelimit.o
CC kernel/workqueue.o
CC drivers/usb/gadget/composite.o
CC drivers/nvme/host/pci.o
CC drivers/rtc/interface.o
CC fs/ext4/readpage.o
AR net/bridge/built-in.a
CC net/sunrpc/rpc_pipe.o
CC drivers/usb/host/ohci-pci.o
CC net/core/net-sysfs.o
CC drivers/acpi/acpica/nspredef.o
CC drivers/acpi/osi.o
CC [M] drivers/gpu/drm/i915/i915_mitigations.o
CC fs/ext4/resize.o
CC [M] drivers/gpu/drm/i915/i915_module.o
CC kernel/pid.o
CC fs/nfs/nfs3client.o
CC drivers/usb/core/buffer.o
CC drivers/usb/host/uhci-hcd.o
CC lib/rbtree.o
CC lib/seq_buf.o
CC lib/siphash.o
CC drivers/tty/n_null.o
CC drivers/ata/libata-trace.o
CC arch/x86/kernel/io_delay.o
CC kernel/task_work.o
AR drivers/i2c/algos/built-in.a
CC kernel/extable.o
CC [M] drivers/i2c/algos/i2c-algo-bit.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gart.o
CC kernel/params.o
CC drivers/acpi/acpica/nsprepkg.o
CC drivers/acpi/osl.o
GEN drivers/scsi/scsi_devinfo_tbl.c
CC drivers/scsi/scsi_devinfo.o
LD [M] net/bridge/br_netfilter.o
CC drivers/usb/serial/pl2303.o
CC net/core/page_pool.o
CC [M] drivers/gpu/drm/xe/tests/xe_wa_test.o
CC drivers/base/swnode.o
CC [M] drivers/gpu/drm/vgem/vgem_drv.o
CC drivers/input/input-compat.o
CC drivers/acpi/acpica/nsrepair.o
CC [M] drivers/gpu/drm/nouveau/nvif/object.o
CC [M] drivers/gpu/drm/vgem/vgem_fence.o
CC arch/x86/kernel/rtc.o
CC [M] drivers/gpu/drm/nouveau/nvif/client.o
CC net/core/net-procfs.o
LD [M] arch/x86/kvm/kvm.o
CC lib/string.o
CC drivers/tty/pty.o
CC drivers/usb/core/sysfs.o
CC drivers/usb/core/endpoint.o
CC drivers/base/auxiliary.o
CC net/ipv6/mip6.o
CC [M] drivers/gpu/drm/i915/i915_params.o
CC arch/x86/kernel/resource.o
AS arch/x86/kernel/irqflags.o
LD [M] net/bluetooth/bluetooth.o
CC fs/nfs/nfs3proc.o
CC fs/nfs/nfs3xdr.o
UPD arch/x86/kvm/kvm-asm-offsets.h
CC drivers/tty/sysrq.o
CC drivers/acpi/acpica/nsrepair2.o
CC drivers/net/phy/mdio_bus.o
CC drivers/input/input-mt.o
CC lib/timerqueue.o
CC drivers/ata/libata-sata.o
CC drivers/acpi/utils.o
CC drivers/scsi/scsi_sysctl.o
CC fs/ext4/super.o
CC drivers/i2c/busses/i2c-designware-common.o
AR drivers/i2c/muxes/built-in.a
CC [M] drivers/i2c/muxes/i2c-mux-gpio.o
CC drivers/rtc/nvmem.o
LD [M] drivers/gpu/drm/vgem/vgem.o
CC kernel/trace/rethook.o
CC drivers/i2c/busses/i2c-designware-master.o
CC [M] drivers/gpu/drm/ast/ast_drv.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC fs/ext4/symlink.o
CC drivers/i2c/i2c-boardinfo.o
CC arch/x86/kernel/static_call.o
CC lib/vsprintf.o
CC [M] drivers/gpu/drm/ast/ast_i2c.o
CC drivers/i2c/i2c-core-base.o
CC drivers/base/devtmpfs.o
AR drivers/usb/serial/built-in.a
CC kernel/kthread.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.o
CC lib/win_minmax.o
CC fs/ext4/sysfs.o
CC net/ipv4/igmp.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC [M] drivers/gpu/drm/nouveau/nvif/conn.o
CC drivers/net/phy/mdio_device.o
CC drivers/acpi/acpica/nssearch.o
CC drivers/usb/host/xhci.o
CC net/core/netpoll.o
CC drivers/scsi/scsi_debugfs.o
CC fs/ext4/xattr.o
CC net/sunrpc/sysfs.o
CC net/ipv4/fib_frontend.o
CC drivers/usb/gadget/functions.o
CC drivers/scsi/scsi_trace.o
CC arch/x86/kernel/process.o
CC drivers/usb/core/devio.o
CC drivers/rtc/dev.o
CC drivers/input/input-poller.o
CC drivers/input/ff-core.o
CC kernel/sys_ni.o
CC [M] drivers/gpu/drm/i915/i915_pci.o
CC mm/vmalloc.o
CC net/ipv6/addrconf_core.o
CC drivers/i2c/i2c-core-smbus.o
AR kernel/trace/built-in.a
CC kernel/nsproxy.o
AR drivers/i3c/built-in.a
AR drivers/tty/built-in.a
CC drivers/acpi/acpica/nsutils.o
CC drivers/input/touchscreen.o
AR drivers/media/i2c/built-in.a
AR drivers/media/tuners/built-in.a
CC drivers/input/ff-memless.o
CC drivers/input/vivaldi-fmap.o
AR drivers/media/rc/keymaps/built-in.a
AR drivers/media/rc/built-in.a
AR drivers/media/common/b2c2/built-in.a
AR drivers/media/common/saa7146/built-in.a
AR drivers/media/common/siano/built-in.a
AR drivers/nvme/host/built-in.a
AR drivers/media/platform/allegro-dvt/built-in.a
AR drivers/media/common/v4l2-tpg/built-in.a
AR drivers/nvme/built-in.a
CC [M] drivers/gpu/drm/ast/ast_main.o
AR drivers/media/common/videobuf2/built-in.a
CC net/core/fib_rules.o
CC net/ipv6/exthdrs_core.o
CC [M] drivers/gpu/drm/ast/ast_mm.o
AR drivers/media/common/built-in.a
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
AR drivers/media/platform/amlogic/built-in.a
CC [M] drivers/gpu/drm/ast/ast_mode.o
CC drivers/base/node.o
AR drivers/media/platform/amphion/built-in.a
AR drivers/media/platform/aspeed/built-in.a
AR drivers/media/platform/atmel/built-in.a
CC drivers/base/memory.o
AR drivers/media/platform/cadence/built-in.a
AR drivers/media/platform/chips-media/built-in.a
AR drivers/media/pci/ttpci/built-in.a
AR drivers/media/platform/intel/built-in.a
AR drivers/media/pci/b2c2/built-in.a
AR drivers/media/platform/marvell/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvif/device.o
AR drivers/media/pci/pluto2/built-in.a
AR drivers/media/platform/mediatek/jpeg/built-in.a
AR drivers/media/pci/dm1105/built-in.a
AR drivers/media/platform/mediatek/mdp/built-in.a
AR drivers/media/platform/microchip/built-in.a
CC drivers/ata/libata-sff.o
AR drivers/media/pci/pt1/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
AR drivers/media/platform/mediatek/vpu/built-in.a
AR drivers/media/platform/mediatek/mdp3/built-in.a
AR drivers/media/platform/mediatek/built-in.a
AR drivers/media/pci/pt3/built-in.a
AR drivers/media/pci/mantis/built-in.a
CC drivers/acpi/acpica/nswalk.o
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/platform/nvidia/built-in.a
CC drivers/acpi/acpica/nsxfeval.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
AR drivers/media/pci/ddbridge/built-in.a
AR drivers/media/platform/nxp/dw100/built-in.a
CC drivers/usb/gadget/configfs.o
AR drivers/media/pci/saa7146/built-in.a
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
AR drivers/media/pci/smipcie/built-in.a
AR drivers/media/platform/nxp/imx8-isi/built-in.a
CC net/sunrpc/svc_xprt.o
AR drivers/media/pci/netup_unidvb/built-in.a
AR drivers/media/platform/nxp/built-in.a
CC drivers/i2c/busses/i2c-designware-platdrv.o
AR drivers/media/pci/intel/ipu3/built-in.a
AR drivers/media/pci/intel/built-in.a
AR drivers/media/platform/qcom/camss/built-in.a
AR drivers/media/pci/built-in.a
AR drivers/media/platform/renesas/rcar-vin/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_display.o
AR drivers/media/platform/qcom/venus/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.o
AR drivers/media/platform/qcom/built-in.a
CC drivers/net/phy/swphy.o
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gem.o
AR drivers/media/platform/renesas/vsp1/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ring.o
AR drivers/media/platform/renesas/built-in.a
CC drivers/rtc/proc.o
AR drivers/media/platform/rockchip/rga/built-in.a
CC drivers/ata/libata-pmp.o
CC drivers/scsi/scsi_logging.o
AR drivers/media/platform/rockchip/rkisp1/built-in.a
AR drivers/media/platform/rockchip/built-in.a
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
AR drivers/media/platform/samsung/exynos4-is/built-in.a
AR drivers/media/platform/samsung/s3c-camif/built-in.a
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvif/disp.o
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
CC drivers/usb/host/xhci-mem.o
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
AR drivers/media/platform/samsung/built-in.a
AR drivers/media/platform/st/sti/bdisp/built-in.a
CC drivers/net/phy/fixed_phy.o
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
AR drivers/media/platform/st/sti/delta/built-in.a
AR drivers/media/platform/st/sti/hva/built-in.a
AR drivers/media/platform/st/stm32/built-in.a
AR drivers/media/platform/st/built-in.a
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
AR drivers/media/platform/sunxi/built-in.a
CC drivers/acpi/acpica/nsxfname.o
AR drivers/media/platform/ti/am437x/built-in.a
AR drivers/media/platform/ti/cal/built-in.a
AR drivers/media/platform/verisilicon/built-in.a
CC drivers/i2c/i2c-core-acpi.o
AR drivers/media/platform/ti/vpe/built-in.a
AR drivers/media/platform/ti/davinci/built-in.a
CC drivers/input/input-leds.o
AR drivers/media/platform/ti/omap/built-in.a
AR drivers/media/platform/via/built-in.a
CC drivers/input/mousedev.o
AR drivers/media/platform/ti/omap3isp/built-in.a
AR drivers/media/platform/xilinx/built-in.a
AR fs/nfs/built-in.a
AR drivers/media/platform/ti/built-in.a
CC drivers/acpi/acpica/nsxfobj.o
CC net/sunrpc/xprtmultipath.o
AR drivers/media/platform/built-in.a
CC drivers/i2c/busses/i2c-designware-baytrail.o
AR drivers/media/usb/b2c2/built-in.a
CC [M] drivers/gpu/drm/i915/i915_scatterlist.o
AS [M] arch/x86/kvm/vmx/vmenter.o
AR drivers/media/usb/dvb-usb/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
AR drivers/media/usb/s2255/built-in.a
CC mm/page_alloc.o
CC drivers/rtc/sysfs.o
AR drivers/media/usb/siano/built-in.a
CC net/sunrpc/stats.o
AR drivers/media/usb/ttusb-budget/built-in.a
AR drivers/media/usb/ttusb-dec/built-in.a
AR drivers/media/usb/built-in.a
CC drivers/usb/host/xhci-ext-caps.o
CC drivers/net/mdio/acpi_mdio.o
CC drivers/base/module.o
AR drivers/media/mmc/siano/built-in.a
CC arch/x86/kernel/ptrace.o
AR drivers/media/mmc/built-in.a
CC arch/x86/kernel/tls.o
CC [M] drivers/i2c/busses/i2c-scmi.o
AR drivers/media/firewire/built-in.a
CC kernel/notifier.o
AR drivers/media/spi/built-in.a
CC net/ipv6/ip6_checksum.o
AR drivers/media/test-drivers/built-in.a
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
AR drivers/media/built-in.a
CC drivers/net/mdio/fwnode_mdio.o
CC kernel/ksysfs.o
CC net/ipv6/ip6_icmp.o
CC fs/debugfs/inode.o
CC drivers/i2c/i2c-core-slave.o
CC fs/tracefs/inode.o
CC drivers/acpi/acpica/psargs.o
CC drivers/scsi/scsi_pm.o
CC [M] drivers/gpu/drm/nouveau/nvif/driver.o
CC [M] drivers/gpu/drm/nouveau/nvif/event.o
CC [M] drivers/gpu/drm/ast/ast_post.o
CC drivers/usb/gadget/u_f.o
CC drivers/base/pinctrl.o
CC drivers/ata/libata-acpi.o
CC [M] drivers/net/phy/phylink.o
CC drivers/rtc/rtc-mc146818-lib.o
CC [M] drivers/i2c/busses/i2c-ccgx-ucsi.o
CC net/ipv4/fib_semantics.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_cs.o
CC [M] drivers/gpu/drm/ast/ast_dp501.o
CC lib/xarray.o
CC drivers/base/devcoredump.o
CC net/ipv4/fib_trie.o
CC drivers/input/evdev.o
CC drivers/usb/host/xhci-ring.o
CC fs/debugfs/file.o
CC net/ipv6/output_core.o
CC drivers/i2c/i2c-dev.o
CC net/core/net-traces.o
CC drivers/usb/core/notify.o
CC fs/btrfs/super.o
CC drivers/acpi/acpica/psloop.o
CC net/ipv4/fib_notifier.o
CC drivers/usb/host/xhci-hub.o
CC [M] drivers/gpu/drm/i915/i915_suspend.o
CC drivers/base/platform-msi.o
AR drivers/net/mdio/built-in.a
CC [M] drivers/gpu/drm/xe/xe_device.o
AR drivers/net/pcs/built-in.a
AR drivers/usb/gadget/built-in.a
AR drivers/net/ethernet/adi/built-in.a
CC drivers/usb/core/generic.o
AR drivers/net/ethernet/alacritech/built-in.a
AR drivers/net/ethernet/amazon/built-in.a
CC drivers/scsi/scsi_bsg.o
AR drivers/net/ethernet/aquantia/built-in.a
CC drivers/scsi/scsi_common.o
AR drivers/net/ethernet/asix/built-in.a
AR drivers/net/usb/built-in.a
AR fs/tracefs/built-in.a
CC [M] drivers/net/usb/pegasus.o
CC kernel/cred.o
AR drivers/net/ethernet/cadence/built-in.a
CC [M] drivers/net/usb/rtl8150.o
AR drivers/net/ethernet/broadcom/built-in.a
CC [M] drivers/net/ethernet/broadcom/b44.o
CC net/core/selftests.o
CC arch/x86/kernel/step.o
CC [M] drivers/net/ethernet/broadcom/bnx2.o
CC [M] drivers/net/usb/r8152.o
CC [M] drivers/net/ethernet/broadcom/cnic.o
CC [M] drivers/gpu/drm/nouveau/nvif/fifo.o
CC drivers/usb/host/xhci-dbg.o
CC drivers/rtc/rtc-cmos.o
LD [M] arch/x86/kvm/kvm-intel.o
CC [M] drivers/i2c/busses/i2c-i801.o
CC drivers/ata/libata-pata-timings.o
CC [M] drivers/net/usb/asix_devices.o
CC net/ipv6/protocol.o
CC [M] drivers/i2c/busses/i2c-isch.o
CC drivers/acpi/acpica/psobject.o
CC drivers/base/physical_location.o
CC drivers/scsi/sd.o
CC drivers/usb/host/xhci-trace.o
CC fs/pstore/inode.o
CC net/sunrpc/sysctl.o
CC drivers/usb/host/xhci-debugfs.o
CC drivers/usb/core/quirks.o
CC net/ipv4/inet_fragment.o
CC drivers/usb/host/xhci-pci.o
CC [M] drivers/gpu/drm/nouveau/nvif/head.o
AR fs/debugfs/built-in.a
CC net/core/ptp_classifier.o
CC [M] drivers/gpu/drm/ast/ast_dp.o
CC drivers/acpi/reboot.o
CC fs/pstore/platform.o
CC arch/x86/kernel/i8237.o
CC drivers/usb/core/devices.o
AR drivers/input/built-in.a
AR drivers/net/ethernet/cavium/common/built-in.a
AR drivers/net/ethernet/cortina/built-in.a
CC net/ipv6/ip6_offload.o
AR drivers/net/ethernet/cavium/thunder/built-in.a
AR drivers/net/ethernet/cavium/liquidio/built-in.a
AR drivers/net/ethernet/cavium/octeon/built-in.a
AR drivers/net/ethernet/cavium/built-in.a
CC kernel/reboot.o
CC drivers/acpi/acpica/psopcode.o
CC drivers/base/trace.o
CC [M] drivers/gpu/drm/i915/i915_switcheroo.o
CC kernel/async.o
CC arch/x86/kernel/stacktrace.o
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC drivers/ata/ahci.o
CC [M] drivers/i2c/busses/i2c-ismt.o
CC drivers/usb/core/phy.o
AR drivers/ptp/built-in.a
CC [M] drivers/ptp/ptp_clock.o
AR drivers/rtc/built-in.a
CC [M] drivers/ptp/ptp_chardev.o
CC lib/lockref.o
CC [M] drivers/ptp/ptp_sysfs.o
AR drivers/power/reset/built-in.a
AR net/sunrpc/built-in.a
CC drivers/power/supply/power_supply_core.o
CC drivers/hwmon/hwmon.o
AR drivers/thermal/broadcom/built-in.a
CC fs/pstore/pmsg.o
AR drivers/thermal/samsung/built-in.a
CC drivers/thermal/intel/intel_tcc.o
AR drivers/thermal/st/built-in.a
CC drivers/power/supply/power_supply_sysfs.o
CC drivers/acpi/acpica/psopinfo.o
CC [M] drivers/ptp/ptp_vclock.o
CC [M] drivers/net/usb/asix_common.o
CC drivers/acpi/nvs.o
CC lib/bcd.o
CC [M] drivers/gpu/drm/nouveau/nvif/mem.o
CC lib/sort.o
CC drivers/thermal/intel/therm_throt.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_bios.o
CC drivers/ata/libahci.o
CC lib/parser.o
CC net/core/netprio_cgroup.o
CC drivers/acpi/wakeup.o
LD [M] drivers/gpu/drm/ast/ast.o
CC [M] drivers/net/usb/ax88172a.o
CC [M] drivers/net/usb/ax88179_178a.o
CC arch/x86/kernel/reboot.o
AR drivers/base/built-in.a
CC drivers/watchdog/watchdog_core.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC drivers/watchdog/watchdog_dev.o
CC [M] drivers/net/usb/cdc_ether.o
CC [M] drivers/net/phy/aquantia_main.o
CC [M] drivers/hwmon/acpi_power_meter.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
AR fs/pstore/built-in.a
CC drivers/acpi/acpica/psparse.o
CC [M] drivers/gpu/drm/drm_aperture.o
CC kernel/range.o
CC drivers/usb/core/port.o
CC drivers/power/supply/power_supply_leds.o
CC [M] drivers/hwmon/coretemp.o
CC lib/debug_locks.o
CC kernel/smpboot.o
CC [M] drivers/gpu/drm/i915/i915_sysfs.o
CC [M] drivers/net/phy/aquantia_hwmon.o
CC arch/x86/kernel/msr.o
CC lib/random32.o
CC lib/bust_spinlocks.o
CC [M] drivers/gpu/drm/i915/i915_utils.o
CC [M] drivers/ptp/ptp_kvm_x86.o
CC [M] drivers/net/phy/ax88796b.o
CC [M] drivers/i2c/busses/i2c-piix4.o
CC fs/efivarfs/inode.o
CC [M] fs/netfs/buffered_read.o
CC net/core/dst_cache.o
CC drivers/scsi/sg.o
CC net/ipv6/tcpv6_offload.o
CC [M] drivers/gpu/drm/nouveau/nvif/mmu.o
CC net/ipv4/ping.o
CC [M] fs/netfs/io.o
CC drivers/acpi/acpica/psscope.o
AR drivers/hwmon/built-in.a
CC drivers/acpi/acpica/pstree.o
CC drivers/power/supply/power_supply_hwmon.o
CC [M] drivers/gpu/drm/i915/intel_clock_gating.o
AR drivers/thermal/intel/built-in.a
AR drivers/thermal/qcom/built-in.a
CC lib/kasprintf.o
AR drivers/thermal/tegra/built-in.a
AR drivers/thermal/mediatek/built-in.a
CC drivers/thermal/thermal_core.o
CC [M] drivers/net/usb/cdc_eem.o
CC [M] drivers/gpu/drm/drm_atomic.o
CC lib/bitmap.o
CC drivers/acpi/acpica/psutils.o
CC [M] drivers/gpu/drm/drm_atomic_uapi.o
CC kernel/ucount.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.o
CC net/ipv4/ip_tunnel_core.o
CC drivers/scsi/scsi_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC drivers/watchdog/softdog.o
CC [M] drivers/net/usb/smsc75xx.o
CC [M] drivers/ptp/ptp_kvm_common.o
CC net/ipv6/exthdrs_offload.o
CC arch/x86/kernel/cpuid.o
CC fs/efivarfs/file.o
CC drivers/usb/core/hcd-pci.o
LD [M] drivers/ptp/ptp.o
CC net/ipv4/gre_offload.o
CC net/ipv4/metrics.o
CC [M] drivers/net/usb/smsc95xx.o
CC [M] drivers/net/phy/bcm7xxx.o
CC [M] drivers/net/usb/mcs7830.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC drivers/usb/core/usb-acpi.o
CC [M] drivers/net/phy/bcm87xx.o
AR drivers/usb/host/built-in.a
CC lib/scatterlist.o
CC fs/ext4/xattr_hurd.o
CC drivers/acpi/acpica/pswalk.o
AR drivers/power/supply/built-in.a
AR drivers/power/built-in.a
CC fs/efivarfs/super.o
CC [M] drivers/md/persistent-data/dm-array.o
CC drivers/md/md.o
AR drivers/watchdog/built-in.a
CC [M] drivers/net/usb/usbnet.o
CC [M] drivers/gpu/drm/nouveau/nvif/outp.o
CC mm/init-mm.o
CC drivers/thermal/thermal_sysfs.o
CC kernel/regset.o
CC lib/list_sort.o
CC [M] drivers/i2c/busses/i2c-designware-pcidrv.o
CC arch/x86/kernel/early-quirks.o
CC fs/efivarfs/vars.o
CC lib/uuid.o
CC drivers/ata/ata_piix.o
LD [M] drivers/ptp/ptp_kvm.o
CC drivers/acpi/acpica/psxface.o
CC net/ipv6/inet6_hashtables.o
CC [M] fs/netfs/iterator.o
CC fs/ext4/xattr_trusted.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_dp.o
CC lib/iov_iter.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.o
CC [M] drivers/i2c/i2c-smbus.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.o
AR drivers/usb/core/built-in.a
AR drivers/usb/built-in.a
CC kernel/ksyms_common.o
CC [M] drivers/net/usb/cdc_ncm.o
CC [M] drivers/net/phy/bcm-phy-lib.o
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
CC [M] fs/netfs/main.o
CC kernel/groups.o
CC mm/memblock.o
CC [M] drivers/gpu/drm/nouveau/nvif/timer.o
AR drivers/net/ethernet/engleder/built-in.a
AR drivers/net/ethernet/ezchip/built-in.a
AR drivers/net/ethernet/fungible/built-in.a
AR drivers/net/ethernet/huawei/built-in.a
AR drivers/net/ethernet/i825xx/built-in.a
CC [M] drivers/net/ethernet/intel/e1000/e1000_main.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_hw.o
CC [M] drivers/net/ethernet/intel/e1000e/82571.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC drivers/acpi/acpica/rsaddr.o
CC [M] drivers/net/ethernet/intel/e1000e/ich8lan.o
CC net/ipv6/mcast_snoop.o
CC [M] drivers/md/persistent-data/dm-bitset.o
CC drivers/thermal/thermal_trip.o
CC drivers/acpi/acpica/rscalc.o
CC [M] drivers/gpu/drm/drm_auth.o
CC [M] drivers/net/ethernet/intel/igb/igb_main.o
CC lib/clz_ctz.o
CC drivers/thermal/thermal_helpers.o
CC net/ipv4/netlink.o
CC [M] net/ipv6/ip6_udp_tunnel.o
CC [M] drivers/net/ethernet/intel/e1000e/80003es2lan.o
CC [M] drivers/gpu/drm/drm_blend.o
CC [M] drivers/gpu/drm/i915/intel_device_info.o
LD [M] drivers/i2c/busses/i2c-designware-pci.o
AR fs/efivarfs/built-in.a
AR drivers/scsi/built-in.a
CC lib/bsearch.o
AR drivers/i2c/busses/built-in.a
CC lib/find_bit.o
CC [M] drivers/i2c/i2c-mux.o
CC [M] fs/fscache/cache.o
CC arch/x86/kernel/smp.o
CC [M] fs/fscache/cookie.o
CC net/core/gro_cells.o
CC drivers/acpi/acpica/rscreate.o
AR drivers/i2c/built-in.a
CC drivers/acpi/acpica/rsdumpinfo.o
CC kernel/vhost_task.o
CC [M] drivers/gpu/drm/i915/intel_memory_region.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC [M] drivers/net/ethernet/intel/igb/igb_ethtool.o
AR drivers/ata/built-in.a
CC drivers/acpi/acpica/rsinfo.o
CC lib/llist.o
CC drivers/acpi/acpica/rsio.o
CC drivers/thermal/thermal_hwmon.o
CC [M] drivers/md/persistent-data/dm-block-manager.o
CC [M] drivers/gpu/drm/nouveau/nvif/vmm.o
CC [M] fs/fscache/io.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_param.o
CC lib/memweight.o
CC arch/x86/kernel/smpboot.o
CC [M] fs/netfs/objects.o
CC [M] drivers/gpu/drm/i915/intel_pcode.o
CC drivers/thermal/gov_fair_share.o
CC drivers/acpi/acpica/rsirq.o
CC [M] drivers/net/ethernet/broadcom/tg3.o
CC kernel/kcmp.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_encoders.o
CC [M] drivers/gpu/drm/drm_bridge.o
CC [M] drivers/net/phy/broadcom.o
CC [M] fs/fscache/main.o
CC drivers/acpi/acpica/rslist.o
CC drivers/thermal/gov_step_wise.o
CC net/ipv4/nexthop.o
CC [M] drivers/md/persistent-data/dm-space-map-common.o
CC lib/kfifo.o
CC fs/ext4/xattr_user.o
CC [M] drivers/gpu/drm/nouveau/nvif/user.o
CC mm/memory_hotplug.o
CC [M] drivers/net/phy/lxt.o
AR net/core/built-in.a
CC drivers/acpi/sleep.o
CC drivers/thermal/gov_user_space.o
AR net/ipv6/built-in.a
CC lib/percpu-refcount.o
CC fs/ext4/fast_commit.o
CC [M] drivers/gpu/drm/i915/intel_region_ttm.o
CC [M] drivers/gpu/drm/nouveau/nvif/userc361.o
CC [M] drivers/net/usb/r8153_ecm.o
CC [M] drivers/gpu/drm/drm_cache.o
CC drivers/opp/core.o
CC [M] drivers/md/persistent-data/dm-space-map-disk.o
CC drivers/opp/cpu.o
CC drivers/acpi/acpica/rsmemory.o
CC [M] drivers/md/persistent-data/dm-space-map-metadata.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC drivers/opp/debugfs.o
CC drivers/acpi/acpica/rsmisc.o
CC [M] drivers/md/persistent-data/dm-transaction-manager.o
CC [M] fs/fscache/volume.o
LD [M] fs/netfs/netfs.o
AR drivers/net/ethernet/microsoft/built-in.a
AR drivers/net/ethernet/litex/built-in.a
CC kernel/freezer.o
CC kernel/stacktrace.o
AR drivers/thermal/built-in.a
CC drivers/cpufreq/cpufreq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/client.o
CC fs/btrfs/ctree.o
CC fs/btrfs/extent-tree.o
CC drivers/cpuidle/governors/menu.o
CC drivers/cpuidle/cpuidle.o
CC drivers/cpuidle/governors/haltpoll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/engine.o
CC drivers/md/md-bitmap.o
CC [M] fs/fscache/proc.o
CC arch/x86/kernel/tsc_sync.o
CC [M] drivers/gpu/drm/drm_client.o
CC [M] drivers/gpu/drm/i915/intel_runtime_pm.o
CC net/ipv4/udp_tunnel_stub.o
CC drivers/md/md-autodetect.o
CC [M] drivers/md/persistent-data/dm-btree.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/enum.o
CC [M] drivers/net/phy/realtek.o
CC [M] drivers/gpu/drm/i915/intel_sbi.o
CC lib/rhashtable.o
CC drivers/acpi/acpica/rsserial.o
CC [M] drivers/net/phy/smsc.o
CC arch/x86/kernel/setup_percpu.o
CC net/ipv4/sysctl_net_ipv4.o
LD [M] drivers/net/usb/asix.o
CC drivers/cpuidle/driver.o
CC [M] drivers/md/persistent-data/dm-btree-remove.o
AR drivers/net/ethernet/microchip/built-in.a
CC kernel/dma.o
AR drivers/net/ethernet/mscc/built-in.a
AR drivers/net/ethernet/neterion/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/core/event.o
AR drivers/net/ethernet/netronome/built-in.a
AR drivers/net/ethernet/ni/built-in.a
CC kernel/smp.o
AR drivers/net/ethernet/packetengines/built-in.a
CC [M] drivers/net/ethernet/intel/igc/igc_main.o
CC mm/madvise.o
CC [M] drivers/net/ethernet/intel/igc/igc_mac.o
CC mm/page_io.o
CC [M] drivers/net/ethernet/intel/igc/igc_i225.o
CC drivers/md/dm-uevent.o
CC drivers/acpi/acpica/rsutils.o
CC drivers/mmc/core/core.o
CC [M] drivers/gpu/drm/xe/xe_gt.o
LD [M] fs/fscache/fscache.o
CC drivers/mmc/host/sdhci.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sa.o
CC drivers/mmc/host/sdhci-pci-core.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_i2c.o
CC drivers/mmc/host/sdhci-pci-o2micro.o
CC [M] drivers/net/ethernet/intel/e1000e/mac.o
AR drivers/cpuidle/governors/built-in.a
CC mm/swap_state.o
CC drivers/md/dm.o
CC arch/x86/kernel/ftrace.o
AR drivers/ufs/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/core/firmware.o
AR drivers/leds/trigger/built-in.a
CC mm/swapfile.o
CC [M] drivers/leds/trigger/ledtrig-audio.o
CC [M] drivers/gpu/drm/drm_client_modeset.o
CC kernel/uid16.o
AR drivers/leds/blink/built-in.a
CC kernel/kallsyms.o
AR drivers/firmware/arm_ffa/built-in.a
AR drivers/firmware/arm_scmi/built-in.a
AR drivers/firmware/broadcom/built-in.a
AR drivers/firmware/cirrus/built-in.a
CC kernel/acct.o
AR drivers/firmware/meson/built-in.a
AR drivers/opp/built-in.a
CC drivers/mmc/host/sdhci-pci-arasan.o
CC drivers/cpuidle/governor.o
CC drivers/acpi/acpica/rsxface.o
CC drivers/firmware/efi/libstub/efi-stub-helper.o
CC drivers/md/dm-table.o
CC drivers/firmware/efi/libstub/gop.o
CC net/ipv4/proc.o
CC [M] drivers/gpu/drm/i915/intel_step.o
LD [M] drivers/net/phy/aquantia.o
AR drivers/net/phy/built-in.a
AR drivers/firmware/imx/built-in.a
AR drivers/crypto/stm32/built-in.a
AR drivers/crypto/xilinx/built-in.a
AR drivers/crypto/hisilicon/built-in.a
AR drivers/crypto/intel/keembay/built-in.a
AR drivers/crypto/starfive/built-in.a
CC drivers/leds/led-core.o
AR drivers/leds/simple/built-in.a
AR drivers/crypto/intel/ixp4xx/built-in.a
CC [M] drivers/gpu/drm/i915/intel_uncore.o
AR drivers/crypto/intel/built-in.a
AR drivers/crypto/built-in.a
CC drivers/firmware/efi/efi-bgrt.o
CC drivers/clocksource/acpi_pm.o
CC [M] drivers/md/persistent-data/dm-btree-spine.o
LD [M] drivers/net/ethernet/intel/e1000/e1000.o
CC [M] drivers/gpu/drm/i915/intel_wakeref.o
CC drivers/leds/led-class.o
CC [M] drivers/net/ethernet/intel/igc/igc_base.o
CC drivers/acpi/device_sysfs.o
CC drivers/cpuidle/sysfs.o
CC lib/base64.o
CC [M] drivers/net/ethernet/intel/igc/igc_nvm.o
CC drivers/acpi/acpica/tbdata.o
CC fs/ext4/orphan.o
AS arch/x86/kernel/ftrace_64.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/gpuobj.o
CC lib/once.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.o
CC drivers/acpi/device_pm.o
CC arch/x86/kernel/trace_clock.o
CC drivers/acpi/acpica/tbfadt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/intr.o
CC drivers/cpufreq/freq_table.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC drivers/mmc/host/sdhci-pci-dwc-mshc.o
CC arch/x86/kernel/trace.o
CC drivers/clocksource/i8253.o
CC [M] drivers/net/ethernet/intel/igb/e1000_82575.o
CC drivers/firmware/efi/libstub/secureboot.o
CC drivers/cpuidle/poll_state.o
CC drivers/acpi/proc.o
CC [M] drivers/gpu/drm/drm_color_mgmt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/ioctl.o
CC drivers/cpufreq/cpufreq_performance.o
CC [M] drivers/gpu/drm/i915/vlv_sideband.o
LD [M] drivers/md/persistent-data/dm-persistent-data.o
CC drivers/leds/led-triggers.o
CC net/ipv4/syncookies.o
CC [M] drivers/net/ethernet/intel/igc/igc_phy.o
CC lib/refcount.o
CC drivers/mmc/host/sdhci-pci-gli.o
CC [M] fs/smb/common/cifs_arc4.o
CC [M] drivers/net/ethernet/intel/e1000e/manage.o
CC [M] fs/smb/common/cifs_md4.o
CC [M] fs/fuse/dev.o
CC drivers/acpi/acpica/tbfind.o
CC [M] fs/fuse/dir.o
CC drivers/cpuidle/cpuidle-haltpoll.o
CC drivers/mmc/core/bus.o
CC kernel/crash_core.o
CC [M] drivers/gpu/drm/i915/vlv_suspend.o
AR drivers/clocksource/built-in.a
CC arch/x86/kernel/rethook.o
AR drivers/net/ethernet/realtek/built-in.a
CC [M] drivers/net/ethernet/realtek/8139cp.o
CC [M] fs/overlayfs/super.o
CC drivers/cpufreq/cpufreq_ondemand.o
CC lib/rcuref.o
CC drivers/mmc/core/host.o
CC arch/x86/kernel/crash_core_64.o
CC drivers/acpi/acpica/tbinstal.o
CC [M] fs/overlayfs/namei.o
CC drivers/firmware/efi/efi.o
CC lib/usercopy.o
CC drivers/firmware/efi/libstub/tpm.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC fs/open.o
CC lib/errseq.o
CC arch/x86/kernel/module.o
CC [M] fs/overlayfs/util.o
AR fs/ext4/built-in.a
CC [M] drivers/gpu/drm/i915/soc/intel_dram.o
AR drivers/cpuidle/built-in.a
CC lib/bucket_locks.o
CC [M] fs/smb/client/trace.o
CC drivers/hid/usbhid/hid-core.o
CC [M] fs/smb/client/cifsfs.o
AR drivers/staging/media/built-in.a
AR drivers/staging/built-in.a
CC [M] fs/smb/client/cifs_debug.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/memory.o
CC lib/generic-radix-tree.o
CC drivers/hid/hid-core.o
AR drivers/leds/built-in.a
CC drivers/md/dm-target.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.o
CC drivers/acpi/acpica/tbprint.o
CC [M] fs/smb/client/connect.o
CC drivers/firmware/efi/libstub/file.o
CC drivers/md/dm-linear.o
CC kernel/compat.o
CC arch/x86/kernel/early_printk.o
CC [M] fs/smb/client/dir.o
AR drivers/firmware/psci/built-in.a
AR drivers/firmware/smccc/built-in.a
AR drivers/firmware/tegra/built-in.a
AR drivers/firmware/xilinx/built-in.a
CC drivers/firmware/dmi_scan.o
CC drivers/cpufreq/cpufreq_governor.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/mm.o
CC lib/string_helpers.o
CC [M] drivers/net/ethernet/intel/e1000e/nvm.o
CC [M] fs/fuse/file.o
CC kernel/utsname.o
CC drivers/mmc/core/mmc.o
CC [M] drivers/gpu/drm/drm_connector.o
CC drivers/acpi/acpica/tbutils.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle_sysfs.o
CC net/ipv4/esp4.o
CC arch/x86/kernel/hpet.o
CC mm/swap_slots.o
CC [M] drivers/gpu/drm/i915/soc/intel_gmch.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ib.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC drivers/mmc/host/sdhci-acpi.o
CC [M] fs/overlayfs/inode.o
CC fs/btrfs/print-tree.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC drivers/firmware/efi/libstub/mem.o
CC [M] drivers/net/ethernet/intel/e1000e/phy.o
CC drivers/cpufreq/acpi-cpufreq.o
CC [M] fs/overlayfs/file.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_pll.o
CC [M] drivers/net/ethernet/intel/igb/e1000_mac.o
CC lib/hexdump.o
CC drivers/hid/hid-input.o
CC [M] fs/overlayfs/dir.o
CC drivers/acpi/acpica/tbxface.o
CC drivers/md/dm-stripe.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.o
CC kernel/user_namespace.o
CC drivers/cpufreq/intel_pstate.o
CC [M] drivers/net/ethernet/intel/igb/e1000_nvm.o
CC drivers/acpi/bus.o
CC lib/kstrtox.o
CC drivers/acpi/glue.o
CC drivers/firmware/efi/vars.o
CC [M] drivers/net/ethernet/realtek/8139too.o
CC drivers/firmware/dmi-sysfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/object.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC mm/dmapool.o
CC kernel/pid_namespace.o
CC drivers/hid/usbhid/hiddev.o
CC drivers/firmware/efi/libstub/random.o
CC drivers/firmware/dmi-id.o
CC drivers/acpi/acpica/tbxfload.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.o
CC fs/read_write.o
CC drivers/acpi/scan.o
CC arch/x86/kernel/amd_nb.o
CC [M] drivers/gpu/drm/i915/soc/intel_pch.o
CC drivers/mmc/host/cqhci-core.o
CC lib/debug_info.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC [M] drivers/net/ethernet/intel/igc/igc_diag.o
CC [M] fs/overlayfs/readdir.o
CC fs/file_table.o
CC fs/super.o
CC drivers/md/dm-ioctl.o
CC lib/iomap.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC [M] drivers/net/ethernet/intel/igc/igc_ethtool.o
CC fs/char_dev.o
CC [M] drivers/net/ethernet/intel/igb/e1000_phy.o
CC drivers/hid/hid-quirks.o
CC drivers/acpi/acpica/tbxfroot.o
CC [M] fs/overlayfs/copy_up.o
CC fs/btrfs/root-tree.o
CC [M] drivers/net/ipvlan/ipvlan_core.o
CC [M] drivers/net/vxlan/vxlan_core.o
CC drivers/net/loopback.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC drivers/firmware/memmap.o
CC drivers/firmware/efi/libstub/randomalloc.o
CC mm/hugetlb.o
CC drivers/mmc/core/mmc_ops.o
CC [M] drivers/net/ipvlan/ipvlan_main.o
UPD kernel/config_data
CC [M] fs/overlayfs/export.o
CC kernel/stop_machine.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/oproxy.o
CC net/ipv4/esp4_offload.o
CC arch/x86/kernel/kvm.o
CC drivers/acpi/acpica/utaddress.o
CC [M] drivers/net/ethernet/intel/e1000e/param.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
AR drivers/platform/x86/amd/built-in.a
CC drivers/platform/x86/intel/pmc/core.o
AR drivers/hid/usbhid/built-in.a
CC drivers/mailbox/mailbox.o
CC drivers/devfreq/devfreq.o
CC drivers/powercap/powercap_sys.o
CC drivers/powercap/intel_rapl_common.o
AR drivers/perf/built-in.a
CC [M] drivers/net/ethernet/intel/igc/igc_ptp.o
CC drivers/platform/x86/intel/pmc/core_ssram.o
CC [M] drivers/net/ethernet/intel/igc/igc_dump.o
CC arch/x86/kernel/kvmclock.o
CC [M] drivers/platform/x86/intel/pmt/class.o
CC drivers/firmware/efi/libstub/pci.o
CC fs/stat.o
CC [M] drivers/platform/x86/intel/pmt/telemetry.o
CC fs/btrfs/dir-item.o
CC [M] drivers/gpu/drm/i915/i915_memcpy.o
CC [M] drivers/net/ethernet/realtek/r8169_main.o
CC drivers/acpi/acpica/utalloc.o
CC [M] fs/fuse/inode.o
AR drivers/platform/surface/built-in.a
CC drivers/net/netconsole.o
CC lib/pci_iomap.o
CC [M] drivers/mmc/host/sdhci-pltfm.o
CC [M] fs/overlayfs/params.o
CC drivers/acpi/acpica/utascii.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC drivers/md/dm-io.o
AR drivers/cpufreq/built-in.a
CC [M] drivers/net/dummy.o
CC [M] drivers/net/macvlan.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/option.o
CC drivers/firmware/efi/reboot.o
CC [M] drivers/gpu/drm/i915/i915_mm.o
CC kernel/kprobes.o
CC drivers/mmc/core/sd.o
AR drivers/mmc/host/built-in.a
CC drivers/mailbox/pcc.o
CC arch/x86/kernel/paravirt.o
CC net/ipv4/netfilter.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC [M] drivers/net/ethernet/intel/e1000e/ethtool.o
CC [M] fs/smb/client/file.o
CC [M] drivers/net/ethernet/intel/igb/e1000_mbx.o
CC [M] drivers/net/ethernet/intel/e1000e/netdev.o
CC [M] fs/smb/client/inode.o
CC drivers/firmware/efi/libstub/skip_spaces.o
CC drivers/md/dm-kcopyd.o
CC fs/exec.o
CC [M] drivers/platform/x86/intel/pmt/crashlog.o
CC [M] drivers/net/ethernet/intel/e1000e/ptp.o
CC drivers/acpi/acpica/utbuffer.o
CC [M] drivers/net/ipvlan/ipvlan_l3s.o
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC drivers/hid/hid-debug.o
CC lib/iomap_copy.o
CC [M] drivers/net/ethernet/intel/igbvf/vf.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_main.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sync.o
CC drivers/firmware/efi/libstub/lib-ctype.o
CC drivers/firmware/efi/libstub/alignedmem.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_common.o
CC [M] drivers/net/ethernet/intel/igc/igc_tsn.o
CC drivers/firmware/efi/memattr.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.o
CC [M] drivers/net/ethernet/intel/igbvf/mbx.o
CC lib/devres.o
CC drivers/powercap/intel_rapl_msr.o
AR drivers/mailbox/built-in.a
CC fs/pipe.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.o
CC drivers/acpi/acpica/utcksum.o
LD [M] fs/overlayfs/overlay.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/ramht.o
LD [M] drivers/platform/x86/intel/pmt/pmt_class.o
CC drivers/platform/x86/intel/pmc/spt.o
CC drivers/firmware/efi/tpm.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_82599.o
CC drivers/platform/x86/intel/pmc/cnp.o
CC drivers/firmware/efi/memmap.o
CC drivers/acpi/acpica/utcopy.o
CC arch/x86/kernel/pvclock.o
CC fs/btrfs/file-item.o
CC [M] drivers/net/ethernet/intel/ixgbevf/vf.o
CC [M] drivers/gpu/drm/i915/i915_sw_fence.o
LD [M] drivers/platform/x86/intel/pmt/pmt_telemetry.o
LD [M] drivers/platform/x86/intel/pmt/pmt_crashlog.o
CC [M] drivers/net/ethernet/intel/ixgbevf/mbx.o
CC [M] drivers/devfreq/governor_simpleondemand.o
CC drivers/firmware/efi/libstub/relocate.o
CC [M] drivers/net/ethernet/intel/igb/e1000_i210.o
CC drivers/acpi/acpica/utexcep.o
CC [M] fs/fuse/control.o
CC net/ipv4/inet_diag.o
CC drivers/platform/x86/intel/pmc/icl.o
CC [M] drivers/net/ethernet/intel/igbvf/ethtool.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_preempt_mgr.o
CC drivers/mmc/core/sd_ops.o
CC [M] drivers/net/ethernet/intel/igbvf/netdev.o
CC drivers/acpi/acpica/utdebug.o
CC drivers/acpi/acpica/utdecode.o
CC lib/check_signature.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.o
CC drivers/hid/hidraw.o
CC [M] drivers/net/mii.o
CC drivers/md/dm-sysfs.o
AR drivers/powercap/built-in.a
CC [M] drivers/devfreq/governor_performance.o
LD [M] drivers/net/ipvlan/ipvlan.o
CC [M] drivers/net/ethernet/intel/igc/igc_xdp.o
CC drivers/firmware/efi/esrt.o
CC drivers/platform/x86/intel/turbo_max_3.o
CC arch/x86/kernel/pcspeaker.o
CC [M] fs/smb/client/link.o
CC drivers/platform/x86/intel/pmc/tgl.o
CC lib/interval_tree.o
CC [M] fs/fuse/xattr.o
CC drivers/acpi/acpica/utdelete.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/subdev.o
CC drivers/firmware/efi/libstub/printk.o
CC drivers/platform/x86/intel/pmc/adl.o
CC drivers/mmc/core/sdio.o
CC kernel/hung_task.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/uevent.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_virt.o
CC drivers/firmware/efi/efi-pstore.o
AR drivers/devfreq/built-in.a
CC [M] drivers/net/mdio.o
CC lib/assoc_array.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC arch/x86/kernel/check.o
AR drivers/net/ethernet/intel/built-in.a
CC drivers/firmware/efi/libstub/vsprintf.o
CC kernel/watchdog.o
CC drivers/firmware/efi/cper.o
CC [M] drivers/net/ethernet/intel/ixgbevf/ethtool.o
CC drivers/mmc/core/sdio_ops.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.o
CC [M] drivers/net/ethernet/intel/e100.o
CC drivers/acpi/acpica/uterror.o
CC [M] drivers/gpu/drm/i915/i915_sw_fence_work.o
CC [M] drivers/net/ethernet/intel/igb/igb_ptp.o
CC drivers/firmware/efi/cper_cxl.o
CC drivers/firmware/efi/runtime-wrappers.o
CC arch/x86/kernel/uprobes.o
CC drivers/platform/x86/intel/pmc/mtl.o
CC drivers/platform/x86/p2sb.o
CC drivers/md/dm-stats.o
CC drivers/firmware/efi/libstub/x86-stub.o
CC drivers/acpi/acpica/uteval.o
CC [M] fs/fuse/acl.o
CC drivers/platform/x86/intel/pmc/pltdrv.o
CC [M] drivers/platform/x86/intel/vsec.o
CC drivers/hid/hid-generic.o
LD [M] drivers/net/ethernet/intel/igc/igc.o
CC [M] drivers/net/tun.o
CC kernel/watchdog_perf.o
CC drivers/acpi/acpica/utglobal.o
CC drivers/firmware/efi/dev-path-parser.o
CC drivers/acpi/acpica/uthex.o
CC [M] drivers/net/veth.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/fw.o
CC [M] drivers/net/ethernet/realtek/r8169_firmware.o
CC fs/btrfs/inode-item.o
CC [M] drivers/gpu/drm/i915/i915_syncmap.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC kernel/seccomp.o
CC drivers/acpi/acpica/utids.o
CC drivers/firmware/efi/apple-properties.o
CC fs/btrfs/disk-io.o
CC [M] drivers/gpu/drm/i915/i915_user_extensions.o
CC lib/list_debug.o
CC kernel/relay.o
CC drivers/firmware/efi/earlycon.o
CC drivers/mmc/core/sdio_bus.o
CC fs/btrfs/transaction.o
CC [M] drivers/gpu/drm/i915/i915_ioc32.o
CC arch/x86/kernel/perf_regs.o
AR drivers/platform/x86/intel/pmc/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.o
CC [M] drivers/net/ethernet/intel/igb/igb_hwmon.o
CC [M] fs/fuse/readdir.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sched.o
CC drivers/acpi/acpica/utinit.o
CC lib/debugobjects.o
CC net/ipv4/tcp_diag.o
CC drivers/acpi/resource.o
CC [M] drivers/net/ethernet/realtek/r8169_phy_config.o
CC drivers/platform/x86/pmc_atom.o
CC drivers/hid/hid-a4tech.o
CC [M] drivers/platform/x86/intel/rst.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
CC drivers/acpi/acpica/utlock.o
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
CC [M] drivers/platform/x86/wmi.o
CC drivers/acpi/acpica/utmath.o
CC drivers/ras/ras.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
CC [M] drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.o
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
CC drivers/ras/debugfs.o
CC drivers/hid/hid-apple.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
CC [M] drivers/net/vxlan/vxlan_multicast.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
AR drivers/firmware/efi/libstub/lib.a
CC drivers/acpi/acpica/utmisc.o
CC [M] drivers/net/ethernet/intel/ixgbevf/ipsec.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/hs.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC [M] fs/smb/client/misc.o
CC [M] drivers/platform/x86/wmi-bmof.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_82598.o
CC [M] drivers/gpu/drm/i915/i915_debugfs.o
LD [M] drivers/net/ethernet/intel/igbvf/igbvf.o
CC mm/hugetlb_vmemmap.o
CC drivers/firmware/efi/cper-x86.o
CC arch/x86/kernel/tracepoint.o
CC drivers/acpi/acpica/utmutex.o
LD [M] drivers/platform/x86/intel/intel_vsec.o
CC drivers/mmc/core/sdio_cis.o
LD [M] drivers/platform/x86/intel/intel-rst.o
CC net/ipv4/udp_diag.o
CC drivers/md/dm-rq.o
CC drivers/md/dm-io-rewind.o
AR drivers/platform/x86/intel/built-in.a
CC drivers/hid/hid-belkin.o
CC drivers/md/dm-builtin.o
CC kernel/utsname_sysctl.o
CC lib/bitrev.o
CC arch/x86/kernel/itmt.o
CC [M] fs/smb/client/netmisc.o
CC [M] fs/smb/client/smbencrypt.o
CC [M] drivers/gpu/drm/i915/i915_debugfs_params.o
CC [M] fs/smb/client/transport.o
CC kernel/delayacct.o
CC [M] fs/fuse/ioctl.o
CC lib/crc16.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_phy.o
LD [M] drivers/net/ethernet/intel/igb/igb.o
CC arch/x86/kernel/umip.o
LD [M] drivers/net/ethernet/realtek/r8169.o
CC [M] drivers/platform/x86/mxm-wmi.o
CC drivers/mmc/core/sdio_io.o
CC drivers/mmc/core/sdio_irq.o
CC kernel/taskstats.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ids.o
CC drivers/mmc/core/slot-gpio.o
CC [M] drivers/platform/x86/intel_ips.o
CC drivers/acpi/acpica/utnonansi.o
AR drivers/hwtracing/intel_th/built-in.a
CC drivers/android/binderfs.o
CC lib/crc-t10dif.o
CC drivers/acpi/acpica/utobject.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/ls.o
AR drivers/firmware/efi/built-in.a
AR drivers/firmware/built-in.a
AR drivers/ras/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/acr.o
CC net/ipv4/tcp_cubic.o
CC drivers/acpi/acpica/utosi.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.o
CC arch/x86/kernel/unwind_orc.o
CC fs/btrfs/inode.o
HOSTCC lib/gen_crc32table
CC drivers/hid/hid-cherry.o
CC drivers/hid/hid-chicony.o
CC net/ipv4/xfrm4_policy.o
CC mm/mempolicy.o
CC [M] fs/smb/client/cached_dir.o
CC [M] drivers/net/vxlan/vxlan_vnifilter.o
CC lib/libcrc32c.o
AR drivers/net/ethernet/renesas/built-in.a
CC drivers/acpi/acpica/utownerid.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/flcn.o
CC kernel/tsacct.o
CC kernel/tracepoint.o
CC arch/x86/kernel/callthunks.o
CC [M] drivers/gpu/drm/i915/display/intel_display_debugfs.o
LD [M] fs/fuse/fuse.o
CC [M] drivers/net/vxlan/vxlan_mdb.o
CC [M] drivers/md/dm-bufio.o
CC net/ipv4/xfrm4_state.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.o
AR drivers/nvmem/layouts/built-in.a
CC drivers/nvmem/core.o
CC [M] drivers/mtd/chips/chipreg.o
CC drivers/mmc/core/regulator.o
CC [M] drivers/gpu/drm/i915/display/intel_pipe_crc.o
LD [M] drivers/net/ethernet/intel/e1000e/e1000e.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.o
CC arch/x86/kernel/mmconf-fam10h_64.o
CC [M] fs/smb/client/cifs_unicode.o
CC [M] drivers/gpu/drm/drm_crtc.o
CC drivers/acpi/acpica/utpredef.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.o
CC lib/xxhash.o
CC fs/namei.o
CC drivers/android/binder.o
CC [M] fs/smb/client/nterr.o
AR drivers/platform/x86/built-in.a
CC [M] drivers/md/dm-bio-prison-v1.o
AR drivers/platform/built-in.a
CC arch/x86/kernel/vsmp_64.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/fw.o
CC kernel/latencytop.o
CC lib/genalloc.o
CC drivers/acpi/acpica/utresdecode.o
CC [M] fs/smb/client/cifsencrypt.o
CC drivers/hid/hid-cypress.o
CC drivers/android/binder_alloc.o
CC kernel/irq_work.o
CC fs/fcntl.o
CC [M] drivers/mtd/mtdcore.o
CC [M] drivers/uio/uio.o
CC [M] drivers/md/dm-bio-prison-v2.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC [M] drivers/md/dm-crypt.o
CC drivers/acpi/acpica/utresrc.o
CC drivers/mmc/core/debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.o
CC drivers/acpi/acpi_processor.o
CC mm/sparse.o
CC mm/sparse-vmemmap.o
CC drivers/mmc/core/block.o
CC lib/percpu_counter.o
AR arch/x86/kernel/built-in.a
CC fs/btrfs/file.o
AR arch/x86/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.o
CC drivers/acpi/processor_core.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_x540.o
CC net/ipv4/xfrm4_input.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/msgq.o
CC [M] drivers/md/dm-thin.o
CC [M] drivers/gpu/drm/drm_displayid.o
AR drivers/nvmem/built-in.a
CC fs/btrfs/defrag.o
CC [M] drivers/md/dm-thin-metadata.o
CC drivers/acpi/acpica/utstate.o
CC drivers/hid/hid-ezkey.o
CC [M] drivers/vfio/pci/vfio_pci_core.o
CC kernel/static_call.o
CC drivers/hid/hid-kensington.o
CC [M] fs/smb/client/readdir.o
CC drivers/acpi/acpica/utstring.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.o
CC lib/fault-inject.o
CC fs/btrfs/extent_map.o
CC fs/btrfs/sysfs.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_x550.o
CC drivers/mmc/core/queue.o
CC [M] drivers/mtd/mtdsuper.o
CC [M] drivers/vfio/vfio_main.o
CC mm/mmu_notifier.o
CC kernel/static_call_inline.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/v1.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_lib.o
CC fs/ioctl.o
CC drivers/acpi/acpica/utstrsuppt.o
CC mm/ksm.o
CC [M] fs/smb/client/ioctl.o
CC kernel/user-return-notifier.o
LD [M] drivers/net/ethernet/intel/ixgbevf/ixgbevf.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.o
CC drivers/acpi/acpica/utstrtoul64.o
CC drivers/acpi/acpica/utxface.o
CC drivers/hid/hid-lg.o
CC [M] fs/smb/client/sess.o
CC [M] drivers/gpu/drm/i915/i915_pmu.o
CC fs/btrfs/accessors.o
CC [M] drivers/vfio/pci/vfio_pci_intrs.o
CC drivers/hid/hid-lg-g15.o
CC net/ipv4/xfrm4_output.o
CC lib/syscall.o
CC [M] fs/smb/client/export.o
CC kernel/padata.o
CC fs/btrfs/xattr.o
CC net/ipv4/xfrm4_protocol.o
CC lib/dynamic_debug.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/gm200.o
CC [M] drivers/vfio/pci/vfio_pci_rdwr.o
LD [M] drivers/net/vxlan/vxlan.o
LD [M] drivers/md/dm-bio-prison.o
CC fs/btrfs/ordered-data.o
AR drivers/md/built-in.a
CC [M] fs/smb/client/unc.o
CC [M] drivers/gpu/drm/drm_drv.o
CC mm/slub.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC [M] drivers/mtd/mtdconcat.o
CC drivers/acpi/acpica/utxfinit.o
CC [M] net/ipv4/ip_tunnel.o
CC [M] net/ipv4/udp_tunnel_core.o
CC [M] drivers/pps/pps.o
CC [M] net/ipv4/udp_tunnel_nic.o
CC [M] drivers/bluetooth/btusb.o
CC [M] drivers/dca/dca-core.o
CC drivers/acpi/acpica/utxferror.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_csa.o
CC [M] drivers/dca/dca-sysfs.o
AR drivers/mmc/core/built-in.a
AR drivers/mmc/built-in.a
CC [M] drivers/vfio/group.o
CC [M] drivers/ssb/main.o
CC [M] drivers/vfio/iova_bitmap.o
CC [M] drivers/ssb/scan.o
CC [M] fs/smb/client/winucase.o
CC [M] drivers/vfio/container.o
CC [M] drivers/gpu/drm/i915/gt/gen2_engine_cs.o
CC [M] drivers/vfio/pci/vfio_pci_config.o
CC drivers/acpi/acpica/utxfmutex.o
CC kernel/jump_label.o
CC drivers/hid/hid-microsoft.o
CC [M] drivers/vfio/virqfd.o
CC [M] drivers/gpu/drm/i915/gt/gen6_engine_cs.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/gp102.o
CC kernel/context_tracking.o
CC [M] drivers/pps/kapi.o
AR drivers/net/ethernet/sfc/built-in.a
CC fs/readdir.o
AR drivers/net/ethernet/smsc/built-in.a
CC [M] drivers/net/ethernet/smsc/smsc9420.o
AR drivers/net/ethernet/socionext/built-in.a
AR drivers/net/ethernet/vertexcom/built-in.a
CC fs/btrfs/extent_io.o
CC fs/select.o
CC kernel/iomem.o
CC [M] drivers/ssb/sprom.o
CC drivers/hid/hid-monterey.o
CC [M] drivers/mtd/mtdpart.o
CC [M] drivers/bluetooth/btintel.o
CC [M] drivers/vhost/net.o
CC [M] drivers/mtd/mtdchar.o
CC [M] drivers/bluetooth/btbcm.o
AR drivers/acpi/acpica/built-in.a
LD [M] drivers/dca/dca.o
CC drivers/acpi/processor_pdc.o
CC [M] drivers/vhost/vhost.o
CC fs/btrfs/volumes.o
CC [M] drivers/bluetooth/btrtl.o
CC [M] drivers/vfio/vfio_iommu_type1.o
LD [M] drivers/md/dm-thin-pool.o
CC [M] drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC fs/dcache.o
CC [M] fs/smb/client/smb2ops.o
CC [M] drivers/pps/sysfs.o
CC [M] drivers/ssb/pci.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ras.o
CC mm/migrate.o
CC lib/errname.o
CC fs/inode.o
AR drivers/net/ethernet/wangxun/built-in.a
CC [M] drivers/ssb/pcihost_wrapper.o
CC lib/nlattr.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.o
CC mm/memory-tiers.o
AR drivers/net/ethernet/xilinx/built-in.a
CC kernel/rseq.o
CC mm/migrate_device.o
CC lib/checksum.o
CC fs/attr.o
CC [M] drivers/gpu/drm/i915/gt/gen7_renderclear.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/ga100.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC drivers/acpi/ec.o
CC [M] drivers/vhost/iotlb.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.o
AR drivers/hid/built-in.a
LD [M] drivers/pps/pps_core.o
CC lib/cpu_rmap.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/ga102.o
CC fs/bad_inode.o
CC [M] drivers/ssb/driver_chipcommon.o
CC [M] drivers/gpu/drm/i915/gt/gen8_engine_cs.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC lib/dynamic_queue_limits.o
GZIP kernel/config_data.gz
CC kernel/configs.o
CC [M] drivers/ssb/driver_chipcommon_pmu.o
CC [M] drivers/vfio/pci/vfio_pci.o
CC [M] drivers/ssb/driver_pcicore.o
CC [M] drivers/gpu/drm/drm_dumb_buffers.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.o
LD [M] net/ipv4/udp_tunnel.o
LD [M] drivers/mtd/mtd.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.o
AR net/ipv4/built-in.a
AR net/built-in.a
CC lib/glob.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.o
CC [M] drivers/gpu/drm/i915/gt/gen8_ppgtt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.o
CC drivers/acpi/dock.o
CC [M] drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
AR kernel/built-in.a
LD [M] drivers/vfio/vfio.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.o
CC [M] fs/smb/client/smb2maperror.o
CC fs/btrfs/async-thread.o
CC [M] drivers/gpu/drm/i915/gt/intel_context.o
CC fs/btrfs/ioctl.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.o
LD [M] drivers/vfio/pci/vfio-pci-core.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
LD [M] drivers/vhost/vhost_iotlb.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.o
CC mm/huge_memory.o
CC lib/strncpy_from_user.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.o
CC mm/khugepaged.o
AR drivers/net/ethernet/synopsys/built-in.a
LD [M] drivers/vfio/pci/vfio-pci.o
CC lib/strnlen_user.o
CC lib/net_utils.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_umc.o
CC mm/page_counter.o
CC [M] fs/smb/client/smb2transport.o
AR drivers/net/ethernet/pensando/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.o
LD [M] drivers/vhost/vhost_net.o
AR drivers/android/built-in.a
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.o
CC lib/sg_pool.o
LD [M] drivers/ssb/ssb.o
CC fs/btrfs/locking.o
CC fs/btrfs/orphan.o
CC drivers/acpi/pci_root.o
CC mm/memcontrol.o
CC mm/vmpressure.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.o
CC lib/stackdepot.o
CC drivers/acpi/pci_link.o
CC lib/ucs2_string.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.o
CC fs/file.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC fs/filesystems.o
CC fs/namespace.o
CC [M] drivers/gpu/drm/drm_edid.o
CC fs/seq_file.o
CC fs/btrfs/export.o
CC [M] drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.o
GEN xe_wa_oob.c xe_wa_oob.h
GEN xe_wa_oob.c xe_wa_oob.h
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC [M] drivers/gpu/drm/i915/gt/intel_context_sseu.o
CC fs/xattr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gv100.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_cs.o
CC [M] fs/smb/client/smb2misc.o
CC drivers/acpi/pci_irq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC lib/sbitmap.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.o
CC [M] drivers/gpu/drm/drm_encoder.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_rap.o
CC mm/swap_cgroup.o
CC drivers/acpi/acpi_lpss.o
CC lib/group_cpus.o
CC fs/btrfs/tree-log.o
CC mm/hugetlb_cgroup.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga100.o
CC fs/btrfs/free-space-cache.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.o
CC fs/libfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.o
CC drivers/acpi/acpi_apd.o
CC fs/fs-writeback.o
CC drivers/acpi/acpi_platform.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.o
CC fs/btrfs/zlib.o
CC drivers/acpi/acpi_pnp.o
CC fs/btrfs/lzo.o
CC [M] fs/smb/client/smb2pdu.o
CC [M] lib/asn1_decoder.o
CC mm/kmemleak.o
GEN lib/oid_registry_data.c
CC drivers/acpi/power.o
CC [M] lib/oid_registry.o
CC fs/pnode.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.o
CC fs/btrfs/zstd.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC mm/page_isolation.o
CC [M] drivers/gpu/drm/drm_file.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mca.o
CC fs/splice.o
CC [M] fs/smb/client/smb2inode.o
CC fs/btrfs/compression.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_user.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.o
CC mm/early_ioremap.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/g84.o
LD [M] drivers/net/ethernet/intel/ixgbe/ixgbe.o
CC drivers/acpi/event.o
CC drivers/acpi/evged.o
AR lib/lib.a
GEN lib/crc32table.h
CC [M] fs/smb/client/smb2file.o
CC lib/crc32.o
CC mm/cma.o
AR drivers/net/ethernet/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.o
AR drivers/net/built-in.a
CC fs/sync.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.o
CC mm/secretmem.o
CC fs/btrfs/delayed-ref.o
CC mm/userfaultfd.o
CC [M] fs/smb/client/cifsacl.o
CC [M] drivers/gpu/drm/xe/xe_oa.o
CC fs/utimes.o
CC drivers/acpi/sysfs.o
CC fs/d_path.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm107.o
CC drivers/acpi/property.o
AR lib/built-in.a
CC mm/memremap.o
CC mm/hmm.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.o
CC [M] drivers/gpu/drm/drm_fourcc.o
CC fs/stack.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.o
CC drivers/acpi/acpi_cmos_rtc.o
CC fs/btrfs/relocation.o
CC [M] drivers/gpu/drm/drm_framebuffer.o
CC mm/memfd.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.o
CC [M] drivers/gpu/drm/i915/gt/intel_execlists_submission.o
CC fs/fs_struct.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC drivers/acpi/x86/apple.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/tu102.o
CC [M] drivers/gpu/drm/drm_gem.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt.o
CC mm/bootmem_info.o
CC [M] fs/smb/client/fs_context.o
CC [M] fs/smb/client/dns_resolve.o
CC fs/btrfs/delayed-inode.o
CC [M] drivers/gpu/drm/drm_ioctl.o
CC fs/btrfs/scrub.o
CC fs/statfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/base.o
CC drivers/acpi/x86/utils.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC fs/fs_pin.o
CC drivers/acpi/x86/s2idle.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.o
CC fs/btrfs/backref.o
CC [M] drivers/gpu/drm/drm_lease.o
CC fs/nsfs.o
ASN.1 fs/smb/client/cifs_spnego_negtokeninit.asn1.[ch]
CC [M] fs/smb/client/smb1ops.o
CC fs/fs_types.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
CC drivers/acpi/debugfs.o
CC drivers/acpi/acpi_lpat.o
CC drivers/acpi/acpi_lpit.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/bit.o
CC [M] fs/smb/client/cifssmb.o
CC [M] fs/smb/client/cifs_spnego_negtokeninit.asn1.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik.o
CC [M] fs/smb/client/asn1.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC [M] drivers/gpu/drm/xe/xe_perf.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/conn.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt.o
CC [M] drivers/gpu/drm/drm_managed.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC fs/btrfs/ulist.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.o
CC fs/fs_context.o
CC [M] drivers/gpu/drm/drm_mm.o
CC fs/fs_parser.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
CC fs/fsopen.o
CC fs/init.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v8_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.o
CC fs/btrfs/qgroup.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
CC drivers/acpi/prmt.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC drivers/acpi/acpi_pcc.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC [M] drivers/gpu/drm/drm_mode_config.o
CC [M] drivers/gpu/drm/drm_mode_object.o
CC fs/kernel_read_file.o
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v7_0.o
CC [M] drivers/gpu/drm/drm_modes.o
CC fs/btrfs/send.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/extdev.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.o
CC fs/mnt_idmapping.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/gpio.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik_sdma.o
CC [M] drivers/gpu/drm/drm_modeset_lock.o
CC [M] drivers/gpu/drm/drm_plane.o
CC fs/btrfs/dev-replace.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/iccsense.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC fs/remap_range.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v4_2.o
CC fs/btrfs/raid56.o
CC fs/btrfs/uuid-tree.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/image.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_irq.o
CC fs/buffer.o
CC fs/mpage.o
CC fs/btrfs/props.o
CC drivers/acpi/ac.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_mcr.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v2_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.o
CC [M] drivers/gpu/drm/drm_prime.o
CC fs/btrfs/free-space-tree.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
CC [M] drivers/gpu/drm/drm_print.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
AR mm/built-in.a
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC drivers/acpi/button.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/npde.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pcir.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.o
CC [M] drivers/gpu/drm/amd/amdgpu/si.o
CC [M] drivers/gpu/drm/drm_property.o
CC fs/proc_namespace.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_requests.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pmu.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC fs/btrfs/tree-checker.o
CC fs/direct-io.o
CC [M] drivers/gpu/drm/drm_syncobj.o
CC [M] drivers/gpu/drm/drm_sysfs.o
CC [M] drivers/gpu/drm/drm_trace_points.o
CC fs/btrfs/space-info.o
CC [M] drivers/gpu/drm/drm_vblank.o
CC [M] drivers/gpu/drm/drm_vblank_work.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC fs/btrfs/block-rsv.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v6_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/power_budget.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/ramcfg.o
CC [M] drivers/gpu/drm/drm_vma_manager.o
CC drivers/acpi/fan_core.o
CC fs/btrfs/delalloc-space.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
CC [M] drivers/gpu/drm/i915/gt/intel_gtt.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v6_0.o
CC drivers/acpi/fan_attr.o
CC [M] drivers/gpu/drm/drm_gpuva_mgr.o
CC fs/eventpoll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.o
CC [M] drivers/gpu/drm/i915/gt/intel_llc.o
CC [M] drivers/gpu/drm/i915/gt/intel_lrc.o
CC [M] drivers/gpu/drm/amd/amdgpu/si_ih.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC [M] drivers/gpu/drm/i915/gt/intel_migrate.o
CC fs/btrfs/block-group.o
CC fs/btrfs/discard.o
CC [M] drivers/gpu/drm/drm_writeback.o
CC [M] drivers/gpu/drm/i915/gt/intel_mocs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC [M] drivers/gpu/drm/i915/gt/intel_ppgtt.o
CC drivers/acpi/processor_driver.o
CC [M] drivers/gpu/drm/lib/drm_random.o
CC [M] drivers/gpu/drm/drm_ioc32.o
CC [M] drivers/gpu/drm/drm_panel.o
CC [M] drivers/gpu/drm/i915/gt/intel_rc6.o
CC fs/anon_inodes.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC [M] drivers/gpu/drm/drm_pci.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowof.o
CC [M] drivers/gpu/drm/i915/gt/intel_region_lmem.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowpci.o
CC [M] drivers/gpu/drm/amd/amdgpu/si_dma.o
CC fs/signalfd.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC [M] drivers/gpu/drm/drm_debugfs.o
CC [M] drivers/gpu/drm/drm_debugfs_crc.o
CC [M] drivers/gpu/drm/drm_edid_load.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowramin.o
CC [M] drivers/gpu/drm/i915/gt/intel_renderstate.o
CC [M] drivers/gpu/drm/drm_panel_orientation_quirks.o
CC fs/btrfs/reflink.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v6_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v3_1.o
CC drivers/acpi/processor_thermal.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/vi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowrom.o
CC [M] drivers/gpu/drm/drm_exec.o
CC drivers/acpi/processor_idle.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_vi.o
LD [M] fs/smb/client/cifs.o
CC [M] drivers/gpu/drm/i915/gt/intel_reset.o
CC [M] drivers/gpu/drm/drm_buddy.o
CC fs/timerfd.o
CC [M] drivers/gpu/drm/i915/gt/intel_ring.o
CC drivers/acpi/processor_throttling.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC fs/btrfs/subpage.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.o
CC fs/btrfs/tree-mod-log.o
CC [M] drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC fs/eventfd.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/therm.o
CC drivers/acpi/processor_perflib.o
CC fs/userfaultfd.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/vmap.o
CC [M] drivers/gpu/drm/i915/gt/intel_rps.o
CC [M] drivers/gpu/drm/drm_gem_shmem_helper.o
CC fs/btrfs/extent-io-tree.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v6_1.o
CC fs/aio.o
CC [M] drivers/gpu/drm/i915/gt/intel_sa_media.o
CC [M] drivers/gpu/drm/i915/gt/intel_sseu.o
CC [M] drivers/gpu/drm/drm_atomic_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/soc15.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/drm_atomic_state_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/volt.o
CC fs/locks.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
CC [M] drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/emu_soc.o
CC [M] drivers/gpu/drm/drm_bridge_connector.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC [M] drivers/gpu/drm/i915/gt/intel_timeline.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_ai.o
CC fs/binfmt_script.o
CC fs/btrfs/fs.o
CC [M] drivers/gpu/drm/xe/xe_vm_madvise.o
CC [M] drivers/gpu/drm/i915/gt/intel_tlb.o
CC fs/binfmt_elf.o
CC fs/btrfs/messages.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/vpstate.o
CC drivers/acpi/container.o
CC [M] drivers/gpu/drm/drm_crtc_helper.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/xpio.o
CC [M] drivers/gpu/drm/drm_damage_helper.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC fs/btrfs/bio.o
CC fs/compat_binfmt_elf.o
CC [M] drivers/gpu/drm/i915/gt/intel_wopcm.o
CC [M] drivers/gpu/drm/i915/gt/intel_workarounds.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC [M] drivers/gpu/drm/drm_encoder_slave.o
CC [M] drivers/gpu/drm/i915/gt/shmem_utils.o
CC fs/btrfs/lru_cache.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_0.o
CC [M] drivers/gpu/drm/drm_flip_work.o
CC fs/mbcache.o
CC drivers/acpi/thermal.o
CC drivers/acpi/acpi_memhotplug.o
CC [M] drivers/gpu/drm/drm_format_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega10_reg_init.o
CC fs/btrfs/acl.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0203.o
CC [M] drivers/gpu/drm/drm_gem_atomic_helper.o
CC [M] drivers/gpu/drm/xe/xe_display.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0205.o
CC fs/posix_acl.o
CC [M] drivers/gpu/drm/i915/gt/sysfs_engines.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega20_reg_init.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_4.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v2_3.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
CC drivers/acpi/ioapic.o
CC fs/coredump.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.o
CC drivers/acpi/battery.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC [M] drivers/gpu/drm/drm_gem_framebuffer_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/nv.o
CC fs/drop_caches.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/P0260.o
CC fs/sysctls.o
CC [M] drivers/gpu/drm/drm_kms_helper_common.o
CC [M] drivers/gpu/drm/drm_modeset_helper.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC [M] drivers/gpu/drm/amd/amdgpu/arct_reg_init.o
CC drivers/acpi/hed.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_nv.o
CC [M] drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC fs/fhandle.o
CC [M] drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC [M] drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_2.o
CC drivers/acpi/bgrt.o
CC [M] drivers/gpu/drm/drm_plane_helper.o
CC [M] drivers/gpu/drm/i915/gt/gen9_renderstate.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_busy.o
CC [M] drivers/gpu/drm/drm_probe_helper.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_clflush.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/base.o
CC drivers/acpi/cppc_acpi.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_context.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_create.o
CC drivers/acpi/spcr.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC drivers/acpi/acpi_pad.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v4_0.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v5_0.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_object.o
CC [M] drivers/acpi/acpi_video.o
CC [M] drivers/gpu/drm/amd/amdgpu/aldebaran_reg_init.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.o
AR fs/btrfs/built-in.a
CC [M] drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC [M] drivers/gpu/drm/drm_rect.o
CC [M] drivers/acpi/video_detect.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_mman.o
CC [M] drivers/gpu/drm/drm_self_refresh_helper.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_pages.o
CC [M] drivers/gpu/drm/drm_simple_kms_helper.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o
CC [M] drivers/gpu/drm/xe/display/ext/intel_clock_gating.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o
CC [M] drivers/gpu/drm/amd/amdgpu/aldebaran.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_pm.o
CC [M] drivers/gpu/drm/bridge/panel.o
CC [M] drivers/gpu/drm/amd/amdgpu/soc21.o
CC [M] drivers/gpu/drm/amd/amdgpu/sienna_cichlid.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/g94.o
AR fs/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v4_3.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_region.o
CC [M] drivers/gpu/drm/drm_fbdev_generic.o
CC [M] drivers/gpu/drm/drm_fb_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.o
LD [M] drivers/gpu/drm/drm.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_pch.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v6_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_7.o
LD [M] drivers/gpu/drm/drm_shmem_helper.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
AR drivers/gpu/drm/built-in.a
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v5_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_throttle.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
AR drivers/acpi/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_9.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
CC [M] drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_userptr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/g84.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.o
CC [M] drivers/gpu/drm/i915/gem/i915_gemfs.o
CC [M] drivers/gpu/drm/i915/i915_active.o
LD [M] drivers/acpi/video.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v1_7.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v3_6.o
CC [M] drivers/gpu/drm/i915/i915_cmd_parser.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v4_3.o
CC [M] drivers/gpu/drm/i915/i915_deps.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v7_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v8_0.o
CC [M] drivers/gpu/drm/i915/i915_gem_evict.o
CC [M] drivers/gpu/drm/i915/i915_gem_gtt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.o
CC [M] drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.o
CC [M] drivers/gpu/drm/i915/i915_gem.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v9_0.o
CC [M] drivers/gpu/drm/i915/i915_query.o
CC [M] drivers/gpu/drm/i915/i915_request.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC [M] drivers/gpu/drm/i915/i915_scheduler.o
CC [M] drivers/gpu/drm/i915/i915_trace_points.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.o
CC [M] drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC [M] drivers/gpu/drm/i915/i915_vma.o
CC [M] drivers/gpu/drm/i915/i915_vma_resource.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.o
LD [M] drivers/gpu/drm/drm_kms_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v10_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv10.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv1a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv20.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v11_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_1.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ga100.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/base.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_7.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v8_7.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v8_10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/user.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_irq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp10b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/iceland_ih.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv04.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
CC [M] drivers/gpu/drm/i915/gt/intel_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv1a.o
CC [M] drivers/gpu/drm/amd/amdgpu/tonga_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv20.o
CC [M] drivers/gpu/drm/i915/i915_hwmon.o
CC [M] drivers/gpu/drm/i915/display/hsw_ips.o
CC [M] drivers/gpu/drm/amd/amdgpu/cz_ih.o
CC [M] drivers/gpu/drm/i915/display/intel_atomic.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega10_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv25.o
CC [M] drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega20_ih.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC [M] drivers/gpu/drm/amd/amdgpu/navi10_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.o
CC [M] drivers/gpu/drm/i915/display/intel_audio.o
CC [M] drivers/gpu/drm/amd/amdgpu/ih_v6_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC [M] drivers/gpu/drm/amd/amdgpu/ih_v6_1.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_psp.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v3_1.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv35.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv36.o
CC [M] drivers/gpu/drm/i915/display/intel_bios.o
CC [M] drivers/gpu/drm/i915/display/intel_bw.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v10_0.o
CC [M] drivers/gpu/drm/i915/display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv41.o
CC [M] drivers/gpu/drm/i915/display/intel_color.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv44.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv46.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v11_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv47.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv49.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv4e.o
CC [M] drivers/gpu/drm/i915/display/intel_combo_phy.o
CC [M] drivers/gpu/drm/i915/display/intel_connector.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v12_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v13_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/g84.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v10_0.o
CC [M] drivers/gpu/drm/i915/display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gt215.o
CC [M] drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v11_0.o
CC [M] drivers/gpu/drm/i915/display/intel_cursor.o
CC [M] drivers/gpu/drm/i915/display/intel_display.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/mcp77.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/mcp89.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v8_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf108.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.o
CC [M] drivers/gpu/drm/i915/display/intel_display_driver.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.o
CC [M] drivers/gpu/drm/i915/display/intel_display_irq.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm20b.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power_map.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v10_0.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power_well.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp102.o
CC [M] drivers/gpu/drm/i915/display/intel_display_reset.o
CC [M] drivers/gpu/drm/i915/display/intel_display_rps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/imu_v11_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/tu102.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v11_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga102.o
CC [M] drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv04.o
CC [M] drivers/gpu/drm/i915/display/intel_dpll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv10.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v2_4.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv1a.o
CC [M] drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv20.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.o
CC [M] drivers/gpu/drm/i915/display/intel_dpt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv41.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC [M] drivers/gpu/drm/i915/display/intel_drrs.o
CC [M] drivers/gpu/drm/i915/display/intel_dsb.o
CC [M] drivers/gpu/drm/i915/display/intel_fb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v3_0.o
CC [M] drivers/gpu/drm/i915/display/intel_fb_pin.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv44.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv49.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_4.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v5_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v5_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv4e.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/rammcp77.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v6_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf108.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.o
CC [M] drivers/gpu/drm/i915/display/intel_fbc.o
CC [M] drivers/gpu/drm/i915/display/intel_fdi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgm200.o
CC [M] drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp100.o
CC [M] drivers/gpu/drm/i915/display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp102.o
CC [M] drivers/gpu/drm/i915/display/intel_global_state.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mes.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC [M] drivers/gpu/drm/i915/display/intel_hdcp.o
CC [M] drivers/gpu/drm/amd/amdgpu/mes_v10_1.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr2.o
CC [M] drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC [M] drivers/gpu/drm/i915/display/intel_hotplug.o
CC [M] drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o
CC [M] drivers/gpu/drm/i915/display/intel_hti.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr5.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/mes_v11_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.o
CC [M] drivers/gpu/drm/i915/display/intel_load_detect.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v5_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o
CC [M] drivers/gpu/drm/i915/display/intel_lpe_audio.o
CC [M] drivers/gpu/drm/i915/display/intel_modeset_lock.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v6_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.o
CC [M] drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/i915/display/intel_modeset_setup.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v7_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC [M] drivers/gpu/drm/i915/display/intel_overlay.o
CC [M] drivers/gpu/drm/i915/display/intel_pch_display.o
CC [M] drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vce.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v3_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v4_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf119.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC [M] drivers/gpu/drm/i915/display/intel_plane_initial.o
CC [M] drivers/gpu/drm/i915/display/intel_pmdemand.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.o
CC [M] drivers/gpu/drm/i915/display/intel_psr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ga102.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gv100.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC [M] drivers/gpu/drm/i915/display/intel_quirks.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC [M] drivers/gpu/drm/i915/display/intel_sprite.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.o
CC [M] drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_sw_ring.o
CC [M] drivers/gpu/drm/i915/display/intel_tc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.o
CC [M] drivers/gpu/drm/i915/display/intel_vblank.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v1_0.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v2_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv04.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC [M] drivers/gpu/drm/i915/display/intel_vga.o
CC [M] drivers/gpu/drm/i915/display/intel_wm.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v2_5.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv4e.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v3_0.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/g94.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v4_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gf117.o
CC [M] drivers/gpu/drm/xe/xe_pmu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gf119.o
CC [M] drivers/gpu/drm/i915/display/i9xx_plane.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.o
CC [M] drivers/gpu/drm/i915/display/i9xx_wm.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.o
CC [M] drivers/gpu/drm/i915/display/skl_scaler.o
CC [M] drivers/gpu/drm/i915/display/skl_universal_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk104.o
CC [M] drivers/gpu/drm/i915/display/skl_watermark.o
CC [M] drivers/gpu/drm/i915/display/intel_acpi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk110.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbdev.o
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/pad.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.o
CC [M] drivers/gpu/drm/i915/display/intel_opregion.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv4e.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padg94.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgf119.o
CC [M] drivers/gpu/drm/i915/display/intel_fbdev.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgm200.o
CC [M] drivers/gpu/drm/i915/display/dvo_ch7017.o
CC [M] drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
HDRTEST drivers/gpu/drm/xe/abi/guc_klvs_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_errors_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_mmio_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bus.o
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv4e.o
HDRTEST drivers/gpu/drm/xe/abi/guc_messages_abi.h
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vma_types.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband_reg.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v1_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv50.o
CC [M] drivers/gpu/drm/i915/display/dvo_ivch.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_reg_defs.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_trace.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_reg.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_active_types.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_config.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busgf119.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bit.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgf119.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h
CC [M] drivers/gpu/drm/i915/display/dvo_ns2501.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/anx9805.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_mchbar_regs.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_debugfs.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/soc/intel_pch.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v2_0.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_runtime_pm.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v2_1.o
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v3_0.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_pci_config.h
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v9_0.o
CC [M] drivers/gpu/drm/i915/display/dvo_sil164.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v11_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v11_0_6.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object_frontbuffer.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/base.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/gf100.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_clock_gating.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_gt_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_active.h
HDRTEST drivers/gpu/drm/xe/regs/xe_reg_defs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_oa_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_guc_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_gt_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_gpu_commands.h
HDRTEST drivers/gpu/drm/xe/regs/xe_lrc_layout.h
HDRTEST drivers/gpu/drm/xe/regs/xe_engine_regs.h
HDRTEST drivers/gpu/drm/xe/tests/xe_test.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.o
CC [M] drivers/gpu/drm/i915/display/dvo_tfp410.o
CC [M] drivers/gpu/drm/i915/display/g4x_dp.o
HDRTEST drivers/gpu/drm/xe/tests/xe_pci_test.h
CC [M] drivers/gpu/drm/i915/display/g4x_hdmi.o
HDRTEST drivers/gpu/drm/xe/tests/xe_migrate_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_dma_buf_test.h
CC [M] drivers/gpu/drm/i915/display/icl_dsi.o
HDRTEST drivers/gpu/drm/xe/tests/xe_bo_test.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.o
CC [M] drivers/gpu/drm/i915/display/intel_backlight.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v13_0.o
HDRTEST drivers/gpu/drm/xe/xe_assert.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.o
CC [M] drivers/gpu/drm/i915/display/intel_crt.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v13_0_3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v13_0_6.o
HDRTEST drivers/gpu/drm/xe/xe_bb.h
HDRTEST drivers/gpu/drm/xe/xe_bb_types.h
CC [M] drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.o
HDRTEST drivers/gpu/drm/xe/xe_bo.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.o
HDRTEST drivers/gpu/drm/xe/xe_bo_doc.h
CC [M] drivers/gpu/drm/i915/display/intel_ddi.o
HDRTEST drivers/gpu/drm/xe/xe_bo_evict.h
HDRTEST drivers/gpu/drm/xe/xe_bo_types.h
HDRTEST drivers/gpu/drm/xe/xe_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_devcoredump.h
HDRTEST drivers/gpu/drm/xe/xe_devcoredump_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_reset.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp102.o
CC [M] drivers/gpu/drm/amd/amdgpu/mca_v3_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_module.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_chardev.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.o
CC [M] drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.o
HDRTEST drivers/gpu/drm/xe/xe_device.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.o
HDRTEST drivers/gpu/drm/xe/xe_device_sysfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_pasid.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_doorbell.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.o
HDRTEST drivers/gpu/drm/xe/xe_device_types.h
HDRTEST drivers/gpu/drm/xe/xe_display.h
HDRTEST drivers/gpu/drm/xe/xe_dma_buf.h
CC [M] drivers/gpu/drm/i915/display/intel_display_device.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.o
CC [M] drivers/gpu/drm/i915/display/intel_display_trace.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_flat_memory.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_queue.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.o
CC [M] drivers/gpu/drm/i915/display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.o
CC [M] drivers/gpu/drm/i915/display/intel_dp.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_aux.o
HDRTEST drivers/gpu/drm/xe/xe_drv.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_cik.o
HDRTEST drivers/gpu/drm/xe/xe_exec.h
HDRTEST drivers/gpu/drm/xe/xe_exec_queue.h
HDRTEST drivers/gpu/drm/xe/xe_exec_queue_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_vi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.o
HDRTEST drivers/gpu/drm/xe/xe_execlist.h
HDRTEST drivers/gpu/drm/xe/xe_execlist_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv41.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_mst.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv44.o
HDRTEST drivers/gpu/drm/xe/xe_force_wake.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v9.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v10.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v11.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.o
HDRTEST drivers/gpu/drm/xe/xe_force_wake_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_kernel_queue.o
CC [M] drivers/gpu/drm/i915/display/intel_dsi.o
HDRTEST drivers/gpu/drm/xe/xe_ggtt.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_vi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_v9.o
CC [M] drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mcp77.o
HDRTEST drivers/gpu/drm/xe/xe_ggtt_types.h
CC [M] drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC [M] drivers/gpu/drm/i915/display/intel_dvo.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process_queue_manager.o
HDRTEST drivers/gpu/drm/xe/xe_gt.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.o
CC [M] drivers/gpu/drm/i915/display/intel_gmbus.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_cik.o
HDRTEST drivers/gpu/drm/xe/xe_gt_clock.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm200.o
CC [M] drivers/gpu/drm/i915/display/intel_hdmi.o
HDRTEST drivers/gpu/drm/xe/xe_gt_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_vi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm20b.o
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs.h
CC [M] drivers/gpu/drm/i915/display/intel_lspcon.o
CC [M] drivers/gpu/drm/i915/display/intel_lvds.o
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp100.o
HDRTEST drivers/gpu/drm/xe/xe_gt_mcr.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp10b.o
HDRTEST drivers/gpu/drm/xe/xe_gt_pagefault.h
HDRTEST drivers/gpu/drm/xe/xe_gt_printk.h
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gv100.o
CC [M] drivers/gpu/drm/i915/display/intel_panel.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v9.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mem.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v11.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv04.o
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_topology.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_interrupt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_events.o
CC [M] drivers/gpu/drm/i915/display/intel_pps.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv50.o
CC [M] drivers/gpu/drm/i915/display/intel_qp_tables.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memgf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/cik_event_interrupt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_int_process_v9.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_int_process_v10.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_int_process_v11.o
CC [M] drivers/gpu/drm/i915/display/intel_sdvo.o
HDRTEST drivers/gpu/drm/xe/xe_gt_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_smi_events.o
HDRTEST drivers/gpu/drm/xe/xe_guc.h
CC [M] drivers/gpu/drm/i915/display/intel_snps_phy.o
HDRTEST drivers/gpu/drm/xe/xe_guc_ads.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ads_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_crat.o
CC [M] drivers/gpu/drm/i915/display/intel_tv.o
HDRTEST drivers/gpu/drm/xe/xe_guc_ct.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_debug.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv04.o
HDRTEST drivers/gpu/drm/xe/xe_guc_ct_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv41.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmmcp77.o
CC [M] drivers/gpu/drm/i915/display/intel_vdsc.o
CC [M] drivers/gpu/drm/i915/display/intel_vrr.o
HDRTEST drivers/gpu/drm/xe/xe_guc_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.o
HDRTEST drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
CC [M] drivers/gpu/drm/i915/display/vlv_dsi.o
HDRTEST drivers/gpu/drm/xe/xe_guc_fwif.h
HDRTEST drivers/gpu/drm/xe/xe_guc_hwconfig.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk104.o
HDRTEST drivers/gpu/drm/xe/xe_guc_log.h
HDRTEST drivers/gpu/drm/xe/xe_guc_log_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_pc.h
CC [M] drivers/gpu/drm/i915/display/vlv_dsi_pll.o
HDRTEST drivers/gpu/drm/xe/xe_guc_pc_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_submit.h
CC [M] drivers/gpu/drm/i915/i915_perf.o
HDRTEST drivers/gpu/drm/xe/xe_guc_submit_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
HDRTEST drivers/gpu/drm/xe/xe_guc_types.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.o
HDRTEST drivers/gpu/drm/xe/xe_huc.h
HDRTEST drivers/gpu/drm/xe/xe_huc_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_huc_types.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_cmd.o
HDRTEST drivers/gpu/drm/xe/xe_hw_engine.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.o
HDRTEST drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_irq.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm20b.o
HDRTEST drivers/gpu/drm/xe/xe_hw_engine_types.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_pm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_session.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.o
CC [M] drivers/gpu/drm/i915/i915_gpu_error.o
HDRTEST drivers/gpu/drm/xe/xe_hw_fence.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.o
HDRTEST drivers/gpu/drm/xe/xe_hw_fence_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.o
HDRTEST drivers/gpu/drm/xe/xe_irq.h
HDRTEST drivers/gpu/drm/xe/xe_lrc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/umem.o
HDRTEST drivers/gpu/drm/xe/xe_lrc_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ummu.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.o
HDRTEST drivers/gpu/drm/xe/xe_macros.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.o
HDRTEST drivers/gpu/drm/xe/xe_map.h
CC [M] drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.o
HDRTEST drivers/gpu/drm/xe/xe_migrate.h
HDRTEST drivers/gpu/drm/xe/xe_migrate_doc.h
CC [M] drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.o
CC [M] drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.o
CC [M] drivers/gpu/drm/i915/selftests/i915_random.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_job.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.o
HDRTEST drivers/gpu/drm/xe/xe_mmio.h
CC [M] drivers/gpu/drm/i915/selftests/i915_selftest.o
CC [M] drivers/gpu/drm/i915/selftests/igt_atomic.o
CC [M] drivers/gpu/drm/i915/selftests/igt_flush_test.o
CC [M] drivers/gpu/drm/i915/selftests/igt_live_test.o
CC [M] drivers/gpu/drm/i915/selftests/igt_mmap.o
CC [M] drivers/gpu/drm/i915/selftests/igt_reset.o
HDRTEST drivers/gpu/drm/xe/xe_mocs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_acp.o
HDRTEST drivers/gpu/drm/xe/xe_module.h
CC [M] drivers/gpu/drm/amd/amdgpu/../acp/acp_hw.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ioc32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.o
HDRTEST drivers/gpu/drm/xe/xe_oa.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.o
CC [M] drivers/gpu/drm/i915/selftests/igt_spinner.o
CC [M] drivers/gpu/drm/i915/selftests/librapl.o
HDRTEST drivers/gpu/drm/xe/xe_oa_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/arcturus_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/navi10_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/sienna_cichlid_ppt.o
CC [M] drivers/gpu/drm/i915/i915_vgpu.o
HDRTEST drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.o
HDRTEST drivers/gpu/drm/xe/xe_pat.h
HDRTEST drivers/gpu/drm/xe/xe_pci.h
HDRTEST drivers/gpu/drm/i915/display/intel_crtc_state_dump.h
HDRTEST drivers/gpu/drm/xe/xe_pci_types.h
HDRTEST drivers/gpu/drm/i915/display/hsw_ips.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.o
HDRTEST drivers/gpu/drm/xe/xe_pcode.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.o
HDRTEST drivers/gpu/drm/xe/xe_pcode_api.h
HDRTEST drivers/gpu/drm/i915/display/g4x_hdmi.h
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv04.o
HDRTEST drivers/gpu/drm/i915/display/intel_overlay.h
HDRTEST drivers/gpu/drm/i915/display/intel_display.h
HDRTEST drivers/gpu/drm/xe/xe_perf.h
HDRTEST drivers/gpu/drm/i915/display/skl_watermark_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_dmc.h
HDRTEST drivers/gpu/drm/xe/xe_platform_types.h
HDRTEST drivers/gpu/drm/xe/xe_pm.h
HDRTEST drivers/gpu/drm/xe/xe_pmu.h
HDRTEST drivers/gpu/drm/i915/display/intel_vga.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/cyan_skillfish_ppt.o
HDRTEST drivers/gpu/drm/i915/display/intel_audio.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/smu_v11_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu12/renoir_ppt.o
HDRTEST drivers/gpu/drm/i915/display/intel_lvds.h
HDRTEST drivers/gpu/drm/i915/display/intel_modeset_setup.h
HDRTEST drivers/gpu/drm/i915/display/intel_cdclk.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_limits.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.o
HDRTEST drivers/gpu/drm/i915/display/intel_hotplug.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv46.o
HDRTEST drivers/gpu/drm/xe/xe_pmu_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu12/smu_v12_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_dkl_phy.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_atomic.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_driver.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/aldebaran_ppt.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpll.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/yellow_carp_ppt.o
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_pll_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv4c.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp_mst.h
HDRTEST drivers/gpu/drm/i915/display/intel_fdi_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_0_ppt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_4_ppt.o
HDRTEST drivers/gpu/drm/i915/display/g4x_dp.h
HDRTEST drivers/gpu/drm/xe/xe_preempt_fence.h
HDRTEST drivers/gpu/drm/i915/display/intel_tc.h
HDRTEST drivers/gpu/drm/i915/display/intel_frontbuffer.h
HDRTEST drivers/gpu/drm/i915/display/intel_dsi_vbt.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.o
HDRTEST drivers/gpu/drm/i915/display/intel_psr.h
HDRTEST drivers/gpu/drm/i915/display/intel_crt.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.o
HDRTEST drivers/gpu/drm/i915/display/intel_opregion.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_5_ppt.o
HDRTEST drivers/gpu/drm/i915/display/intel_snps_phy_regs.h
HDRTEST drivers/gpu/drm/i915/display/i9xx_wm.h
HDRTEST drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_global_state.h
HDRTEST drivers/gpu/drm/i915/display/intel_lpe_audio.h
HDRTEST drivers/gpu/drm/i915/display/intel_drrs.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_rps.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.o
HDRTEST drivers/gpu/drm/xe/xe_preempt_fence_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gp100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.o
HDRTEST drivers/gpu/drm/xe/xe_pt.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_7_ppt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.o
HDRTEST drivers/gpu/drm/xe/xe_pt_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_6_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/amdgpu_smu.o
HDRTEST drivers/gpu/drm/xe/xe_pt_walk.h
HDRTEST drivers/gpu/drm/xe/xe_query.h
HDRTEST drivers/gpu/drm/i915/display/intel_fbdev.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.o
HDRTEST drivers/gpu/drm/i915/display/intel_pps_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf100.o
HDRTEST drivers/gpu/drm/i915/display/intel_hdmi.h
HDRTEST drivers/gpu/drm/i915/display/intel_fdi.h
HDRTEST drivers/gpu/drm/i915/display/intel_fb.h
HDRTEST drivers/gpu/drm/i915/display/intel_qp_tables.h
HDRTEST drivers/gpu/drm/i915/display/intel_dsb_regs.h
HDRTEST drivers/gpu/drm/xe/xe_range_fence.h
HDRTEST drivers/gpu/drm/i915/display/intel_vdsc.h
HDRTEST drivers/gpu/drm/xe/xe_reg_sr.h
HDRTEST drivers/gpu/drm/xe/xe_reg_sr_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_snps_phy.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_core.h
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_pll.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.o
HDRTEST drivers/gpu/drm/i915/display/intel_dvo_dev.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf119.o
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.o
HDRTEST drivers/gpu/drm/i915/display/intel_sdvo_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_pch_refclk.h
HDRTEST drivers/gpu/drm/i915/display/intel_modeset_lock.h
HDRTEST drivers/gpu/drm/xe/xe_reg_whitelist.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_trace.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smumgr.o
HDRTEST drivers/gpu/drm/xe/xe_res_cursor.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_power.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux_regs.h
HDRTEST drivers/gpu/drm/xe/xe_ring_ops.h
HDRTEST drivers/gpu/drm/i915/display/i9xx_plane.h
HDRTEST drivers/gpu/drm/xe/xe_ring_ops_types.h
HDRTEST drivers/gpu/drm/xe/xe_rtp.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux_backlight.h
HDRTEST drivers/gpu/drm/i915/display/intel_dpll_mgr.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk208.o
HDRTEST drivers/gpu/drm/xe/xe_rtp_types.h
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.o
HDRTEST drivers/gpu/drm/xe/xe_sa.h
HDRTEST drivers/gpu/drm/i915/display/intel_plane_initial.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu8_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.o
HDRTEST drivers/gpu/drm/xe/xe_sa_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/tonga_smumgr.o
HDRTEST drivers/gpu/drm/xe/xe_sched_job.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/fiji_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.o
HDRTEST drivers/gpu/drm/xe/xe_sched_job_types.h
HDRTEST drivers/gpu/drm/xe/xe_step.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/polaris10_smumgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_device.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.o
HDRTEST drivers/gpu/drm/i915/display/intel_fifo_underrun.h
HDRTEST drivers/gpu/drm/i915/display/intel_cursor.h
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.o
HDRTEST drivers/gpu/drm/xe/xe_step_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/iceland_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf100.o
HDRTEST drivers/gpu/drm/xe/xe_sync.h
HDRTEST drivers/gpu/drm/i915/display/intel_cx0_phy.h
HDRTEST drivers/gpu/drm/xe/xe_sync_types.h
HDRTEST drivers/gpu/drm/i915/display/skl_scaler.h
HDRTEST drivers/gpu/drm/i915/display/intel_hti.h
HDRTEST drivers/gpu/drm/xe/xe_tile.h
HDRTEST drivers/gpu/drm/xe/xe_tile_sysfs.h
HDRTEST drivers/gpu/drm/i915/display/icl_dsi_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_atomic_plane.h
HDRTEST drivers/gpu/drm/i915/display/skl_watermark.h
HDRTEST drivers/gpu/drm/i915/display/intel_fbc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu7_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf117.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_reg_defs.h
HDRTEST drivers/gpu/drm/xe/xe_tile_sysfs_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega10_smumgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_acpi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk104.o
HDRTEST drivers/gpu/drm/xe/xe_trace.h
HDRTEST drivers/gpu/drm/i915/display/intel_connector.h
HDRTEST drivers/gpu/drm/i915/display/intel_dpt.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu10_smumgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_quirks.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk20a.o
HDRTEST drivers/gpu/drm/xe/xe_ttm_stolen_mgr.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gm200.o
HDRTEST drivers/gpu/drm/xe/xe_ttm_sys_mgr.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_link_training.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_vram_mgr.h
HDRTEST drivers/gpu/drm/i915/display/intel_color.h
HDRTEST drivers/gpu/drm/i915/display/intel_crtc.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_debugfs.h
HDRTEST drivers/gpu/drm/i915/display/intel_modeset_verify.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/ci_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gp10b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_power_well.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_psr_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_wm.h
HDRTEST drivers/gpu/drm/xe/xe_tuning.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fannil.o
HDRTEST drivers/gpu/drm/i915/display/intel_pipe_crc.h
HDRTEST drivers/gpu/drm/xe/xe_uc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.o
HDRTEST drivers/gpu/drm/i915/display/intel_audio_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_panel.h
HDRTEST drivers/gpu/drm/xe/xe_uc_debugfs.h
HDRTEST drivers/gpu/drm/i915/display/intel_sprite.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega12_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.o
HDRTEST drivers/gpu/drm/xe/xe_uc_fw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/ic.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.o
HDRTEST drivers/gpu/drm/xe/xe_uc_fw_abi.h
HDRTEST drivers/gpu/drm/xe/xe_uc_fw_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vegam_smumgr.o
HDRTEST drivers/gpu/drm/xe/xe_uc_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu9_smumgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_wm_types.h
HDRTEST drivers/gpu/drm/xe/xe_vm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega20_smumgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/hwmgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.o
HDRTEST drivers/gpu/drm/i915/display/intel_tv.h
HDRTEST drivers/gpu/drm/i915/display/intel_hti_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/processpptables.o
HDRTEST drivers/gpu/drm/xe/xe_vm_doc.h
HDRTEST drivers/gpu/drm/xe/xe_vm_madvise.h
HDRTEST drivers/gpu/drm/xe/xe_vm_types.h
HDRTEST drivers/gpu/drm/xe/xe_wa.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.o
HDRTEST drivers/gpu/drm/i915/display/intel_vrr.h
HDRTEST drivers/gpu/drm/xe/xe_wait_user_fence.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/hardwaremanager.o
HDRTEST drivers/gpu/drm/xe/xe_wopcm.h
HDRTEST drivers/gpu/drm/i915/display/intel_load_detect.h
HDRTEST drivers/gpu/drm/xe/xe_wopcm_types.h
HDRTEST drivers/gpu/drm/i915/display/skl_universal_plane.h
LD [M] drivers/gpu/drm/xe/xe.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.o
HDRTEST drivers/gpu/drm/i915/display/intel_mg_phy_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu8_hwmgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pppcielanes.o
HDRTEST drivers/gpu/drm/i915/display/intel_bw.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/process_pptables_v1_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_irq.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomfwctrl.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_de.h
HDRTEST drivers/gpu/drm/i915/display/intel_lvds_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_gmbus_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_powertune.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_thermal.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_clockpowergating.o
HDRTEST drivers/gpu/drm/i915/display/intel_dvo.h
HDRTEST drivers/gpu/drm/i915/display/intel_sdvo.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux.h
HDRTEST drivers/gpu/drm/i915/display/intel_vdsc_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.o
HDRTEST drivers/gpu/drm/i915/display/intel_combo_phy.h
HDRTEST drivers/gpu/drm/i915/display/intel_dvo_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_processpptables.o
HDRTEST drivers/gpu/drm/i915/display/intel_gmbus.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm200.o
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_powertune.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.o
HDRTEST drivers/gpu/drm/i915/display/intel_dmc_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.o
HDRTEST drivers/gpu/drm/i915/display/intel_ddi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.o
HDRTEST drivers/gpu/drm/i915/display/intel_hotplug_irq.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.o
HDRTEST drivers/gpu/drm/i915/display/intel_tv_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_thermal.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu10_hwmgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pp_psm.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsb.h
HDRTEST drivers/gpu/drm/i915/display/intel_bios.h
HDRTEST drivers/gpu/drm/i915/display/intel_pch_display.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/base.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_processpptables.o
HDRTEST drivers/gpu/drm/i915/display/intel_backlight.h
HDRTEST drivers/gpu/drm/i915/display/intel_vblank.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_hwmgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.o
HDRTEST drivers/gpu/drm/i915/display/intel_pmdemand.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_thermal.o
HDRTEST drivers/gpu/drm/i915/display/intel_backlight_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pp_overdriver.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu_helper.o
HDRTEST drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/uvfn.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_reset.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/gv100.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_power_map.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_processpptables.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_hwmgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_powertune.o
HDRTEST drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
HDRTEST drivers/gpu/drm/i915/display/icl_dsi.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_thermal.o
HDRTEST drivers/gpu/drm/i915/display/intel_lspcon.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpio_phy.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/common_baco.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp_hdcp.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_baco.o
HDRTEST drivers/gpu/drm/i915/display/intel_fb_pin.h
HDRTEST drivers/gpu/drm/i915/display/intel_pps.h
HDRTEST drivers/gpu/drm/i915/display/intel_sprite_uapi.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/ga100.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_region.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_baco.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gpio.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_baco.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_context_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu9_baco.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_lmem.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_mman.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/tonga_baco.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_object_types.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_context.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/polaris_baco.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_clflush.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/fiji_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ci_baco.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gf117.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_tiling.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_baco.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_stolen.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/amd_powerplay.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_create.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm_move.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ioctls.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gm20b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/falcon.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/legacy_dpm.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_domain.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/xtensa.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/kv_dpm.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_internal.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/kv_smc.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_context.h
HDRTEST drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_gem_object.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_dmabuf.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_smc.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_pm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gm107.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_userptr.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gm200.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_pm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_crtc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_irq.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_shrinker.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gp102.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gemfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gv100.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_object.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_object_frontbuffer.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/dc_fpu.o
HDRTEST drivers/gpu/drm/i915/gt/intel_timeline_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_services.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_psr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_replay.o
HDRTEST drivers/gpu/drm/i915/gt/selftest_engine.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_hdcp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_crc.o
HDRTEST drivers/gpu/drm/i915/gt/intel_breadcrumbs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_heartbeat.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/conversion.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/fixpt31_32.o
HDRTEST drivers/gpu/drm/i915/gt/intel_context_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.o
HDRTEST drivers/gpu/drm/i915/gt/intel_execlists_submission.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_pm.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/pci.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/user.o
HDRTEST drivers/gpu/drm/i915/gt/selftest_rc6.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/vector.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/dc_common.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.o
HDRTEST drivers/gpu/drm/i915/gt/intel_llc_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_interface.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_helper.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt.h
HDRTEST drivers/gpu/drm/i915/gt/intel_region_lmem.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_requests.h
HDRTEST drivers/gpu/drm/i915/gt/intel_ggtt_gmch.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_print.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/head.o
HDRTEST drivers/gpu/drm/i915/gt/gen8_ppgtt.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_common.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table_helper2.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_mcr.h
HDRTEST drivers/gpu/drm/i915/gt/intel_timeline.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce60/command_table_helper_dce60.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/vga.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce112/command_table_helper_dce112.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.o
HDRTEST drivers/gpu/drm/i915/gt/gen6_engine_cs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce112/command_table_helper2_dce112.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dce_calcs.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/custom_float.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/bw_fixed.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_rq_dlg_helpers.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dml1_display_rq_dlg_calc.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn10/dcn10_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.o
HDRTEST drivers/gpu/drm/i915/gt/intel_workarounds_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/dcn20_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_vba.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.o
HDRTEST drivers/gpu/drm/i915/gt/selftest_rps.h
HDRTEST drivers/gpu/drm/i915/gt/intel_sa_media.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_rq_dlg_calc_20.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_clock_utils.h
HDRTEST drivers/gpu/drm/i915/gt/intel_rps_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20.o
HDRTEST drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_rq_dlg_calc_20v2.o
HDRTEST drivers/gpu/drm/i915/gt/sysfs_engines.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20v2.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_rq_dlg_calc_21.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_mode_vba_21.o
HDRTEST drivers/gpu/drm/i915/gt/gen7_renderclear.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.o
HDRTEST drivers/gpu/drm/i915/gt/intel_context.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.o
HDRTEST drivers/gpu/drm/i915/gt/intel_wopcm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.o
HDRTEST drivers/gpu/drm/i915/gt/intel_mocs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.o
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_pm.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_sysfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/dcn31_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn321/dcn321_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn301/dcn301_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/udisp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn302/dcn302_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/uhead.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/dcn314_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.o
HDRTEST drivers/gpu/drm/i915/gt/intel_rc6.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/gf119.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/gv100.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_defines.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/user.o
HDRTEST drivers/gpu/drm/i915/gt/intel_ring_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.o
HDRTEST drivers/gpu/drm/i915/gt/intel_workarounds.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/rc_calc_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calcs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calc_math.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calc_auto.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/cgrp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce100/dce_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce110/dce110_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce112/dce112_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce120/dce120_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/chid.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv1_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.o
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/runq.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv2_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_pm_irq.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.o
HDRTEST drivers/gpu/drm/i915/gt/shmem_utils.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.o
HDRTEST drivers/gpu/drm/i915/gt/intel_engine.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/g98.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_smu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_clk_mgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_reset_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/ucgrp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_regs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_reset.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_audio.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_link_encoder.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.o
HDRTEST drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv15.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv17.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_scl_filters.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_dmcu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_uc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv44.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_abm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_ipp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_i2c.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_i2c_hw.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_i2c_sw.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_print.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_fw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gt200.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/mcp79.o
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gt215.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_abm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/mcp89.o
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_abm_lcd.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.o
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.o
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.o
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_panel_cntl.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_huc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_hw_lock_mgr.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_binary_headers.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_outbox.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_replay.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/gpio_base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/gpio_service.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_factory.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_huc_print.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_gpio.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_hpd.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_huc_fw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_ddc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_generic.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_translate.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce60/hw_translate_dce60.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce60/hw_factory_dce60.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce80/hw_translate_dce80.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce80/hw_factory_dce80.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce110/hw_translate_dce110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce110/hw_factory_dce110.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp108.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce120/hw_translate_dce120.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce120/hw_factory_dce120.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn10/hw_translate_dcn10.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn10/hw_factory_dcn10.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn20/hw_translate_dcn20.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn20/hw_factory_dcn20.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn21/hw_translate_dcn21.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn21/hw_factory_dcn21.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn30/hw_translate_dcn30.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn30/hw_factory_dcn30.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf110.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn315/hw_translate_dcn315.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn315/hw_factory_dcn315.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn32/hw_translate_dcn32.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn32/hw_factory_dcn32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/irq_service.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dce60/irq_service_dce60.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dce80/irq_service_dce80.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dce110/irq_service_dce110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dce120/irq_service_dce120.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk110b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn10/irq_service_dcn10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk208.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn20/irq_service_dcn20.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn201/irq_service_dcn201.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm20b.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn30/irq_service_dcn30.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn302/irq_service_dcn302.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_rc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn303/irq_service_dcn303.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn31/irq_service_dcn31.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn314/irq_service_dcn314.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn315/irq_service_dcn315.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn32/irq_service_dcn32.o
HDRTEST drivers/gpu/drm/i915/gt/intel_hwconfig.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.o
HDRTEST drivers/gpu/drm/i915/gt/intel_llc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxtu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_detection.o
HDRTEST drivers/gpu/drm/i915/gt/gen8_engine_cs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.o
HDRTEST drivers/gpu/drm/i915/gt/intel_sseu_debugfs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_rc6_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_resource.o
HDRTEST drivers/gpu/drm/i915/gt/intel_context_param.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_validation.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_trace.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_fpga.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gpu_commands.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/g84.o
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_user.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dpia.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_hpo_dp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_irq.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/base.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gsc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_hpd.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_ddc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gt215.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dpcd.o
HDRTEST drivers/gpu/drm/i915/gt/intel_rps.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.o
HDRTEST drivers/gpu/drm/i915/gt/intel_tlb.h
CC [M] drivers/gpu/drm/nouveau/nvkm
^ permalink raw reply [flat|nested] 88+ messages in thread* [Intel-xe] ✗ CI.Hooks: failure for Add OA functionality to Xe (rev6)
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (24 preceding siblings ...)
2023-09-19 16:28 ` [Intel-xe] ✓ CI.Build: " Patchwork
@ 2023-09-19 16:28 ` Patchwork
2023-09-19 16:29 ` [Intel-xe] ✓ CI.checksparse: success " Patchwork
` (3 subsequent siblings)
29 siblings, 0 replies; 88+ messages in thread
From: Patchwork @ 2023-09-19 16:28 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
== Series Details ==
Series: Add OA functionality to Xe (rev6)
URL : https://patchwork.freedesktop.org/series/121084/
State : failure
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ pwd
+ ls -la
/workspace
total 1076
drwxrwxr-x 10 1003 1003 4096 Sep 19 16:28 .
drwxr-xr-x 1 root root 4096 Sep 19 16:28 ..
-rw-rw-r-- 1 1003 1003 789718 Sep 19 16:28 build.log
-rw-rw-r-- 1 1003 1003 5489 Sep 19 16:19 checkpatch.log
drwxrwxr-x 5 1003 1003 4096 Sep 19 16:17 ci
drwxrwxr-x 9 1003 1003 4096 Sep 19 16:17 docker
drwxrwxr-x 8 1003 1003 4096 Sep 19 16:17 .git
-rw-rw-r-- 1 1003 1003 1355 Sep 19 16:19 git_apply.log
drwxrwxr-x 4 1003 1003 4096 Sep 19 16:17 .github
-rw-rw-r-- 1 1003 1003 233 Sep 19 16:17 .groovylintrc.json
-rw-rw-r-- 1 1003 1003 78 Sep 19 16:28 hooks.log
drwxrwxr-x 31 1003 1003 4096 Sep 19 16:27 kernel
-rw-rw-r-- 1 1003 1003 209217 Sep 19 16:19 kernel.mbox
-rw-rw-r-- 1 1003 1003 26482 Sep 19 16:21 kunit.log
-rw-rw-r-- 1 1003 1003 48 Sep 19 16:19 parent.tag
drwxrwxr-x 45 1003 1003 4096 Sep 19 16:17 pipelines
-rw-rw-r-- 1 1003 1003 793 Sep 19 16:17 README.adoc
drwxrwxr-x 3 1003 1003 4096 Sep 19 16:17 scripts
drwxrwxr-x 2 1003 1003 4096 Sep 19 16:17 .vscode
+ uname -a
Linux 7864c87979a7 5.4.0-149-generic #166-Ubuntu SMP Tue Apr 18 16:51:45 UTC 2023 x86_64 x86_64 x86_64 GNU/Linux
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
+ '[' -n /workspace ']'
+ git_args='-C /workspace/kernel'
+ git_log_args=
+ git --no-pager -C /workspace/kernel log --format=oneline --abbrev-commit
915866552 drm/xe/uapi: Convert OA property key/value pairs to a struct
28114c1e1 drm/xe/uapi: Use OA unit id to identify OA unit
5a9b1d54b drm/xe/uapi: Drop OA_IOCTL_VERSION
8516dd55c drm/xe/uapi: More OA uapi fixes/additions
fd2e16bcb drm/xe/oa: Remove filtering reports on context id
0904e0bef drm/xe/oa: Make xe_oa_timestamp_frequency per gt
53b7fa776 drm/xe/uapi: Remove OA format names from OA uapi
ac80af02e drm/xe/uapi: Simplify OA configs in uapi
608a27016 drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
091754c18 drm/xe/uapi: "Perf" layer to support multiple perf counter stream types
b725b4c7e drm/xe/oa: Override GuC RC with OA on PVC
28086b4b9 drm/xe/oa: Implement queries
724ef3c8a drm/xe/oa: Read file_operation
779cd1d01 drm/xe/oa: Expose OA stream fd
16aba32a9 drm/xe/oa: OA stream initialization
9d835612f drm/xe/oa: Start implementing OA stream open ioctl
07959d2ac drm/xe/oa: Add/remove config ioctl's
fb603a692 drm/xe/oa: Module init/exit and probe/remove
e003a1a12 drm/xe/oa: Add registers and GPU commands used by OA
a75037184 drm/xe/oa: Add OA types
d26d60548 drm/xe/uapi: Introduce OA (observability architecture) uapi
fac2e20c7 Revert "FIXME: drm/i915/hpd: skip intel_hpd_poll_fini() for non-display paths"
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ cd /workspace/kernel
+ grep -q -e '^CONFIG_DRM_XE_DISPLAY=[yY]' /workspace/kernel/build64-default/.config
+ RESTORE_DISPLAY_CONFIG=1
+ trap cleanup EXIT
+ ./scripts/config --file /workspace/kernel/build64-default/.config --disable CONFIG_DRM_XE_DISPLAY
++ nproc
+ make -j48 O=/workspace/kernel/build64-default modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-default'
SYNC include/config/auto.conf.cmd
GEN Makefile
GEN Makefile
UPD include/generated/compile.h
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
DESCEND objtool
CALL ../scripts/checksyscalls.sh
HOSTCC /workspace/kernel/build64-default/tools/objtool/fixdep.o
HOSTLD /workspace/kernel/build64-default/tools/objtool/fixdep-in.o
LINK /workspace/kernel/build64-default/tools/objtool/fixdep
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-default/tools/objtool/weak.o
CC /workspace/kernel/build64-default/tools/objtool/check.o
CC /workspace/kernel/build64-default/tools/objtool/special.o
CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-default/tools/objtool/elf.o
CC /workspace/kernel/build64-default/tools/objtool/objtool.o
CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-default/tools/objtool/libstring.o
CC /workspace/kernel/build64-default/tools/objtool/libctype.o
CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-default/tools/objtool/librbtree.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o
LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-default/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-default'
++ nproc
+ make -j48 O=/workspace/kernel/build64-default M=drivers/gpu/drm/xe W=1
make[1]: Entering directory '/workspace/kernel/build64-default'
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC [M] drivers/gpu/drm/xe/xe_oa.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC [M] drivers/gpu/drm/xe/xe_perf.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
../drivers/gpu/drm/xe/xe_perf.c:9:5: error: no previous prototype for ‘xe_oa_ioctl’ [-Werror=missing-prototypes]
9 | int xe_oa_ioctl(struct drm_device *dev, struct drm_xe_perf_param *arg, struct drm_file *file)
| ^~~~~~~~~~~
cc1: all warnings being treated as errors
make[3]: *** [../scripts/Makefile.build:243: drivers/gpu/drm/xe/xe_perf.o] Error 1
make[3]: *** Waiting for unfinished jobs....
../drivers/gpu/drm/xe/xe_guc_pc.c:821: warning: expecting prototype for xe_guc_pc_override_gucrc_mode(). Prototype was for xe_guc_pc_unset_gucrc_mode() instead
make[2]: *** [/workspace/kernel/Makefile:2032: drivers/gpu/drm/xe] Error 2
make[1]: *** [/workspace/kernel/Makefile:234: __sub-make] Error 2
make[1]: Leaving directory '/workspace/kernel/build64-default'
make: *** [Makefile:234: __sub-make] Error 2
+ cleanup
+ '[' 1 -eq 1 ']'
+ ./scripts/config --file /workspace/kernel/build64-default/.config --enable CONFIG_DRM_XE_DISPLAY
run-parts: /workspace/ci/hooks/10-build-W1 exited with return code 2
^ permalink raw reply [flat|nested] 88+ messages in thread* [Intel-xe] ✓ CI.checksparse: success for Add OA functionality to Xe (rev6)
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (25 preceding siblings ...)
2023-09-19 16:28 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
@ 2023-09-19 16:29 ` Patchwork
2023-09-19 17:04 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
` (2 subsequent siblings)
29 siblings, 0 replies; 88+ messages in thread
From: Patchwork @ 2023-09-19 16:29 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
== Series Details ==
Series: Add OA functionality to Xe (rev6)
URL : https://patchwork.freedesktop.org/series/121084/
State : success
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast fac2e20c785bd790c250e4f4799dfa28e44e7082
Sparse version: 0.6.1 (Ubuntu: 0.6.1-2build1)
Fast mode used, each commit won't be checked separately.
Okay!
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 88+ messages in thread* [Intel-xe] ✗ CI.BAT: failure for Add OA functionality to Xe (rev6)
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (26 preceding siblings ...)
2023-09-19 16:29 ` [Intel-xe] ✓ CI.checksparse: success " Patchwork
@ 2023-09-19 17:04 ` Patchwork
2023-10-14 1:05 ` [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Umesh Nerlige Ramappa
2023-10-20 7:44 ` Lionel Landwerlin
29 siblings, 0 replies; 88+ messages in thread
From: Patchwork @ 2023-09-19 17:04 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 9780 bytes --]
== Series Details ==
Series: Add OA functionality to Xe (rev6)
URL : https://patchwork.freedesktop.org/series/121084/
State : failure
== Summary ==
CI Bug Log - changes from xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082_BAT -> xe-pw-121084v6_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-121084v6_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-121084v6_BAT, please notify your bug team (lgci.bug.filing@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-121084v6_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_balancer@twice-cm-virtual-rebind:
- bat-adlp-7: [PASS][1] -> [FAIL][2] +42 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-adlp-7/igt@xe_exec_balancer@twice-cm-virtual-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-adlp-7/igt@xe_exec_balancer@twice-cm-virtual-rebind.html
* igt@xe_exec_balancer@twice-virtual-userptr-invalidate:
- bat-dg2-oem2: [PASS][3] -> [FAIL][4] +38 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-dg2-oem2/igt@xe_exec_balancer@twice-virtual-userptr-invalidate.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-dg2-oem2/igt@xe_exec_balancer@twice-virtual-userptr-invalidate.html
* igt@xe_exec_compute_mode@twice-userptr-invalidate:
- bat-atsm-2: [PASS][5] -> [FAIL][6] +38 other tests fail
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-atsm-2/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-atsm-2/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-prefetch:
- bat-pvc-2: NOTRUN -> [FAIL][7] +72 other tests fail
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-pvc-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-prefetch.html
* igt@xe_exec_threads@threads-mixed-basic:
- bat-dg2-oem2: [PASS][8] -> [TIMEOUT][9] +4 other tests timeout
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-dg2-oem2/igt@xe_exec_threads@threads-mixed-basic.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-dg2-oem2/igt@xe_exec_threads@threads-mixed-basic.html
- bat-atsm-2: [PASS][10] -> [TIMEOUT][11] +2 other tests timeout
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-atsm-2/igt@xe_exec_threads@threads-mixed-basic.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-atsm-2/igt@xe_exec_threads@threads-mixed-basic.html
* igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate-race:
- bat-adlp-7: [PASS][12] -> [TIMEOUT][13] +5 other tests timeout
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-adlp-7/igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate-race.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-adlp-7/igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate-race.html
- bat-pvc-2: NOTRUN -> [INCOMPLETE][14]
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-pvc-2/igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate-race.html
* igt@xe_exec_threads@threads-mixed-userptr-invalidate:
- bat-pvc-2: NOTRUN -> [TIMEOUT][15] +4 other tests timeout
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-pvc-2/igt@xe_exec_threads@threads-mixed-userptr-invalidate.html
#### Warnings ####
* igt@xe_module_load@load:
- bat-pvc-2: [INCOMPLETE][16] ([Intel XE#597]) -> [DMESG-WARN][17]
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-pvc-2/igt@xe_module_load@load.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-pvc-2/igt@xe_module_load@load.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@xe_create@create-execqueues-leak}:
- bat-atsm-2: [PASS][18] -> [WARN][19] +1 other test warn
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-atsm-2/igt@xe_create@create-execqueues-leak.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-atsm-2/igt@xe_create@create-execqueues-leak.html
- bat-pvc-2: NOTRUN -> [WARN][20] +1 other test warn
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-pvc-2/igt@xe_create@create-execqueues-leak.html
* {igt@xe_create@create-execqueues-noleak}:
- bat-adlp-7: [PASS][21] -> [WARN][22] +1 other test warn
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-adlp-7/igt@xe_create@create-execqueues-noleak.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-adlp-7/igt@xe_create@create-execqueues-noleak.html
- bat-dg2-oem2: [PASS][23] -> [WARN][24] +1 other test warn
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-dg2-oem2/igt@xe_create@create-execqueues-noleak.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-dg2-oem2/igt@xe_create@create-execqueues-noleak.html
* {igt@xe_exec_basic@no-exec-bindexecqueue}:
- bat-dg2-oem2: [PASS][25] -> [FAIL][26] +10 other tests fail
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-dg2-oem2/igt@xe_exec_basic@no-exec-bindexecqueue.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-dg2-oem2/igt@xe_exec_basic@no-exec-bindexecqueue.html
* {igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind}:
- bat-atsm-2: [PASS][27] -> [FAIL][28] +10 other tests fail
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-atsm-2/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-atsm-2/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind.html
* {igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate}:
- bat-pvc-2: NOTRUN -> [FAIL][29] +25 other tests fail
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-pvc-2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate.html
* {igt@xe_vm@bind-execqueues-independent}:
- bat-adlp-7: [PASS][30] -> [FAIL][31] +11 other tests fail
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-adlp-7/igt@xe_vm@bind-execqueues-independent.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-adlp-7/igt@xe_vm@bind-execqueues-independent.html
Known issues
------------
Here are the changes found in xe-pw-121084v6_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_exec_compute_mode@twice-basic:
- bat-adlp-7: [PASS][32] -> [FAIL][33] ([Intel XE#715])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-adlp-7/igt@xe_exec_compute_mode@twice-basic.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-adlp-7/igt@xe_exec_compute_mode@twice-basic.html
* igt@xe_exec_threads@threads-mixed-fd-basic:
- bat-dg2-oem2: [PASS][34] -> [TIMEOUT][35] ([Intel XE#280] / [Intel XE#474])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-dg2-oem2/igt@xe_exec_threads@threads-mixed-fd-basic.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-dg2-oem2/igt@xe_exec_threads@threads-mixed-fd-basic.html
- bat-atsm-2: [PASS][36] -> [INCOMPLETE][37] ([Intel XE#280])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082/bat-atsm-2/igt@xe_exec_threads@threads-mixed-fd-basic.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/bat-atsm-2/igt@xe_exec_threads@threads-mixed-fd-basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/280
[Intel XE#474]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/474
[Intel XE#597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/597
[Intel XE#715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/715
Build changes
-------------
* Linux: xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082 -> xe-pw-121084v6
IGT_7493: 2517e42d612e0c1ca096acf8b5f6177f7ef4bce7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-383-fac2e20c785bd790c250e4f4799dfa28e44e7082: fac2e20c785bd790c250e4f4799dfa28e44e7082
xe-pw-121084v6: 121084v6
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-121084v6/index.html
[-- Attachment #2: Type: text/html, Size: 10995 bytes --]
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 00/21] Add OA functionality to Xe
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (27 preceding siblings ...)
2023-09-19 17:04 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
@ 2023-10-14 1:05 ` Umesh Nerlige Ramappa
2023-10-20 7:44 ` Lionel Landwerlin
29 siblings, 0 replies; 88+ messages in thread
From: Umesh Nerlige Ramappa @ 2023-10-14 1:05 UTC (permalink / raw)
To: Ashutosh Dixit; +Cc: intel-xe
Hi Ashutosh,
Overall, the non-uApi code looks good. I believe you are refining the
uApi further, so will wait for that. Can you also please drop unused
code and replace the patches with the final code for each piece. I can
review it from scratch and refer to i915 offline as needed.
Thanks,
Umesh
On Tue, Sep 19, 2023 at 09:10:28AM -0700, Ashutosh Dixit wrote:
>This patchset is the initial port of i915 perf/OA functionality to the XE
>driver. The following features in i915 have not been ported and will be
>added (as new patches) if/as they are needed:
>
>* Inline batch submission on stream exec_queue/hw_engine
>* NOA wait
>* GuC ctx id (guc_sw_ctx_id)
>* CTX_R_PWR_CLK_STATE/GEN8_R_PWR_CLK_STATE
>* hold_preemption (DRM_XE_OA_PROP_HOLD_PREEMPTION)
>* sseu_config (DRM_XE_OA_PROP_GLOBAL_SSEU)
>* MTL bios_c6_setup
>* ratelimits
>* compat ioctl
>
>I am providing the following additional HAX patch (not part of this series)
>to help review these patches:
>
>https://patchwork.freedesktop.org/patch/551683/?series=120100&rev=4
>
>The commit message in the above patch explains how it can be useful for
>reviewing this series.
>
>This series is also available at:
> https://gitlab.freedesktop.org/adixit/kernel/-/tree/xe-oa
>
>The series has been tested against this IGT series:
> https://gitlab.freedesktop.org/adixit/igt-gpu-tools/-/tree/xe-oa
>
>v2: Fix build
>v3: Rebase, due to s/xe_engine/xe_exec_queue/
>v4: Re-run for testing
>v5: Address review comments, new patches 11 through 17
>v6: New patches 18 through 21
>
>Ashutosh Dixit (21):
> drm/xe/uapi: Introduce OA (observability architecture) uapi
> drm/xe/oa: Add OA types
> drm/xe/oa: Add registers and GPU commands used by OA
> drm/xe/oa: Module init/exit and probe/remove
> drm/xe/oa: Add/remove config ioctl's
> drm/xe/oa: Start implementing OA stream open ioctl
> drm/xe/oa: OA stream initialization
> drm/xe/oa: Expose OA stream fd
> drm/xe/oa: Read file_operation
> drm/xe/oa: Implement queries
> drm/xe/oa: Override GuC RC with OA on PVC
> drm/xe/uapi: "Perf" layer to support multiple perf counter stream
> types
> drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
> drm/xe/uapi: Simplify OA configs in uapi
> drm/xe/uapi: Remove OA format names from OA uapi
> drm/xe/oa: Make xe_oa_timestamp_frequency per gt
> drm/xe/oa: Remove filtering reports on context id
> drm/xe/uapi: More OA uapi fixes/additions
> drm/xe/uapi: Drop OA_IOCTL_VERSION
> drm/xe/uapi: Use OA unit id to identify OA unit
> drm/xe/uapi: Convert OA property key/value pairs to a struct
>
> drivers/gpu/drm/xe/Makefile | 2 +
> drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +
> drivers/gpu/drm/xe/regs/xe_gpu_commands.h | 13 +
> drivers/gpu/drm/xe/regs/xe_oa_regs.h | 173 ++
> drivers/gpu/drm/xe/xe_device.c | 13 +
> drivers/gpu/drm/xe/xe_device_types.h | 4 +
> drivers/gpu/drm/xe/xe_gt_types.h | 4 +
> drivers/gpu/drm/xe/xe_guc_pc.c | 60 +
> drivers/gpu/drm/xe/xe_guc_pc.h | 3 +
> drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 +
> drivers/gpu/drm/xe/xe_module.c | 5 +
> drivers/gpu/drm/xe/xe_oa.c | 2314 +++++++++++++++++++++
> drivers/gpu/drm/xe/xe_oa.h | 27 +
> drivers/gpu/drm/xe/xe_oa_types.h | 307 +++
> drivers/gpu/drm/xe/xe_perf.c | 36 +
> drivers/gpu/drm/xe/xe_perf.h | 16 +
> drivers/gpu/drm/xe/xe_query.c | 5 +-
> include/uapi/drm/xe_drm.h | 288 ++-
> 18 files changed, 3272 insertions(+), 2 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/regs/xe_oa_regs.h
> create mode 100644 drivers/gpu/drm/xe/xe_oa.c
> create mode 100644 drivers/gpu/drm/xe/xe_oa.h
> create mode 100644 drivers/gpu/drm/xe/xe_oa_types.h
> create mode 100644 drivers/gpu/drm/xe/xe_perf.c
> create mode 100644 drivers/gpu/drm/xe/xe_perf.h
>
>--
>2.41.0
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 00/21] Add OA functionality to Xe
2023-09-19 16:10 [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Ashutosh Dixit
` (28 preceding siblings ...)
2023-10-14 1:05 ` [Intel-xe] [PATCH 00/21] Add OA functionality to Xe Umesh Nerlige Ramappa
@ 2023-10-20 7:44 ` Lionel Landwerlin
2023-10-20 7:52 ` Lionel Landwerlin
29 siblings, 1 reply; 88+ messages in thread
From: Lionel Landwerlin @ 2023-10-20 7:44 UTC (permalink / raw)
To: Ashutosh Dixit, intel-xe
On 19/09/2023 19:10, Ashutosh Dixit wrote:
> This patchset is the initial port of i915 perf/OA functionality to the XE
> driver. The following features in i915 have not been ported and will be
> added (as new patches) if/as they are needed:
>
> * Inline batch submission on stream exec_queue/hw_engine
If you give us a syncobj to wait on for the NOA reconfiguration this
won't be necessary
> * NOA wait
This is kind of required, otherwise we start reading reports from the OA
buffer and the values are garbage
> * GuC ctx id (guc_sw_ctx_id)
This is probably fine. On Gfx8 we always consider using OA a privileged
operation, if we keep it like that then it's okay.
> * CTX_R_PWR_CLK_STATE/GEN8_R_PWR_CLK_STATE
I think if we never care about Gfx11 that's fine.
> * hold_preemption (DRM_XE_OA_PROP_HOLD_PREEMPTION)
Without this, we can't implement perf queries in userspace.
Maybe that's okay?
> * sseu_config (DRM_XE_OA_PROP_GLOBAL_SSEU)
Without Gfx11 probably fine.
> * MTL bios_c6_setup
> * ratelimits
> * compat ioctl
>
> I am providing the following additional HAX patch (not part of this series)
> to help review these patches:
>
> https://patchwork.freedesktop.org/patch/551683/?series=120100&rev=4
>
> The commit message in the above patch explains how it can be useful for
> reviewing this series.
>
> This series is also available at:
> https://gitlab.freedesktop.org/adixit/kernel/-/tree/xe-oa
>
> The series has been tested against this IGT series:
> https://gitlab.freedesktop.org/adixit/igt-gpu-tools/-/tree/xe-oa
>
> v2: Fix build
> v3: Rebase, due to s/xe_engine/xe_exec_queue/
> v4: Re-run for testing
> v5: Address review comments, new patches 11 through 17
> v6: New patches 18 through 21
>
> Ashutosh Dixit (21):
> drm/xe/uapi: Introduce OA (observability architecture) uapi
> drm/xe/oa: Add OA types
> drm/xe/oa: Add registers and GPU commands used by OA
> drm/xe/oa: Module init/exit and probe/remove
> drm/xe/oa: Add/remove config ioctl's
> drm/xe/oa: Start implementing OA stream open ioctl
> drm/xe/oa: OA stream initialization
> drm/xe/oa: Expose OA stream fd
> drm/xe/oa: Read file_operation
> drm/xe/oa: Implement queries
> drm/xe/oa: Override GuC RC with OA on PVC
> drm/xe/uapi: "Perf" layer to support multiple perf counter stream
> types
> drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
> drm/xe/uapi: Simplify OA configs in uapi
> drm/xe/uapi: Remove OA format names from OA uapi
> drm/xe/oa: Make xe_oa_timestamp_frequency per gt
> drm/xe/oa: Remove filtering reports on context id
> drm/xe/uapi: More OA uapi fixes/additions
> drm/xe/uapi: Drop OA_IOCTL_VERSION
> drm/xe/uapi: Use OA unit id to identify OA unit
> drm/xe/uapi: Convert OA property key/value pairs to a struct
>
> drivers/gpu/drm/xe/Makefile | 2 +
> drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +
> drivers/gpu/drm/xe/regs/xe_gpu_commands.h | 13 +
> drivers/gpu/drm/xe/regs/xe_oa_regs.h | 173 ++
> drivers/gpu/drm/xe/xe_device.c | 13 +
> drivers/gpu/drm/xe/xe_device_types.h | 4 +
> drivers/gpu/drm/xe/xe_gt_types.h | 4 +
> drivers/gpu/drm/xe/xe_guc_pc.c | 60 +
> drivers/gpu/drm/xe/xe_guc_pc.h | 3 +
> drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 +
> drivers/gpu/drm/xe/xe_module.c | 5 +
> drivers/gpu/drm/xe/xe_oa.c | 2314 +++++++++++++++++++++
> drivers/gpu/drm/xe/xe_oa.h | 27 +
> drivers/gpu/drm/xe/xe_oa_types.h | 307 +++
> drivers/gpu/drm/xe/xe_perf.c | 36 +
> drivers/gpu/drm/xe/xe_perf.h | 16 +
> drivers/gpu/drm/xe/xe_query.c | 5 +-
> include/uapi/drm/xe_drm.h | 288 ++-
> 18 files changed, 3272 insertions(+), 2 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/regs/xe_oa_regs.h
> create mode 100644 drivers/gpu/drm/xe/xe_oa.c
> create mode 100644 drivers/gpu/drm/xe/xe_oa.h
> create mode 100644 drivers/gpu/drm/xe/xe_oa_types.h
> create mode 100644 drivers/gpu/drm/xe/xe_perf.c
> create mode 100644 drivers/gpu/drm/xe/xe_perf.h
>
^ permalink raw reply [flat|nested] 88+ messages in thread* Re: [Intel-xe] [PATCH 00/21] Add OA functionality to Xe
2023-10-20 7:44 ` Lionel Landwerlin
@ 2023-10-20 7:52 ` Lionel Landwerlin
2023-10-31 6:51 ` Dixit, Ashutosh
0 siblings, 1 reply; 88+ messages in thread
From: Lionel Landwerlin @ 2023-10-20 7:52 UTC (permalink / raw)
To: Ashutosh Dixit, intel-xe
On 20/10/2023 10:44, Lionel Landwerlin wrote:
> On 19/09/2023 19:10, Ashutosh Dixit wrote:
>> This patchset is the initial port of i915 perf/OA functionality to
>> the XE
>> driver. The following features in i915 have not been ported and will be
>> added (as new patches) if/as they are needed:
>>
>> * Inline batch submission on stream exec_queue/hw_engine
>
> If you give us a syncobj to wait on for the NOA reconfiguration this
> won't be necessary
>
>> * NOA wait
>
> This is kind of required, otherwise we start reading reports from the
> OA buffer and the values are garbage
Actually thinking about it, we could use the syncobj you give us and do
the wait in a userspace batch.
-Lionel
>
>> * GuC ctx id (guc_sw_ctx_id)
>
> This is probably fine. On Gfx8 we always consider using OA a
> privileged operation, if we keep it like that then it's okay.
>
>> * CTX_R_PWR_CLK_STATE/GEN8_R_PWR_CLK_STATE
> I think if we never care about Gfx11 that's fine.
>> * hold_preemption (DRM_XE_OA_PROP_HOLD_PREEMPTION)
>
> Without this, we can't implement perf queries in userspace.
>
> Maybe that's okay?
>
>> * sseu_config (DRM_XE_OA_PROP_GLOBAL_SSEU)
> Without Gfx11 probably fine.
>> * MTL bios_c6_setup
>> * ratelimits
>> * compat ioctl
>
>
>
>
>>
>> I am providing the following additional HAX patch (not part of this
>> series)
>> to help review these patches:
>>
>> https://patchwork.freedesktop.org/patch/551683/?series=120100&rev=4
>>
>> The commit message in the above patch explains how it can be useful for
>> reviewing this series.
>>
>> This series is also available at:
>> https://gitlab.freedesktop.org/adixit/kernel/-/tree/xe-oa
>>
>> The series has been tested against this IGT series:
>> https://gitlab.freedesktop.org/adixit/igt-gpu-tools/-/tree/xe-oa
>>
>> v2: Fix build
>> v3: Rebase, due to s/xe_engine/xe_exec_queue/
>> v4: Re-run for testing
>> v5: Address review comments, new patches 11 through 17
>> v6: New patches 18 through 21
>>
>> Ashutosh Dixit (21):
>> drm/xe/uapi: Introduce OA (observability architecture) uapi
>> drm/xe/oa: Add OA types
>> drm/xe/oa: Add registers and GPU commands used by OA
>> drm/xe/oa: Module init/exit and probe/remove
>> drm/xe/oa: Add/remove config ioctl's
>> drm/xe/oa: Start implementing OA stream open ioctl
>> drm/xe/oa: OA stream initialization
>> drm/xe/oa: Expose OA stream fd
>> drm/xe/oa: Read file_operation
>> drm/xe/oa: Implement queries
>> drm/xe/oa: Override GuC RC with OA on PVC
>> drm/xe/uapi: "Perf" layer to support multiple perf counter stream
>> types
>> drm/xe/uapi: Multiplex PERF ops through a single PERF ioctl
>> drm/xe/uapi: Simplify OA configs in uapi
>> drm/xe/uapi: Remove OA format names from OA uapi
>> drm/xe/oa: Make xe_oa_timestamp_frequency per gt
>> drm/xe/oa: Remove filtering reports on context id
>> drm/xe/uapi: More OA uapi fixes/additions
>> drm/xe/uapi: Drop OA_IOCTL_VERSION
>> drm/xe/uapi: Use OA unit id to identify OA unit
>> drm/xe/uapi: Convert OA property key/value pairs to a struct
>>
>> drivers/gpu/drm/xe/Makefile | 2 +
>> drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +
>> drivers/gpu/drm/xe/regs/xe_gpu_commands.h | 13 +
>> drivers/gpu/drm/xe/regs/xe_oa_regs.h | 173 ++
>> drivers/gpu/drm/xe/xe_device.c | 13 +
>> drivers/gpu/drm/xe/xe_device_types.h | 4 +
>> drivers/gpu/drm/xe/xe_gt_types.h | 4 +
>> drivers/gpu/drm/xe/xe_guc_pc.c | 60 +
>> drivers/gpu/drm/xe/xe_guc_pc.h | 3 +
>> drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 +
>> drivers/gpu/drm/xe/xe_module.c | 5 +
>> drivers/gpu/drm/xe/xe_oa.c | 2314 +++++++++++++++++++++
>> drivers/gpu/drm/xe/xe_oa.h | 27 +
>> drivers/gpu/drm/xe/xe_oa_types.h | 307 +++
>> drivers/gpu/drm/xe/xe_perf.c | 36 +
>> drivers/gpu/drm/xe/xe_perf.h | 16 +
>> drivers/gpu/drm/xe/xe_query.c | 5 +-
>> include/uapi/drm/xe_drm.h | 288 ++-
>> 18 files changed, 3272 insertions(+), 2 deletions(-)
>> create mode 100644 drivers/gpu/drm/xe/regs/xe_oa_regs.h
>> create mode 100644 drivers/gpu/drm/xe/xe_oa.c
>> create mode 100644 drivers/gpu/drm/xe/xe_oa.h
>> create mode 100644 drivers/gpu/drm/xe/xe_oa_types.h
>> create mode 100644 drivers/gpu/drm/xe/xe_perf.c
>> create mode 100644 drivers/gpu/drm/xe/xe_perf.h
>>
>
^ permalink raw reply [flat|nested] 88+ messages in thread
* Re: [Intel-xe] [PATCH 00/21] Add OA functionality to Xe
2023-10-20 7:52 ` Lionel Landwerlin
@ 2023-10-31 6:51 ` Dixit, Ashutosh
0 siblings, 0 replies; 88+ messages in thread
From: Dixit, Ashutosh @ 2023-10-31 6:51 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-xe
On Fri, 20 Oct 2023 00:52:17 -0700, Lionel Landwerlin wrote:
Hi Lionel,
>
> On 20/10/2023 10:44, Lionel Landwerlin wrote:
> > On 19/09/2023 19:10, Ashutosh Dixit wrote:
> >> This patchset is the initial port of i915 perf/OA functionality to the
> >> XE
> >> driver. The following features in i915 have not been ported and will be
> >> added (as new patches) if/as they are needed:
> >>
> >> * Inline batch submission on stream exec_queue/hw_engine
> >
> > If you give us a syncobj to wait on for the NOA reconfiguration this
> > won't be necessary
> >
> >> * NOA wait
> >
> > This is kind of required, otherwise we start reading reports from the OA
> > buffer and the values are garbage
>
> Actually thinking about it, we could use the syncobj you give us and do
> the wait in a userspace batch.
Hmm. Why do we need to do this in userspace? What I was thinking was (a)
KMD submits a few batch buffers to program various things and returns from
the open/reconfigure IOCTL (b) KMD can detect (using fences) when the
submitted batches complete (c) After the batches complete, KMD adds an
addtional 500 us (NOA wait) delay (using the CPU) before signalling the
fence in the uapi. Wouldn't this work?
> >
> >> * GuC ctx id (guc_sw_ctx_id)
> >
> > This is probably fine. On Gfx8 we always consider using OA a privileged
> > operation, if we keep it like that then it's okay.
> >
> >> * CTX_R_PWR_CLK_STATE/GEN8_R_PWR_CLK_STATE
> > I think if we never care about Gfx11 that's fine.
Great, yes no plan to support Gfx11. I was really scared that we don't have
this so it is great to get some confirmation it's not needed for Gfx12+.
> >> * hold_preemption (DRM_XE_OA_PROP_HOLD_PREEMPTION)
> >
> > Without this, we can't implement perf queries in userspace.
> >
> > Maybe that's okay?
Is it ok? You tell me. You mean OAR/OAC MI_RPC like queries? They are not
needed? We were thinking we'll need to support this eventually.
> >
> >> * sseu_config (DRM_XE_OA_PROP_GLOBAL_SSEU)
> > Without Gfx11 probably fine.
Yup no plan to support Gfx11. Thanks for the confirmation on this too.
> >> * MTL bios_c6_setup
> >> * ratelimits
> >> * compat ioctl
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 88+ messages in thread