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* [PATCH v5 00/16] AuxCCS handling and render compression modifiers
@ 2025-04-03 19:03 Tvrtko Ursulin
  2025-04-03 19:03 ` [PATCH v5 01/16] drm/xe: Adjust ringbuf emission for maximum possible size Tvrtko Ursulin
                   ` (23 more replies)
  0 siblings, 24 replies; 32+ messages in thread
From: Tvrtko Ursulin @ 2025-04-03 19:03 UTC (permalink / raw)
  To: intel-xe
  Cc: kernel-dev, Tvrtko Ursulin, José Roberto de Souza,
	Juha-Pekka Heikkila, Michael J. Ruhl, Ville Syrjälä

A series to fix and add xe support for AuxCSS framebuffers via DPT.

Currently the auxiliary buffer data isn't mapped into the page tables at all so
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
had to disable the support.

On top of that there are missing flushes, invalidations and similar.

Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:

  [PLANE:32:plane 1A]: type=PRI
          uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
          hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)

Display working fine - no artefacts, no DMAR/PIPE faults.

v2:
 * More patches added to fix kms_flip_tiling.

v3:
 * Rebased after some cleanup patches from v2 were merged.
 * Added people to Cc as suggested by Rodrigo.
 * Adjusted last patch title. (Rodrigo)
 * Apply GGTT flushing only to iomapped system memory buffers.

v4:
 * Added patch for potentially misplaced Wa_14016712196.
 * Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.

v5:
 * Split out ring emission changes to smaller patches.
 * Fixed MAX_JOB_SIZE_DW even more.
 * Don't emit MI_FLUSH_DW_CCS on !BCS. This should fix Meteorlake.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Michael J. Ruhl <michael.j.ruhl@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

Tvrtko Ursulin (16):
  drm/xe: Adjust ringbuf emission for maximum possible size
  drm/xe: Use emit_flush_imm_ggtt helper instead of open coding
  drm/xe/xelpg: Flush CCS when flushing caches
  drm/xe: Flush L3 when flushing render cache
  drm/xe/xelp: Quiesce memory traffic before invalidating auxccs
  drm/xe/xelp: Support auxccs invalidation on blitter
  drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms
  drm/xe/xelp: Wait for AuxCCS invalidation to complete
  drm/xe/xelp: Add AuxCCS invalidation to the buffer migration path
  drm/xe: Use fb cached min alignment
  drm/xe: Reduce DPT table alignment as in i915
  drm/xe: Flush GGTT writes after populating DPT
  drm/xe: Handle DPT in system memory
  drm/xe: Force flush system memory AuxCCS framebuffers before scan out
  drm/xe/display: Add support for AuxCCS
  drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe

 .../drm/i915/display/skl_universal_plane.c    |   6 -
 drivers/gpu/drm/xe/display/xe_fb_pin.c        | 181 ++++++++++++++----
 .../gpu/drm/xe/instructions/xe_gpu_commands.h |   2 +
 .../gpu/drm/xe/instructions/xe_mi_commands.h  |   6 +
 drivers/gpu/drm/xe/regs/xe_gt_regs.h          |   1 +
 drivers/gpu/drm/xe/xe_bo_types.h              |  14 +-
 drivers/gpu/drm/xe/xe_ring_ops.c              | 177 +++++++++--------
 drivers/gpu/drm/xe/xe_ring_ops_types.h        |   2 +-
 8 files changed, 266 insertions(+), 123 deletions(-)

-- 
2.48.0


^ permalink raw reply	[flat|nested] 32+ messages in thread

end of thread, other threads:[~2025-04-15 14:21 UTC | newest]

Thread overview: 32+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-04-03 19:03 [PATCH v5 00/16] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 01/16] drm/xe: Adjust ringbuf emission for maximum possible size Tvrtko Ursulin
2025-04-15 11:59   ` Francois Dugast
2025-04-15 12:40     ` Tvrtko Ursulin
2025-04-15 14:21       ` Lucas De Marchi
2025-04-03 19:03 ` [PATCH v5 02/16] drm/xe: Use emit_flush_imm_ggtt helper instead of open coding Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 03/16] drm/xe/xelpg: Flush CCS when flushing caches Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 04/16] drm/xe: Flush L3 when flushing render cache Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 05/16] drm/xe/xelp: Quiesce memory traffic before invalidating auxccs Tvrtko Ursulin
2025-04-04 15:44   ` Ville Syrjälä
2025-04-03 19:03 ` [PATCH v5 06/16] drm/xe/xelp: Support auxccs invalidation on blitter Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 07/16] drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 08/16] drm/xe/xelp: Wait for AuxCCS invalidation to complete Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 09/16] drm/xe/xelp: Add AuxCCS invalidation to the buffer migration path Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 10/16] drm/xe: Use fb cached min alignment Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 11/16] drm/xe: Reduce DPT table alignment as in i915 Tvrtko Ursulin
2025-04-04 15:52   ` Ville Syrjälä
2025-04-03 19:03 ` [PATCH v5 12/16] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 13/16] drm/xe: Handle DPT in system memory Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 14/16] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
2025-04-04 16:20   ` Ville Syrjälä
2025-04-14  9:44     ` Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 15/16] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2025-04-03 19:03 ` [PATCH v5 16/16] drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe Tvrtko Ursulin
2025-04-04  2:19 ` ✓ CI.Patch_applied: success for AuxCCS handling and render compression modifiers (rev5) Patchwork
2025-04-04  2:19 ` ✗ CI.checkpatch: warning " Patchwork
2025-04-04  2:21 ` ✓ CI.KUnit: success " Patchwork
2025-04-04  2:37 ` ✓ CI.Build: " Patchwork
2025-04-04  2:40 ` ✓ CI.Hooks: " Patchwork
2025-04-04  2:41 ` ✓ CI.checksparse: " Patchwork
2025-04-04  3:27 ` ✓ Xe.CI.BAT: " Patchwork
2025-04-04 12:03 ` ✗ Xe.CI.Full: failure " Patchwork

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