[PATCH v5 00/12] Crashlog Type1 Version2 support

[PATCH v5 00/12] Crashlog Type1 Version2 support

[Michael J. Ruhl]

The Intel BMG GPU device supports the crashlog feature, which was
exposed in an Xe driver patch (drm/xe/vsec: Support BMG devices),
however the version of crashlog used by the BMG GPU does not have
a supporing PMT driver.

Update the PMT crashlog driver to support the BMG crashlog feature.

v2:
 - fix a misconfig for the crashlog DVSEC info in the xe driver
 - address review comments
v3:
 - re-order bug fix patches for stable
 - added re-order trigger logic patch
 - added helper patch to address repeated code patterns
 - address review comments
v4:
 - added pcidev to intel_pmt_entry to address null issue
 - dropped endpoint update patches
 - patch cleanup and address review comments
v5:
 - renamed helpers to avoid namespace issues
 - separate mutex cleanup from gaurd usage
 - refactor base paramters to a separate patch (from version struct)
 - add r/b reviewed patches

Michael J. Ruhl (12):
  platform/x86/intel/pmt: fix a crashlog NULL pointer access
  drm/xe: Correct BMG VSEC header sizing
  platform/x86/intel/pmt: white space cleanup
  platform/x86/intel/pmt: mutex clean up
  platform/x86/intel/pmt: use guard(mutex)
  platform/x86/intel/pmt: re-order trigger logic
  platform/x86/intel/pmt: correct types
  platform/x86/intel/pmt: decouple sysfs and namespace
  platform/x86/intel/pmt: add register access helpers
  platform/x86/intel/pmt: refactor base parameter
  platform/x86/intel/pmt: use a version struct
  platform/x86/intel/pmt: support BMG crashlog

 drivers/gpu/drm/xe/xe_vsec.c              |  20 +-
 drivers/platform/x86/intel/pmt/class.c    |  15 +-
 drivers/platform/x86/intel/pmt/class.h    |   3 +-
 drivers/platform/x86/intel/pmt/crashlog.c | 468 ++++++++++++++++++----
 4 files changed, 394 insertions(+), 112 deletions(-)

-- 
2.49.0

[PATCH v5 01/12] platform/x86/intel/pmt: fix a crashlog NULL pointer access

[Michael J. Ruhl]

Usage of the intel_pmt_read() for binary sysfs, requires a pcidev. The
current use of the endpoint value is only valid for telemetry endpoint
usage.

Without the ep, the crashlog usage causes the following NULL pointer
exception:

BUG: kernel NULL pointer dereference, address: 0000000000000000
Oops: Oops: 0000 [#1] SMP NOPTI
RIP: 0010:intel_pmt_read+0x3b/0x70 [pmt_class]
Code:
Call Trace:
 <TASK>
 ? sysfs_kf_bin_read+0xc0/0xe0
 kernfs_fop_read_iter+0xac/0x1a0
 vfs_read+0x26d/0x350
 ksys_read+0x6b/0xe0
 __x64_sys_read+0x1d/0x30
 x64_sys_call+0x1bc8/0x1d70
 do_syscall_64+0x6d/0x110

Augment struct intel_pmt_entry with a pointer to the pcidev to avoid
the NULL pointer exception.

Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Fixes: 416eeb2e1fc7 ("platform/x86/intel/pmt: telemetry: Export API to read telemetry")
Cc: <stable@vger.kernel.org>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/class.c | 3 ++-
 drivers/platform/x86/intel/pmt/class.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
index 7233b654bbad..d046e8752173 100644
--- a/drivers/platform/x86/intel/pmt/class.c
+++ b/drivers/platform/x86/intel/pmt/class.c
@@ -97,7 +97,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj,
 	if (count > entry->size - off)
 		count = entry->size - off;
 
-	count = pmt_telem_read_mmio(entry->ep->pcidev, entry->cb, entry->header.guid, buf,
+	count = pmt_telem_read_mmio(entry->pcidev, entry->cb, entry->header.guid, buf,
 				    entry->base, off, count);
 
 	return count;
@@ -252,6 +252,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
 		return -EINVAL;
 	}
 
+	entry->pcidev = pci_dev;
 	entry->guid = header->guid;
 	entry->size = header->size;
 	entry->cb = ivdev->priv_data;
diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
index b2006d57779d..f6ce80c4e051 100644
--- a/drivers/platform/x86/intel/pmt/class.h
+++ b/drivers/platform/x86/intel/pmt/class.h
@@ -39,6 +39,7 @@ struct intel_pmt_header {
 
 struct intel_pmt_entry {
 	struct telem_endpoint	*ep;
+	struct pci_dev		*pcidev;
 	struct intel_pmt_header	header;
 	struct bin_attribute	pmt_bin_attr;
 	struct kobject		*kobj;
-- 
2.49.0

Re: [PATCH v5 01/12] platform/x86/intel/pmt: fix a crashlog NULL pointer access

[Ilpo Järvinen]

On Fri, 27 Jun 2025, Michael J. Ruhl wrote:

> Usage of the intel_pmt_read() for binary sysfs, requires a pcidev. The
> current use of the endpoint value is only valid for telemetry endpoint
> usage.
> 
> Without the ep, the crashlog usage causes the following NULL pointer
> exception:
> 
> BUG: kernel NULL pointer dereference, address: 0000000000000000
> Oops: Oops: 0000 [#1] SMP NOPTI
> RIP: 0010:intel_pmt_read+0x3b/0x70 [pmt_class]
> Code:
> Call Trace:
>  <TASK>
>  ? sysfs_kf_bin_read+0xc0/0xe0
>  kernfs_fop_read_iter+0xac/0x1a0
>  vfs_read+0x26d/0x350
>  ksys_read+0x6b/0xe0
>  __x64_sys_read+0x1d/0x30
>  x64_sys_call+0x1bc8/0x1d70
>  do_syscall_64+0x6d/0x110

Can you confirm, if this was possible to trigger only after this series 
has been applied, not with the current mainline code?

-- 
 i.

> Augment struct intel_pmt_entry with a pointer to the pcidev to avoid
> the NULL pointer exception.
> 
> Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
> Fixes: 416eeb2e1fc7 ("platform/x86/intel/pmt: telemetry: Export API to read telemetry")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/class.c | 3 ++-
>  drivers/platform/x86/intel/pmt/class.h | 1 +
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
> index 7233b654bbad..d046e8752173 100644
> --- a/drivers/platform/x86/intel/pmt/class.c
> +++ b/drivers/platform/x86/intel/pmt/class.c
> @@ -97,7 +97,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj,
>  	if (count > entry->size - off)
>  		count = entry->size - off;
>  
> -	count = pmt_telem_read_mmio(entry->ep->pcidev, entry->cb, entry->header.guid, buf,
> +	count = pmt_telem_read_mmio(entry->pcidev, entry->cb, entry->header.guid, buf,
>  				    entry->base, off, count);
>  
>  	return count;
> @@ -252,6 +252,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
>  		return -EINVAL;
>  	}
>  
> +	entry->pcidev = pci_dev;
>  	entry->guid = header->guid;
>  	entry->size = header->size;
>  	entry->cb = ivdev->priv_data;
> diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
> index b2006d57779d..f6ce80c4e051 100644
> --- a/drivers/platform/x86/intel/pmt/class.h
> +++ b/drivers/platform/x86/intel/pmt/class.h
> @@ -39,6 +39,7 @@ struct intel_pmt_header {
>  
>  struct intel_pmt_entry {
>  	struct telem_endpoint	*ep;
> +	struct pci_dev		*pcidev;
>  	struct intel_pmt_header	header;
>  	struct bin_attribute	pmt_bin_attr;
>  	struct kobject		*kobj;
> 

RE: [PATCH v5 01/12] platform/x86/intel/pmt: fix a crashlog NULL pointer access

[Ruhl, Michael J]

>-----Original Message-----
>From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>Sent: Monday, June 30, 2025 5:29 AM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org; Hans
>de Goede <hdegoede@redhat.com>; De Marchi, Lucas
><lucas.demarchi@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
>thomas.hellstrom@linux.intel.com; airlied@gmail.com; simona@ffwll.ch;
>david.e.box@linux.intel.com; Upadhyay, Tejas <tejas.upadhyay@intel.com>;
>stable@vger.kernel.org
>Subject: Re: [PATCH v5 01/12] platform/x86/intel/pmt: fix a crashlog NULL
>pointer access
>
>On Fri, 27 Jun 2025, Michael J. Ruhl wrote:
>
>> Usage of the intel_pmt_read() for binary sysfs, requires a pcidev. The
>> current use of the endpoint value is only valid for telemetry endpoint
>> usage.
>>
>> Without the ep, the crashlog usage causes the following NULL pointer
>> exception:
>>
>> BUG: kernel NULL pointer dereference, address: 0000000000000000
>> Oops: Oops: 0000 [#1] SMP NOPTI
>> RIP: 0010:intel_pmt_read+0x3b/0x70 [pmt_class]
>> Code:
>> Call Trace:
>>  <TASK>
>>  ? sysfs_kf_bin_read+0xc0/0xe0
>>  kernfs_fop_read_iter+0xac/0x1a0
>>  vfs_read+0x26d/0x350
>>  ksys_read+0x6b/0xe0
>>  __x64_sys_read+0x1d/0x30
>>  x64_sys_call+0x1bc8/0x1d70
>>  do_syscall_64+0x6d/0x110
>
>Can you confirm, if this was possible to trigger only after this series
>has been applied, not with the current mainline code?

Hi Ilpo,

I somehow got the wrong fixes patch.  It should be:

Fixes: 045a513040cc ("platform/x86/intel/pmt: Use PMT callbacks")

The issue occurs before my patches are applied.

Does this answer your question?

M

>--
> i.
>
>> Augment struct intel_pmt_entry with a pointer to the pcidev to avoid
>> the NULL pointer exception.
>>
>> Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
>> Fixes: 416eeb2e1fc7 ("platform/x86/intel/pmt: telemetry: Export API to read
>telemetry")
>> Cc: <stable@vger.kernel.org>
>> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>> ---
>>  drivers/platform/x86/intel/pmt/class.c | 3 ++-
>>  drivers/platform/x86/intel/pmt/class.h | 1 +
>>  2 files changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/platform/x86/intel/pmt/class.c
>b/drivers/platform/x86/intel/pmt/class.c
>> index 7233b654bbad..d046e8752173 100644
>> --- a/drivers/platform/x86/intel/pmt/class.c
>> +++ b/drivers/platform/x86/intel/pmt/class.c
>> @@ -97,7 +97,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj,
>>  	if (count > entry->size - off)
>>  		count = entry->size - off;
>>
>> -	count = pmt_telem_read_mmio(entry->ep->pcidev, entry->cb, entry-
>>header.guid, buf,
>> +	count = pmt_telem_read_mmio(entry->pcidev, entry->cb, entry-
>>header.guid, buf,
>>  				    entry->base, off, count);
>>
>>  	return count;
>> @@ -252,6 +252,7 @@ static int intel_pmt_populate_entry(struct
>intel_pmt_entry *entry,
>>  		return -EINVAL;
>>  	}
>>
>> +	entry->pcidev = pci_dev;
>>  	entry->guid = header->guid;
>>  	entry->size = header->size;
>>  	entry->cb = ivdev->priv_data;
>> diff --git a/drivers/platform/x86/intel/pmt/class.h
>b/drivers/platform/x86/intel/pmt/class.h
>> index b2006d57779d..f6ce80c4e051 100644
>> --- a/drivers/platform/x86/intel/pmt/class.h
>> +++ b/drivers/platform/x86/intel/pmt/class.h
>> @@ -39,6 +39,7 @@ struct intel_pmt_header {
>>
>>  struct intel_pmt_entry {
>>  	struct telem_endpoint	*ep;
>> +	struct pci_dev		*pcidev;
>>  	struct intel_pmt_header	header;
>>  	struct bin_attribute	pmt_bin_attr;
>>  	struct kobject		*kobj;
>>

[PATCH v5 02/12] drm/xe: Correct BMG VSEC header sizing

[Michael J. Ruhl]

The intel_vsec_header information for the crashlog feature is
incorrect.

Update the VSEC header with correct sizing and count.

Since the crashlog entries are "merged" (num_entries = 2), the
separate capabilities entries must be merged as well.

Fixes: 0c45e76fcc62 ("drm/xe/vsec: Support BMG devices")
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_vsec.c | 20 +++++---------------
 1 file changed, 5 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 3e573b0b7ebd..67238fc57a4d 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -32,28 +32,18 @@ static struct intel_vsec_header bmg_telemetry = {
 	.offset = BMG_DISCOVERY_OFFSET,
 };
 
-static struct intel_vsec_header bmg_punit_crashlog = {
-	.length = 0x10,
+static struct intel_vsec_header bmg_crashlog = {
+	.length = 0x18,
 	.id = VSEC_ID_CRASHLOG,
-	.num_entries = 1,
-	.entry_size = 4,
+	.num_entries = 2,
+	.entry_size = 6,
 	.tbir = 0,
 	.offset = BMG_DISCOVERY_OFFSET + 0x60,
 };
 
-static struct intel_vsec_header bmg_oobmsm_crashlog = {
-	.length = 0x10,
-	.id = VSEC_ID_CRASHLOG,
-	.num_entries = 1,
-	.entry_size = 4,
-	.tbir = 0,
-	.offset = BMG_DISCOVERY_OFFSET + 0x78,
-};
-
 static struct intel_vsec_header *bmg_capabilities[] = {
 	&bmg_telemetry,
-	&bmg_punit_crashlog,
-	&bmg_oobmsm_crashlog,
+	&bmg_crashlog,
 	NULL
 };
 
-- 
2.49.0

Re: [PATCH v5 02/12] drm/xe: Correct BMG VSEC header sizing

[Rodrigo Vivi]

On Fri, Jun 27, 2025 at 04:43:11PM -0400, Michael J. Ruhl wrote:
> The intel_vsec_header information for the crashlog feature is
> incorrect.
> 
> Update the VSEC header with correct sizing and count.
> 
> Since the crashlog entries are "merged" (num_entries = 2), the
> separate capabilities entries must be merged as well.

if you share some doc I might be able to help with reviews on this.
But for now,

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

to get this Xe patch merged with the rest of the series in the
PMT subsystem trees.

> 
> Fixes: 0c45e76fcc62 ("drm/xe/vsec: Support BMG devices")
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_vsec.c | 20 +++++---------------
>  1 file changed, 5 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 3e573b0b7ebd..67238fc57a4d 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -32,28 +32,18 @@ static struct intel_vsec_header bmg_telemetry = {
>  	.offset = BMG_DISCOVERY_OFFSET,
>  };
>  
> -static struct intel_vsec_header bmg_punit_crashlog = {
> -	.length = 0x10,
> +static struct intel_vsec_header bmg_crashlog = {
> +	.length = 0x18,
>  	.id = VSEC_ID_CRASHLOG,
> -	.num_entries = 1,
> -	.entry_size = 4,
> +	.num_entries = 2,
> +	.entry_size = 6,
>  	.tbir = 0,
>  	.offset = BMG_DISCOVERY_OFFSET + 0x60,
>  };
>  
> -static struct intel_vsec_header bmg_oobmsm_crashlog = {
> -	.length = 0x10,
> -	.id = VSEC_ID_CRASHLOG,
> -	.num_entries = 1,
> -	.entry_size = 4,
> -	.tbir = 0,
> -	.offset = BMG_DISCOVERY_OFFSET + 0x78,
> -};
> -
>  static struct intel_vsec_header *bmg_capabilities[] = {
>  	&bmg_telemetry,
> -	&bmg_punit_crashlog,
> -	&bmg_oobmsm_crashlog,
> +	&bmg_crashlog,
>  	NULL
>  };
>  
> -- 
> 2.49.0
> 

RE: [PATCH v5 02/12] drm/xe: Correct BMG VSEC header sizing

[Ruhl, Michael J]

>-----Original Message-----
>From: Vivi, Rodrigo <rodrigo.vivi@intel.com>
>Sent: Monday, June 30, 2025 3:58 PM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org;
>hdegoede@redhat.com; ilpo.jarvinen@linux.intel.com; De Marchi, Lucas
><lucas.demarchi@intel.com>; thomas.hellstrom@linux.intel.com;
>airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com
>Subject: Re: [PATCH v5 02/12] drm/xe: Correct BMG VSEC header sizing
>
>On Fri, Jun 27, 2025 at 04:43:11PM -0400, Michael J. Ruhl wrote:
>> The intel_vsec_header information for the crashlog feature is
>> incorrect.
>>
>> Update the VSEC header with correct sizing and count.
>>
>> Since the crashlog entries are "merged" (num_entries = 2), the
>> separate capabilities entries must be merged as well.
>
>if you share some doc I might be able to help with reviews on this.
>But for now,
>
>Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
>to get this Xe patch merged with the rest of the series in the
>PMT subsystem trees.

Hi Rodrigo,

The data structure is matching the data structure defined by section 7.3.5 of this doc:

https://www.intel.com/content/www/us/en/content-details/710389/intel-platform-monitoring-technology-intel-pmt-technical-specification.html

Originally I was thinking that the data structure was just the basic PMT discovery struct (Section 7.1.1),
a misunderstanding on my part, but this is the Crashlog discovery/control structure.

The two entries are consecutive, so I can say 2 entries and size them correctly.

Thanks!

Mike

>>
>> Fixes: 0c45e76fcc62 ("drm/xe/vsec: Support BMG devices")
>> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_vsec.c | 20 +++++---------------
>>  1 file changed, 5 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
>> index 3e573b0b7ebd..67238fc57a4d 100644
>> --- a/drivers/gpu/drm/xe/xe_vsec.c
>> +++ b/drivers/gpu/drm/xe/xe_vsec.c
>> @@ -32,28 +32,18 @@ static struct intel_vsec_header bmg_telemetry = {
>>  	.offset = BMG_DISCOVERY_OFFSET,
>>  };
>>
>> -static struct intel_vsec_header bmg_punit_crashlog = {
>> -	.length = 0x10,
>> +static struct intel_vsec_header bmg_crashlog = {
>> +	.length = 0x18,
>>  	.id = VSEC_ID_CRASHLOG,
>> -	.num_entries = 1,
>> -	.entry_size = 4,
>> +	.num_entries = 2,
>> +	.entry_size = 6,
>>  	.tbir = 0,
>>  	.offset = BMG_DISCOVERY_OFFSET + 0x60,
>>  };
>>
>> -static struct intel_vsec_header bmg_oobmsm_crashlog = {
>> -	.length = 0x10,
>> -	.id = VSEC_ID_CRASHLOG,
>> -	.num_entries = 1,
>> -	.entry_size = 4,
>> -	.tbir = 0,
>> -	.offset = BMG_DISCOVERY_OFFSET + 0x78,
>> -};
>> -
>>  static struct intel_vsec_header *bmg_capabilities[] = {
>>  	&bmg_telemetry,
>> -	&bmg_punit_crashlog,
>> -	&bmg_oobmsm_crashlog,
>> +	&bmg_crashlog,
>>  	NULL
>>  };
>>
>> --
>> 2.49.0
>>

[PATCH v5 03/12] platform/x86/intel/pmt: white space cleanup

[Michael J. Ruhl]

Noticed two white space issues; cleaned them.

Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 6a9eb3c4b313..d40c8e212733 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -143,7 +143,7 @@ enable_show(struct device *dev, struct device_attribute *attr, char *buf)
 
 static ssize_t
 enable_store(struct device *dev, struct device_attribute *attr,
-	    const char *buf, size_t count)
+	     const char *buf, size_t count)
 {
 	struct crashlog_entry *entry;
 	bool enabled;
@@ -177,7 +177,7 @@ trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
 
 static ssize_t
 trigger_store(struct device *dev, struct device_attribute *attr,
-	    const char *buf, size_t count)
+	      const char *buf, size_t count)
 {
 	struct crashlog_entry *entry;
 	bool trigger;
-- 
2.49.0

[PATCH v5 04/12] platform/x86/intel/pmt: mutex clean up

[Michael J. Ruhl]

The header file for mutex usage and mutex_remove() cleanup code is
absent from this module.

Add the header file and mutex_revove().

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index d40c8e212733..6e32fc1f8f1d 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -12,6 +12,7 @@
 #include <linux/intel_vsec.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/mutex.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <linux/uaccess.h>
@@ -262,8 +263,12 @@ static void pmt_crashlog_remove(struct auxiliary_device *auxdev)
 	struct pmt_crashlog_priv *priv = auxiliary_get_drvdata(auxdev);
 	int i;
 
-	for (i = 0; i < priv->num_entries; i++)
-		intel_pmt_dev_destroy(&priv->entry[i].entry, &pmt_crashlog_ns);
+	for (i = 0; i < priv->num_entries; i++) {
+		struct crashlog_entry *crashlog = &priv->entry[i];
+
+		intel_pmt_dev_destroy(&crashlog->entry, &pmt_crashlog_ns);
+		mutex_destroy(&crashlog->control_mutex);
+	}
 }
 
 static int pmt_crashlog_probe(struct auxiliary_device *auxdev,
-- 
2.49.0

[PATCH v5 05/12] platform/x86/intel/pmt: use guard(mutex)

[Michael J. Ruhl]

Update the mutex paths to use the new guard() mechanism.

With the removal of goto, do some minor cleanup of the current logic
path.

Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 33 +++++++++++------------
 1 file changed, 16 insertions(+), 17 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 6e32fc1f8f1d..c3ca95854aba 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -9,6 +9,7 @@
  */
 
 #include <linux/auxiliary_bus.h>
+#include <linux/cleanup.h>
 #include <linux/intel_vsec.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -156,9 +157,9 @@ enable_store(struct device *dev, struct device_attribute *attr,
 	if (result)
 		return result;
 
-	mutex_lock(&entry->control_mutex);
+	guard(mutex)(&entry->control_mutex);
+
 	pmt_crashlog_set_disable(&entry->entry, !enabled);
-	mutex_unlock(&entry->control_mutex);
 
 	return count;
 }
@@ -190,26 +191,24 @@ trigger_store(struct device *dev, struct device_attribute *attr,
 	if (result)
 		return result;
 
-	mutex_lock(&entry->control_mutex);
+	guard(mutex)(&entry->control_mutex);
 
 	if (!trigger) {
 		pmt_crashlog_set_clear(&entry->entry);
-	} else if (pmt_crashlog_complete(&entry->entry)) {
-		/* we cannot trigger a new crash if one is still pending */
-		result = -EEXIST;
-		goto err;
-	} else if (pmt_crashlog_disabled(&entry->entry)) {
-		/* if device is currently disabled, return busy */
-		result = -EBUSY;
-		goto err;
-	} else {
-		pmt_crashlog_set_execute(&entry->entry);
+		return count;
 	}
 
-	result = count;
-err:
-	mutex_unlock(&entry->control_mutex);
-	return result;
+	/* we cannot trigger a new crash if one is still pending */
+	if (pmt_crashlog_complete(&entry->entry))
+		return -EEXIST;
+
+	/* if device is currently disabled, return busy */
+	if (pmt_crashlog_disabled(&entry->entry))
+		return -EBUSY;
+
+	pmt_crashlog_set_execute(&entry->entry);
+
+	return count;
 }
 static DEVICE_ATTR_RW(trigger);
 
-- 
2.49.0

[PATCH v5 06/12] platform/x86/intel/pmt: re-order trigger logic

[Michael J. Ruhl]

Setting the clear bit or checking the complete bit before checking to
see if crashlog is disabled seems incorrect.

Check disable before accessing any other bits.

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index c3ca95854aba..440d2045e90d 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -193,6 +193,10 @@ trigger_store(struct device *dev, struct device_attribute *attr,
 
 	guard(mutex)(&entry->control_mutex);
 
+	/* if device is currently disabled, return busy */
+	if (pmt_crashlog_disabled(&entry->entry))
+		return -EBUSY;
+
 	if (!trigger) {
 		pmt_crashlog_set_clear(&entry->entry);
 		return count;
@@ -202,10 +206,6 @@ trigger_store(struct device *dev, struct device_attribute *attr,
 	if (pmt_crashlog_complete(&entry->entry))
 		return -EEXIST;
 
-	/* if device is currently disabled, return busy */
-	if (pmt_crashlog_disabled(&entry->entry))
-		return -EBUSY;
-
 	pmt_crashlog_set_execute(&entry->entry);
 
 	return count;
-- 
2.49.0

[PATCH v5 07/12] platform/x86/intel/pmt: correct types

[Michael J. Ruhl]

A couple of auto variables do not match the return types of some of
the functions.

Update the mismatched types to match.

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: David E. Box <david.e.box@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 440d2045e90d..881f4abdae14 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -138,7 +138,7 @@ static ssize_t
 enable_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct intel_pmt_entry *entry = dev_get_drvdata(dev);
-	int enabled = !pmt_crashlog_disabled(entry);
+	bool enabled = !pmt_crashlog_disabled(entry);
 
 	return sprintf(buf, "%d\n", enabled);
 }
@@ -169,7 +169,7 @@ static ssize_t
 trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct intel_pmt_entry *entry;
-	int trigger;
+	bool trigger;
 
 	entry = dev_get_drvdata(dev);
 	trigger = pmt_crashlog_complete(entry);
-- 
2.49.0

[PATCH v5 08/12] platform/x86/intel/pmt: decouple sysfs and namespace

[Michael J. Ruhl]

The PMT namespace includes the crashlog sysfs attribute information.
Other crashlog version/types may need different sysfs attributes.
Coupling the attributes with the namespace blocks this usage.

Decouple sysfs attributes from the name space and add them to the
specific entry.

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/class.c    | 12 ++++++------
 drivers/platform/x86/intel/pmt/class.h    |  2 +-
 drivers/platform/x86/intel/pmt/crashlog.c |  3 ++-
 3 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
index d046e8752173..3b6bf2f14dcb 100644
--- a/drivers/platform/x86/intel/pmt/class.c
+++ b/drivers/platform/x86/intel/pmt/class.c
@@ -285,8 +285,8 @@ static int intel_pmt_dev_register(struct intel_pmt_entry *entry,
 
 	entry->kobj = &dev->kobj;
 
-	if (ns->attr_grp) {
-		ret = sysfs_create_group(entry->kobj, ns->attr_grp);
+	if (entry->attr_grp) {
+		ret = sysfs_create_group(entry->kobj, entry->attr_grp);
 		if (ret)
 			goto fail_sysfs_create_group;
 	}
@@ -327,8 +327,8 @@ static int intel_pmt_dev_register(struct intel_pmt_entry *entry,
 fail_add_endpoint:
 	sysfs_remove_bin_file(entry->kobj, &entry->pmt_bin_attr);
 fail_ioremap:
-	if (ns->attr_grp)
-		sysfs_remove_group(entry->kobj, ns->attr_grp);
+	if (entry->attr_grp)
+		sysfs_remove_group(entry->kobj, entry->attr_grp);
 fail_sysfs_create_group:
 	device_unregister(dev);
 fail_dev_create:
@@ -370,8 +370,8 @@ void intel_pmt_dev_destroy(struct intel_pmt_entry *entry,
 	if (entry->size)
 		sysfs_remove_bin_file(entry->kobj, &entry->pmt_bin_attr);
 
-	if (ns->attr_grp)
-		sysfs_remove_group(entry->kobj, ns->attr_grp);
+	if (entry->attr_grp)
+		sysfs_remove_group(entry->kobj, entry->attr_grp);
 
 	device_unregister(dev);
 	xa_erase(ns->xa, entry->devid);
diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
index f6ce80c4e051..d5d86b8a2d15 100644
--- a/drivers/platform/x86/intel/pmt/class.h
+++ b/drivers/platform/x86/intel/pmt/class.h
@@ -42,6 +42,7 @@ struct intel_pmt_entry {
 	struct pci_dev		*pcidev;
 	struct intel_pmt_header	header;
 	struct bin_attribute	pmt_bin_attr;
+	const struct attribute_group *attr_grp;
 	struct kobject		*kobj;
 	void __iomem		*disc_table;
 	void __iomem		*base;
@@ -55,7 +56,6 @@ struct intel_pmt_entry {
 struct intel_pmt_namespace {
 	const char *name;
 	struct xarray *xa;
-	const struct attribute_group *attr_grp;
 	int (*pmt_header_decode)(struct intel_pmt_entry *entry,
 				 struct device *dev);
 	int (*pmt_add_endpoint)(struct intel_vsec_device *ivdev,
diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 881f4abdae14..23b3971da40a 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -243,6 +243,8 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
 	/* Size is measured in DWORDS, but accessor returns bytes */
 	header->size = GET_SIZE(readl(disc_table + SIZE_OFFSET));
 
+	entry->attr_grp = &pmt_crashlog_group;
+
 	return 0;
 }
 
@@ -250,7 +252,6 @@ static DEFINE_XARRAY_ALLOC(crashlog_array);
 static struct intel_pmt_namespace pmt_crashlog_ns = {
 	.name = "crashlog",
 	.xa = &crashlog_array,
-	.attr_grp = &pmt_crashlog_group,
 	.pmt_header_decode = pmt_crashlog_header_decode,
 };
 
-- 
2.49.0

[PATCH v5 09/12] platform/x86/intel/pmt: add register access helpers

[Michael J. Ruhl]

The control register is used in a read/modify/write pattern.
The status register is used in a read/check bit pattern.

Add helpers to eliminate common code.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 60 ++++++++++++-----------
 1 file changed, 31 insertions(+), 29 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 23b3971da40a..adaca7ce1ba5 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -64,20 +64,42 @@ struct pmt_crashlog_priv {
 /*
  * I/O
  */
-static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+#define CRASHLOG_SET_BIT	true
+#define CRASHLOG_CLEAR_BIT	false
+
+/* read/modify/write */
+static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+
+	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
+
+	if (set)
+		reg |= bit;
+	else
+		reg &= bit;
+
+	writel(reg, entry->disc_table + CONTROL_OFFSET);
+}
+
+/* read/check */
+static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
+{
+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+
+	return !!(reg & bit);
+}
 
+static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+{
 	/* return current value of the crashlog complete flag */
-	return !!(control & CRASHLOG_FLAG_TRIGGER_COMPLETE);
+	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_TRIGGER_COMPLETE);
 }
 
 static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
 	/* return current value of the crashlog disabled flag */
-	return !!(control & CRASHLOG_FLAG_DISABLE);
+	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
 }
 
 static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
@@ -98,37 +120,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
 static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
 				     bool disable)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	/* clear trigger bits so we are only modifying disable flag */
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-
-	if (disable)
-		control |= CRASHLOG_FLAG_DISABLE;
-	else
-		control &= ~CRASHLOG_FLAG_DISABLE;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
 }
 
 static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-	control |= CRASHLOG_FLAG_TRIGGER_CLEAR;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
 }
 
 static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-	control |= CRASHLOG_FLAG_TRIGGER_EXECUTE;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
 }
 
 /*
-- 
2.49.0

RE: [PATCH v5 09/12] platform/x86/intel/pmt: add register access helpers

[Ruhl, Michael J]

>-----Original Message-----
>From: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Sent: Friday, June 27, 2025 4:43 PM
>To: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org;
>hdegoede@redhat.com; ilpo.jarvinen@linux.intel.com; De Marchi, Lucas
><lucas.demarchi@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
>thomas.hellstrom@linux.intel.com; airlied@gmail.com; simona@ffwll.ch;
>david.e.box@linux.intel.com
>Cc: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Subject: [PATCH v5 09/12] platform/x86/intel/pmt: add register access helpers
>
>The control register is used in a read/modify/write pattern.
>The status register is used in a read/check bit pattern.
>
>Add helpers to eliminate common code.
>
>Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>---
> drivers/platform/x86/intel/pmt/crashlog.c | 60 ++++++++++++-----------
> 1 file changed, 31 insertions(+), 29 deletions(-)
>
>diff --git a/drivers/platform/x86/intel/pmt/crashlog.c
>b/drivers/platform/x86/intel/pmt/crashlog.c
>index 23b3971da40a..adaca7ce1ba5 100644
>--- a/drivers/platform/x86/intel/pmt/crashlog.c
>+++ b/drivers/platform/x86/intel/pmt/crashlog.c
>@@ -64,20 +64,42 @@ struct pmt_crashlog_priv {
> /*
>  * I/O
>  */
>-static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
>+#define CRASHLOG_SET_BIT	true
>+#define CRASHLOG_CLEAR_BIT	false
>+
>+/* read/modify/write */
>+static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool
>set)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
>+
>+	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
>+
>+	if (set)
>+		reg |= bit;
>+	else
>+		reg &= bit;

This should be:

reg &= ~bit;

(updating patch set).

M

>+
>+	writel(reg, entry->disc_table + CONTROL_OFFSET);
>+}
>+
>+/* read/check */
>+static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
>+{
>+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
>+
>+	return !!(reg & bit);
>+}
>
>+static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
>+{
> 	/* return current value of the crashlog complete flag */
>-	return !!(control & CRASHLOG_FLAG_TRIGGER_COMPLETE);
>+	return pmt_crashlog_rc(entry,
>CRASHLOG_FLAG_TRIGGER_COMPLETE);
> }
>
> static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>-
> 	/* return current value of the crashlog disabled flag */
>-	return !!(control & CRASHLOG_FLAG_DISABLE);
>+	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
> }
>
> static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
>@@ -98,37 +120,17 @@ static bool pmt_crashlog_supported(struct
>intel_pmt_entry *entry)
> static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
> 				     bool disable)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>-
>-	/* clear trigger bits so we are only modifying disable flag */
>-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
>-
>-	if (disable)
>-		control |= CRASHLOG_FLAG_DISABLE;
>-	else
>-		control &= ~CRASHLOG_FLAG_DISABLE;
>-
>-	writel(control, entry->disc_table + CONTROL_OFFSET);
>+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
> }
>
> static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>-
>-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
>-	control |= CRASHLOG_FLAG_TRIGGER_CLEAR;
>-
>-	writel(control, entry->disc_table + CONTROL_OFFSET);
>+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR,
>CRASHLOG_SET_BIT);
> }
>
> static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
> {
>-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
>-
>-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
>-	control |= CRASHLOG_FLAG_TRIGGER_EXECUTE;
>-
>-	writel(control, entry->disc_table + CONTROL_OFFSET);
>+	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE,
>CRASHLOG_SET_BIT);
> }
>
> /*
>--
>2.49.0

[PATCH v5 10/12] platform/x86/intel/pmt: refactor base parameter

[Michael J. Ruhl]

For the crashlog driver, struct crashlog_entry is the parent of
struct intel_pmt_entry. To support multiple crashlog versions, most
accesses will be to the struct crashlog_entry.

- Refactor to use struct crashlog_entry in place of
  struct intel_pmt_entry
- Rename some usages (auto-variables) from entry to crashlog

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 59 ++++++++++++-----------
 1 file changed, 30 insertions(+), 29 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index adaca7ce1ba5..7975abb3c21b 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -68,8 +68,9 @@ struct pmt_crashlog_priv {
 #define CRASHLOG_CLEAR_BIT	false
 
 /* read/modify/write */
-static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
+static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
 {
+	struct intel_pmt_entry *entry = &crashlog->entry;
 	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
 
 	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
@@ -83,23 +84,24 @@ static void pmt_crashlog_rmw(struct intel_pmt_entry *entry, u32 bit, bool set)
 }
 
 /* read/check */
-static bool pmt_crashlog_rc(struct intel_pmt_entry *entry, u32 bit)
+static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
 {
+	struct intel_pmt_entry *entry = &crashlog->entry;
 	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
 
 	return !!(reg & bit);
 }
 
-static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+static bool pmt_crashlog_complete(struct crashlog_entry *crashlog)
 {
 	/* return current value of the crashlog complete flag */
-	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_TRIGGER_COMPLETE);
+	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_TRIGGER_COMPLETE);
 }
 
-static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
+static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
 {
 	/* return current value of the crashlog disabled flag */
-	return pmt_crashlog_rc(entry, CRASHLOG_FLAG_DISABLE);
+	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_DISABLE);
 }
 
 static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
@@ -117,20 +119,19 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
 	return crash_type == CRASH_TYPE_OOBMSM && version == 0;
 }
 
-static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
-				     bool disable)
+static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
 {
-	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_DISABLE, disable);
+	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_DISABLE, disable);
 }
 
-static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
+static void pmt_crashlog_set_clear(struct crashlog_entry *crashlog)
 {
-	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
+	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
 }
 
-static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
+static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
 {
-	pmt_crashlog_rmw(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
+	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
 }
 
 /*
@@ -139,8 +140,8 @@ static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
 static ssize_t
 enable_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
-	struct intel_pmt_entry *entry = dev_get_drvdata(dev);
-	bool enabled = !pmt_crashlog_disabled(entry);
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	bool enabled = !pmt_crashlog_disabled(crashlog);
 
 	return sprintf(buf, "%d\n", enabled);
 }
@@ -149,19 +150,19 @@ static ssize_t
 enable_store(struct device *dev, struct device_attribute *attr,
 	     const char *buf, size_t count)
 {
-	struct crashlog_entry *entry;
+	struct crashlog_entry *crashlog;
 	bool enabled;
 	int result;
 
-	entry = dev_get_drvdata(dev);
+	crashlog = dev_get_drvdata(dev);
 
 	result = kstrtobool(buf, &enabled);
 	if (result)
 		return result;
 
-	guard(mutex)(&entry->control_mutex);
+	guard(mutex)(&crashlog->control_mutex);
 
-	pmt_crashlog_set_disable(&entry->entry, !enabled);
+	pmt_crashlog_set_disable(crashlog, !enabled);
 
 	return count;
 }
@@ -170,11 +171,11 @@ static DEVICE_ATTR_RW(enable);
 static ssize_t
 trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
-	struct intel_pmt_entry *entry;
+	struct crashlog_entry *crashlog;
 	bool trigger;
 
-	entry = dev_get_drvdata(dev);
-	trigger = pmt_crashlog_complete(entry);
+	crashlog = dev_get_drvdata(dev);
+	trigger = pmt_crashlog_complete(crashlog);
 
 	return sprintf(buf, "%d\n", trigger);
 }
@@ -183,32 +184,32 @@ static ssize_t
 trigger_store(struct device *dev, struct device_attribute *attr,
 	      const char *buf, size_t count)
 {
-	struct crashlog_entry *entry;
+	struct crashlog_entry *crashlog;
 	bool trigger;
 	int result;
 
-	entry = dev_get_drvdata(dev);
+	crashlog = dev_get_drvdata(dev);
 
 	result = kstrtobool(buf, &trigger);
 	if (result)
 		return result;
 
-	guard(mutex)(&entry->control_mutex);
+	guard(mutex)(&crashlog->control_mutex);
 
 	/* if device is currently disabled, return busy */
-	if (pmt_crashlog_disabled(&entry->entry))
+	if (pmt_crashlog_disabled(crashlog))
 		return -EBUSY;
 
 	if (!trigger) {
-		pmt_crashlog_set_clear(&entry->entry);
+		pmt_crashlog_set_clear(crashlog);
 		return count;
 	}
 
 	/* we cannot trigger a new crash if one is still pending */
-	if (pmt_crashlog_complete(&entry->entry))
+	if (pmt_crashlog_complete(crashlog))
 		return -EEXIST;
 
-	pmt_crashlog_set_execute(&entry->entry);
+	pmt_crashlog_set_execute(crashlog);
 
 	return count;
 }
-- 
2.49.0

[PATCH v5 11/12] platform/x86/intel/pmt: use a version struct

[Michael J. Ruhl]

In preparation for supporting multiple crashlog versions, use a struct
to keep bit offset info for the status and control bits.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 92 ++++++++++++++++-------
 1 file changed, 66 insertions(+), 26 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 7975abb3c21b..d109f307f110 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -24,21 +24,6 @@
 /* Crashlog discovery header types */
 #define CRASH_TYPE_OOBMSM	1
 
-/* Control Flags */
-#define CRASHLOG_FLAG_DISABLE		BIT(28)
-
-/*
- * Bits 29 and 30 control the state of bit 31.
- *
- * Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
- * Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
- * Bit 31 is the read-only status with a 1 indicating log is complete.
- */
-#define CRASHLOG_FLAG_TRIGGER_CLEAR	BIT(29)
-#define CRASHLOG_FLAG_TRIGGER_EXECUTE	BIT(30)
-#define CRASHLOG_FLAG_TRIGGER_COMPLETE	BIT(31)
-#define CRASHLOG_FLAG_TRIGGER_MASK	GENMASK(31, 28)
-
 /* Crashlog Discovery Header */
 #define CONTROL_OFFSET		0x0
 #define GUID_OFFSET		0x4
@@ -50,10 +35,63 @@
 /* size is in bytes */
 #define GET_SIZE(v)		((v) * sizeof(u32))
 
+/*
+ * Type 1 Version 0
+ * status and control registers are combined.
+ *
+ * Bits 29 and 30 control the state of bit 31.
+ * Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
+ * Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
+ * Bit 31 is the read-only status with a 1 indicating log is complete.
+ */
+#define TYPE1_VER0_STATUS_OFFSET	0x00
+#define TYPE1_VER0_CONTROL_OFFSET	0x00
+
+#define TYPE1_VER0_DISABLE		BIT(28)
+#define TYPE1_VER0_CLEAR		BIT(29)
+#define TYPE1_VER0_EXECUTE		BIT(30)
+#define TYPE1_VER0_COMPLETE		BIT(31)
+#define TYPE1_VER0_TRIGGER_MASK		GENMASK(31, 28)
+
+/* After offset, order alphabetically, not bit ordered */
+struct crashlog_status {
+	u32 offset;
+	u32 cleared;
+	u32 complete;
+	u32 disabled;
+};
+
+struct crashlog_control {
+	u32 offset;
+	u32 trigger_mask;
+	u32 clear;
+	u32 disable;
+	u32 manual;
+};
+
+struct crashlog_info {
+	struct crashlog_status status;
+	struct crashlog_control control;
+};
+
+static const struct crashlog_info crashlog_type1_ver0 = {
+	.status.offset = TYPE1_VER0_STATUS_OFFSET,
+	.status.cleared = TYPE1_VER0_CLEAR,
+	.status.complete = TYPE1_VER0_COMPLETE,
+	.status.disabled = TYPE1_VER0_DISABLE,
+
+	.control.offset = TYPE1_VER0_CONTROL_OFFSET,
+	.control.trigger_mask = TYPE1_VER0_TRIGGER_MASK,
+	.control.clear = TYPE1_VER0_CLEAR,
+	.control.disable = TYPE1_VER0_DISABLE,
+	.control.manual = TYPE1_VER0_EXECUTE,
+};
+
 struct crashlog_entry {
 	/* entry must be first member of struct */
 	struct intel_pmt_entry		entry;
 	struct mutex			control_mutex;
+	const struct crashlog_info	*info;
 };
 
 struct pmt_crashlog_priv {
@@ -70,24 +108,25 @@ struct pmt_crashlog_priv {
 /* read/modify/write */
 static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
 {
+	const struct crashlog_control *control = &crashlog->info->control;
 	struct intel_pmt_entry *entry = &crashlog->entry;
-	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+	u32 reg = readl(entry->disc_table + control->offset);
 
-	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
+	reg &= ~control->trigger_mask;
 
 	if (set)
 		reg |= bit;
 	else
 		reg &= bit;
 
-	writel(reg, entry->disc_table + CONTROL_OFFSET);
+	writel(reg, entry->disc_table + control->offset);
 }
 
 /* read/check */
 static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
 {
-	struct intel_pmt_entry *entry = &crashlog->entry;
-	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+	const struct crashlog_status *status = &crashlog->info->status;
+	u32 reg = readl(crashlog->entry.disc_table + status->offset);
 
 	return !!(reg & bit);
 }
@@ -95,13 +134,13 @@ static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
 static bool pmt_crashlog_complete(struct crashlog_entry *crashlog)
 {
 	/* return current value of the crashlog complete flag */
-	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_TRIGGER_COMPLETE);
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.complete);
 }
 
 static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
 {
 	/* return current value of the crashlog disabled flag */
-	return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_DISABLE);
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.disabled);
 }
 
 static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
@@ -121,17 +160,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
 
 static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
 {
-	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_DISABLE, disable);
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.disable, disable);
 }
 
 static void pmt_crashlog_set_clear(struct crashlog_entry *crashlog)
 {
-	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.clear, CRASHLOG_SET_BIT);
 }
 
 static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
 {
-	pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.manual, CRASHLOG_SET_BIT);
 }
 
 /*
@@ -235,9 +274,10 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
 	if (!pmt_crashlog_supported(entry))
 		return 1;
 
-	/* initialize control mutex */
+	/* initialize the crashlog struct */
 	crashlog = container_of(entry, struct crashlog_entry, entry);
 	mutex_init(&crashlog->control_mutex);
+	crashlog->info = &crashlog_type1_ver0;
 
 	header->access_type = GET_ACCESS(readl(disc_table));
 	header->guid = readl(disc_table + GUID_OFFSET);
-- 
2.49.0

[PATCH v5 12/12] platform/x86/intel/pmt: support BMG crashlog

[Michael J. Ruhl]

The Battlemage GPU has the type 1 version 2 crashlog feature.

Update the crashlog driver to support this crashlog version.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 268 ++++++++++++++++++++--
 1 file changed, 255 insertions(+), 13 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index d109f307f110..6dfd6ce07599 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -53,20 +53,52 @@
 #define TYPE1_VER0_COMPLETE		BIT(31)
 #define TYPE1_VER0_TRIGGER_MASK		GENMASK(31, 28)
 
+/*
+ * Type 1 Version 2
+ * status and control are two different registers
+ */
+#define TYPE1_VER2_STATUS_OFFSET	0x00
+#define TYPE1_VER2_CONTROL_OFFSET	0x14
+
+/* status register */
+#define TYPE1_VER2_CLEAR_SUPPORT	BIT(20)
+#define TYPE1_VER2_REARMED		BIT(25)
+#define TYPE1_VER2_ERROR		BIT(26)
+#define TYPE1_VER2_CONSUMED		BIT(27)
+#define TYPE1_VER2_DISABLED		BIT(28)
+#define TYPE1_VER2_CLEARED		BIT(29)
+#define TYPE1_VER2_IN_PROGRESS		BIT(30)
+#define TYPE1_VER2_COMPLETE		BIT(31)
+
+/* control register */
+#define TYPE1_VER2_CONSUME		BIT(25)
+#define TYPE1_VER2_REARM		BIT(28)
+#define TYPE1_VER2_EXECUTE		BIT(29)
+#define TYPE1_VER2_CLEAR		BIT(30)
+#define TYPE1_VER2_DISABLE		BIT(31)
+#define TYPE1_VER2_TRIGGER_MASK		(TYPE1_VER2_EXECUTE | TYPE1_VER2_CLEAR | TYPE1_VER2_DISABLE)
+
 /* After offset, order alphabetically, not bit ordered */
 struct crashlog_status {
 	u32 offset;
+	u32 clear_supported;
 	u32 cleared;
 	u32 complete;
+	u32 consumed;
 	u32 disabled;
+	u32 error;
+	u32 in_progress;
+	u32 rearmed;
 };
 
 struct crashlog_control {
 	u32 offset;
 	u32 trigger_mask;
 	u32 clear;
+	u32 consume;
 	u32 disable;
 	u32 manual;
+	u32 rearm;
 };
 
 struct crashlog_info {
@@ -87,6 +119,26 @@ static const struct crashlog_info crashlog_type1_ver0 = {
 	.control.manual = TYPE1_VER0_EXECUTE,
 };
 
+const struct crashlog_info crashlog_type1_ver2 = {
+	.status.offset = TYPE1_VER2_STATUS_OFFSET,
+	.status.clear_supported = TYPE1_VER2_CLEAR_SUPPORT,
+	.status.cleared = TYPE1_VER2_CLEARED,
+	.status.complete = TYPE1_VER2_COMPLETE,
+	.status.consumed = TYPE1_VER2_CONSUMED,
+	.status.disabled = TYPE1_VER2_DISABLED,
+	.status.error = TYPE1_VER2_ERROR,
+	.status.in_progress = TYPE1_VER2_IN_PROGRESS,
+	.status.rearmed = TYPE1_VER2_REARMED,
+
+	.control.offset = TYPE1_VER2_CONTROL_OFFSET,
+	.control.trigger_mask = TYPE1_VER2_TRIGGER_MASK,
+	.control.clear = TYPE1_VER2_CLEAR,
+	.control.consume = TYPE1_VER2_CONSUME,
+	.control.disable = TYPE1_VER2_DISABLE,
+	.control.manual = TYPE1_VER2_EXECUTE,
+	.control.rearm = TYPE1_VER2_REARM,
+};
+
 struct crashlog_entry {
 	/* entry must be first member of struct */
 	struct intel_pmt_entry		entry;
@@ -143,19 +195,23 @@ static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
 	return pmt_crashlog_rc(crashlog, crashlog->info->status.disabled);
 }
 
-static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
+static bool pmt_crashlog_supported(struct intel_pmt_entry *entry, u32 *crash_type, u32 *version)
 {
 	u32 discovery_header = readl(entry->disc_table + CONTROL_OFFSET);
-	u32 crash_type, version;
 
-	crash_type = GET_TYPE(discovery_header);
-	version = GET_VERSION(discovery_header);
+	*crash_type = GET_TYPE(discovery_header);
+	*version = GET_VERSION(discovery_header);
 
 	/*
-	 * Currently we only recognize OOBMSM version 0 devices.
-	 * We can ignore all other crashlog devices in the system.
+	 * Currently we only recognize OOBMSM (type 1) and version 0 or 2
+	 * devices.
+	 *
+	 * Ignore all other crashlog devices in the system.
 	 */
-	return crash_type == CRASH_TYPE_OOBMSM && version == 0;
+	if (*crash_type == CRASH_TYPE_OOBMSM && (*version == 0 || *version == 2))
+		return true;
+
+	return false;
 }
 
 static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
@@ -173,9 +229,118 @@ static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
 	pmt_crashlog_rmw(crashlog, crashlog->info->control.manual, CRASHLOG_SET_BIT);
 }
 
+static bool pmt_crashlog_cleared(struct crashlog_entry *crashlog)
+{
+	/* return current value of the crashlog cleared flag */
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.cleared);
+}
+
+static bool pmt_crashlog_consumed(struct crashlog_entry *crashlog)
+{
+	/* return current value of the crashlog consumedflag */
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.consumed);
+}
+
+static void pmt_crashlog_set_consumed(struct crashlog_entry *crashlog)
+{
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.consume, CRASHLOG_SET_BIT);
+}
+
+static bool pmt_crashlog_error(struct crashlog_entry *crashlog)
+{
+	/* return current value of the crashlog error flag */
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.error);
+}
+
+static bool pmt_crashlog_rearm(struct crashlog_entry *crashlog)
+{
+	/* return current value of the crashlog reamed flag */
+	return pmt_crashlog_rc(crashlog, crashlog->info->status.rearmed);
+}
+
+static void pmt_crashlog_set_rearm(struct crashlog_entry *crashlog)
+{
+	pmt_crashlog_rmw(crashlog, crashlog->info->control.rearm, CRASHLOG_SET_BIT);
+}
+
 /*
  * sysfs
  */
+static ssize_t
+clear_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	bool cleared = pmt_crashlog_cleared(crashlog);
+
+	return sysfs_emit(buf, "%d\n", cleared);
+}
+
+static ssize_t
+clear_store(struct device *dev, struct device_attribute *attr,
+	    const char *buf, size_t count)
+{
+	struct crashlog_entry *crashlog;
+	bool clear;
+	int result;
+
+	crashlog = dev_get_drvdata(dev);
+
+	result = kstrtobool(buf, &clear);
+	if (result)
+		return result;
+
+	/* set bit only */
+	if (!clear)
+		return -EINVAL;
+
+	guard(mutex)(&crashlog->control_mutex);
+
+	pmt_crashlog_set_clear(crashlog);
+
+	return count;
+}
+static DEVICE_ATTR_RW(clear);
+
+static ssize_t
+consumed_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	bool consumed = pmt_crashlog_consumed(crashlog);
+
+	return sysfs_emit(buf, "%d\n", consumed);
+}
+
+static ssize_t consumed_store(struct device *dev, struct device_attribute *attr,
+			      const char *buf, size_t count)
+{
+	struct crashlog_entry *crashlog;
+	bool consumed;
+	int result;
+
+	crashlog = dev_get_drvdata(dev);
+
+	result = kstrtobool(buf, &consumed);
+	if (result)
+		return result;
+
+	/* set bit only */
+	if (!consumed)
+		return -EINVAL;
+
+	guard(mutex)(&crashlog->control_mutex);
+
+	if (pmt_crashlog_disabled(crashlog))
+		return -EBUSY;
+
+	if (!pmt_crashlog_complete(crashlog))
+		return -EEXIST;
+
+	pmt_crashlog_set_consumed(crashlog);
+
+	return count;
+}
+static DEVICE_ATTR_RW(consumed);
+
 static ssize_t
 enable_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -207,6 +372,50 @@ enable_store(struct device *dev, struct device_attribute *attr,
 }
 static DEVICE_ATTR_RW(enable);
 
+static ssize_t
+error_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	bool error = pmt_crashlog_error(crashlog);
+
+	return sysfs_emit(buf, "%d\n", error);
+}
+static DEVICE_ATTR_RO(error);
+
+static ssize_t
+rearm_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct crashlog_entry *crashlog = dev_get_drvdata(dev);
+	int rearmed = pmt_crashlog_rearm(crashlog);
+
+	return sysfs_emit(buf, "%d\n", rearmed);
+}
+
+static ssize_t rearm_store(struct device *dev, struct device_attribute *attr,
+			   const char *buf, size_t count)
+{
+	struct crashlog_entry *crashlog;
+	bool rearm;
+	int result;
+
+	crashlog = dev_get_drvdata(dev);
+
+	result = kstrtobool(buf, &rearm);
+	if (result)
+		return result;
+
+	/* set only */
+	if (!rearm)
+		return -EINVAL;
+
+	guard(mutex)(&crashlog->control_mutex);
+
+	pmt_crashlog_set_rearm(crashlog);
+
+	return count;
+}
+static DEVICE_ATTR_RW(rearm);
+
 static ssize_t
 trigger_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -254,30 +463,63 @@ trigger_store(struct device *dev, struct device_attribute *attr,
 }
 static DEVICE_ATTR_RW(trigger);
 
-static struct attribute *pmt_crashlog_attrs[] = {
+static struct attribute *pmt_crashlog_type1_ver0_attrs[] = {
 	&dev_attr_enable.attr,
 	&dev_attr_trigger.attr,
 	NULL
 };
 
-static const struct attribute_group pmt_crashlog_group = {
-	.attrs	= pmt_crashlog_attrs,
+static struct attribute *pmt_crashlog_type1_ver2_attrs[] = {
+	&dev_attr_clear.attr,
+	&dev_attr_consumed.attr,
+	&dev_attr_enable.attr,
+	&dev_attr_error.attr,
+	&dev_attr_rearm.attr,
+	&dev_attr_trigger.attr,
+	NULL
+};
+
+static const struct attribute_group pmt_crashlog_type1_ver0_group = {
+	.attrs	= pmt_crashlog_type1_ver0_attrs,
 };
 
+static const struct attribute_group pmt_crashlog_type1_ver2_group = {
+	.attrs = pmt_crashlog_type1_ver2_attrs,
+};
+
+static const struct crashlog_info *select_crashlog_info(u32 type, u32 version)
+{
+	if (version == 0)
+		return &crashlog_type1_ver0;
+
+	return &crashlog_type1_ver2;
+}
+
+static const struct attribute_group *select_sysfs_grp(u32 type, u32 version)
+{
+	if (version == 0)
+		return &pmt_crashlog_type1_ver2_group;
+
+	return &pmt_crashlog_type1_ver2_group;
+}
+
 static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
 				      struct device *dev)
 {
 	void __iomem *disc_table = entry->disc_table;
 	struct intel_pmt_header *header = &entry->header;
 	struct crashlog_entry *crashlog;
+	u32 version;
+	u32 type;
 
-	if (!pmt_crashlog_supported(entry))
+	if (!pmt_crashlog_supported(entry, &type, &version))
 		return 1;
 
 	/* initialize the crashlog struct */
 	crashlog = container_of(entry, struct crashlog_entry, entry);
 	mutex_init(&crashlog->control_mutex);
-	crashlog->info = &crashlog_type1_ver0;
+
+	crashlog->info = select_crashlog_info(type, version);
 
 	header->access_type = GET_ACCESS(readl(disc_table));
 	header->guid = readl(disc_table + GUID_OFFSET);
@@ -286,7 +528,7 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
 	/* Size is measured in DWORDS, but accessor returns bytes */
 	header->size = GET_SIZE(readl(disc_table + SIZE_OFFSET));
 
-	entry->attr_grp = &pmt_crashlog_group;
+	entry->attr_grp = select_sysfs_grp(type, version);
 
 	return 0;
 }
-- 
2.49.0

✓ CI.KUnit: success for Crashlog Type1 Version2 support (rev5)

[Patchwork]

== Series Details ==

Series: Crashlog Type1 Version2 support (rev5)
URL   : https://patchwork.freedesktop.org/series/149120/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:35:00] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:35:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[20:35:38] Starting KUnit Kernel (1/1)...
[20:35:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:35:38] ================== guc_buf (11 subtests) ===================
[20:35:38] [PASSED] test_smallest
[20:35:38] [PASSED] test_largest
[20:35:38] [PASSED] test_granular
[20:35:38] [PASSED] test_unique
[20:35:38] [PASSED] test_overlap
[20:35:38] [PASSED] test_reusable
[20:35:38] [PASSED] test_too_big
[20:35:38] [PASSED] test_flush
[20:35:38] [PASSED] test_lookup
[20:35:38] [PASSED] test_data
[20:35:38] [PASSED] test_class
[20:35:38] ===================== [PASSED] guc_buf =====================
[20:35:38] =================== guc_dbm (7 subtests) ===================
[20:35:38] [PASSED] test_empty
[20:35:38] [PASSED] test_default
[20:35:38] ======================== test_size  ========================
[20:35:38] [PASSED] 4
[20:35:38] [PASSED] 8
[20:35:38] [PASSED] 32
[20:35:38] [PASSED] 256
[20:35:38] ==================== [PASSED] test_size ====================
[20:35:38] ======================= test_reuse  ========================
[20:35:38] [PASSED] 4
[20:35:38] [PASSED] 8
[20:35:38] [PASSED] 32
[20:35:38] [PASSED] 256
[20:35:38] =================== [PASSED] test_reuse ====================
[20:35:38] =================== test_range_overlap  ====================
[20:35:38] [PASSED] 4
[20:35:38] [PASSED] 8
[20:35:38] [PASSED] 32
[20:35:38] [PASSED] 256
[20:35:38] =============== [PASSED] test_range_overlap ================
[20:35:38] =================== test_range_compact  ====================
[20:35:38] [PASSED] 4
[20:35:38] [PASSED] 8
[20:35:38] [PASSED] 32
[20:35:38] [PASSED] 256
[20:35:38] =============== [PASSED] test_range_compact ================
[20:35:38] ==================== test_range_spare  =====================
[20:35:38] [PASSED] 4
[20:35:38] [PASSED] 8
[20:35:38] [PASSED] 32
[20:35:38] [PASSED] 256
[20:35:38] ================ [PASSED] test_range_spare =================
[20:35:38] ===================== [PASSED] guc_dbm =====================
[20:35:38] =================== guc_idm (6 subtests) ===================
[20:35:38] [PASSED] bad_init
[20:35:38] [PASSED] no_init
[20:35:38] [PASSED] init_fini
[20:35:38] [PASSED] check_used
[20:35:38] [PASSED] check_quota
[20:35:38] [PASSED] check_all
[20:35:38] ===================== [PASSED] guc_idm =====================
[20:35:38] ================== no_relay (3 subtests) ===================
[20:35:38] [PASSED] xe_drops_guc2pf_if_not_ready
[20:35:38] [PASSED] xe_drops_guc2vf_if_not_ready
[20:35:38] [PASSED] xe_rejects_send_if_not_ready
[20:35:38] ==================== [PASSED] no_relay =====================
[20:35:38] ================== pf_relay (14 subtests) ==================
[20:35:38] [PASSED] pf_rejects_guc2pf_too_short
[20:35:38] [PASSED] pf_rejects_guc2pf_too_long
[20:35:38] [PASSED] pf_rejects_guc2pf_no_payload
[20:35:38] [PASSED] pf_fails_no_payload
[20:35:38] [PASSED] pf_fails_bad_origin
[20:35:38] [PASSED] pf_fails_bad_type
[20:35:38] [PASSED] pf_txn_reports_error
[20:35:38] [PASSED] pf_txn_sends_pf2guc
[20:35:38] [PASSED] pf_sends_pf2guc
[20:35:38] [SKIPPED] pf_loopback_nop
[20:35:38] [SKIPPED] pf_loopback_echo
[20:35:38] [SKIPPED] pf_loopback_fail
[20:35:38] [SKIPPED] pf_loopback_busy
[20:35:38] [SKIPPED] pf_loopback_retry
[20:35:38] ==================== [PASSED] pf_relay =====================
[20:35:38] ================== vf_relay (3 subtests) ===================
[20:35:38] [PASSED] vf_rejects_guc2vf_too_short
[20:35:38] [PASSED] vf_rejects_guc2vf_too_long
[20:35:38] [PASSED] vf_rejects_guc2vf_no_payload
[20:35:38] ==================== [PASSED] vf_relay =====================
[20:35:38] ================= pf_service (11 subtests) =================
[20:35:38] [PASSED] pf_negotiate_any
[20:35:38] [PASSED] pf_negotiate_base_match
[20:35:38] [PASSED] pf_negotiate_base_newer
[20:35:38] [PASSED] pf_negotiate_base_next
[20:35:38] [SKIPPED] pf_negotiate_base_older
[20:35:38] [PASSED] pf_negotiate_base_prev
[20:35:38] [PASSED] pf_negotiate_latest_match
[20:35:38] [PASSED] pf_negotiate_latest_newer
[20:35:38] [PASSED] pf_negotiate_latest_next
[20:35:38] [SKIPPED] pf_negotiate_latest_older
[20:35:38] [SKIPPED] pf_negotiate_latest_prev
[20:35:38] =================== [PASSED] pf_service ====================
[20:35:38] ===================== lmtt (1 subtest) =====================
[20:35:38] ======================== test_ops  =========================
[20:35:38] [PASSED] 2-level
[20:35:38] [PASSED] multi-level
[20:35:38] ==================== [PASSED] test_ops =====================
[20:35:38] ====================== [PASSED] lmtt =======================
[20:35:38] =================== xe_mocs (2 subtests) ===================
[20:35:38] ================ xe_live_mocs_kernel_kunit  ================
[20:35:38] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:35:38] ================ xe_live_mocs_reset_kunit  =================
[20:35:38] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:35:38] ==================== [SKIPPED] xe_mocs =====================
[20:35:38] ================= xe_migrate (2 subtests) ==================
[20:35:38] ================= xe_migrate_sanity_kunit  =================
[20:35:38] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:35:38] ================== xe_validate_ccs_kunit  ==================
[20:35:38] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:35:38] =================== [SKIPPED] xe_migrate ===================
[20:35:38] ================== xe_dma_buf (1 subtest) ==================
[20:35:38] ==================== xe_dma_buf_kunit  =====================
[20:35:38] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:35:38] =================== [SKIPPED] xe_dma_buf ===================
[20:35:38] ================= xe_bo_shrink (1 subtest) =================
[20:35:38] =================== xe_bo_shrink_kunit  ====================
[20:35:38] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:35:38] ================== [SKIPPED] xe_bo_shrink ==================
[20:35:38] ==================== xe_bo (2 subtests) ====================
[20:35:38] ================== xe_ccs_migrate_kunit  ===================
[20:35:38] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:35:38] ==================== xe_bo_evict_kunit  ====================
[20:35:38] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:35:38] ===================== [SKIPPED] xe_bo ======================
[20:35:38] ==================== args (11 subtests) ====================
[20:35:38] [PASSED] count_args_test
[20:35:38] [PASSED] call_args_example
[20:35:38] [PASSED] call_args_test
[20:35:38] [PASSED] drop_first_arg_example
[20:35:38] [PASSED] drop_first_arg_test
[20:35:38] [PASSED] first_arg_example
[20:35:38] [PASSED] first_arg_test
[20:35:38] [PASSED] last_arg_example
[20:35:38] [PASSED] last_arg_test
[20:35:38] [PASSED] pick_arg_example
[20:35:38] [PASSED] sep_comma_example
[20:35:38] ====================== [PASSED] args =======================
[20:35:38] =================== xe_pci (2 subtests) ====================
[20:35:38] ==================== check_graphics_ip  ====================
[20:35:38] [PASSED] 12.70 Xe_LPG
[20:35:38] [PASSED] 12.71 Xe_LPG
[20:35:38] [PASSED] 12.74 Xe_LPG+
[20:35:38] [PASSED] 20.01 Xe2_HPG
[20:35:38] [PASSED] 20.02 Xe2_HPG
[20:35:38] [PASSED] 20.04 Xe2_LPG
[20:35:38] [PASSED] 30.00 Xe3_LPG
[20:35:38] [PASSED] 30.01 Xe3_LPG
[20:35:38] [PASSED] 30.03 Xe3_LPG
[20:35:38] ================ [PASSED] check_graphics_ip ================
[20:35:38] ===================== check_media_ip  ======================
[20:35:38] [PASSED] 13.00 Xe_LPM+
[20:35:38] [PASSED] 13.01 Xe2_HPM
[20:35:38] [PASSED] 20.00 Xe2_LPM
[20:35:38] [PASSED] 30.00 Xe3_LPM
[20:35:38] [PASSED] 30.02 Xe3_LPM
stty: 'standard input': Inappropriate ioctl for device
[20:35:38] ================= [PASSED] check_media_ip ==================
[20:35:38] ===================== [PASSED] xe_pci ======================
[20:35:38] =================== xe_rtp (2 subtests) ====================
[20:35:38] =============== xe_rtp_process_to_sr_tests  ================
[20:35:38] [PASSED] coalesce-same-reg
[20:35:38] [PASSED] no-match-no-add
[20:35:38] [PASSED] match-or
[20:35:38] [PASSED] match-or-xfail
[20:35:38] [PASSED] no-match-no-add-multiple-rules
[20:35:38] [PASSED] two-regs-two-entries
[20:35:38] [PASSED] clr-one-set-other
[20:35:38] [PASSED] set-field
[20:35:38] [PASSED] conflict-duplicate
[20:35:38] [PASSED] conflict-not-disjoint
[20:35:38] [PASSED] conflict-reg-type
[20:35:38] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:35:38] ================== xe_rtp_process_tests  ===================
[20:35:38] [PASSED] active1
[20:35:38] [PASSED] active2
[20:35:38] [PASSED] active-inactive
[20:35:38] [PASSED] inactive-active
[20:35:38] [PASSED] inactive-1st_or_active-inactive
[20:35:38] [PASSED] inactive-2nd_or_active-inactive
[20:35:38] [PASSED] inactive-last_or_active-inactive
[20:35:38] [PASSED] inactive-no_or_active-inactive
[20:35:38] ============== [PASSED] xe_rtp_process_tests ===============
[20:35:38] ===================== [PASSED] xe_rtp ======================
[20:35:38] ==================== xe_wa (1 subtest) =====================
[20:35:38] ======================== xe_wa_gt  =========================
[20:35:38] [PASSED] TIGERLAKE (B0)
[20:35:38] [PASSED] DG1 (A0)
[20:35:38] [PASSED] DG1 (B0)
[20:35:38] [PASSED] ALDERLAKE_S (A0)
[20:35:38] [PASSED] ALDERLAKE_S (B0)
[20:35:38] [PASSED] ALDERLAKE_S (C0)
[20:35:38] [PASSED] ALDERLAKE_S (D0)
[20:35:38] [PASSED] ALDERLAKE_P (A0)
[20:35:38] [PASSED] ALDERLAKE_P (B0)
[20:35:38] [PASSED] ALDERLAKE_P (C0)
[20:35:38] [PASSED] ALDERLAKE_S_RPLS (D0)
[20:35:38] [PASSED] ALDERLAKE_P_RPLU (E0)
[20:35:38] [PASSED] DG2_G10 (C0)
[20:35:38] [PASSED] DG2_G11 (B1)
[20:35:38] [PASSED] DG2_G12 (A1)
[20:35:38] [PASSED] METEORLAKE (g:A0, m:A0)
[20:35:38] [PASSED] METEORLAKE (g:A0, m:A0)
[20:35:38] [PASSED] METEORLAKE (g:A0, m:A0)
[20:35:38] [PASSED] LUNARLAKE (g:A0, m:A0)
[20:35:38] [PASSED] LUNARLAKE (g:B0, m:A0)
[20:35:38] [PASSED] BATTLEMAGE (g:A0, m:A1)
[20:35:38] ==================== [PASSED] xe_wa_gt =====================
[20:35:38] ====================== [PASSED] xe_wa ======================
[20:35:38] ============================================================
[20:35:38] Testing complete. Ran 145 tests: passed: 129, skipped: 16
[20:35:38] Elapsed time: 37.965s total, 4.199s configuring, 33.349s building, 0.377s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:35:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:35:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[20:36:06] Starting KUnit Kernel (1/1)...
[20:36:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:36:06] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:36:06] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:36:06] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:36:06] =========== drm_validate_clone_mode (2 subtests) ===========
[20:36:06] ============== drm_test_check_in_clone_mode  ===============
[20:36:06] [PASSED] in_clone_mode
[20:36:06] [PASSED] not_in_clone_mode
[20:36:06] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:36:06] =============== drm_test_check_valid_clones  ===============
[20:36:06] [PASSED] not_in_clone_mode
[20:36:06] [PASSED] valid_clone
[20:36:06] [PASSED] invalid_clone
[20:36:06] =========== [PASSED] drm_test_check_valid_clones ===========
[20:36:06] ============= [PASSED] drm_validate_clone_mode =============
[20:36:06] ============= drm_validate_modeset (1 subtest) =============
[20:36:06] [PASSED] drm_test_check_connector_changed_modeset
[20:36:06] ============== [PASSED] drm_validate_modeset ===============
[20:36:06] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:36:06] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:36:06] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:36:06] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:36:06] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:36:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:36:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:36:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:36:06] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:36:06] ============== drm_bridge_alloc (2 subtests) ===============
[20:36:06] [PASSED] drm_test_drm_bridge_alloc_basic
[20:36:06] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:36:06] ================ [PASSED] drm_bridge_alloc =================
[20:36:06] ================== drm_buddy (7 subtests) ==================
[20:36:06] [PASSED] drm_test_buddy_alloc_limit
[20:36:06] [PASSED] drm_test_buddy_alloc_optimistic
[20:36:06] [PASSED] drm_test_buddy_alloc_pessimistic
[20:36:06] [PASSED] drm_test_buddy_alloc_pathological
[20:36:06] [PASSED] drm_test_buddy_alloc_contiguous
[20:36:06] [PASSED] drm_test_buddy_alloc_clear
[20:36:06] [PASSED] drm_test_buddy_alloc_range_bias
[20:36:06] ==================== [PASSED] drm_buddy ====================
[20:36:06] ============= drm_cmdline_parser (40 subtests) =============
[20:36:06] [PASSED] drm_test_cmdline_force_d_only
[20:36:06] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:36:06] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:36:06] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:36:06] [PASSED] drm_test_cmdline_force_e_only
[20:36:06] [PASSED] drm_test_cmdline_res
[20:36:06] [PASSED] drm_test_cmdline_res_vesa
[20:36:06] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:36:06] [PASSED] drm_test_cmdline_res_rblank
[20:36:06] [PASSED] drm_test_cmdline_res_bpp
[20:36:06] [PASSED] drm_test_cmdline_res_refresh
[20:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:36:06] [PASSED] drm_test_cmdline_res_margins_force_on
[20:36:06] [PASSED] drm_test_cmdline_res_vesa_margins
[20:36:06] [PASSED] drm_test_cmdline_name
[20:36:06] [PASSED] drm_test_cmdline_name_bpp
[20:36:06] [PASSED] drm_test_cmdline_name_option
[20:36:06] [PASSED] drm_test_cmdline_name_bpp_option
[20:36:06] [PASSED] drm_test_cmdline_rotate_0
[20:36:06] [PASSED] drm_test_cmdline_rotate_90
[20:36:06] [PASSED] drm_test_cmdline_rotate_180
[20:36:06] [PASSED] drm_test_cmdline_rotate_270
[20:36:06] [PASSED] drm_test_cmdline_hmirror
[20:36:06] [PASSED] drm_test_cmdline_vmirror
[20:36:06] [PASSED] drm_test_cmdline_margin_options
[20:36:06] [PASSED] drm_test_cmdline_multiple_options
[20:36:06] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:36:06] [PASSED] drm_test_cmdline_extra_and_option
[20:36:06] [PASSED] drm_test_cmdline_freestanding_options
[20:36:06] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:36:06] [PASSED] drm_test_cmdline_panel_orientation
[20:36:06] ================ drm_test_cmdline_invalid  =================
[20:36:06] [PASSED] margin_only
[20:36:06] [PASSED] interlace_only
[20:36:06] [PASSED] res_missing_x
[20:36:06] [PASSED] res_missing_y
[20:36:06] [PASSED] res_bad_y
[20:36:06] [PASSED] res_missing_y_bpp
[20:36:06] [PASSED] res_bad_bpp
[20:36:06] [PASSED] res_bad_refresh
[20:36:06] [PASSED] res_bpp_refresh_force_on_off
[20:36:06] [PASSED] res_invalid_mode
[20:36:06] [PASSED] res_bpp_wrong_place_mode
[20:36:06] [PASSED] name_bpp_refresh
[20:36:06] [PASSED] name_refresh
[20:36:06] [PASSED] name_refresh_wrong_mode
[20:36:06] [PASSED] name_refresh_invalid_mode
[20:36:06] [PASSED] rotate_multiple
[20:36:06] [PASSED] rotate_invalid_val
[20:36:06] [PASSED] rotate_truncated
[20:36:06] [PASSED] invalid_option
[20:36:06] [PASSED] invalid_tv_option
[20:36:06] [PASSED] truncated_tv_option
[20:36:06] ============ [PASSED] drm_test_cmdline_invalid =============
[20:36:06] =============== drm_test_cmdline_tv_options  ===============
[20:36:06] [PASSED] NTSC
[20:36:06] [PASSED] NTSC_443
[20:36:06] [PASSED] NTSC_J
[20:36:06] [PASSED] PAL
[20:36:06] [PASSED] PAL_M
[20:36:06] [PASSED] PAL_N
[20:36:06] [PASSED] SECAM
[20:36:06] [PASSED] MONO_525
[20:36:06] [PASSED] MONO_625
[20:36:06] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:36:06] =============== [PASSED] drm_cmdline_parser ================
[20:36:06] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:36:06] [PASSED] drm_test_connector_hdmi_init_valid
[20:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:36:06] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:36:06] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:36:06] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:36:06] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:36:06] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:36:06] [PASSED] supported_formats=0x3 yuv420_allowed=1
[20:36:06] [PASSED] supported_formats=0x3 yuv420_allowed=0
[20:36:06] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:36:06] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:36:06] [PASSED] drm_test_connector_hdmi_init_null_product
[20:36:06] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:36:06] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:36:06] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:36:06] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:36:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:36:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:36:06] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:36:06] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:36:06] [PASSED] HDMI-A
[20:36:06] [PASSED] HDMI-B
[20:36:06] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:36:06] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:36:06] [PASSED] Unknown
[20:36:06] [PASSED] VGA
[20:36:06] [PASSED] DVI-I
[20:36:06] [PASSED] DVI-D
[20:36:06] [PASSED] DVI-A
[20:36:06] [PASSED] Composite
[20:36:06] [PASSED] SVIDEO
[20:36:06] [PASSED] LVDS
[20:36:06] [PASSED] Component
[20:36:06] [PASSED] DIN
[20:36:06] [PASSED] DP
[20:36:06] [PASSED] TV
[20:36:06] [PASSED] eDP
[20:36:06] [PASSED] Virtual
[20:36:06] [PASSED] DSI
[20:36:06] [PASSED] DPI
[20:36:06] [PASSED] Writeback
[20:36:06] [PASSED] SPI
[20:36:06] [PASSED] USB
[20:36:06] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:36:06] ============ [PASSED] drmm_connector_hdmi_init =============
[20:36:06] ============= drmm_connector_init (3 subtests) =============
[20:36:06] [PASSED] drm_test_drmm_connector_init
[20:36:06] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:36:06] ========= drm_test_drmm_connector_init_type_valid  =========
[20:36:06] [PASSED] Unknown
[20:36:06] [PASSED] VGA
[20:36:06] [PASSED] DVI-I
[20:36:06] [PASSED] DVI-D
[20:36:06] [PASSED] DVI-A
[20:36:06] [PASSED] Composite
[20:36:06] [PASSED] SVIDEO
[20:36:06] [PASSED] LVDS
[20:36:06] [PASSED] Component
[20:36:06] [PASSED] DIN
[20:36:06] [PASSED] DP
[20:36:06] [PASSED] HDMI-A
[20:36:06] [PASSED] HDMI-B
[20:36:06] [PASSED] TV
[20:36:06] [PASSED] eDP
[20:36:06] [PASSED] Virtual
[20:36:06] [PASSED] DSI
[20:36:06] [PASSED] DPI
[20:36:06] [PASSED] Writeback
[20:36:06] [PASSED] SPI
[20:36:06] [PASSED] USB
[20:36:06] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:36:06] =============== [PASSED] drmm_connector_init ===============
[20:36:06] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_init
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:36:06] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:36:06] [PASSED] Unknown
[20:36:06] [PASSED] VGA
[20:36:06] [PASSED] DVI-I
[20:36:06] [PASSED] DVI-D
[20:36:06] [PASSED] DVI-A
[20:36:06] [PASSED] Composite
[20:36:06] [PASSED] SVIDEO
[20:36:06] [PASSED] LVDS
[20:36:06] [PASSED] Component
[20:36:06] [PASSED] DIN
[20:36:06] [PASSED] DP
[20:36:06] [PASSED] HDMI-A
[20:36:06] [PASSED] HDMI-B
[20:36:06] [PASSED] TV
[20:36:06] [PASSED] eDP
[20:36:06] [PASSED] Virtual
[20:36:06] [PASSED] DSI
[20:36:06] [PASSED] DPI
[20:36:06] [PASSED] Writeback
[20:36:06] [PASSED] SPI
[20:36:06] [PASSED] USB
[20:36:06] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:36:06] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:36:06] [PASSED] Unknown
[20:36:06] [PASSED] VGA
[20:36:06] [PASSED] DVI-I
[20:36:06] [PASSED] DVI-D
[20:36:06] [PASSED] DVI-A
[20:36:06] [PASSED] Composite
[20:36:06] [PASSED] SVIDEO
[20:36:06] [PASSED] LVDS
[20:36:06] [PASSED] Component
[20:36:06] [PASSED] DIN
[20:36:06] [PASSED] DP
[20:36:06] [PASSED] HDMI-A
[20:36:06] [PASSED] HDMI-B
[20:36:06] [PASSED] TV
[20:36:06] [PASSED] eDP
[20:36:06] [PASSED] Virtual
[20:36:06] [PASSED] DSI
[20:36:06] [PASSED] DPI
[20:36:06] [PASSED] Writeback
[20:36:06] [PASSED] SPI
[20:36:06] [PASSED] USB
[20:36:06] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:36:06] =========== [PASSED] drm_connector_dynamic_init ============
[20:36:06] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:36:06] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:36:06] ======= drm_connector_dynamic_register (7 subtests) ========
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:36:06] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:36:06] ========= [PASSED] drm_connector_dynamic_register ==========
[20:36:06] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:36:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:36:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:36:06] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:36:06] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:36:06] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:36:06] [PASSED] NTSC
[20:36:06] [PASSED] NTSC-443
[20:36:06] [PASSED] NTSC-J
[20:36:06] [PASSED] PAL
[20:36:06] [PASSED] PAL-M
[20:36:06] [PASSED] PAL-N
[20:36:06] [PASSED] SECAM
[20:36:06] [PASSED] Mono
[20:36:06] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:36:06] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:36:06] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:36:06] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:36:06] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:36:06] [PASSED] VIC 96
[20:36:06] [PASSED] VIC 97
[20:36:06] [PASSED] VIC 101
[20:36:06] [PASSED] VIC 102
[20:36:06] [PASSED] VIC 106
[20:36:06] [PASSED] VIC 107
[20:36:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:36:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:36:06] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:36:06] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:36:06] [PASSED] Automatic
[20:36:06] [PASSED] Full
[20:36:06] [PASSED] Limited 16:235
[20:36:06] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:36:06] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:36:06] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:36:06] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:36:06] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:36:06] [PASSED] RGB
[20:36:06] [PASSED] YUV 4:2:0
[20:36:06] [PASSED] YUV 4:2:2
[20:36:06] [PASSED] YUV 4:4:4
[20:36:06] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:36:06] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:36:06] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:36:06] ============= drm_damage_helper (21 subtests) ==============
[20:36:06] [PASSED] drm_test_damage_iter_no_damage
[20:36:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:36:06] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:36:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:36:06] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:36:06] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:36:06] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:36:06] [PASSED] drm_test_damage_iter_simple_damage
[20:36:06] [PASSED] drm_test_damage_iter_single_damage
[20:36:06] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:36:06] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:36:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:36:06] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:36:06] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:36:06] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:36:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:36:06] [PASSED] drm_test_damage_iter_damage
[20:36:06] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:36:06] [PASSED] drm_test_damage_iter_damage_one_outside
[20:36:06] [PASSED] drm_test_damage_iter_damage_src_moved
[20:36:06] [PASSED] drm_test_damage_iter_damage_not_visible
[20:36:06] ================ [PASSED] drm_damage_helper ================
[20:36:06] ============== drm_dp_mst_helper (3 subtests) ==============
[20:36:06] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:36:06] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:36:06] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:36:06] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:36:06] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:36:06] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:36:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:36:06] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:36:06] [PASSED] Link rate 2000000 lane count 4
[20:36:06] [PASSED] Link rate 2000000 lane count 2
[20:36:06] [PASSED] Link rate 2000000 lane count 1
[20:36:06] [PASSED] Link rate 1350000 lane count 4
[20:36:06] [PASSED] Link rate 1350000 lane count 2
[20:36:06] [PASSED] Link rate 1350000 lane count 1
[20:36:06] [PASSED] Link rate 1000000 lane count 4
[20:36:06] [PASSED] Link rate 1000000 lane count 2
[20:36:06] [PASSED] Link rate 1000000 lane count 1
[20:36:06] [PASSED] Link rate 810000 lane count 4
[20:36:06] [PASSED] Link rate 810000 lane count 2
[20:36:06] [PASSED] Link rate 810000 lane count 1
[20:36:06] [PASSED] Link rate 540000 lane count 4
[20:36:06] [PASSED] Link rate 540000 lane count 2
[20:36:06] [PASSED] Link rate 540000 lane count 1
[20:36:06] [PASSED] Link rate 270000 lane count 4
[20:36:06] [PASSED] Link rate 270000 lane count 2
[20:36:06] [PASSED] Link rate 270000 lane count 1
[20:36:06] [PASSED] Link rate 162000 lane count 4
[20:36:06] [PASSED] Link rate 162000 lane count 2
[20:36:06] [PASSED] Link rate 162000 lane count 1
[20:36:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:36:06] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:36:06] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:36:06] [PASSED] DP_POWER_UP_PHY with port number
[20:36:06] [PASSED] DP_POWER_DOWN_PHY with port number
[20:36:06] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:36:06] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:36:06] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:36:06] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:36:06] [PASSED] DP_QUERY_PAYLOAD with port number
[20:36:06] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:36:06] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:36:06] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:36:06] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:36:06] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:36:06] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:36:06] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:36:06] [PASSED] DP_REMOTE_I2C_READ with port number
[20:36:06] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:36:06] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:36:06] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:36:06] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:36:06] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:36:06] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:36:06] ================ [PASSED] drm_dp_mst_helper ================
[20:36:06] ================== drm_exec (7 subtests) ===================
[20:36:06] [PASSED] sanitycheck
[20:36:06] [PASSED] test_lock
[20:36:06] [PASSED] test_lock_unlock
[20:36:06] [PASSED] test_duplicates
[20:36:06] [PASSED] test_prepare
[20:36:06] [PASSED] test_prepare_array
[20:36:06] [PASSED] test_multiple_loops
[20:36:06] ==================== [PASSED] drm_exec =====================
[20:36:06] =========== drm_format_helper_test (17 subtests) ===========
[20:36:06] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:36:06] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:36:06] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:36:06] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:36:06] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:36:06] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:36:06] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:36:06] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:36:06] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:36:06] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:36:06] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:36:06] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:36:06] ==================== drm_test_fb_swab  =====================
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ================ [PASSED] drm_test_fb_swab =================
[20:36:06] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:36:06] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:36:06] [PASSED] single_pixel_source_buffer
[20:36:06] [PASSED] single_pixel_clip_rectangle
[20:36:06] [PASSED] well_known_colors
[20:36:06] [PASSED] destination_pitch
[20:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:36:06] ================= drm_test_fb_clip_offset  =================
[20:36:06] [PASSED] pass through
[20:36:06] [PASSED] horizontal offset
[20:36:06] [PASSED] vertical offset
[20:36:06] [PASSED] horizontal and vertical offset
[20:36:06] [PASSED] horizontal offset (custom pitch)
[20:36:06] [PASSED] vertical offset (custom pitch)
[20:36:06] [PASSED] horizontal and vertical offset (custom pitch)
[20:36:06] ============= [PASSED] drm_test_fb_clip_offset =============
[20:36:06] =================== drm_test_fb_memcpy  ====================
[20:36:06] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:36:06] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:36:06] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:36:06] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:36:06] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:36:06] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:36:06] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:36:06] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:36:06] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:36:06] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:36:06] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:36:06] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:36:06] =============== [PASSED] drm_test_fb_memcpy ================
[20:36:06] ============= [PASSED] drm_format_helper_test ==============
[20:36:06] ================= drm_format (18 subtests) =================
[20:36:06] [PASSED] drm_test_format_block_width_invalid
[20:36:06] [PASSED] drm_test_format_block_width_one_plane
[20:36:06] [PASSED] drm_test_format_block_width_two_plane
[20:36:06] [PASSED] drm_test_format_block_width_three_plane
[20:36:06] [PASSED] drm_test_format_block_width_tiled
[20:36:06] [PASSED] drm_test_format_block_height_invalid
[20:36:06] [PASSED] drm_test_format_block_height_one_plane
[20:36:06] [PASSED] drm_test_format_block_height_two_plane
[20:36:06] [PASSED] drm_test_format_block_height_three_plane
[20:36:06] [PASSED] drm_test_format_block_height_tiled
[20:36:06] [PASSED] drm_test_format_min_pitch_invalid
[20:36:06] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:36:06] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:36:06] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:36:06] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:36:06] [PASSED] drm_test_format_min_pitch_two_plane
[20:36:06] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:36:06] [PASSED] drm_test_format_min_pitch_tiled
[20:36:06] =================== [PASSED] drm_format ====================
[20:36:06] ============== drm_framebuffer (10 subtests) ===============
[20:36:06] ========== drm_test_framebuffer_check_src_coords  ==========
[20:36:06] [PASSED] Success: source fits into fb
[20:36:06] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:36:06] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:36:06] [PASSED] Fail: overflowing fb with source width
[20:36:06] [PASSED] Fail: overflowing fb with source height
[20:36:06] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:36:06] [PASSED] drm_test_framebuffer_cleanup
[20:36:06] =============== drm_test_framebuffer_create  ===============
[20:36:06] [PASSED] ABGR8888 normal sizes
[20:36:06] [PASSED] ABGR8888 max sizes
[20:36:06] [PASSED] ABGR8888 pitch greater than min required
[20:36:06] [PASSED] ABGR8888 pitch less than min required
[20:36:06] [PASSED] ABGR8888 Invalid width
[20:36:06] [PASSED] ABGR8888 Invalid buffer handle
[20:36:06] [PASSED] No pixel format
[20:36:06] [PASSED] ABGR8888 Width 0
[20:36:06] [PASSED] ABGR8888 Height 0
[20:36:06] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:36:06] [PASSED] ABGR8888 Large buffer offset
[20:36:06] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:36:06] [PASSED] ABGR8888 Invalid flag
[20:36:06] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:36:06] [PASSED] ABGR8888 Valid buffer modifier
[20:36:06] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:36:06] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:36:06] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:36:06] [PASSED] NV12 Normal sizes
[20:36:06] [PASSED] NV12 Max sizes
[20:36:06] [PASSED] NV12 Invalid pitch
[20:36:06] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:36:06] [PASSED] NV12 different  modifier per-plane
[20:36:06] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:36:06] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:36:06] [PASSED] NV12 Modifier for inexistent plane
[20:36:06] [PASSED] NV12 Handle for inexistent plane
[20:36:06] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:36:06] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:36:06] [PASSED] YVU420 Normal sizes
[20:36:06] [PASSED] YVU420 Max sizes
[20:36:06] [PASSED] YVU420 Invalid pitch
[20:36:06] [PASSED] YVU420 Different pitches
[20:36:06] [PASSED] YVU420 Different buffer offsets/pitches
[20:36:06] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:36:06] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:36:06] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:36:06] [PASSED] YVU420 Valid modifier
[20:36:06] [PASSED] YVU420 Different modifiers per plane
[20:36:06] [PASSED] YVU420 Modifier for inexistent plane
[20:36:06] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:36:06] [PASSED] X0L2 Normal sizes
[20:36:06] [PASSED] X0L2 Max sizes
[20:36:06] [PASSED] X0L2 Invalid pitch
[20:36:06] [PASSED] X0L2 Pitch greater than minimum required
[20:36:06] [PASSED] X0L2 Handle for inexistent plane
[20:36:06] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:36:06] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:36:06] [PASSED] X0L2 Valid modifier
[20:36:06] [PASSED] X0L2 Modifier for inexistent plane
[20:36:06] =========== [PASSED] drm_test_framebuffer_create ===========
[20:36:06] [PASSED] drm_test_framebuffer_free
[20:36:06] [PASSED] drm_test_framebuffer_init
[20:36:06] [PASSED] drm_test_framebuffer_init_bad_format
[20:36:06] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:36:06] [PASSED] drm_test_framebuffer_lookup
[20:36:06] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:36:06] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:36:06] ================= [PASSED] drm_framebuffer =================
[20:36:06] ================ drm_gem_shmem (8 subtests) ================
[20:36:06] [PASSED] drm_gem_shmem_test_obj_create
[20:36:06] [PASSED] drm_gem_shmem_test_obj_create_private
[20:36:06] [PASSED] drm_gem_shmem_test_pin_pages
[20:36:06] [PASSED] drm_gem_shmem_test_vmap
[20:36:06] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:36:06] [PASSED] drm_gem_shmem_test_get_sg_table
[20:36:06] [PASSED] drm_gem_shmem_test_madvise
[20:36:06] [PASSED] drm_gem_shmem_test_purge
[20:36:06] ================== [PASSED] drm_gem_shmem ==================
[20:36:06] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:36:06] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:36:06] [PASSED] Automatic
[20:36:06] [PASSED] Full
[20:36:06] [PASSED] Limited 16:235
[20:36:06] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:36:06] [PASSED] drm_test_check_disable_connector
[20:36:06] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:36:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:36:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:36:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:36:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:36:06] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:36:06] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:36:06] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:36:06] [PASSED] drm_test_check_output_bpc_dvi
[20:36:06] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:36:06] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:36:06] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:36:06] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:36:06] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:36:06] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:36:06] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:36:06] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:36:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:36:06] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:36:06] [PASSED] drm_test_check_broadcast_rgb_value
[20:36:06] [PASSED] drm_test_check_bpc_8_value
[20:36:06] [PASSED] drm_test_check_bpc_10_value
[20:36:06] [PASSED] drm_test_check_bpc_12_value
[20:36:06] [PASSED] drm_test_check_format_value
[20:36:06] [PASSED] drm_test_check_tmds_char_value
[20:36:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:36:06] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:36:06] [PASSED] drm_test_check_mode_valid
[20:36:06] [PASSED] drm_test_check_mode_valid_reject
[20:36:06] [PASSED] drm_test_check_mode_valid_reject_rate
[20:36:06] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:36:06] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:36:06] ================= drm_managed (2 subtests) =================
[20:36:06] [PASSED] drm_test_managed_release_action
[20:36:06] [PASSED] drm_test_managed_run_action
[20:36:06] =================== [PASSED] drm_managed ===================
[20:36:06] =================== drm_mm (6 subtests) ====================
[20:36:06] [PASSED] drm_test_mm_init
[20:36:06] [PASSED] drm_test_mm_debug
[20:36:06] [PASSED] drm_test_mm_align32
[20:36:06] [PASSED] drm_test_mm_align64
[20:36:06] [PASSED] drm_test_mm_lowest
[20:36:06] [PASSED] drm_test_mm_highest
[20:36:06] ===================== [PASSED] drm_mm ======================
[20:36:06] ============= drm_modes_analog_tv (5 subtests) =============
[20:36:06] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:36:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:36:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:36:06] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:36:06] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:36:06] =============== [PASSED] drm_modes_analog_tv ===============
[20:36:06] ============== drm_plane_helper (2 subtests) ===============
[20:36:06] =============== drm_test_check_plane_state  ================
[20:36:06] [PASSED] clipping_simple
[20:36:06] [PASSED] clipping_rotate_reflect
[20:36:06] [PASSED] positioning_simple
[20:36:06] [PASSED] upscaling
[20:36:06] [PASSED] downscaling
[20:36:06] [PASSED] rounding1
[20:36:06] [PASSED] rounding2
[20:36:06] [PASSED] rounding3
[20:36:06] [PASSED] rounding4
[20:36:06] =========== [PASSED] drm_test_check_plane_state ============
[20:36:06] =========== drm_test_check_invalid_plane_state  ============
[20:36:06] [PASSED] positioning_invalid
[20:36:06] [PASSED] upscaling_invalid
[20:36:06] [PASSED] downscaling_invalid
[20:36:06] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:36:06] ================ [PASSED] drm_plane_helper =================
[20:36:06] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:36:06] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:36:06] [PASSED] None
[20:36:06] [PASSED] PAL
[20:36:06] [PASSED] NTSC
[20:36:06] [PASSED] Both, NTSC Default
[20:36:06] [PASSED] Both, PAL Default
[20:36:06] [PASSED] Both, NTSC Default, with PAL on command-line
[20:36:06] [PASSED] Both, PAL Default, with NTSC on command-line
[20:36:06] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:36:06] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:36:06] ================== drm_rect (9 subtests) ===================
[20:36:06] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:36:06] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:36:06] [PASSED] drm_test_rect_clip_scaled_clipped
[20:36:06] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:36:06] ================= drm_test_rect_intersect  =================
[20:36:06] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:36:06] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:36:06] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:36:06] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:36:06] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:36:06] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:36:06] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:36:06] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:36:06] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:36:06] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:36:06] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:36:06] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:36:06] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:36:06] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:36:06] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:36:06] ============= [PASSED] drm_test_rect_intersect =============
[20:36:06] ================ drm_test_rect_calc_hscale  ================
[20:36:06] [PASSED] normal use
[20:36:06] [PASSED] out of max range
[20:36:06] [PASSED] out of min range
[20:36:06] [PASSED] zero dst
[20:36:06] [PASSED] negative src
[20:36:06] [PASSED] negative dst
[20:36:06] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:36:06] ================ drm_test_rect_calc_vscale  ================
[20:36:06] [PASSED] normal use
[20:36:06] [PASSED] out of max range
[20:36:06] [PASSED] out of min range
[20:36:06] [PASSED] zero dst
[20:36:06] [PASSED] negative src
[20:36:06] [PASSED] negative dst
[20:36:06] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:36:06] ================== drm_test_rect_rotate  ===================
[20:36:06] [PASSED] reflect-x
[20:36:06] [PASSED] reflect-y
[20:36:06] [PASSED] rotate-0
[20:36:06] [PASSED] rotate-90
[20:36:06] [PASSED] rotate-180
[20:36:06] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[20:36:06] ============== [PASSED] drm_test_rect_rotate ===============
[20:36:06] ================ drm_test_rect_rotate_inv  =================
[20:36:06] [PASSED] reflect-x
[20:36:06] [PASSED] reflect-y
[20:36:06] [PASSED] rotate-0
[20:36:06] [PASSED] rotate-90
[20:36:06] [PASSED] rotate-180
[20:36:06] [PASSED] rotate-270
[20:36:06] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:36:06] ==================== [PASSED] drm_rect =====================
[20:36:06] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:36:06] ============ drm_test_sysfb_build_fourcc_list  =============
[20:36:06] [PASSED] no native formats
[20:36:06] [PASSED] XRGB8888 as native format
[20:36:06] [PASSED] remove duplicates
[20:36:06] [PASSED] convert alpha formats
[20:36:06] [PASSED] random formats
[20:36:06] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:36:06] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:36:06] ============================================================
[20:36:06] Testing complete. Ran 616 tests: passed: 616
[20:36:06] Elapsed time: 27.614s total, 1.589s configuring, 25.858s building, 0.143s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:36:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:36:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[20:36:15] Starting KUnit Kernel (1/1)...
[20:36:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:36:15] ================= ttm_device (5 subtests) ==================
[20:36:15] [PASSED] ttm_device_init_basic
[20:36:15] [PASSED] ttm_device_init_multiple
[20:36:15] [PASSED] ttm_device_fini_basic
[20:36:15] [PASSED] ttm_device_init_no_vma_man
[20:36:15] ================== ttm_device_init_pools  ==================
[20:36:15] [PASSED] No DMA allocations, no DMA32 required
[20:36:15] [PASSED] DMA allocations, DMA32 required
[20:36:15] [PASSED] No DMA allocations, DMA32 required
[20:36:15] [PASSED] DMA allocations, no DMA32 required
[20:36:15] ============== [PASSED] ttm_device_init_pools ==============
[20:36:15] =================== [PASSED] ttm_device ====================
[20:36:15] ================== ttm_pool (8 subtests) ===================
[20:36:15] ================== ttm_pool_alloc_basic  ===================
[20:36:15] [PASSED] One page
[20:36:15] [PASSED] More than one page
[20:36:15] [PASSED] Above the allocation limit
[20:36:15] [PASSED] One page, with coherent DMA mappings enabled
[20:36:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:36:15] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:36:15] ============== ttm_pool_alloc_basic_dma_addr  ==============
[20:36:15] [PASSED] One page
[20:36:15] [PASSED] More than one page
[20:36:15] [PASSED] Above the allocation limit
[20:36:15] [PASSED] One page, with coherent DMA mappings enabled
[20:36:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:36:15] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:36:15] [PASSED] ttm_pool_alloc_order_caching_match
[20:36:15] [PASSED] ttm_pool_alloc_caching_mismatch
[20:36:15] [PASSED] ttm_pool_alloc_order_mismatch
[20:36:15] [PASSED] ttm_pool_free_dma_alloc
[20:36:15] [PASSED] ttm_pool_free_no_dma_alloc
[20:36:15] [PASSED] ttm_pool_fini_basic
[20:36:15] ==================== [PASSED] ttm_pool =====================
[20:36:15] ================ ttm_resource (8 subtests) =================
[20:36:15] ================= ttm_resource_init_basic  =================
[20:36:15] [PASSED] Init resource in TTM_PL_SYSTEM
[20:36:15] [PASSED] Init resource in TTM_PL_VRAM
[20:36:15] [PASSED] Init resource in a private placement
[20:36:15] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:36:15] ============= [PASSED] ttm_resource_init_basic =============
[20:36:15] [PASSED] ttm_resource_init_pinned
[20:36:15] [PASSED] ttm_resource_fini_basic
[20:36:15] [PASSED] ttm_resource_manager_init_basic
[20:36:15] [PASSED] ttm_resource_manager_usage_basic
[20:36:15] [PASSED] ttm_resource_manager_set_used_basic
[20:36:15] [PASSED] ttm_sys_man_alloc_basic
[20:36:15] [PASSED] ttm_sys_man_free_basic
[20:36:15] ================== [PASSED] ttm_resource ===================
[20:36:15] =================== ttm_tt (15 subtests) ===================
[20:36:15] ==================== ttm_tt_init_basic  ====================
[20:36:15] [PASSED] Page-aligned size
[20:36:15] [PASSED] Extra pages requested
[20:36:15] ================ [PASSED] ttm_tt_init_basic ================
[20:36:15] [PASSED] ttm_tt_init_misaligned
[20:36:15] [PASSED] ttm_tt_fini_basic
[20:36:15] [PASSED] ttm_tt_fini_sg
[20:36:15] [PASSED] ttm_tt_fini_shmem
[20:36:15] [PASSED] ttm_tt_create_basic
[20:36:15] [PASSED] ttm_tt_create_invalid_bo_type
[20:36:15] [PASSED] ttm_tt_create_ttm_exists
[20:36:15] [PASSED] ttm_tt_create_failed
[20:36:15] [PASSED] ttm_tt_destroy_basic
[20:36:15] [PASSED] ttm_tt_populate_null_ttm
[20:36:15] [PASSED] ttm_tt_populate_populated_ttm
[20:36:15] [PASSED] ttm_tt_unpopulate_basic
[20:36:15] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:36:15] [PASSED] ttm_tt_swapin_basic
[20:36:15] ===================== [PASSED] ttm_tt ======================
[20:36:15] =================== ttm_bo (14 subtests) ===================
[20:36:15] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[20:36:15] [PASSED] Cannot be interrupted and sleeps
[20:36:15] [PASSED] Cannot be interrupted, locks straight away
[20:36:15] [PASSED] Can be interrupted, sleeps
[20:36:15] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:36:15] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:36:15] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:36:15] [PASSED] ttm_bo_reserve_double_resv
[20:36:15] [PASSED] ttm_bo_reserve_interrupted
[20:36:15] [PASSED] ttm_bo_reserve_deadlock
[20:36:15] [PASSED] ttm_bo_unreserve_basic
[20:36:15] [PASSED] ttm_bo_unreserve_pinned
[20:36:15] [PASSED] ttm_bo_unreserve_bulk
[20:36:15] [PASSED] ttm_bo_put_basic
[20:36:15] [PASSED] ttm_bo_put_shared_resv
[20:36:15] [PASSED] ttm_bo_pin_basic
[20:36:15] [PASSED] ttm_bo_pin_unpin_resource
[20:36:15] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:36:15] ===================== [PASSED] ttm_bo ======================
[20:36:15] ============== ttm_bo_validate (22 subtests) ===============
[20:36:15] ============== ttm_bo_init_reserved_sys_man  ===============
[20:36:15] [PASSED] Buffer object for userspace
[20:36:15] [PASSED] Kernel buffer object
[20:36:15] [PASSED] Shared buffer object
[20:36:15] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:36:15] ============== ttm_bo_init_reserved_mock_man  ==============
[20:36:15] [PASSED] Buffer object for userspace
[20:36:15] [PASSED] Kernel buffer object
[20:36:15] [PASSED] Shared buffer object
[20:36:15] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:36:15] [PASSED] ttm_bo_init_reserved_resv
[20:36:15] ================== ttm_bo_validate_basic  ==================
[20:36:15] [PASSED] Buffer object for userspace
[20:36:15] [PASSED] Kernel buffer object
[20:36:15] [PASSED] Shared buffer object
[20:36:15] ============== [PASSED] ttm_bo_validate_basic ==============
[20:36:15] [PASSED] ttm_bo_validate_invalid_placement
[20:36:15] ============= ttm_bo_validate_same_placement  ==============
[20:36:15] [PASSED] System manager
[20:36:15] [PASSED] VRAM manager
[20:36:15] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:36:15] [PASSED] ttm_bo_validate_failed_alloc
[20:36:15] [PASSED] ttm_bo_validate_pinned
[20:36:15] [PASSED] ttm_bo_validate_busy_placement
[20:36:15] ================ ttm_bo_validate_multihop  =================
[20:36:15] [PASSED] Buffer object for userspace
[20:36:15] [PASSED] Kernel buffer object
[20:36:15] [PASSED] Shared buffer object
[20:36:15] ============ [PASSED] ttm_bo_validate_multihop =============
[20:36:15] ========== ttm_bo_validate_no_placement_signaled  ==========
[20:36:15] [PASSED] Buffer object in system domain, no page vector
[20:36:15] [PASSED] Buffer object in system domain with an existing page vector
[20:36:15] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:36:15] ======== ttm_bo_validate_no_placement_not_signaled  ========
[20:36:15] [PASSED] Buffer object for userspace
[20:36:15] [PASSED] Kernel buffer object
[20:36:15] [PASSED] Shared buffer object
[20:36:15] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:36:15] [PASSED] ttm_bo_validate_move_fence_signaled
[20:36:15] ========= ttm_bo_validate_move_fence_not_signaled  =========
[20:36:15] [PASSED] Waits for GPU
[20:36:15] [PASSED] Tries to lock straight away
[20:36:16] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:36:16] [PASSED] ttm_bo_validate_swapout
[20:36:16] [PASSED] ttm_bo_validate_happy_evict
[20:36:16] [PASSED] ttm_bo_validate_all_pinned_evict
[20:36:16] [PASSED] ttm_bo_validate_allowed_only_evict
[20:36:16] [PASSED] ttm_bo_validate_deleted_evict
[20:36:16] [PASSED] ttm_bo_validate_busy_domain_evict
[20:36:16] [PASSED] ttm_bo_validate_evict_gutting
[20:36:16] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[20:36:16] ================= [PASSED] ttm_bo_validate =================
[20:36:16] ============================================================
[20:36:16] Testing complete. Ran 102 tests: passed: 102
[20:36:16] Elapsed time: 9.920s total, 1.576s configuring, 7.626s building, 0.590s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Crashlog Type1 Version2 support (rev5)

[Patchwork]

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== Series Details ==

Series: Crashlog Type1 Version2 support (rev5)
URL   : https://patchwork.freedesktop.org/series/149120/
State : success

== Summary ==

CI Bug Log - changes from xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86_BAT -> xe-pw-149120v5_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (8 -> 8)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_8431 -> IGT_8432
  * Linux: xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86 -> xe-pw-149120v5

  IGT_8431: 8431
  IGT_8432: 4871829d8b7117553eb2dc1bdb9a0d18de428a98 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86: d9007d535ea106181346f9988c97aa73a9cdfb86
  xe-pw-149120v5: 149120v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/index.html

[-- Attachment #2: Type: text/html, Size: 1559 bytes --]

✗ Xe.CI.Full: failure for Crashlog Type1 Version2 support (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 91415 bytes --]

== Series Details ==

Series: Crashlog Type1 Version2 support (rev5)
URL   : https://patchwork.freedesktop.org/series/149120/
State : failure

== Summary ==

CI Bug Log - changes from xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86_FULL -> xe-pw-149120v5_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-149120v5_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-149120v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-149120v5_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2:
    - shard-bmg:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html

  * igt@xe_live_ktest@xe_dma_buf:
    - shard-dg2-set2:     [PASS][3] -> [INCOMPLETE][4] +1 other test incomplete
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@xe_live_ktest@xe_dma_buf.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_live_ktest@xe_dma_buf.html

  
Known issues
------------

  Here are the changes found in xe-pw-149120v5_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@hotrebind-lateclose:
    - shard-adlp:         [PASS][5] -> [DMESG-WARN][6] ([Intel XE#3868])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-8/igt@core_hotunplug@hotrebind-lateclose.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-3/igt@core_hotunplug@hotrebind-lateclose.html

  * igt@intel_hwmon@hwmon-write:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#1125])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@intel_hwmon@hwmon-write.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
    - shard-lnl:          [PASS][8] -> [FAIL][9] ([Intel XE#911]) +3 other tests fail
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2327])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1407]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@linear-16bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][12] ([Intel XE#316])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@kms_big_fb@linear-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#2351] / [Intel XE#4208])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#610])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][15] ([Intel XE#610])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#1428])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#1124]) +4 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-adlp:         [PASS][18] -> [DMESG-FAIL][19] ([Intel XE#4543]) +6 other tests dmesg-fail
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#1124]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#1124])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][22] ([Intel XE#2191]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-2560x1440p:
    - shard-adlp:         NOTRUN -> [SKIP][23] ([Intel XE#367])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-8/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][24] ([Intel XE#367]) +3 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#1512])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#367])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2887]) +7 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-2/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#3432])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#3432])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-bmg:          [PASS][30] -> [FAIL][31] ([Intel XE#5376])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][32] ([Intel XE#787]) +216 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][33] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) +1 other test incomplete
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][34] ([Intel XE#455] / [Intel XE#787]) +40 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-dp-2.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#2887]) +4 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs.html

  * igt@kms_chamelium_color@ctm-green-to-red:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2325])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@kms_chamelium_color@ctm-green-to-red.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][37] ([Intel XE#306]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@kms_chamelium_color@ctm-green-to-red.html

  * igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2252]) +2 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html

  * igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
    - shard-dg2-set2:     NOTRUN -> [SKIP][39] ([Intel XE#373]) +10 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html
    - shard-lnl:          NOTRUN -> [SKIP][40] ([Intel XE#373]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html
    - shard-adlp:         NOTRUN -> [SKIP][41] ([Intel XE#373])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-2/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg2-set2:     NOTRUN -> [SKIP][42] ([Intel XE#307])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@srm@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][43] ([Intel XE#1178]) +1 other test fail
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@kms_content_protection@srm@pipe-a-dp-4.html

  * igt@kms_content_protection@uevent@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][44] ([Intel XE#1188])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@kms_content_protection@uevent@pipe-a-dp-4.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#2320]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-dg2-set2:     NOTRUN -> [SKIP][46] ([Intel XE#308])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1:
    - shard-adlp:         [PASS][47] -> [DMESG-WARN][48] ([Intel XE#2953] / [Intel XE#4173]) +7 other tests dmesg-warn
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-6/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-9/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][49] -> [SKIP][50] ([Intel XE#2291]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#309]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-5/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
    - shard-adlp:         NOTRUN -> [SKIP][52] ([Intel XE#309])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-4/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#2291])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-bmg:          [PASS][54] -> [DMESG-WARN][55] ([Intel XE#5354]) +1 other test dmesg-warn
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][56] -> [FAIL][57] ([Intel XE#4633])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-dg2-set2:     NOTRUN -> [SKIP][58] ([Intel XE#4208] / [i915#2575]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#4354])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@kms_dp_link_training@non-uhbr-mst.html
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#4354])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-bmg:          [PASS][61] -> [SKIP][62] ([Intel XE#2316]) +5 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-2/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@2x-nonexisting-fb-interruptible:
    - shard-adlp:         NOTRUN -> [SKIP][63] ([Intel XE#310]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-9/igt@kms_flip@2x-nonexisting-fb-interruptible.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#1421]) +2 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          NOTRUN -> [FAIL][65] ([Intel XE#301]) +1 other test fail
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a1:
    - shard-adlp:         [PASS][66] -> [DMESG-WARN][67] ([Intel XE#4543]) +16 other tests dmesg-warn
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a1.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][68] ([Intel XE#455]) +14 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][70] ([Intel XE#1401]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-adlp:         [PASS][71] -> [DMESG-FAIL][72] ([Intel XE#4543] / [Intel XE#4921]) +5 other tests dmesg-fail
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#1401] / [Intel XE#1745]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#2293]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#2311]) +11 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html
    - shard-adlp:         NOTRUN -> [SKIP][76] ([Intel XE#651])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-4/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#651]) +3 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#4141]) +2 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][79] ([Intel XE#651]) +34 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-rte:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#656]) +8 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-adlp:         NOTRUN -> [SKIP][81] ([Intel XE#656]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][82] ([Intel XE#653]) +32 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#2313]) +9 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
    - shard-adlp:         NOTRUN -> [SKIP][84] ([Intel XE#653])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#2312]) +2 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-dg2-set2:     [PASS][86] -> [SKIP][87] ([Intel XE#4208] / [i915#2575]) +4 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-464/igt@kms_hdmi_inject@inject-audio.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2-set2:     [PASS][88] -> [SKIP][89] ([Intel XE#455])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@kms_hdr@invalid-hdr.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@static-swap:
    - shard-bmg:          [PASS][90] -> [SKIP][91] ([Intel XE#1503]) +1 other test skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-8/igt@kms_hdr@static-swap.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_hdr@static-swap.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-dg2-set2:     NOTRUN -> [SKIP][92] ([Intel XE#2927])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@kms_joiner@invalid-modeset-ultra-joiner.html
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#2927])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-dg2-set2:     NOTRUN -> [SKIP][94] ([Intel XE#2925])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-0:
    - shard-lnl:          NOTRUN -> [FAIL][95] ([Intel XE#5195]) +2 other tests fail
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-0.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-b:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#2763]) +3 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-4/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-b.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25:
    - shard-adlp:         [PASS][97] -> [ABORT][98] ([Intel XE#2953]) +1 other test abort
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-1/igt@kms_plane_scaling@planes-upscale-factor-0-25.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-6/igt@kms_plane_scaling@planes-upscale-factor-0-25.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-lnl:          [PASS][99] -> [FAIL][100] ([Intel XE#718])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-3/igt@kms_pm_dc@dc6-dpms.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#1489]) +2 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
    - shard-lnl:          NOTRUN -> [SKIP][103] ([Intel XE#2893])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-2/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#4608]) +2 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][105] ([Intel XE#1489]) +5 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr@fbc-pr-cursor-blt:
    - shard-bmg:          NOTRUN -> [SKIP][106] ([Intel XE#2234] / [Intel XE#2850]) +8 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-2/igt@kms_psr@fbc-pr-cursor-blt.html

  * igt@kms_psr@fbc-psr-cursor-blt:
    - shard-adlp:         NOTRUN -> [SKIP][107] ([Intel XE#2850] / [Intel XE#929])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-4/igt@kms_psr@fbc-psr-cursor-blt.html

  * igt@kms_psr@fbc-psr2-sprite-plane-move:
    - shard-dg2-set2:     NOTRUN -> [SKIP][108] ([Intel XE#2850] / [Intel XE#929]) +16 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@kms_psr@fbc-psr2-sprite-plane-move.html

  * igt@kms_psr@pr-cursor-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][109] ([Intel XE#1406]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-2/igt@kms_psr@pr-cursor-plane-onoff.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#2414])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][111] ([Intel XE#3414]) +1 other test skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-bmg:          NOTRUN -> [SKIP][112] ([Intel XE#3414] / [Intel XE#3904])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_setmode@basic@pipe-b-edp-1:
    - shard-lnl:          [PASS][113] -> [FAIL][114] ([Intel XE#2883]) +2 other tests fail
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-6/igt@kms_setmode@basic@pipe-b-edp-1.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@kms_setmode@basic@pipe-b-edp-1.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-dg2-set2:     NOTRUN -> [SKIP][115] ([Intel XE#330])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@kms_tv_load_detect@load-detect.html
    - shard-lnl:          NOTRUN -> [SKIP][116] ([Intel XE#330])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@kms_tv_load_detect@load-detect.html
    - shard-bmg:          NOTRUN -> [SKIP][117] ([Intel XE#2450])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vrr@flip-basic:
    - shard-adlp:         NOTRUN -> [SKIP][118] ([Intel XE#455])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-8/igt@kms_vrr@flip-basic.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#1499]) +1 other test skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@kms_vrr@flip-suspend.html

  * igt@kms_vrr@lobf:
    - shard-bmg:          NOTRUN -> [SKIP][120] ([Intel XE#2168])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_vrr@lobf.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][121] ([Intel XE#2168])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@kms_vrr@lobf.html

  * igt@xe_eudebug@basic-close:
    - shard-dg2-set2:     NOTRUN -> [SKIP][122] ([Intel XE#4837]) +10 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_eudebug@basic-close.html

  * igt@xe_eudebug@basic-vm-bind-ufence-delay-ack:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#4837]) +3 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html

  * igt@xe_eudebug@discovery-race:
    - shard-adlp:         NOTRUN -> [SKIP][124] ([Intel XE#4837])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-8/igt@xe_eudebug@discovery-race.html

  * igt@xe_eudebug_online@single-step-one:
    - shard-bmg:          NOTRUN -> [SKIP][125] ([Intel XE#4837]) +5 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@xe_eudebug_online@single-step-one.html

  * igt@xe_evict@evict-beng-small:
    - shard-lnl:          NOTRUN -> [SKIP][126] ([Intel XE#688])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@xe_evict@evict-beng-small.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind:
    - shard-dg2-set2:     [PASS][127] -> [SKIP][128] ([Intel XE#1392]) +5 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][129] ([Intel XE#1392]) +1 other test skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html

  * igt@xe_exec_basic@multigpu-no-exec-null:
    - shard-bmg:          NOTRUN -> [SKIP][130] ([Intel XE#2322]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@xe_exec_basic@multigpu-no-exec-null.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-lnl:          NOTRUN -> [SKIP][131] ([Intel XE#1392])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_exec_fault_mode@once-invalid-userptr-fault:
    - shard-dg2-set2:     NOTRUN -> [SKIP][132] ([Intel XE#288]) +22 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_exec_fault_mode@once-invalid-userptr-fault.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind:
    - shard-adlp:         NOTRUN -> [SKIP][133] ([Intel XE#288]) +1 other test skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-8/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][134] ([Intel XE#2360])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html

  * igt@xe_exec_reset@parallel-gt-reset:
    - shard-dg2-set2:     [PASS][135] -> [DMESG-WARN][136] ([Intel XE#3876])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@xe_exec_reset@parallel-gt-reset.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_exec_reset@parallel-gt-reset.html

  * igt@xe_exec_sip@invalidinstr-disabled:
    - shard-dg2-set2:     [PASS][137] -> [SKIP][138] ([Intel XE#4208]) +15 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@xe_exec_sip@invalidinstr-disabled.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_exec_sip@invalidinstr-disabled.html

  * igt@xe_exec_system_allocator@many-new-bo-map:
    - shard-adlp:         NOTRUN -> [SKIP][139] ([Intel XE#4915]) +19 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-9/igt@xe_exec_system_allocator@many-new-bo-map.html

  * igt@xe_exec_system_allocator@once-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][140] ([Intel XE#4943]) +7 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@xe_exec_system_allocator@once-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][141] ([Intel XE#4915]) +246 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset:
    - shard-lnl:          [PASS][142] -> [FAIL][143] ([Intel XE#5018])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-4/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html

  * igt@xe_exec_system_allocator@twice-large-mmap:
    - shard-dg2-set2:     NOTRUN -> [SKIP][144] ([Intel XE#4208]) +7 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_exec_system_allocator@twice-large-mmap.html

  * igt@xe_exec_system_allocator@twice-mmap-new-huge:
    - shard-lnl:          NOTRUN -> [SKIP][145] ([Intel XE#4943]) +6 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@xe_exec_system_allocator@twice-mmap-new-huge.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - shard-adlp:         NOTRUN -> [SKIP][146] ([Intel XE#2229])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-6/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][147] ([Intel XE#2229])
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
    - shard-lnl:          NOTRUN -> [SKIP][148] ([Intel XE#2229])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_mmap@small-bar:
    - shard-dg2-set2:     NOTRUN -> [SKIP][149] ([Intel XE#512])
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_mmap@small-bar.html

  * igt@xe_module_load@load:
    - shard-lnl:          ([PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174]) -> ([PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179], [PASS][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195], [PASS][196], [PASS][197], [SKIP][198], [PASS][199], [PASS][200]) ([Intel XE#378])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-5/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-7/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-2/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-4/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-1/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-8/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-6/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-6/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-5/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-5/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-1/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-4/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-8/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-7/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-6/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-7/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-4/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-2/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-2/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-3/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-3/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-3/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-3/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-8/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-5/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-6/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-2/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-4/igt@xe_module_load@load.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-4/igt@xe_module_load@load.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-4/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-6/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-5/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-7/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-5/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-1/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-5/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-8/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-5/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-6/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-2/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-5/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-2/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@xe_module_load@load.html
    - shard-bmg:          ([PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225]) -> ([PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237], [PASS][238], [PASS][239], [PASS][240], [PASS][241], [SKIP][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [PASS][249], [PASS][250], [PASS][251]) ([Intel XE#2457])
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-8/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-1/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-3/igt@xe_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-2/igt@xe_module_load@load.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-3/igt@xe_module_load@load.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-2/igt@xe_module_load@load.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-2/igt@xe_module_load@load.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-7/igt@xe_module_load@load.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-4/igt@xe_module_load@load.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-4/igt@xe_module_load@load.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-3/igt@xe_module_load@load.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-4/igt@xe_module_load@load.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-8/igt@xe_module_load@load.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-1/igt@xe_module_load@load.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-8/igt@xe_module_load@load.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-1/igt@xe_module_load@load.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-7/igt@xe_module_load@load.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-7/igt@xe_module_load@load.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-1/igt@xe_module_load@load.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@xe_module_load@load.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@xe_module_load@load.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-3/igt@xe_module_load@load.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@xe_module_load@load.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-7/igt@xe_module_load@load.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@xe_module_load@load.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-2/igt@xe_module_load@load.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-2/igt@xe_module_load@load.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@xe_module_load@load.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@xe_module_load@load.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@xe_module_load@load.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@xe_module_load@load.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@xe_module_load@load.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@xe_module_load@load.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@xe_module_load@load.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@xe_module_load@load.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@xe_module_load@load.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@xe_module_load@load.html
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@xe_module_load@load.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@xe_module_load@load.html
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@xe_module_load@load.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@xe_module_load@load.html
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@xe_module_load@load.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@xe_module_load@load.html
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-2/igt@xe_module_load@load.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@xe_module_load@load.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-2/igt@xe_module_load@load.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@xe_module_load@load.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@xe_module_load@load.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@xe_module_load@load.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@xe_module_load@load.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@xe_module_load@load.html
    - shard-dg2-set2:     ([PASS][252], [PASS][253], [PASS][254], [PASS][255], [PASS][256], [PASS][257], [PASS][258], [PASS][259], [PASS][260], [PASS][261], [PASS][262], [PASS][263], [PASS][264], [PASS][265], [PASS][266], [PASS][267], [PASS][268], [PASS][269], [PASS][270], [PASS][271], [PASS][272], [PASS][273], [PASS][274], [PASS][275], [PASS][276]) -> ([SKIP][277], [PASS][278], [PASS][279], [PASS][280], [PASS][281], [PASS][282], [PASS][283], [PASS][284], [PASS][285], [PASS][286], [PASS][287], [PASS][288], [PASS][289], [PASS][290], [PASS][291], [PASS][292], [PASS][293], [PASS][294], [PASS][295], [PASS][296], [PASS][297], [PASS][298], [PASS][299], [PASS][300], [PASS][301]) ([Intel XE#378])
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@xe_module_load@load.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-433/igt@xe_module_load@load.html
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-433/igt@xe_module_load@load.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-433/igt@xe_module_load@load.html
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-464/igt@xe_module_load@load.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-466/igt@xe_module_load@load.html
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@xe_module_load@load.html
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@xe_module_load@load.html
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@xe_module_load@load.html
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@xe_module_load@load.html
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@xe_module_load@load.html
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@xe_module_load@load.html
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@xe_module_load@load.html
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-466/igt@xe_module_load@load.html
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-464/igt@xe_module_load@load.html
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@xe_module_load@load.html
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-466/igt@xe_module_load@load.html
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-466/igt@xe_module_load@load.html
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@xe_module_load@load.html
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@xe_module_load@load.html
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-464/igt@xe_module_load@load.html
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@xe_module_load@load.html
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@xe_module_load@load.html
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@xe_module_load@load.html
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-464/igt@xe_module_load@load.html
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_module_load@load.html
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_module_load@load.html
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_module_load@load.html
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_module_load@load.html
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@xe_module_load@load.html
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_module_load@load.html
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@xe_module_load@load.html
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_module_load@load.html
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_module_load@load.html
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@xe_module_load@load.html
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@xe_module_load@load.html
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@xe_module_load@load.html
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_module_load@load.html
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_module_load@load.html
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_module_load@load.html
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_module_load@load.html
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@xe_module_load@load.html
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_module_load@load.html
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_module_load@load.html
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_module_load@load.html
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_module_load@load.html
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_module_load@load.html
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_module_load@load.html
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_module_load@load.html
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@xe_module_load@load.html

  * igt@xe_oa@buffer-size:
    - shard-dg2-set2:     NOTRUN -> [SKIP][302] ([Intel XE#4501])
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_oa@buffer-size.html

  * igt@xe_oa@closed-fd-and-unmapped-access:
    - shard-dg2-set2:     NOTRUN -> [SKIP][303] ([Intel XE#2541] / [Intel XE#3573]) +5 other tests skip
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@xe_oa@closed-fd-and-unmapped-access.html

  * igt@xe_oa@syncs-ufence-wait:
    - shard-dg2-set2:     NOTRUN -> [SKIP][304] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) +1 other test skip
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_oa@syncs-ufence-wait.html

  * igt@xe_peer2peer@write:
    - shard-dg2-set2:     NOTRUN -> [SKIP][305] ([Intel XE#1061])
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_peer2peer@write.html

  * igt@xe_pxp@pxp-termination-key-update-post-termination-irq:
    - shard-dg2-set2:     NOTRUN -> [SKIP][306] ([Intel XE#4733]) +1 other test skip
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][307] ([Intel XE#944])
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@xe_query@multigpu-query-invalid-cs-cycles.html
    - shard-lnl:          NOTRUN -> [SKIP][308] ([Intel XE#944])
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-5/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_query@multigpu-query-topology:
    - shard-dg2-set2:     NOTRUN -> [SKIP][309] ([Intel XE#944]) +1 other test skip
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_query@multigpu-query-topology.html

  * igt@xe_render_copy@render-stress-0-copies:
    - shard-dg2-set2:     NOTRUN -> [SKIP][310] ([Intel XE#4814])
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-432/igt@xe_render_copy@render-stress-0-copies.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs:
    - shard-bmg:          NOTRUN -> [SKIP][311] ([Intel XE#4130])
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][312] ([Intel XE#4130]) +1 other test skip
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
    - shard-lnl:          NOTRUN -> [SKIP][313] ([Intel XE#4130])
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-dg2-set2:     NOTRUN -> [SKIP][314] ([Intel XE#4273])
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_sriov_flr@flr-twice.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets:
    - shard-dg2-set2:     NOTRUN -> [SKIP][315] ([Intel XE#4351])
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-463/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
    - shard-lnl:          NOTRUN -> [SKIP][316] ([Intel XE#4351])
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-4/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
    - shard-bmg:          NOTRUN -> [SKIP][317] ([Intel XE#4351])
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html

  
#### Possible fixes ####

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1:
    - shard-lnl:          [FAIL][318] ([Intel XE#911]) -> [PASS][319] +3 other tests pass
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-0:
    - shard-adlp:         [DMESG-FAIL][320] ([Intel XE#4543]) -> [PASS][321] +13 other tests pass
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-1/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-4/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
    - shard-dg2-set2:     [INCOMPLETE][322] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][323]
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][324] ([Intel XE#2291]) -> [PASS][325] +4 other tests pass
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [FAIL][326] ([Intel XE#4633]) -> [PASS][327]
   [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-bmg:          [SKIP][328] ([Intel XE#1340]) -> [PASS][329]
   [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
   [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-bmg:          [SKIP][330] ([Intel XE#4294]) -> [PASS][331]
   [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-bmg:          [SKIP][332] ([Intel XE#2316]) -> [PASS][333] +4 other tests pass
   [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_flip@2x-plain-flip-interruptible.html
   [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@blocking-wf_vblank:
    - shard-lnl:          [FAIL][334] ([Intel XE#886]) -> [PASS][335] +1 other test pass
   [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-lnl-8/igt@kms_flip@blocking-wf_vblank.html
   [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-lnl-3/igt@kms_flip@blocking-wf_vblank.html

  * igt@kms_flip@blocking-wf_vblank@a-hdmi-a1:
    - shard-adlp:         [FAIL][336] ([Intel XE#2882]) -> [PASS][337] +1 other test pass
   [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-9/igt@kms_flip@blocking-wf_vblank@a-hdmi-a1.html
   [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-8/igt@kms_flip@blocking-wf_vblank@a-hdmi-a1.html

  * igt@kms_flip@flip-vs-panning-interruptible@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][338] ([Intel XE#4543]) -> [PASS][339] +14 other tests pass
   [338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-2/igt@kms_flip@flip-vs-panning-interruptible@b-hdmi-a1.html
   [339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-4/igt@kms_flip@flip-vs-panning-interruptible@b-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-dg2-set2:     [INCOMPLETE][340] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][341] +1 other test pass
   [340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@kms_flip@flip-vs-suspend-interruptible.html
   [341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
    - shard-adlp:         [DMESG-FAIL][342] ([Intel XE#4543] / [Intel XE#4921]) -> [PASS][343] +1 other test pass
   [342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
   [343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y:
    - shard-adlp:         [FAIL][344] ([Intel XE#1874]) -> [PASS][345]
   [344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y.html
   [345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y.html

  * igt@kms_hdr@bpc-switch@pipe-a-dp-4:
    - shard-dg2-set2:     [INCOMPLETE][346] -> [PASS][347] +1 other test pass
   [346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@kms_hdr@bpc-switch@pipe-a-dp-4.html
   [347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-435/igt@kms_hdr@bpc-switch@pipe-a-dp-4.html

  * igt@kms_hdr@static-toggle:
    - shard-bmg:          [SKIP][348] ([Intel XE#1503]) -> [PASS][349] +1 other test pass
   [348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_hdr@static-toggle.html
   [349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_hdr@static-toggle.html

  * igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64:
    - shard-dg2-set2:     [FAIL][350] ([Intel XE#616]) -> [PASS][351] +3 other tests pass
   [350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-466/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
   [351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-bmg:          [SKIP][352] ([Intel XE#4596]) -> [PASS][353] +1 other test pass
   [352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-x.html
   [353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-bmg:          [SKIP][354] ([Intel XE#1435]) -> [PASS][355] +1 other test pass
   [354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html
   [355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-3/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
    - shard-dg2-set2:     [SKIP][356] ([Intel XE#1392]) -> [PASS][357] +8 other tests pass
   [356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
   [357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-466/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html

  * igt@xe_exec_reset@parallel-gt-reset:
    - shard-bmg:          [DMESG-WARN][358] ([Intel XE#3876]) -> [PASS][359]
   [358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-8/igt@xe_exec_reset@parallel-gt-reset.html
   [359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-8/igt@xe_exec_reset@parallel-gt-reset.html

  * igt@xe_pm@s2idle-basic-exec:
    - shard-adlp:         [DMESG-WARN][360] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][361]
   [360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-adlp-3/igt@xe_pm@s2idle-basic-exec.html
   [361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-adlp-1/igt@xe_pm@s2idle-basic-exec.html

  
#### Warnings ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-dg2-set2:     [SKIP][362] ([Intel XE#623]) -> [SKIP][363] ([Intel XE#4208] / [i915#2575])
   [362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
   [363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][364] ([Intel XE#316]) -> [SKIP][365] ([Intel XE#2351] / [Intel XE#4208])
   [364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-464/igt@kms_big_fb@linear-64bpp-rotate-270.html
   [365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs:
    - shard-dg2-set2:     [SKIP][366] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][367] ([Intel XE#4208]) +1 other test skip
   [366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html
   [367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][368] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345]) -> [INCOMPLETE][369] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
   [368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][370] ([Intel XE#2312]) -> [SKIP][371] ([Intel XE#2311]) +13 other tests skip
   [370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
   [371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][372] ([Intel XE#2311]) -> [SKIP][373] ([Intel XE#2312]) +9 other tests skip
   [372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
   [373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt:
    - shard-bmg:          [SKIP][374] ([Intel XE#4141]) -> [SKIP][375] ([Intel XE#2312]) +1 other test skip
   [374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html
   [375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][376] ([Intel XE#2312]) -> [SKIP][377] ([Intel XE#4141]) +2 other tests skip
   [376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
   [377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-plflip-blt:
    - shard-dg2-set2:     [SKIP][378] ([Intel XE#651]) -> [SKIP][379] ([Intel XE#2351] / [Intel XE#4208])
   [378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-plflip-blt.html
   [379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move:
    - shard-dg2-set2:     [SKIP][380] ([Intel XE#653]) -> [SKIP][381] ([Intel XE#4208]) +1 other test skip
   [380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move.html
   [381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          [SKIP][382] ([Intel XE#2312]) -> [SKIP][383] ([Intel XE#2313]) +13 other tests skip
   [382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
   [383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][384] ([Intel XE#2313]) -> [SKIP][385] ([Intel XE#2312]) +9 other tests skip
   [384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          [SKIP][386] ([Intel XE#5021]) -> [SKIP][387] ([Intel XE#4596])
   [386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-yf.html
   [387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_psr@fbc-pr-primary-page-flip:
    - shard-dg2-set2:     [SKIP][388] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][389] ([Intel XE#4208]) +1 other test skip
   [388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@kms_psr@fbc-pr-primary-page-flip.html
   [389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@kms_psr@fbc-pr-primary-page-flip.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][390] ([Intel XE#2509]) -> [SKIP][391] ([Intel XE#2426])
   [390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_eudebug@basic-vm-bind-ufence-reconnect:
    - shard-dg2-set2:     [SKIP][392] ([Intel XE#4837]) -> [SKIP][393] ([Intel XE#4208]) +1 other test skip
   [392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-464/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html
   [393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html

  * igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
    - shard-dg2-set2:     [SKIP][394] ([Intel XE#2360]) -> [SKIP][395] ([Intel XE#4208])
   [394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-433/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
   [395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html

  * igt@xe_exec_system_allocator@many-large-malloc-nomemset:
    - shard-dg2-set2:     [SKIP][396] ([Intel XE#4915]) -> [SKIP][397] ([Intel XE#4208]) +21 other tests skip
   [396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-432/igt@xe_exec_system_allocator@many-large-malloc-nomemset.html
   [397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_exec_system_allocator@many-large-malloc-nomemset.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-dg2-set2:     [SKIP][398] ([Intel XE#4733]) -> [SKIP][399] ([Intel XE#4208])
   [398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86/shard-dg2-463/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
   [399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/shard-dg2-433/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
  [Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
  [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
  [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5195
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5376
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
  [Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575


Build changes
-------------

  * IGT: IGT_8431 -> IGT_8432
  * Linux: xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86 -> xe-pw-149120v5

  IGT_8431: 8431
  IGT_8432: 4871829d8b7117553eb2dc1bdb9a0d18de428a98 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-3325-d9007d535ea106181346f9988c97aa73a9cdfb86: d9007d535ea106181346f9988c97aa73a9cdfb86
  xe-pw-149120v5: 149120v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149120v5/index.html

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