Kernel KVM virtualization development
 help / color / mirror / Atom feed
From: Colton Lewis <coltonlewis@google.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, kvmarm@lists.linux.dev
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	 Marc Zyngier <maz@kernel.org>, Oliver Upton <oupton@kernel.org>,
	Will Deacon <will@kernel.org>,
	 James Clark <james.clark@linaro.org>,
	Mingwei Zhang <mizhang@google.com>,
	kvm@vger.kernel.org,  Colton Lewis <coltonlewis@google.com>
Subject: [PATCH] target/arm: Enable KVM PMU partitioning and counter limit
Date: Thu, 24 Sep 2026 17:30:51 +0000	[thread overview]
Message-ID: <20260924173051.2117637-1-coltonlewis@google.com> (raw)
In-Reply-To: <20260924172928.2110956-1-coltonlewis@google.com>

Add CPU properties to configure KVM ARM64 PMU counter partitioning:
- 'pmu-partition' (bool): enables KVM_ARM_VCPU_PMU_V3_ENABLE_PARTITION
- 'pmu-num-counters' (uint32): sets KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS

When 'pmu-partition=on' and 'pmu-num-counters=N' are passed via -cpu,
QEMU enables hardware PMU partitioning and reserves N general-purpose
event counters for the guest prior to calling KVM_ARM_VCPU_PMU_V3_INIT.

Note that this patch is an example to demonstrate the KVM ARM64 PMU
Partitioning uAPI [1]. That is why it aborts immediately if setting the
device attributes does not succeed.

[1] https://lore.kernel.org/kvmarm/20260924172928.2110956-1-coltonlewis@google.com/

Signed-off-by: Colton Lewis <coltonlewis@google.com>
---
 target/arm/cpu.c | 20 ++++++++++++++++++++
 target/arm/cpu.h |  4 ++++
 target/arm/kvm.c | 32 ++++++++++++++++++++++++++++++++
 3 files changed, 56 insertions(+)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index f58a1db843..7538c6a24c 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1359,6 +1359,20 @@ static bool arm_get_pmu(Object *obj, Error **errp)
     return cpu->has_pmu;
 }
 
+static bool arm_get_pmu_partition(Object *obj, Error **errp)
+{
+    ARMCPU *cpu = ARM_CPU(obj);
+
+    return cpu->kvm_pmu_partition;
+}
+
+static void arm_set_pmu_partition(Object *obj, bool value, Error **errp)
+{
+    ARMCPU *cpu = ARM_CPU(obj);
+
+    cpu->kvm_pmu_partition = value;
+}
+
 static void arm_set_pmu(Object *obj, bool value, Error **errp)
 {
     ARMCPU *cpu = ARM_CPU(obj);
@@ -1604,6 +1618,12 @@ static void arm_cpu_post_init(Object *obj)
     if (arm_feature(&cpu->env, ARM_FEATURE_PMU)) {
         cpu->has_pmu = true;
         object_property_add_bool(obj, "pmu", arm_get_pmu, arm_set_pmu);
+        object_property_add_bool(obj, "pmu-partition",
+                                 arm_get_pmu_partition,
+                                 arm_set_pmu_partition);
+        object_property_add_uint32_ptr(obj, "pmu-num-counters",
+                                       &cpu->kvm_pmu_nr_counters,
+                                       OBJ_PROP_FLAG_READWRITE);
     }
 
     /*
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index e3f931dba2..1320e76fd4 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1004,6 +1004,10 @@ struct ArchCPU {
     bool has_el3;
     /* CPU has PMU (Performance Monitor Unit) */
     bool has_pmu;
+    /* CPU has PMU Partitioning enabled in KVM mode */
+    bool kvm_pmu_partition;
+    /* Number of PMU counters allocated to guest in KVM mode */
+    uint32_t kvm_pmu_nr_counters;
     /* CPU has VFP */
     bool has_vfp;
     /* CPU has 32 VFP registers */
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index ed99be7fd8..3aa8243278 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -1846,6 +1846,10 @@ static bool kvm_arm_set_device_attr(ARMCPU *cpu, struct kvm_device_attr *attr,
     return true;
 }
 
+#ifndef KVM_ARM_VCPU_PMU_V3_ENABLE_PARTITION
+#define KVM_ARM_VCPU_PMU_V3_ENABLE_PARTITION 5
+#endif
+
 void kvm_arm_pmu_init(ARMCPU *cpu)
 {
     struct kvm_device_attr attr = {
@@ -1856,6 +1860,34 @@ void kvm_arm_pmu_init(ARMCPU *cpu)
     if (!cpu->has_pmu) {
         return;
     }
+
+    if (cpu->kvm_pmu_partition) {
+        uint32_t partition = 1;
+        struct kvm_device_attr part_attr = {
+            .group = KVM_ARM_VCPU_PMU_V3_CTRL,
+            .attr = KVM_ARM_VCPU_PMU_V3_ENABLE_PARTITION,
+            .addr = (intptr_t)&partition,
+        };
+
+        if (!kvm_arm_set_device_attr(cpu, &part_attr, "PMU partition")) {
+            error_report("failed to enable KVM PMU partition");
+            abort();
+        }
+    }
+
+    if (cpu->kvm_pmu_nr_counters > 0) {
+        struct kvm_device_attr cnt_attr = {
+            .group = KVM_ARM_VCPU_PMU_V3_CTRL,
+            .attr = KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS,
+            .addr = (intptr_t)&cpu->kvm_pmu_nr_counters,
+        };
+
+        if (!kvm_arm_set_device_attr(cpu, &cnt_attr, "PMU nr_counters")) {
+            error_report("failed to set KVM PMU nr_counters");
+            abort();
+        }
+    }
+
     if (!kvm_arm_set_device_attr(cpu, &attr, "PMU")) {
         error_report("failed to init PMU");
         abort();

base-commit: 014b1f730c0faa08067f8e9b5829e62ea3d4b177
-- 
2.56.0.rc1.315.gc6ed9934b7-goog


  parent reply	other threads:[~2026-09-24 17:30 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-24 17:29 [PATCH v9 00/22] ARM64 PMU Partitioning Colton Lewis
2026-09-24 17:29 ` [PATCH v9 01/22] arm64: cpufeature: Add cpucap for HPMN0 Colton Lewis
2026-09-24 17:45   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 02/22] KVM: arm64: Reorganize PMU includes Colton Lewis
2026-09-24 17:38   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 03/22] KVM: arm64: Reorganize PMU functions Colton Lewis
2026-09-24 17:49   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 04/22] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2026-09-24 17:37   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 05/22] perf: arm_pmuv3: Move counter allocation mask to per-CPU struct pmu_hw_events Colton Lewis
2026-09-24 17:44   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 06/22] perf: arm_pmuv3: Check cntr_mask before using pmccntr Colton Lewis
2026-09-24 17:38   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 07/22] perf: arm_pmuv3: Allocate counter indices from high to low Colton Lewis
2026-09-24 17:37   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 08/22] KVM: arm64: Add initial scaffolding for Partitioned PMU Colton Lewis
2026-09-24 17:44   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 09/22] KVM: arm64: Set up FGT " Colton Lewis
2026-09-24 17:52   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 10/22] KVM: arm64: Add Partitioned PMU register trap handlers Colton Lewis
2026-09-24 17:50   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 11/22] KVM: arm64: Set up MDCR_EL2 to handle a Partitioned PMU Colton Lewis
2026-09-24 17:53   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 12/22] KVM: arm64: Context swap Partitioned PMU guest registers Colton Lewis
2026-09-24 17:55   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 13/22] KVM: arm64: Enforce PMU event filter at vcpu_load() Colton Lewis
2026-09-24 17:47   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 14/22] perf: Add perf_pmu_resched_update() Colton Lewis
2026-09-24 17:46   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 15/22] KVM: arm64: Allow kvm_vcpu_pmu_resync_el0() to resync filters in process context Colton Lewis
2026-09-24 17:51   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 16/22] KVM: arm64: Apply dynamic guest counter reservations Colton Lewis
2026-09-24 17:57   ` sashiko-bot
2026-09-30 15:28   ` James Clark
2026-10-01 21:33     ` Colton Lewis
2026-09-24 17:29 ` [PATCH v9 17/22] KVM: arm64: Implement lazy PMU context swaps Colton Lewis
2026-09-24 17:55   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 18/22] perf: arm_pmuv3: Handle IRQs for Partitioned PMU guest counters Colton Lewis
2026-09-24 18:03   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 19/22] KVM: arm64: Detect overflows for the Partitioned PMU Colton Lewis
2026-09-24 18:07   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 20/22] KVM: arm64: Add vCPU device attr to partition the PMU Colton Lewis
2026-09-24 17:56   ` sashiko-bot
2026-09-30 15:27   ` James Clark
2026-10-01 21:21     ` Colton Lewis
2026-09-24 17:29 ` [PATCH v9 21/22] KVM: selftests: Add find_bit to KVM library Colton Lewis
2026-09-24 17:52   ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 22/22] KVM: arm64: selftests: Add test case for Partitioned PMU Colton Lewis
2026-09-24 17:55   ` sashiko-bot
2026-09-24 17:30 ` Colton Lewis [this message]
2026-09-28 14:01   ` [PATCH] target/arm: Enable KVM PMU partitioning and counter limit Peter Maydell
2026-09-29 21:21     ` Colton Lewis
2026-09-30 11:35       ` Peter Maydell
2026-10-01 21:34         ` Colton Lewis
2026-09-30 15:25 ` [PATCH v9 00/22] ARM64 PMU Partitioning James Clark
2026-10-01 21:33   ` Colton Lewis
2026-09-30 15:26 ` James Clark
2026-10-01 21:33   ` Colton Lewis

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260924173051.2117637-1-coltonlewis@google.com \
    --to=coltonlewis@google.com \
    --cc=james.clark@linaro.org \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.linux.dev \
    --cc=maz@kernel.org \
    --cc=mizhang@google.com \
    --cc=oupton@kernel.org \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox