From: sashiko-bot@kernel.org
To: "Colton Lewis" <coltonlewis@google.com>
Cc: "Oliver Upton" <oupton@kernel.org>,
"Marc Zyngier" <maz@kernel.org>,
kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
kvmarm@lists.linux.dev
Subject: Re: [PATCH v9 20/22] KVM: arm64: Add vCPU device attr to partition the PMU
Date: Thu, 24 Sep 2026 17:56:02 +0000 [thread overview]
Message-ID: <20260924175602.9FF961F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260924172928.2110956-21-coltonlewis@google.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] kvm: Missing FEAT_HPMN0 validation allows PMU partition mismatch breaking host profiling
--
commit 35f982d966d35bba8af3b23d939070b539de71cf
Author: Colton Lewis <coltonlewis@google.com>
KVM: arm64: Add vCPU device attr to partition the PMU
This commit introduces the KVM_ARM_VCPU_PMU_V3_ENABLE_PARTITION attribute
to enable partitioned PMU support for a VM. When partitioning is enabled,
userspace must configure the number of guest event counters strictly less
than the maximum implemented by the PMU, reserving at least one for host
profiling.
> diff --git a/arch/arm64/kvm/pmu.c b/arch/arm64/kvm/pmu.c
> index 4a3c6600b2678..31e46a5e937c7 100644
> --- a/arch/arm64/kvm/pmu.c
> +++ b/arch/arm64/kvm/pmu.c
[ ... ]
> @@ -667,14 +694,26 @@ static int kvm_arm_pmu_v3_set_nr_counters(struct kvm_vcpu *vcpu, unsigned int n)
> {
> struct kvm *kvm = vcpu->kvm;
> + unsigned int max_counters;
> +
> + if (kvm_vm_has_ran_once(kvm) ||
> + (kvm_arm_pmu_any_vcpu_created(kvm) &&
> + (!kvm->arch.pmu_nr_counters_specified ||
> + kvm->arch.nr_pmu_counters != n)))
> + return -EBUSY;
>
> if (!kvm->arch.arm_pmu)
> return -EINVAL;
>
> - if (n > kvm_arm_pmu_get_max_counters(kvm))
> + max_counters = kvm_arm_pmu_get_max_counters(kvm);
> + if (n > max_counters)
> + return -EINVAL;
> +
> + if (kvm_pmu_is_partitioned(kvm) && n >= max_counters)
> return -EINVAL;
>
> kvm_arm_set_nr_counters(kvm, n);
[Severity: Medium]
The commit message states that the number of guest event counters must be
configured "with a value strictly less than the maximum... or 0 only when
FEAT_HPMN0 is supported".
Is the FEAT_HPMN0 check missing from kvm_arm_pmu_v3_set_nr_counters() here?
If n is set to 0 on hardware without ARM64_HAS_HPMN0, the hardware fallback
in debug.c will prevent a panic by leaving HPMN set to max_counters. However,
kvm_pmu_host_counter_mask() will still assume all counters belong to the
host.
Because the hardware assigns all counters to the guest partition in this
state, does this mismatch break host-side performance profiling?
[ ... ]
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 20c46ef705d30..a4779593c4f8d 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
[ ... ]
> @@ -1756,7 +1756,10 @@ static int set_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,
> if (!kvm_vm_has_ran_once(kvm) &&
> !vcpu_has_nv(vcpu) &&
> !kvm_vcpu_has_pmuv3_strict(vcpu) &&
> - new_n <= kvm_arm_pmu_get_max_counters(kvm))
> + !kvm->arch.pmu_nr_counters_specified &&
> + new_n <= kvm_arm_pmu_get_max_counters(kvm) &&
> + (!kvm_pmu_is_partitioned(kvm) ||
> + new_n < kvm_arm_pmu_get_max_counters(kvm)))
> kvm->arch.nr_pmu_counters = new_n;
[Severity: Medium]
Can userspace also bypass the FEAT_HPMN0 validation by writing a 0 to
PMCR_EL0.N via SET_ONE_REG?
Without a check for FEAT_HPMN0 in set_pmcr(), it appears nr_pmu_counters
could be set to 0, which would lead to the same host profiling breakage
described above.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260924172928.2110956-1-coltonlewis@google.com?part=20
next prev parent reply other threads:[~2026-09-24 17:56 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 17:29 [PATCH v9 00/22] ARM64 PMU Partitioning Colton Lewis
2026-09-24 17:29 ` [PATCH v9 01/22] arm64: cpufeature: Add cpucap for HPMN0 Colton Lewis
2026-09-24 17:45 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 02/22] KVM: arm64: Reorganize PMU includes Colton Lewis
2026-09-24 17:38 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 03/22] KVM: arm64: Reorganize PMU functions Colton Lewis
2026-09-24 17:49 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 04/22] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2026-09-24 17:37 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 05/22] perf: arm_pmuv3: Move counter allocation mask to per-CPU struct pmu_hw_events Colton Lewis
2026-09-24 17:44 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 06/22] perf: arm_pmuv3: Check cntr_mask before using pmccntr Colton Lewis
2026-09-24 17:38 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 07/22] perf: arm_pmuv3: Allocate counter indices from high to low Colton Lewis
2026-09-24 17:37 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 08/22] KVM: arm64: Add initial scaffolding for Partitioned PMU Colton Lewis
2026-09-24 17:44 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 09/22] KVM: arm64: Set up FGT " Colton Lewis
2026-09-24 17:52 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 10/22] KVM: arm64: Add Partitioned PMU register trap handlers Colton Lewis
2026-09-24 17:50 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 11/22] KVM: arm64: Set up MDCR_EL2 to handle a Partitioned PMU Colton Lewis
2026-09-24 17:53 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 12/22] KVM: arm64: Context swap Partitioned PMU guest registers Colton Lewis
2026-09-24 17:55 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 13/22] KVM: arm64: Enforce PMU event filter at vcpu_load() Colton Lewis
2026-09-24 17:47 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 14/22] perf: Add perf_pmu_resched_update() Colton Lewis
2026-09-24 17:46 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 15/22] KVM: arm64: Allow kvm_vcpu_pmu_resync_el0() to resync filters in process context Colton Lewis
2026-09-24 17:51 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 16/22] KVM: arm64: Apply dynamic guest counter reservations Colton Lewis
2026-09-24 17:57 ` sashiko-bot
2026-09-30 15:28 ` James Clark
2026-10-01 21:33 ` Colton Lewis
2026-09-24 17:29 ` [PATCH v9 17/22] KVM: arm64: Implement lazy PMU context swaps Colton Lewis
2026-09-24 17:55 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 18/22] perf: arm_pmuv3: Handle IRQs for Partitioned PMU guest counters Colton Lewis
2026-09-24 18:03 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 19/22] KVM: arm64: Detect overflows for the Partitioned PMU Colton Lewis
2026-09-24 18:07 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 20/22] KVM: arm64: Add vCPU device attr to partition the PMU Colton Lewis
2026-09-24 17:56 ` sashiko-bot [this message]
2026-09-30 15:27 ` James Clark
2026-10-01 21:21 ` Colton Lewis
2026-09-24 17:29 ` [PATCH v9 21/22] KVM: selftests: Add find_bit to KVM library Colton Lewis
2026-09-24 17:52 ` sashiko-bot
2026-09-24 17:29 ` [PATCH v9 22/22] KVM: arm64: selftests: Add test case for Partitioned PMU Colton Lewis
2026-09-24 17:55 ` sashiko-bot
2026-09-24 17:30 ` [PATCH] target/arm: Enable KVM PMU partitioning and counter limit Colton Lewis
2026-09-28 14:01 ` Peter Maydell
2026-09-29 21:21 ` Colton Lewis
2026-09-30 11:35 ` Peter Maydell
2026-10-01 21:34 ` Colton Lewis
2026-09-30 15:25 ` [PATCH v9 00/22] ARM64 PMU Partitioning James Clark
2026-10-01 21:33 ` Colton Lewis
2026-09-30 15:26 ` James Clark
2026-10-01 21:33 ` Colton Lewis
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