Linux-ARM-Kernel Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Vladimir Murzin <vladimir.murzin@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com,
	maz@kernel.org, lpieralisi@kernel.org, ruanjinjie@huawei.com,
	liaochang1@huawei.com
Subject: [PATCH 02/38] arm64: irqflags: save and use both DAIF and PMR
Date: Mon, 14 Sep 2026 11:20:26 +0100	[thread overview]
Message-ID: <20260914102102.68597-3-vladimir.murzin@arm.com> (raw)
In-Reply-To: <20260914102102.68597-1-vladimir.murzin@arm.com>

From: Ada Couprie Diaz <ada.coupriediaz@arm.com>

With pseudo-NMIs enabled, both DAIF and the PMR affect interrupt masking.
Now that we have a type which can track both of them at the same time,
update our irqflags implementation to use it.

Save DAIF flags in all cases, as they can be manipulated directly by other
code, and the PMR if it is in use.

When checking if IRQs are disabled, now that we always save DAIF we
can check that the I flag is set and bypass checking the PMR if it is.
We can also properly check if PMR masks interrupts, now that we don't
need to rely on the GIC_PRIO_PSR_I_SET bit being set in the PMR to
know if DAIF is already masking interrupts.  Update
`irqs_priority_unmasked()` to align with this change.

This allows us to remove the `__daif_...` and `__pmr_...` versions
of the save and check functions, as they are now unified.

We can reasonably merge the two `__{daif,pmr}_irq_restore()` functions
in the main one, as the DAIF and PMR values are properly split now.

Signed-off-by: Ada Couprie Diaz <ada.coupriediaz@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
---
 arch/arm64/include/asm/irqflags.h | 118 +++++++-----------------------
 arch/arm64/include/asm/ptrace.h   |  18 +++--
 2 files changed, 38 insertions(+), 98 deletions(-)

diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
index 5c17e26727f9..9f5c774cbe68 100644
--- a/arch/arm64/include/asm/irqflags.h
+++ b/arch/arm64/include/asm/irqflags.h
@@ -97,135 +97,69 @@ static __always_inline void arch_local_irq_disable(void)
 	}
 }
 
-static __always_inline unsigned long __daif_local_save_flags(void)
-{
-	arm64_exc_hwstate_t hwstate = { .daif = read_sysreg(daif) };
-
-	return hwstate.flags;
-}
-
-static __always_inline unsigned long __pmr_local_save_flags(void)
-{
-	arm64_exc_hwstate_t hwstate = { .pmr = read_sysreg_s(SYS_ICC_PMR_EL1) };
-
-	return hwstate.flags;
-}
-
 /*
  * Save the current interrupt enable state.
  */
 static __always_inline unsigned long arch_local_save_flags(void)
 {
-	if (system_uses_irq_prio_masking()) {
-		return __pmr_local_save_flags();
-	} else {
-		return __daif_local_save_flags();
-	}
-}
+	arm64_exc_hwstate_t hwstate = { .daif = read_sysreg(daif) };
 
-static __always_inline bool __daif_irqs_disabled_flags(unsigned long flags)
-{
-	arm64_exc_hwstate_t hwstate = { .flags = flags };
+	if (system_uses_irq_prio_masking())
+		hwstate.pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
 
-	return hwstate.daif & PSR_I_BIT;
+	return hwstate.flags;
 }
 
-static __always_inline bool __pmr_irqs_disabled_flags(unsigned long flags)
+static __always_inline bool arch_irqs_disabled_flags(unsigned long flags)
 {
 	arm64_exc_hwstate_t hwstate = { .flags = flags };
 
-	return hwstate.pmr != GIC_PRIO_IRQON;
-}
+	if (hwstate.daif & PSR_I_BIT)
+		return true;
 
-static __always_inline bool arch_irqs_disabled_flags(unsigned long flags)
-{
 	if (system_uses_irq_prio_masking()) {
-		return __pmr_irqs_disabled_flags(flags);
-	} else {
-		return __daif_irqs_disabled_flags(flags);
-	}
-}
+		WARN_ON_ONCE(IS_ENABLED(CONFIG_DEBUG_IRQFLAGS) &&
+			     hwstate.pmr != GIC_PRIO_IRQOFF &&
+			     hwstate.pmr != GIC_PRIO_IRQON);
 
-static __always_inline bool __daif_irqs_disabled(void)
-{
-	return __daif_irqs_disabled_flags(__daif_local_save_flags());
-}
+		return hwstate.pmr != GIC_PRIO_IRQON;
+	}
 
-static __always_inline bool __pmr_irqs_disabled(void)
-{
-	return __pmr_irqs_disabled_flags(__pmr_local_save_flags());
+	return false;
 }
 
 static __always_inline bool arch_irqs_disabled(void)
 {
-	if (system_uses_irq_prio_masking()) {
-		return __pmr_irqs_disabled();
-	} else {
-		return __daif_irqs_disabled();
-	}
+	return arch_irqs_disabled_flags(arch_local_save_flags());
 }
 
-static __always_inline unsigned long __daif_local_irq_save(void)
-{
-	unsigned long flags = __daif_local_save_flags();
-
-	__daif_local_irq_disable();
-
-	return flags;
-}
-
-static __always_inline unsigned long __pmr_local_irq_save(void)
+static __always_inline unsigned long arch_local_irq_save(void)
 {
-	unsigned long flags = __pmr_local_save_flags();
+	unsigned long flags = arch_local_save_flags();
 
-	/*
-	 * There are too many states with IRQs disabled, just keep the current
-	 * state if interrupts are already disabled/masked.
-	 */
-	if (!__pmr_irqs_disabled_flags(flags))
+	if (system_uses_irq_prio_masking())
 		__pmr_local_irq_disable();
+	else
+		__daif_local_irq_disable();
 
 	return flags;
 }
 
-static __always_inline unsigned long arch_local_irq_save(void)
-{
-	if (system_uses_irq_prio_masking()) {
-		return __pmr_local_irq_save();
-	} else {
-		return __daif_local_irq_save();
-	}
-}
-
-static __always_inline void __daif_local_irq_restore(unsigned long flags)
-{
-	arm64_exc_hwstate_t hwstate = { .flags = flags };
-
-	barrier();
-	write_sysreg(hwstate.daif, daif);
-	barrier();
-}
-
-static __always_inline void __pmr_local_irq_restore(unsigned long flags)
-{
-	arm64_exc_hwstate_t hwstate = { .flags = flags };
-
-	barrier();
-	write_sysreg_s(hwstate.pmr, SYS_ICC_PMR_EL1);
-	pmr_sync();
-	barrier();
-}
-
 /*
  * restore saved IRQ state
  */
 static __always_inline void arch_local_irq_restore(unsigned long flags)
 {
+	arm64_exc_hwstate_t hwstate = { .flags = flags };
+
+	barrier();
 	if (system_uses_irq_prio_masking()) {
-		__pmr_local_irq_restore(flags);
+		write_sysreg_s(hwstate.pmr, SYS_ICC_PMR_EL1);
+		pmr_sync();
 	} else {
-		__daif_local_irq_restore(flags);
+		write_sysreg(hwstate.daif, daif);
 	}
+	barrier();
 }
 
 #endif /* __ASM_IRQFLAGS_H */
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index f7dc5fb9427d..e4c7e6bafa3d 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -203,14 +203,20 @@ static inline void forget_syscall(struct pt_regs *regs)
 #define processor_mode(regs) \
 	((regs)->pstate & PSR_MODE_MASK)
 
-#define irqs_priority_unmasked(regs)					\
-	(system_uses_irq_prio_masking() ?				\
-		(regs)->pmr == GIC_PRIO_IRQON :				\
-		true)
-
 static __always_inline bool regs_irqs_disabled(const struct pt_regs *regs)
 {
-	return (regs->pstate & PSR_I_BIT) || !irqs_priority_unmasked(regs);
+	if (regs->pstate & PSR_I_BIT)
+		return true;
+
+	if (system_uses_irq_prio_masking()) {
+		WARN_ON_ONCE(IS_ENABLED(CONFIG_DEBUG_IRQFLAGS) &&
+			     regs->pmr != GIC_PRIO_IRQOFF &&
+			     regs->pmr != GIC_PRIO_IRQON);
+
+		return regs->pmr != GIC_PRIO_IRQON;
+	}
+
+	return false;
 }
 
 #define interrupts_enabled(regs)	(!regs_irqs_disabled(regs))
-- 
2.34.1



  parent reply	other threads:[~2026-09-14 10:21 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-14 10:20 [PATCH 00/38] arm64: Add support for FEAT_NMI Vladimir Murzin
2026-09-14 10:20 ` [PATCH 01/38] arm64: irqflags: Introduce arm64-specific irqflags type Vladimir Murzin
2026-09-14 10:20 ` Vladimir Murzin [this message]
2026-09-14 10:20 ` [PATCH 03/38] arm64: interrupts: Add common exception state helpers Vladimir Murzin
2026-09-17  8:58   ` Jinjie Ruan
2026-09-17  9:10   ` Jinjie Ruan
2026-09-21 14:10     ` Vladimir Murzin
2026-09-21 23:13       ` Ashok Raj
2026-09-14 10:20 ` [PATCH 04/38] arm64: process: Lift check for exception state to generic infrastructure Vladimir Murzin
2026-09-14 10:20 ` [PATCH 05/38] arm64: entry: Introduce entry specific exception masking helpers Vladimir Murzin
2026-09-17  9:53   ` Jinjie Ruan
2026-09-21 14:15     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 06/38] arm64: entry: replace DAIF helpers with entry helpers Vladimir Murzin
     [not found]   ` <15bc779f-e6f5-4c2a-a629-cb020f12a41a@huawei.com>
2026-09-21 14:01     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 07/38] arm64: interrupts: Introduce exception masking save/restore helpers Vladimir Murzin
2026-09-14 10:20 ` [PATCH 08/38] arm64: interrupts: introduce a helper for GIC priority initialization Vladimir Murzin
2026-09-14 10:20 ` [PATCH 09/38] arm64: replace local_daif helpers Vladimir Murzin
2026-09-17  8:14   ` Jinjie Ruan
2026-09-21 14:07     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 10/38] arm64: cpuidle: use new helpers to bypass interrupt priority masking Vladimir Murzin
2026-09-14 10:20 ` [PATCH 11/38] arm64: remove daifflags.h Vladimir Murzin
2026-09-14 10:20 ` [PATCH 12/38] arm64: gicv3: remove GIC_PRIO_PSR_I_SET Vladimir Murzin
2026-09-14 10:20 ` [PATCH 13/38] arm64: cpufeature: Remove system_has_prio_mask_debugging() Vladimir Murzin
2026-09-14 10:20 ` [PATCH 14/38] arm64: irqflags: Switch to CONFIG_DEBUG_IRQFLAGS Vladimir Murzin
2026-09-14 10:20 ` [PATCH 15/38] arm64: Kconfig: Remove CONFIG_ARM64_DEBUG_PRIORITY_MASKING Vladimir Murzin
2026-09-14 10:20 ` [PATCH 16/38] efi/runtime-wrappers: Permit architectures to override IRQ flags checks Vladimir Murzin
2026-09-14 10:20 ` [PATCH 17/38] arm64/efi: Implement override for " Vladimir Murzin
2026-09-14 10:20 ` [PATCH 18/38] arm64: booting: Document boot requirements for FEAT_NMI Vladimir Murzin
2026-09-14 10:20 ` [PATCH 19/38] arm64: sysreg: Add definitions for immediate versions of MSR ALLINT Vladimir Murzin
2026-09-14 10:20 ` [PATCH 20/38] arm64: probes: Reject stepping over ALLINT Vladimir Murzin
2026-09-16  8:53   ` Jinjie Ruan
2026-09-14 10:20 ` [PATCH 21/38] arm64: ptrace: Add PSR_ALLINT_BIT Vladimir Murzin
2026-09-14 10:20 ` [PATCH 22/38] arm64: idreg: Add an override for FEAT_NMI Vladimir Murzin
2026-09-14 10:20 ` [PATCH 23/38] arm64: cpufeature: Detect PE support " Vladimir Murzin
2026-09-16  9:22   ` Jinjie Ruan
2026-09-21 13:53     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 24/38] arm64: nmi: Manage masking for superpriority interrupts Vladimir Murzin
2026-09-17 11:41   ` Jinjie Ruan
2026-09-21 14:23     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 25/38] arm64: irq: Report FEAT_NMI masking local IRQs Vladimir Murzin
2026-09-14 10:20 ` [PATCH 26/38] arm64: nmi: Add handling of superpriority interrupts as NMIs Vladimir Murzin
2026-09-17 11:37   ` Jinjie Ruan
2026-09-21 14:16     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 27/38] arm64: suspend: Always initialise PSTATE.ALLINT Vladimir Murzin
2026-09-14 10:20 ` [PATCH 28/38] arm64/efi: Add ALLINT to IRQ flags checks Vladimir Murzin
2026-09-14 10:20 ` [PATCH 29/38] arm64: kprobes: Disable NMIs Vladimir Murzin
2026-09-14 10:20 ` [PATCH 30/38] arm64: smp: Abstract SGI and LPI operations Vladimir Murzin
2026-09-16  9:01   ` Jinjie Ruan
2026-09-21 13:44     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 31/38] arm64: smp: Fall back to IRQ when IPI NMI request fails Vladimir Murzin
2026-09-14 10:20 ` [PATCH 32/38] arm64: nmi: Add Kconfig for NMI Vladimir Murzin
2026-09-16  9:06   ` Jinjie Ruan
2026-09-21 13:47     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 33/38] irqchip/gic-v3: Rename nmi to pseudo_nmi Vladimir Murzin
2026-09-14 10:20 ` [PATCH 34/38] irqchip/gic-v3: Implement FEAT_GICv3_NMI support Vladimir Murzin
2026-09-14 10:20 ` [PATCH 35/38] arm64: smp: Add NMI support for LPI-backed IPIs Vladimir Murzin
2026-09-14 10:21 ` [PATCH 36/38] genirq: Trust local irqchip when considering IRQ for NMI Vladimir Murzin
2026-09-17 12:06   ` Jinjie Ruan
2026-09-14 10:21 ` [PATCH 37/38] genirq: Do not call add_interrupt_randomness() in NMI context Vladimir Murzin
2026-09-17 11:55   ` Jinjie Ruan
2026-09-14 10:21 ` [PATCH 38/38] irqchip/gic-v5: Add NMI support Vladimir Murzin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260914102102.68597-3-vladimir.murzin@arm.com \
    --to=vladimir.murzin@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=liaochang1@huawei.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=lpieralisi@kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=ruanjinjie@huawei.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox