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From: Jinjie Ruan <ruanjinjie@huawei.com>
To: Vladimir Murzin <vladimir.murzin@arm.com>,
	<linux-arm-kernel@lists.infradead.org>
Cc: <catalin.marinas@arm.com>, <will@kernel.org>,
	<mark.rutland@arm.com>, <maz@kernel.org>, <lpieralisi@kernel.org>,
	<liaochang1@huawei.com>
Subject: Re: [PATCH 30/38] arm64: smp: Abstract SGI and LPI operations
Date: Wed, 16 Sep 2026 17:01:37 +0800	[thread overview]
Message-ID: <aa6bd598-e801-424a-b2b6-73c3a5ba0900@huawei.com> (raw)
In-Reply-To: <20260914102102.68597-31-vladimir.murzin@arm.com>



在 2026/9/14 18:20, Vladimir Murzin 写道:
> SGI and LPI backed IPIs require different setup, enable, disable and
> send operations. These differences are currently handled by repeatedly
> checking percpu_ipi_descs. As the implementation specific logic grows,
> these checks make the common IPI code increasingly difficult to
> follow.
> 
> Introduce an operations structure for each implementation to
> encapsulate the specific of SGI and LPI handling, leaving the common
> IPI paths generic.
> 
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
> ---
>  arch/arm64/kernel/smp.c | 135 ++++++++++++++++++++++++++--------------
>  1 file changed, 88 insertions(+), 47 deletions(-)
> 
> diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
> index 3d7060aedd66..46cdcc114997 100644
> --- a/arch/arm64/kernel/smp.c
> +++ b/arch/arm64/kernel/smp.c
> @@ -77,11 +77,18 @@ static DEFINE_PER_CPU_READ_MOSTLY(struct ipi_descs, pcpu_ipi_desc);
>  
>  #define get_ipi_desc(__cpu, __ipi) (per_cpu_ptr(&pcpu_ipi_desc, __cpu)->descs[__ipi])
>  
> -static bool percpu_ipi_descs __ro_after_init;
> +struct ipi_irq_ops {
> +	void (*setup)(int ipi, int ncpus);
> +	void (*disable)(int cpu, int ipi);
> +	void (*enable)(int cpu, int ipi);
> +	void (*send)(const cpumask_t *mask, unsigned int nr);
> +};
> +
> +static const struct ipi_irq_ops *ipi_ops __ro_after_init;
>  
>  static bool crash_stop;
>  
> -static void ipi_setup(int cpu);
> +static void ipi_enable(int cpu);
>  
>  #ifdef CONFIG_HOTPLUG_CPU
>  static void ipi_teardown(int cpu);
> @@ -242,7 +249,7 @@ asmlinkage notrace void secondary_start_kernel(void)
>  	 */
>  	notify_cpu_starting(cpu);
>  
> -	ipi_setup(cpu);
> +	ipi_enable(cpu);
>  
>  	numa_add_cpu(cpu);
>  
> @@ -937,13 +944,7 @@ void __noreturn panic_smp_self_stop(void)
>  
>  static void arm64_send_ipi(const cpumask_t *mask, unsigned int nr)
>  {
> -	unsigned int cpu;
> -
> -	if (!percpu_ipi_descs)
> -		__ipi_send_mask(get_ipi_desc(0, nr), mask);
> -	else
> -		for_each_cpu(cpu, mask)
> -			__ipi_send_single(get_ipi_desc(cpu, nr), cpu);
> +	ipi_ops->send(mask, nr);
>  }
>  
>  static void arm64_backtrace_ipi(cpumask_t *mask)
> @@ -1074,54 +1075,37 @@ static bool ipi_should_be_nmi(enum ipi_msg_type ipi)
>  	}
>  }
>  
> -static void ipi_setup(int cpu)
> +static void ipi_enable(int cpu)
>  {
> -	int i;
> +	int ipi;
>  
>  	if (WARN_ON_ONCE(!ipi_irq_base))
>  		return;
>  
> -	for (i = 0; i < nr_ipi; i++) {
> -		if (!percpu_ipi_descs) {
> -			if (ipi_should_be_nmi(i)) {
> -				prepare_percpu_nmi(ipi_irq_base + i);
> -				enable_percpu_nmi(ipi_irq_base + i, 0);
> -			} else {
> -				enable_percpu_irq(ipi_irq_base + i, 0);
> -			}
> -		} else {
> -			enable_irq(irq_desc_get_irq(get_ipi_desc(cpu, i)));
> -		}
> -	}
> +	for (ipi = 0; ipi < nr_ipi; ipi++)
> +		ipi_ops->enable(cpu, ipi);
>  }
>  
>  #ifdef CONFIG_HOTPLUG_CPU
>  static void ipi_teardown(int cpu)
>  {
> -	int i;
> +	int ipi;
>  
>  	if (WARN_ON_ONCE(!ipi_irq_base))
>  		return;
>  
> -	for (i = 0; i < nr_ipi; i++) {
> -		if (!percpu_ipi_descs) {
> -			if (ipi_should_be_nmi(i)) {
> -				disable_percpu_nmi(ipi_irq_base + i);
> -				teardown_percpu_nmi(ipi_irq_base + i);
> -			} else {
> -				disable_percpu_irq(ipi_irq_base + i);
> -			}
> -		} else {
> -			disable_irq_nosync(irq_desc_get_irq(get_ipi_desc(cpu, i)));
> -		}
> -	}
> +	for (ipi = 0; ipi < nr_ipi; ipi++)
> +		ipi_ops->disable(cpu, ipi);
>  }
>  #endif
>  
> -static void ipi_setup_sgi(int ipi)
> +static void ipi_sgi_setup(int ipi, int ncpus)
>  {
>  	int err, irq, cpu;
>  
> +	if (WARN_ON_ONCE(ncpus))
> +		return;
> +
>  	irq = ipi_irq_base + ipi;
>  
>  	if (ipi_should_be_nmi(ipi)) {
> @@ -1138,7 +1122,53 @@ static void ipi_setup_sgi(int ipi)
>  	irq_set_status_flags(irq, IRQ_HIDDEN);
>  }
>  
> -static void ipi_setup_lpi(int ipi, int ncpus)
> +static void ipi_sgi_enable(int cpu, int ipi)
> +{
> +	int irq = ipi_irq_base + ipi;
> +
> +	if (ipi_should_be_nmi(ipi)) {
> +		prepare_percpu_nmi(irq);
> +		enable_percpu_nmi(irq, 0);
> +	} else {
> +		enable_percpu_irq(irq, 0);
> +	}
> +}
> +
> +static void ipi_sgi_disable(int cpu, int ipi)
> +{
> +	int irq = ipi_irq_base + ipi;
> +
> +	if (ipi_should_be_nmi(ipi)) {
> +		disable_percpu_nmi(irq);
> +		teardown_percpu_nmi(irq);
> +	} else {
> +		disable_percpu_irq(irq);
> +	}
> +}
> +
> +static void ipi_sgi_send(const cpumask_t *mask, unsigned int nr)
> +{
> +	__ipi_send_mask(get_ipi_desc(0, nr), mask);
> +}
> +
> +static const struct ipi_irq_ops ipi_sgi_ops = {
> +	.setup = ipi_sgi_setup,
> +	.disable = ipi_sgi_disable,
> +	.enable = ipi_sgi_enable,
> +	.send = ipi_sgi_send,
> +};
> +
> +static void ipi_lpi_enable(int cpu, int ipi)
> +{
> +	enable_irq(irq_desc_get_irq(get_ipi_desc(cpu, ipi)));
> +}
> +
> +static void ipi_lpi_disable(int cpu, int ipi)
> +{
> +	disable_irq_nosync(irq_desc_get_irq(get_ipi_desc(cpu, ipi)));
> +}
> +
> +static void ipi_lpi_setup(int ipi, int ncpus)
>  {
>  	for (int cpu = 0; cpu < ncpus; cpu++) {
>  		int err, irq;
> @@ -1158,6 +1188,20 @@ static void ipi_setup_lpi(int ipi, int ncpus)
>  	}
>  }
>  
> +static void ipi_lpi_send(const cpumask_t *mask, unsigned int nr) {

Sashiko pointed out a typo in the formatting.

static void ipi_lpi_send(const cpumask_t *mask, unsigned int nr)
{

> +	int cpu;
> +
> +	for_each_cpu(cpu, mask)
> +		__ipi_send_single(get_ipi_desc(cpu, nr), cpu);
> +}
> +
> +static const struct ipi_irq_ops ipi_lpi_ops = {
> +	.setup = ipi_lpi_setup,
> +	.disable = ipi_lpi_disable,
> +	.enable = ipi_lpi_enable,
> +	.send = ipi_lpi_send,
> +};
> +
>  void __init set_smp_ipi_range_percpu(int ipi_base, int n, int ncpus)
>  {
>  	int i;
> @@ -1165,18 +1209,15 @@ void __init set_smp_ipi_range_percpu(int ipi_base, int n, int ncpus)
>  	WARN_ON(n < MAX_IPI);
>  	nr_ipi = min(n, MAX_IPI);
>  
> -	percpu_ipi_descs = !!ncpus;
>  	ipi_irq_base = ipi_base;
>  
> -	for (i = 0; i < nr_ipi; i++) {
> -		if (!percpu_ipi_descs)
> -			ipi_setup_sgi(i);
> -		else
> -			ipi_setup_lpi(i, ncpus);
> -	}
> +	ipi_ops = ncpus ? &ipi_lpi_ops : &ipi_sgi_ops;
> +
> +	for (i = 0; i < nr_ipi; i++)
> +		ipi_ops->setup(i, ncpus);
>  
>  	/* Setup the boot CPU immediately */
> -	ipi_setup(smp_processor_id());
> +	ipi_enable(smp_processor_id());
>  }
>  
>  void arch_smp_send_reschedule(int cpu)



  reply	other threads:[~2026-09-16  9:02 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-14 10:20 [PATCH 00/38] arm64: Add support for FEAT_NMI Vladimir Murzin
2026-09-14 10:20 ` [PATCH 01/38] arm64: irqflags: Introduce arm64-specific irqflags type Vladimir Murzin
2026-09-14 10:20 ` [PATCH 02/38] arm64: irqflags: save and use both DAIF and PMR Vladimir Murzin
2026-09-14 10:20 ` [PATCH 03/38] arm64: interrupts: Add common exception state helpers Vladimir Murzin
2026-09-17  8:58   ` Jinjie Ruan
2026-09-17  9:10   ` Jinjie Ruan
2026-09-21 14:10     ` Vladimir Murzin
2026-09-21 23:13       ` Ashok Raj
2026-09-14 10:20 ` [PATCH 04/38] arm64: process: Lift check for exception state to generic infrastructure Vladimir Murzin
2026-09-14 10:20 ` [PATCH 05/38] arm64: entry: Introduce entry specific exception masking helpers Vladimir Murzin
2026-09-17  9:53   ` Jinjie Ruan
2026-09-21 14:15     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 06/38] arm64: entry: replace DAIF helpers with entry helpers Vladimir Murzin
     [not found]   ` <15bc779f-e6f5-4c2a-a629-cb020f12a41a@huawei.com>
2026-09-21 14:01     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 07/38] arm64: interrupts: Introduce exception masking save/restore helpers Vladimir Murzin
2026-09-14 10:20 ` [PATCH 08/38] arm64: interrupts: introduce a helper for GIC priority initialization Vladimir Murzin
2026-09-14 10:20 ` [PATCH 09/38] arm64: replace local_daif helpers Vladimir Murzin
2026-09-17  8:14   ` Jinjie Ruan
2026-09-21 14:07     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 10/38] arm64: cpuidle: use new helpers to bypass interrupt priority masking Vladimir Murzin
2026-09-14 10:20 ` [PATCH 11/38] arm64: remove daifflags.h Vladimir Murzin
2026-09-14 10:20 ` [PATCH 12/38] arm64: gicv3: remove GIC_PRIO_PSR_I_SET Vladimir Murzin
2026-09-14 10:20 ` [PATCH 13/38] arm64: cpufeature: Remove system_has_prio_mask_debugging() Vladimir Murzin
2026-09-14 10:20 ` [PATCH 14/38] arm64: irqflags: Switch to CONFIG_DEBUG_IRQFLAGS Vladimir Murzin
2026-09-14 10:20 ` [PATCH 15/38] arm64: Kconfig: Remove CONFIG_ARM64_DEBUG_PRIORITY_MASKING Vladimir Murzin
2026-09-14 10:20 ` [PATCH 16/38] efi/runtime-wrappers: Permit architectures to override IRQ flags checks Vladimir Murzin
2026-09-14 10:20 ` [PATCH 17/38] arm64/efi: Implement override for " Vladimir Murzin
2026-09-14 10:20 ` [PATCH 18/38] arm64: booting: Document boot requirements for FEAT_NMI Vladimir Murzin
2026-09-14 10:20 ` [PATCH 19/38] arm64: sysreg: Add definitions for immediate versions of MSR ALLINT Vladimir Murzin
2026-09-14 10:20 ` [PATCH 20/38] arm64: probes: Reject stepping over ALLINT Vladimir Murzin
2026-09-16  8:53   ` Jinjie Ruan
2026-09-14 10:20 ` [PATCH 21/38] arm64: ptrace: Add PSR_ALLINT_BIT Vladimir Murzin
2026-09-14 10:20 ` [PATCH 22/38] arm64: idreg: Add an override for FEAT_NMI Vladimir Murzin
2026-09-14 10:20 ` [PATCH 23/38] arm64: cpufeature: Detect PE support " Vladimir Murzin
2026-09-16  9:22   ` Jinjie Ruan
2026-09-21 13:53     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 24/38] arm64: nmi: Manage masking for superpriority interrupts Vladimir Murzin
2026-09-17 11:41   ` Jinjie Ruan
2026-09-21 14:23     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 25/38] arm64: irq: Report FEAT_NMI masking local IRQs Vladimir Murzin
2026-09-14 10:20 ` [PATCH 26/38] arm64: nmi: Add handling of superpriority interrupts as NMIs Vladimir Murzin
2026-09-17 11:37   ` Jinjie Ruan
2026-09-21 14:16     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 27/38] arm64: suspend: Always initialise PSTATE.ALLINT Vladimir Murzin
2026-09-14 10:20 ` [PATCH 28/38] arm64/efi: Add ALLINT to IRQ flags checks Vladimir Murzin
2026-09-14 10:20 ` [PATCH 29/38] arm64: kprobes: Disable NMIs Vladimir Murzin
2026-09-14 10:20 ` [PATCH 30/38] arm64: smp: Abstract SGI and LPI operations Vladimir Murzin
2026-09-16  9:01   ` Jinjie Ruan [this message]
2026-09-21 13:44     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 31/38] arm64: smp: Fall back to IRQ when IPI NMI request fails Vladimir Murzin
2026-09-14 10:20 ` [PATCH 32/38] arm64: nmi: Add Kconfig for NMI Vladimir Murzin
2026-09-16  9:06   ` Jinjie Ruan
2026-09-21 13:47     ` Vladimir Murzin
2026-09-14 10:20 ` [PATCH 33/38] irqchip/gic-v3: Rename nmi to pseudo_nmi Vladimir Murzin
2026-09-14 10:20 ` [PATCH 34/38] irqchip/gic-v3: Implement FEAT_GICv3_NMI support Vladimir Murzin
2026-09-14 10:20 ` [PATCH 35/38] arm64: smp: Add NMI support for LPI-backed IPIs Vladimir Murzin
2026-09-14 10:21 ` [PATCH 36/38] genirq: Trust local irqchip when considering IRQ for NMI Vladimir Murzin
2026-09-17 12:06   ` Jinjie Ruan
2026-09-14 10:21 ` [PATCH 37/38] genirq: Do not call add_interrupt_randomness() in NMI context Vladimir Murzin
2026-09-17 11:55   ` Jinjie Ruan
2026-09-14 10:21 ` [PATCH 38/38] irqchip/gic-v5: Add NMI support Vladimir Murzin

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