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From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: <iommu@lists.linux.dev>, "Joerg Roedel (AMD)" <joro@8bytes.org>,
	Jean-Philippe Brucker <jpb@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>,
	David Matlack <dmatlack@google.com>,
	"Pasha Tatashin" <pasha.tatashin@soleen.com>,
	<patches@lists.linux.dev>,
	"Pranjal Shrivastava" <praan@google.com>,
	Samiullah Khawaja <skhawaja@google.com>,
	Mostafa Saleh <smostafa@google.com>
Subject: Re: [PATCH v2 7/8] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation
Date: Thu, 9 Jul 2026 14:32:19 -0700	[thread overview]
Message-ID: <alATY+9nhJlEN9xf@nvidia.com> (raw)
In-Reply-To: <20260709182559.GH422027@nvidia.com>

On Thu, Jul 09, 2026 at 03:25:59PM -0300, Jason Gunthorpe wrote:
> I wonder if this Claude was thinking about a kernel before
> 84b2baf427968c1 where this flow would have been as-described?

You are right! I applied the patches on 7.2-rc1, but somehow AI was
still relying on the old code. I had a some hard time to fully get
it..

> With the kernel today the arm_smmu_tlb_inv_walk() is supposed to clear
> out the walk cache before freeing the table entry and the gather is
> supposed to clear out the leaf entries themselves. 84b2baf427968c1
> changed things so we always have a second leaf-only gather that covers
> the entire unmap range, which also introduced the double invalidation.

IIUIC, for the "double invalidation", the driver currently flushes:
 1. tlb_flush_walk(iova, size=2M, granule=4K, leaf-only=false)
      // flush both walk cache and leaf entries
 2.iommu_iotlb_sync((iova, size=2M, granule=2M, leaf-only=true)
      // flush the 1st leaf entry only

> What I missed is that because of that commit gather->pgsize is no
> longer correct, it will be 2M even if __arm_lpae_free_pgtable()
> unmapped 4k leaves. So we will still miss leaf invalidation :\

This also makes sense to me.

> > > +	 * If leaf_levels_bitmap is 0 then this is a walk cache only
> > > +	 * invalidation.
> > [...]
> > > +	u8 leaf_levels_bitmap;
> > 
> > Or is that only to implement a walkcache-only invalidation, such
> > that the leaf entries will have separate invalidation call(s)?
> 
> That was the plan

I see the full picture now.

Thanks
Nicolin


  reply	other threads:[~2026-07-09 21:33 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-06 16:26 [PATCH v2 0/8] Organize the SMMUv3 invalidation flow so iommupt can use it Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 1/8] iommu/arm-smmu-v3: Pass the parameters for the invalidation in a struct Jason Gunthorpe
2026-07-07  3:04   ` Nicolin Chen
2026-07-07 11:18   ` Mostafa Saleh
2026-07-06 16:26 ` [PATCH v2 2/8] iommu/arm-smmu-v3: Move pgsize out of arm_smmu_inv Jason Gunthorpe
2026-07-07  3:57   ` Nicolin Chen
2026-07-07 16:15     ` Jason Gunthorpe
2026-07-07 17:21       ` Nicolin Chen
2026-07-08 18:43         ` Jason Gunthorpe
2026-07-07 11:24   ` Mostafa Saleh
2026-07-07 18:08     ` Jason Gunthorpe
2026-07-11 17:38       ` Daniel Mentz
2026-07-10  4:06   ` Daniel Mentz
2026-07-10 14:28     ` Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 3/8] iommu/arm-smmu-v3: Optimize range invalidation for latency Jason Gunthorpe
2026-07-07  7:27   ` Nicolin Chen
2026-07-07 19:13     ` Jason Gunthorpe
2026-07-07 21:07       ` Nicolin Chen
2026-07-07 11:45   ` Mostafa Saleh
2026-07-08  0:10     ` Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 4/8] iommu/arm-smmu-v3: Keep track in the arm_smmu_invs if RIL is used Jason Gunthorpe
2026-07-07  7:27   ` Nicolin Chen
2026-07-07 11:46   ` Mostafa Saleh
2026-07-06 16:26 ` [PATCH v2 5/8] iommu/arm-smmu-v3: Precompute the invalidation commands Jason Gunthorpe
2026-07-07 11:52   ` Mostafa Saleh
2026-07-07 14:58     ` Jason Gunthorpe
2026-07-08  9:00       ` Mostafa Saleh
2026-07-08 13:15         ` Jason Gunthorpe
2026-07-07 20:31   ` Nicolin Chen
2026-07-09 12:07     ` Jason Gunthorpe
2026-07-09 19:10       ` Nicolin Chen
2026-07-06 16:26 ` [PATCH v2 6/8] iommu/arm-smmu-v3: Populate the tlbi at the top of the call chain Jason Gunthorpe
2026-07-07 11:57   ` Mostafa Saleh
2026-07-08 18:09     ` Jason Gunthorpe
2026-07-07 21:51   ` Nicolin Chen
2026-07-08 18:40     ` Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 7/8] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation Jason Gunthorpe
2026-07-06 18:00   ` Robin Murphy
2026-07-06 19:45     ` Jason Gunthorpe
2026-07-08  1:41   ` Nicolin Chen
2026-07-08 18:27     ` Jason Gunthorpe
2026-07-08  5:29   ` Nicolin Chen
2026-07-09 18:25     ` Jason Gunthorpe
2026-07-09 21:32       ` Nicolin Chen [this message]
2026-07-06 16:26 ` [PATCH v2 8/8] iommu/arm-smmu-v3: Support the DS expansion of RIL's SCALE Jason Gunthorpe
2026-07-07 23:20   ` Nicolin Chen
2026-07-08  0:02     ` Jason Gunthorpe
2026-07-08  2:10       ` Nicolin Chen
2026-07-08 13:05         ` Jason Gunthorpe
2026-07-07 12:25 ` [PATCH v2 0/8] Organize the SMMUv3 invalidation flow so iommupt can use it Mostafa Saleh
2026-07-07 15:00   ` Jason Gunthorpe

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