Re: [PATCH RFC 00/23] resctrl: MBA control emulation and ARM MPAM MB_NODE support

[Reinette Chatre <reinette.chatre@intel.com>]

Hi Fenghua,

On 7/16/26 2:02 PM, Fenghua Yu wrote:
> This series enables MBA bandwidth control emulation on ARM MPAM when the
> default MB control is disabled, using a node-scoped MB_NODE control as
> the native backend.  It extends memory-bandwidth monitoring and
> control to memory-level MSCs or CPU-less NUMA nodes, and adds
> documentation and tests.

Just to confirm, I believe that [1] simplifies support for CPU-less NUMA nodes.
Some highlights of that related to this series:
- There was agreement that resctrl will treat each resource at a particular
  scope as a separate resource. Just like L2 and L3 are two resources that represent
  cache allocation at different scope, MB and MB_NODE will be two resources
  representing memory bandwidth allocation at different scope with the MB
  resource implying L3 scope.
- [1] contains support for switching control mode between legacy and native.
  From the MB_NODE examples in this cover letter it looks to me as though
  MB_NODE will take the shape of a percentage based control. As I understand
  the hardware has multiple controls with finer grained capabilities and
  how these will be used may still need emulation if MB_NODE is planned to
  be percentage based. As a sidenote, since it is introduced after the new
  control properties it could possibly just start out as a finer grained control?
- There is no need to change the info/ hierarchy on switch between legacy and native.

Regarding the monitoring support, I still believe that the monitoring support needs
to be separated from the resources to accurately reflect that the monitoring is associated
with a scope, not a resource. This change does not form part of [1] though.

It is fine with me if we continue discussion at [1]. This message is just intended
as a summary of changes in the works that should simplify the support for this hardware.

Reinette

[1] https://lore.kernel.org/lkml/d258a32f-12d5-464d-abe9-4720fb3e44b3@intel.com/