* [PATCH] ARM: dts: lpc32xx: add pwm-cells to base dts file
From: Sylvain Lemieux (gmail) @ 2016-09-27 12:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <aaf0fc9c-ea2f-0081-cf58-b5024e450030@mleia.com>
Hi Vladimir,
On Tue, 2016-09-27 at 01:07 +0300, Vladimir Zapolskiy wrote:
> Hi Sylvain,
>
> On 26.09.2016 21:47, Sylvain Lemieux wrote:
> > From: Sylvain Lemieux <slemieux@tycoint.com>
> >
> > There is no need to define the "pwm-cells" in the board
> > specific dts file; move the entry to the base dts file.
> >
> > Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
> > ---
> > Note:
> > * This patch should be apply after
> > "ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2"
> > http://www.spinics.net/lists/arm-kernel/msg530277.html
> > - There is no dependency between the patches.
> >
> > arch/arm/boot/dts/lpc32xx.dtsi | 2 ++
> > 1 file changed, 2 insertions(+)
> >
[...]
>
> that's something I have done locally and in a different manner, but I haven't
> published it yet, please find below a draft.
>
> First of all from multiple places in the User's Manual you can find that there
> are "two single output PWM blocks" or "the LPC32x0 provides two 8-bit PWMs" etc.
>
> In this case it does not make sense to set PWM cells to 2 (there is only one
> channel), and 1 cell for frequency is good enough, and that's the proposed
> change to support it:
>
> diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
> index a9b3cff..447ae44 100644
> --- a/drivers/pwm/pwm-lpc32xx.c
> +++ b/drivers/pwm/pwm-lpc32xx.c
> @@ -99,6 +99,22 @@ static const struct pwm_ops lpc32xx_pwm_ops = {
> .owner = THIS_MODULE,
> };
>
> +static struct pwm_device *lpc32xx_pwm_of_xlate(struct pwm_chip *pc,
> + const struct of_phandle_args *args)
> +{
> + struct pwm_device *pwm;
> +
> + pwm = pwm_request_from_chip(pc, 0, NULL);
> + if (IS_ERR(pwm))
> + return pwm;
> +
> + pwm->args.period = args->args[0];
> +
> + return pwm;
> +}
> +
> static int lpc32xx_pwm_probe(struct platform_device *pdev)
> {
> struct lpc32xx_pwm_chip *lpc32xx;
> @@ -123,6 +139,8 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
> lpc32xx->chip.ops = &lpc32xx_pwm_ops;
> lpc32xx->chip.npwm = 1;
> lpc32xx->chip.base = -1;
> + lpc32xx->chip.of_xlate = lpc32xx_pwm_of_xlate;
> + lpc32xx->chip.of_pwm_n_cells = 1;
>
> ret = pwmchip_add(&lpc32xx->chip);
> if (ret < 0) {
>
>
> What is your opinion about this proposal?
>
I agree with you, this clean-up make sense; the PWM cell should be 1.
> If this change is applied, then lpc32xx.dtsi should contain #pwm-cells = <1>.
>
Can you submit your change on the mailing list?
I will send a version 2 of this patch after.
If it is helping, I can take care of submitting a patch
to update the documentation (lpc32xx-pwm.txt).
Did you have a change to look at the 2 others PWM related change:
* clk: lpc32xx: fix pwm clock divider computation
http://www.spinics.net/lists/arm-kernel/msg534048.html
* ARM: dts: lpc32xx: set pwm1 & pwm2 default clock rate
http://www.spinics.net/lists/arm-kernel/msg534051.html
> --
> With best wishes,
> Vladimir
Sylvain
^ permalink raw reply
* [PATCH] ARM: decompressor: reset ttbcr fields to use TTBR0 on ARMv7
From: Srinivas Ramana @ 2016-09-27 12:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <57D812A7.6040905@codeaurora.org>
Hi Robin,
On 09/13/2016 08:22 PM, Srinivas Ramana wrote:
> On 09/12/2016 11:21 PM, Robin Murphy wrote:
>> On 12/09/16 07:57, Srinivas Ramana wrote:
>>> If the bootloader uses the long descriptor format and jumps to
>>> kernel decompressor code, TTBCR may not be in a right state.
>>> Before enabling the MMU, it is required to clear the TTBCR.PD0
>>> field to use TTBR0 for translation table walks.
>>>
>>> The 'commit dbece45894d3a ("ARM: 7501/1: decompressor:
>>> reset ttbcr for VMSA ARMv7 cores")' does the reset of TTBCR.N, but
>>> doesn't consider all the bits for the size of TTBCR.N.
>>>
>>> Clear TTBCR.PD0 field and reset all the three bits of TTBCR.N to
>>> indicate the use of TTBR0 and the correct base address width.
>>>
>>> Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
>>> ---
>>> arch/arm/boot/compressed/head.S | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/boot/compressed/head.S
>>> b/arch/arm/boot/compressed/head.S
>>> index af11c2f8f3b7..fc6d541549a2 100644
>>> --- a/arch/arm/boot/compressed/head.S
>>> +++ b/arch/arm/boot/compressed/head.S
>>> @@ -779,7 +779,7 @@ __armv7_mmu_cache_on:
>>> orrne r0, r0, #1 @ MMU enabled
>>> movne r1, #0xfffffffd @ domain 0 = client
>>> bic r6, r6, #1 << 31 @ 32-bit translation system
>>
>> Hmm, if TTBCR.EAE _was_ actually set...
>>
>>> - bic r6, r6, #3 << 0 @ use only ttbr0
>>> + bic r6, r6, #(7 << 0) | (1 << 4) @ use only ttbr0
>>> mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
>>> mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
>>> mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
>>
>> ...then strictly the TLBIALL needs to happen after the ISB following
>> this update. Otherwise per B3.10.2 of DDI406C.c I think we might be into
>> unpredictable territory - i.e. if the TLB happens to treat long- and
>> short-descriptor entries differently then the TLBI beforehand (with EAE
>> set) may be at liberty to only discard long-descriptor entries and leave
>> bogus short-descriptor entries sitting around.
> Yes, it seems this has to be taken care of, along with resetting
> TTBCR.PD0 and TTBCR.N. Do you say that this needs to be done in the same
> patch or a different one?
>>
>> In other words, something like (completely untested):
>>
>> ---8<---
>> diff --git a/arch/arm/boot/compressed/head.S
>> b/arch/arm/boot/compressed/head.S
>> index af11c2f8f3b7..536b7781024a 100644
>> --- a/arch/arm/boot/compressed/head.S
>> +++ b/arch/arm/boot/compressed/head.S
>> @@ -764,7 +764,6 @@ __armv7_mmu_cache_on:
>> mov r0, #0
>> mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
>> tst r11, #0xf @ VMSA
>> - mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
>
> Shouldn't this be still there for the same reason you explained above? I
> mean to discard the long descriptor entries when EAE was 1 (before we
> reset it).
>> #endif
>> mrc p15, 0, r0, c1, c0, 0 @ read control reg
>> bic r0, r0, #1 << 28 @ clear SCTLR.TRE
>> @@ -783,8 +782,11 @@ __armv7_mmu_cache_on:
>> mcrne p15, 0, r3, c2, c0, 0 @ load page table
>> pointer
>> mcrne p15, 0, r1, c3, c0, 0 @ load domain access
>> control
>> mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
>> -#endif
>> mcr p15, 0, r0, c7, c5, 4 @ ISB
>> + mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
>> +#else
>> + mcr p15, 0, r0, c7, c5, 4 @ ISB
>> +#endif
>> mcr p15, 0, r0, c1, c0, 0 @ load control register
>> mrc p15, 0, r0, c1, c0, 0 @ and read it back
>> ---8<---
>>
>> Robin.
>>
> i have tested this change (flush I, D, TLBs after TTB control is
> written) and don't see any issue. But on my setup decompression is
> successful even without this (probably not hitting the case in discussion).
>
>
> Thanks,
> -- Srinivas R
>
Would like your feedback on the above. Can we get the TTBCR fix merged
first?(will send final patch with Russell Kings comments fixed)
For testing the TLB flush change we may have to check if we can create a
failure case.
Thanks,
-- Srinivas R
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center,
Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative
Project.
^ permalink raw reply
* [PATCH] ARM: at91: pm: remove useless extern definition
From: Nicolas Ferre @ 2016-09-27 11:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160927103715.26785-1-alexandre.belloni@free-electrons.com>
Le 27/09/2016 ? 12:37, Alexandre Belloni a ?crit :
> at91_ramc_base is local to pm.c, remove its definition in pm.h
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> arch/arm/mach-at91/pm.c | 2 +-
> arch/arm/mach-at91/pm.h | 2 --
> 2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
> index b4332b727e9c..3d89b7905bd9 100644
> --- a/arch/arm/mach-at91/pm.c
> +++ b/arch/arm/mach-at91/pm.c
> @@ -55,7 +55,7 @@ static struct {
> int memctrl;
> } at91_pm_data;
>
> -void __iomem *at91_ramc_base[2];
> +static void __iomem *at91_ramc_base[2];
>
> static int at91_pm_valid_state(suspend_state_t state)
> {
> diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
> index 3fcf8810f14e..bf980c6ef294 100644
> --- a/arch/arm/mach-at91/pm.h
> +++ b/arch/arm/mach-at91/pm.h
> @@ -18,8 +18,6 @@
> #include <soc/at91/at91sam9_sdramc.h>
>
> #ifndef __ASSEMBLY__
> -extern void __iomem *at91_ramc_base[];
> -
> #define at91_ramc_read(id, field) \
> __raw_readl(at91_ramc_base[id] + field)
>
>
--
Nicolas Ferre
^ permalink raw reply
* [PATCH v2 8/8] ARM: bcm2835: Disable i2c2 in the Device Tree
From: Noralf Trønnes @ 2016-09-27 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474977426-3272-1-git-send-email-noralf@tronnes.org>
i2c2 is connected to the HDMI connector and is controlled by the
firmware. Disable it to stay out of harms way.
>From the downstream commit:
i2c-bcm2708/BCM270X_DT: Add support for I2C2
The third I2C bus (I2C2) is normally reserved for HDMI use. Careless
use of this bus can break an attached display - use with caution.
It is recommended to disable accesses by VideoCore by setting
hdmi_ignore_edid=1 or hdmi_edid_file=1 in config.txt.
Signed-off-by: Noralf Tr?nnes <noralf@tronnes.org>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index e9b47b2..8bffbee 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -59,10 +59,6 @@
clock-frequency = <100000>;
};
-&i2c2 {
- status = "okay";
-};
-
&sdhci {
status = "okay";
bus-width = <4>;
--
2.8.2
^ permalink raw reply related
* [PATCH v2 7/8] i2c: bcm2835: Add support for dynamic clock
From: Noralf Trønnes @ 2016-09-27 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474977426-3272-1-git-send-email-noralf@tronnes.org>
Support a dynamic clock by reading the frequency and setting the
divisor in the transfer function instead of during probe.
Signed-off-by: Noralf Tr?nnes <noralf@tronnes.org>
---
drivers/i2c/busses/i2c-bcm2835.c | 51 +++++++++++++++++++++++++---------------
1 file changed, 32 insertions(+), 19 deletions(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index 79dd15f..5aed514 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -58,6 +58,7 @@ struct bcm2835_i2c_dev {
void __iomem *regs;
struct clk *clk;
int irq;
+ u32 bus_clk_rate;
struct i2c_adapter adapter;
struct completion completion;
struct i2c_msg *curr_msg;
@@ -78,6 +79,30 @@ static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg)
return readl(i2c_dev->regs + reg);
}
+static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
+{
+ u32 divider;
+
+ divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk),
+ i2c_dev->bus_clk_rate);
+ /*
+ * Per the datasheet, the register is always interpreted as an even
+ * number, by rounding down. In other words, the LSB is ignored. So,
+ * if the LSB is set, increment the divider to avoid any issue.
+ */
+ if (divider & 1)
+ divider++;
+ if ((divider < BCM2835_I2C_CDIV_MIN) ||
+ (divider > BCM2835_I2C_CDIV_MAX)) {
+ dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n");
+ return -EINVAL;
+ }
+
+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
+
+ return 0;
+}
+
static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
{
u32 val;
@@ -215,7 +240,7 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
{
struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
unsigned long time_left;
- int i;
+ int i, ret;
for (i = 0; i < (num - 1); i++)
if (msgs[i].flags & I2C_M_RD) {
@@ -224,6 +249,10 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
return -EOPNOTSUPP;
}
+ ret = bcm2835_i2c_set_divider(i2c_dev);
+ if (ret)
+ return ret;
+
i2c_dev->curr_msg = msgs;
i2c_dev->num_msgs = num;
reinit_completion(&i2c_dev->completion);
@@ -274,7 +303,6 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
{
struct bcm2835_i2c_dev *i2c_dev;
struct resource *mem, *irq;
- u32 bus_clk_rate, divider;
int ret;
struct i2c_adapter *adap;
@@ -298,27 +326,12 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
}
ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
- &bus_clk_rate);
+ &i2c_dev->bus_clk_rate);
if (ret < 0) {
dev_warn(&pdev->dev,
"Could not read clock-frequency property\n");
- bus_clk_rate = 100000;
- }
-
- divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate);
- /*
- * Per the datasheet, the register is always interpreted as an even
- * number, by rounding down. In other words, the LSB is ignored. So,
- * if the LSB is set, increment the divider to avoid any issue.
- */
- if (divider & 1)
- divider++;
- if ((divider < BCM2835_I2C_CDIV_MIN) ||
- (divider > BCM2835_I2C_CDIV_MAX)) {
- dev_err(&pdev->dev, "Invalid clock-frequency\n");
- return -ENODEV;
+ i2c_dev->bus_clk_rate = 100000;
}
- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!irq) {
--
2.8.2
^ permalink raw reply related
* [PATCH v2 6/8] i2c: bcm2835: Support i2c-dev ioctl I2C_TIMEOUT
From: Noralf Trønnes @ 2016-09-27 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474977426-3272-1-git-send-email-noralf@tronnes.org>
Use i2c_adapter->timeout for the completion timeout value. The core
default is 1 second.
Signed-off-by: Noralf Tr?nnes <noralf@tronnes.org>
---
drivers/i2c/busses/i2c-bcm2835.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index f3a1472..79dd15f 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -53,8 +53,6 @@
#define BCM2835_I2C_CDIV_MIN 0x0002
#define BCM2835_I2C_CDIV_MAX 0xFFFE
-#define BCM2835_I2C_TIMEOUT (msecs_to_jiffies(1000))
-
struct bcm2835_i2c_dev {
struct device *dev;
void __iomem *regs;
@@ -233,7 +231,7 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
bcm2835_i2c_start_transfer(i2c_dev);
time_left = wait_for_completion_timeout(&i2c_dev->completion,
- BCM2835_I2C_TIMEOUT);
+ adap->timeout);
if (!time_left) {
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C,
BCM2835_I2C_C_CLEAR);
--
2.8.2
^ permalink raw reply related
* [PATCH v2 5/8] i2c: bcm2835: Add support for Repeated Start Condition
From: Noralf Trønnes @ 2016-09-27 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474977426-3272-1-git-send-email-noralf@tronnes.org>
Documentation/i2c/i2c-protocol states that Combined transactions should
separate messages with a Start bit and end the whole transaction with a
Stop bit. This patch adds support for issuing only a Start between
messages instead of a Stop followed by a Start.
This implementation differs from downstream i2c-bcm2708 in 2 respects:
- it uses an interrupt to detect that the transfer is active instead
of using polling. There is no interrupt for Transfer Active, but by
not prefilling the FIFO it's possible to use the TXW interrupt.
- when resetting/disabling the controller between transfers it writes
CLEAR to the control register instead of just zero.
Using just zero gave many errors. This might be the reason why
downstream had to disable this feature and make it available with a
module parameter.
I have run thousands of transfers to a DS1307 (rtc), MMA8451 (accel)
and AT24C32 (eeprom) in parallel without problems.
Signed-off-by: Noralf Tr?nnes <noralf@tronnes.org>
---
drivers/i2c/busses/i2c-bcm2835.c | 101 ++++++++++++++++++++++++---------------
1 file changed, 63 insertions(+), 38 deletions(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index 4e08add..f3a1472 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -63,6 +63,7 @@ struct bcm2835_i2c_dev {
struct i2c_adapter adapter;
struct completion completion;
struct i2c_msg *curr_msg;
+ int num_msgs;
u32 msg_err;
u8 *msg_buf;
size_t msg_buf_remaining;
@@ -109,6 +110,45 @@ static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev)
}
}
+/*
+ * Repeated Start Condition (Sr)
+ * The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it
+ * talks about reading from a slave with 10 bit address. This is achieved by
+ * issuing a write, poll the I2CS.TA flag and wait for it to be set, and then
+ * issue a read.
+ * A comment in https://github.com/raspberrypi/linux/issues/254 shows how the
+ * firmware actually does it using polling and says that it's a workaround for
+ * a problem in the state machine.
+ * It turns out that it is possible to use the TXW interrupt to know when the
+ * transfer is active, provided the FIFO has not been prefilled.
+ */
+
+static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev)
+{
+ u32 c = BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN;
+ struct i2c_msg *msg = i2c_dev->curr_msg;
+ bool last_msg = (i2c_dev->num_msgs == 1);
+
+ if (!i2c_dev->num_msgs)
+ return;
+
+ i2c_dev->num_msgs--;
+ i2c_dev->msg_buf = msg->buf;
+ i2c_dev->msg_buf_remaining = msg->len;
+
+ if (msg->flags & I2C_M_RD)
+ c |= BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
+ else
+ c |= BCM2835_I2C_C_INTT;
+
+ if (last_msg)
+ c |= BCM2835_I2C_C_INTD;
+
+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
+}
+
static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
{
struct bcm2835_i2c_dev *i2c_dev = data;
@@ -142,6 +182,12 @@ static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
}
bcm2835_fill_txfifo(i2c_dev);
+
+ if (i2c_dev->num_msgs && !i2c_dev->msg_buf_remaining) {
+ i2c_dev->curr_msg++;
+ bcm2835_i2c_start_transfer(i2c_dev);
+ }
+
return IRQ_HANDLED;
}
@@ -166,30 +212,25 @@ static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
return IRQ_HANDLED;
}
-static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
- struct i2c_msg *msg)
+static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
+ int num)
{
- u32 c;
+ struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
unsigned long time_left;
+ int i;
- i2c_dev->curr_msg = msg;
- i2c_dev->msg_buf = msg->buf;
- i2c_dev->msg_buf_remaining = msg->len;
- reinit_completion(&i2c_dev->completion);
-
- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
+ for (i = 0; i < (num - 1); i++)
+ if (msgs[i].flags & I2C_M_RD) {
+ dev_warn_once(i2c_dev->dev,
+ "only one read message supported, has to be last\n");
+ return -EOPNOTSUPP;
+ }
- if (msg->flags & I2C_M_RD) {
- c = BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
- } else {
- c = BCM2835_I2C_C_INTT;
- bcm2835_fill_txfifo(i2c_dev);
- }
- c |= BCM2835_I2C_C_ST | BCM2835_I2C_C_INTD | BCM2835_I2C_C_I2CEN;
+ i2c_dev->curr_msg = msgs;
+ i2c_dev->num_msgs = num;
+ reinit_completion(&i2c_dev->completion);
- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
+ bcm2835_i2c_start_transfer(i2c_dev);
time_left = wait_for_completion_timeout(&i2c_dev->completion,
BCM2835_I2C_TIMEOUT);
@@ -200,32 +241,16 @@ static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
return -ETIMEDOUT;
}
- if (likely(!i2c_dev->msg_err))
- return 0;
+ if (!i2c_dev->msg_err)
+ return num;
dev_err_ratelimited(i2c_dev->dev, "i2c transfer failed: %x\n",
i2c_dev->msg_err);
if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
return -EREMOTEIO;
- else
- return -EIO;
-}
-
-static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
- int num)
-{
- struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
- int i;
- int ret = 0;
-
- for (i = 0; i < num; i++) {
- ret = bcm2835_i2c_xfer_msg(i2c_dev, &msgs[i]);
- if (ret)
- break;
- }
- return ret ?: i;
+ return -EIO;
}
static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
--
2.8.2
^ permalink raw reply related
* [PATCH v2 4/8] i2c: bcm2835: Can't support I2C_M_IGNORE_NAK
From: Noralf Trønnes @ 2016-09-27 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474977426-3272-1-git-send-email-noralf@tronnes.org>
The controller can't support this flag, so remove it.
Documentation/i2c/i2c-protocol states that all of the message is sent:
I2C_M_IGNORE_NAK:
Normally message is interrupted immediately if there is [NA] from the
client. Setting this flag treats any [NA] as [A], and all of
message is sent.
>From the BCM2835 ARM Peripherals datasheet:
The ERR field is set when the slave fails to acknowledge either
its address or a data byte written to it.
So when the controller doesn't receive an ack, it sets ERR and raises
an interrupt. In other words, the whole message is not sent.
Signed-off-by: Noralf Tr?nnes <noralf@tronnes.org>
---
drivers/i2c/busses/i2c-bcm2835.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index 370a322..4e08add 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -203,10 +203,6 @@ static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
if (likely(!i2c_dev->msg_err))
return 0;
- if ((i2c_dev->msg_err & BCM2835_I2C_S_ERR) &&
- (msg->flags & I2C_M_IGNORE_NAK))
- return 0;
-
dev_err_ratelimited(i2c_dev->dev, "i2c transfer failed: %x\n",
i2c_dev->msg_err);
--
2.8.2
^ permalink raw reply related
* [PATCH v2 3/8] i2c: bcm2835: Use ratelimited logging on transfer errors
From: Noralf Trønnes @ 2016-09-27 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474977426-3272-1-git-send-email-noralf@tronnes.org>
Writing to an AT24C32 generates on average 2x i2c transfer errors per
32-byte page write. Which amounts to a lot for a 4k write. This is due
to the fact that the chip doesn't respond during it's internal write
cycle when the at24 driver tries and retries the next write.
Reduce this flooding of the log by using dev_err_ratelimited().
Signed-off-by: Noralf Tr?nnes <noralf@tronnes.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
---
drivers/i2c/busses/i2c-bcm2835.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index df036ed..370a322 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -207,7 +207,8 @@ static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
(msg->flags & I2C_M_IGNORE_NAK))
return 0;
- dev_err(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
+ dev_err_ratelimited(i2c_dev->dev, "i2c transfer failed: %x\n",
+ i2c_dev->msg_err);
if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
return -EREMOTEIO;
--
2.8.2
^ permalink raw reply related
* [PATCH v2 2/8] i2c: bcm2835: Protect against unexpected TXW/RXR interrupts
From: Noralf Trønnes @ 2016-09-27 11:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474977426-3272-1-git-send-email-noralf@tronnes.org>
If an unexpected TXW or RXR interrupt occurs (msg_buf_remaining == 0),
the driver has no way to fill/drain the FIFO to stop the interrupts.
In this case the controller has to be disabled and the transfer
completed to avoid hang.
(CLKT | ERR) and DONE interrupts are completed in their own paths, and
the controller is disabled in the transfer function after completion.
Unite the code paths and do disabling inside the interrupt routine.
Clear interrupt status bits in the united completion path instead of
trying to do it on every interrupt which isn't necessary.
Only CLKT, ERR and DONE can be cleared that way.
Add the status value to the error value in case of TXW/RXR errors to
distinguish them from the other S_LEN error.
Signed-off-by: Noralf Tr?nnes <noralf@tronnes.org>
---
drivers/i2c/busses/i2c-bcm2835.c | 31 ++++++++++++++++++++++---------
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index f283b71..df036ed 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -50,8 +50,6 @@
#define BCM2835_I2C_S_CLKT BIT(9)
#define BCM2835_I2C_S_LEN BIT(10) /* Fake bit for SW error reporting */
-#define BCM2835_I2C_BITMSK_S 0x03FF
-
#define BCM2835_I2C_CDIV_MIN 0x0002
#define BCM2835_I2C_CDIV_MAX 0xFFFE
@@ -117,14 +115,11 @@ static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
u32 val, err;
val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
- val &= BCM2835_I2C_BITMSK_S;
- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, val);
err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR);
if (err) {
i2c_dev->msg_err = err;
- complete(&i2c_dev->completion);
- return IRQ_HANDLED;
+ goto complete;
}
if (val & BCM2835_I2C_S_DONE) {
@@ -137,21 +132,38 @@ static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
i2c_dev->msg_err = BCM2835_I2C_S_LEN;
else
i2c_dev->msg_err = 0;
- complete(&i2c_dev->completion);
- return IRQ_HANDLED;
+ goto complete;
}
if (val & BCM2835_I2C_S_TXW) {
+ if (!i2c_dev->msg_buf_remaining) {
+ i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
+ goto complete;
+ }
+
bcm2835_fill_txfifo(i2c_dev);
return IRQ_HANDLED;
}
if (val & BCM2835_I2C_S_RXR) {
+ if (!i2c_dev->msg_buf_remaining) {
+ i2c_dev->msg_err = val | BCM2835_I2C_S_LEN;
+ goto complete;
+ }
+
bcm2835_drain_rxfifo(i2c_dev);
return IRQ_HANDLED;
}
return IRQ_NONE;
+
+complete:
+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, BCM2835_I2C_S_CLKT |
+ BCM2835_I2C_S_ERR | BCM2835_I2C_S_DONE);
+ complete(&i2c_dev->completion);
+
+ return IRQ_HANDLED;
}
static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
@@ -181,8 +193,9 @@ static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
time_left = wait_for_completion_timeout(&i2c_dev->completion,
BCM2835_I2C_TIMEOUT);
- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
if (!time_left) {
+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C,
+ BCM2835_I2C_C_CLEAR);
dev_err(i2c_dev->dev, "i2c transfer timed out\n");
return -ETIMEDOUT;
}
--
2.8.2
^ permalink raw reply related
* [PATCH v2 1/8] i2c: bcm2835: Fix hang for writing messages larger than 16 bytes
From: Noralf Trønnes @ 2016-09-27 11:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474977426-3272-1-git-send-email-noralf@tronnes.org>
Writing messages larger than the FIFO size results in a hang, rendering
the machine unusable. This is because the RXD status flag is set on the
first interrupt which results in bcm2835_drain_rxfifo() stealing bytes
from the buffer. The controller continues to trigger interrupts waiting
for the missing bytes, but bcm2835_fill_txfifo() has none to give.
In this situation wait_for_completion_timeout() apparently is unable to
stop the madness.
The BCM2835 ARM Peripherals datasheet has this to say about the flags:
TXD: is set when the FIFO has space for at least one byte of data.
RXD: is set when the FIFO contains at least one byte of data.
TXW: is set during a write transfer and the FIFO is less than full.
RXR: is set during a read transfer and the FIFO is or more full.
Implementing the logic from the downstream i2c-bcm2708 driver solved
the hang problem.
Signed-off-by: Noralf Tr?nnes <noralf@tronnes.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Martin Sperl <kernel@martin.sperl.org>
---
drivers/i2c/busses/i2c-bcm2835.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index d4f3239..f283b71 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -64,6 +64,7 @@ struct bcm2835_i2c_dev {
int irq;
struct i2c_adapter adapter;
struct completion completion;
+ struct i2c_msg *curr_msg;
u32 msg_err;
u8 *msg_buf;
size_t msg_buf_remaining;
@@ -126,14 +127,13 @@ static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
return IRQ_HANDLED;
}
- if (val & BCM2835_I2C_S_RXD) {
- bcm2835_drain_rxfifo(i2c_dev);
- if (!(val & BCM2835_I2C_S_DONE))
- return IRQ_HANDLED;
- }
-
if (val & BCM2835_I2C_S_DONE) {
- if (i2c_dev->msg_buf_remaining)
+ if (i2c_dev->curr_msg->flags & I2C_M_RD) {
+ bcm2835_drain_rxfifo(i2c_dev);
+ val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
+ }
+
+ if ((val & BCM2835_I2C_S_RXD) || i2c_dev->msg_buf_remaining)
i2c_dev->msg_err = BCM2835_I2C_S_LEN;
else
i2c_dev->msg_err = 0;
@@ -141,11 +141,16 @@ static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
return IRQ_HANDLED;
}
- if (val & BCM2835_I2C_S_TXD) {
+ if (val & BCM2835_I2C_S_TXW) {
bcm2835_fill_txfifo(i2c_dev);
return IRQ_HANDLED;
}
+ if (val & BCM2835_I2C_S_RXR) {
+ bcm2835_drain_rxfifo(i2c_dev);
+ return IRQ_HANDLED;
+ }
+
return IRQ_NONE;
}
@@ -155,6 +160,7 @@ static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
u32 c;
unsigned long time_left;
+ i2c_dev->curr_msg = msg;
i2c_dev->msg_buf = msg->buf;
i2c_dev->msg_buf_remaining = msg->len;
reinit_completion(&i2c_dev->completion);
--
2.8.2
^ permalink raw reply related
* [PATCH v2 0/8] i2c: bcm2835: Bring in changes from downstream
From: Noralf Trønnes @ 2016-09-27 11:56 UTC (permalink / raw)
To: linux-arm-kernel
This patchset tries to bring in the lessons learned in the downstream
driver i2c-bcm2708. The downstream clock stretcing timeout patch has
been left out since clock stretching is broken/unreliable on this
controller, so no point in setting it.
This second version of the patchset has been expanded to try and
encompass all the differences between mainline and downstream.
Hopefully downstream can now start using this driver.
Thanks to Martin for jogging my memory with his comments which led to
the discovery that interrupt could be used instead of polling for the
Transfer Active state.
Noralf.
Noralf Tr?nnes (8):
i2c: bcm2835: Fix hang for writing messages larger than 16 bytes
i2c: bcm2835: Protect against unexpected TXW/RXR interrupts
i2c: bcm2835: Use ratelimited logging on transfer errors
i2c: bcm2835: Can't support I2C_M_IGNORE_NAK
i2c: bcm2835: Add support for Repeated Start Condition
i2c: bcm2835: Support i2c-dev ioctl I2C_TIMEOUT
i2c: bcm2835: Add support for dynamic clock
ARM: bcm2835: Disable i2c2 in the Device Tree
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 -
drivers/i2c/busses/i2c-bcm2835.c | 210 +++++++++++++++++++++++--------------
2 files changed, 131 insertions(+), 83 deletions(-)
--
2.8.2
^ permalink raw reply
* [RFC PATCH 08/11] pci: controller: dra7xx: Add EP mode support
From: Kishon Vijay Abraham I @ 2016-09-27 11:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160923145259.GA28285@rob-hp-laptop>
Hi,
On Friday 23 September 2016 08:22 PM, Rob Herring wrote:
> On Wed, Sep 14, 2016 at 10:42:04AM +0530, Kishon Vijay Abraham I wrote:
>> The PCIe controller integrated in dra7xx SoCs is capable of operating
>> in endpoint mode. Add support for dra7xx SoCs to operate in endpoint
>> mode.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>> Documentation/devicetree/bindings/pci/ti-pci.txt | 30 ++-
>> drivers/pci/controller/Kconfig | 21 +++
>> drivers/pci/controller/pci-dra7xx.c | 211 +++++++++++++++++++---
>> 3 files changed, 225 insertions(+), 37 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
>> index 60e2516..b0e76f6 100644
>> --- a/Documentation/devicetree/bindings/pci/ti-pci.txt
>> +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
>> @@ -1,17 +1,22 @@
>> TI PCI Controllers
>>
>> PCIe Designware Controller
>> - - compatible: Should be "ti,dra7-pcie""
>> - - reg : Two register ranges as listed in the reg-names property
>> - - reg-names : The first entry must be "ti-conf" for the TI specific registers
>> - The second entry must be "rc-dbics" for the designware pcie
>> - registers
>> - The third entry must be "config" for the PCIe configuration space
>> + - compatible: Should be "ti,dra7-pcie" for RC
>> + Should be "ti,dra7-pcie-ep" for EP
>> - phys : list of PHY specifiers (used by generic PHY framework)
>> - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
>> number of PHYs as specified in *phys* property.
>> - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
>> where <X> is the instance number of the pcie from the HW spec.
>> + - num-lanes as specified in ../designware-pcie.txt
>> +
>> +HOST MODE
>> +=========
>> + - reg : Two register ranges as listed in the reg-names property
>> + - reg-names : The first entry must be "ti-conf" for the TI specific registers
>> + The second entry must be "rc-dbics" for the designware pcie
>> + registers
>> + The third entry must be "config" for the PCIe configuration space
>> - interrupts : Two interrupt entries must be specified. The first one is for
>> main interrupt line and the second for MSI interrupt line.
>> - #address-cells,
>> @@ -19,13 +24,24 @@ PCIe Designware Controller
>> #interrupt-cells,
>> device_type,
>> ranges,
>> - num-lanes,
>> interrupt-map-mask,
>> interrupt-map : as specified in ../designware-pcie.txt
>>
>> Optional Property:
>> - gpios : Should be added if a gpio line is required to drive PERST# line
>
> Don't you need gpios as the input side of GPIO outputs in RC mode? Or
> for EP mode they are all handled by h/w?
I couldn't find any mention of the gpios being used in EP mode. I'll check this
again.
Thanks
Kishon
^ permalink raw reply
* [RFC PATCH 07/11] pci: controller: designware: Add EP mode support
From: Kishon Vijay Abraham I @ 2016-09-27 11:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160923144141.GA24842@rob-hp-laptop>
Hi,
On Friday 23 September 2016 08:11 PM, Rob Herring wrote:
> On Wed, Sep 14, 2016 at 10:42:03AM +0530, Kishon Vijay Abraham I wrote:
>> Add endpoint mode support to designware driver. This uses the
>> EP Core layer introduced recently to add endpoint mode support.
>> *Any* function driver can now use this designware device
>> to achieve the EP functionality.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>> .../devicetree/bindings/pci/designware-pcie.txt | 26 ++-
>> drivers/pci/controller/Kconfig | 5 +
>> drivers/pci/controller/Makefile | 1 +
>> drivers/pci/controller/pcie-designware-ep.c | 228 ++++++++++++++++++++
>> drivers/pci/controller/pcie-designware.c | 30 +++
>> drivers/pci/controller/pcie-designware.h | 45 ++++
>> 6 files changed, 324 insertions(+), 11 deletions(-)
>> create mode 100644 drivers/pci/controller/pcie-designware-ep.c
>>
>> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> index 6c5322c..bb0b789 100644
>> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> @@ -6,23 +6,27 @@ Required properties:
>> - reg-names: Must be "config" for the PCIe configuration space.
>> (The old way of getting the configuration address space from "ranges"
>> is deprecated and should be avoided.)
>> -- #address-cells: set to <3>
>> -- #size-cells: set to <2>
>> -- device_type: set to "pci"
>> -- ranges: ranges for the PCI memory and I/O regions
>> -- #interrupt-cells: set to <1>
>> -- interrupt-map-mask and interrupt-map: standard PCI properties
>> - to define the mapping of the PCIe interface to interrupt
>> +- #address-cells (only for host mode): set to <3>
>> +- #size-cells (only for host mode): set to <2>
>> +- device_type (only for host mode): set to "pci"
>> +- ranges (only for host mode): ranges for the PCI memory and I/O regions
>> +- num-ib-windows (only for EP mode): number of inbound address translation
>> + windows
>> +- num-ob-windows (only for EP mode): number of outbound address translation
>> + windows
>> +- #interrupt-cells (only for host mode): set to <1>
>> +- interrupt-map-mask and interrupt-map (only for host mode): standard PCI
>> + properties to define the mapping of the PCIe interface to interrupt
>
> It may be clearer to just document EP mode in a separate section even if
> there's some duplication of properties. Other standard PCI binding
> properties probably also don't apply.
right, will change this accordingly.
Thanks
Kishon
^ permalink raw reply
* [PATCH 5/5] tty: amba-pl011: Add earlycon support for SBSA UART
From: Greg Kroah-Hartman @ 2016-09-27 10:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474708465-38958-6-git-send-email-wangkefeng.wang@huawei.com>
On Sat, Sep 24, 2016 at 05:14:25PM +0800, Kefeng Wang wrote:
> Declare an OF early console for SBSA UART so that the early console device
> can be specified via the "stdout-path" property in device-tree.
>
> Cc: Russell King <linux@armlinux.org.uk>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> ---
> drivers/tty/serial/amba-pl011.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
> index 7d9b291..3688d3b 100644
> --- a/drivers/tty/serial/amba-pl011.c
> +++ b/drivers/tty/serial/amba-pl011.c
> @@ -2330,6 +2330,7 @@ static int __init pl011_early_console_setup(struct earlycon_device *device,
> return 0;
> }
> OF_EARLYCON_DECLARE(pl011, "arm,pl011", pl011_early_console_setup);
> +OF_EARLYCON_DECLARE(pl011, "arm,sbsa-uart", pl011_early_console_setup);
Why do you need another option for the same thing?
confused,
greg k-h
^ permalink raw reply
* [PATCH] ARM: at91: pm: remove useless extern definition
From: Alexandre Belloni @ 2016-09-27 10:37 UTC (permalink / raw)
To: linux-arm-kernel
at91_ramc_base is local to pm.c, remove its definition in pm.h
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/pm.c | 2 +-
arch/arm/mach-at91/pm.h | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index b4332b727e9c..3d89b7905bd9 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -55,7 +55,7 @@ static struct {
int memctrl;
} at91_pm_data;
-void __iomem *at91_ramc_base[2];
+static void __iomem *at91_ramc_base[2];
static int at91_pm_valid_state(suspend_state_t state)
{
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 3fcf8810f14e..bf980c6ef294 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -18,8 +18,6 @@
#include <soc/at91/at91sam9_sdramc.h>
#ifndef __ASSEMBLY__
-extern void __iomem *at91_ramc_base[];
-
#define at91_ramc_read(id, field) \
__raw_readl(at91_ramc_base[id] + field)
--
2.9.3
^ permalink raw reply related
* ARM juno R2 board USB Issue (EHCI probe failed)
From: Sudeep Holla @ 2016-09-27 9:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AT5PR84MB00524ACD87B9FF61AAB55223D9CC0@AT5PR84MB0052.NAMPRD84.PROD.OUTLOOK.COM>
On 27/09/16 09:55, Sajjan, Vikas C wrote:
> Hi Sudeep,
>
> -----Original Message-----
> From: Sudeep Holla [mailto:sudeep.holla at arm.com]
> Sent: Tuesday, September 27, 2016 2:21 PM
> To: Vikas Sajjan <sajjan.linux@gmail.com>; linux-usb at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-acpi at vger.kernel.org
> Cc: Sudeep Holla <sudeep.holla@arm.com>; mark.rutland at arm.com; lorenzo.pieralisi at arm.com; Sajjan, Vikas C <vikas.cha.sajjan@hpe.com>
> Subject: Re: ARM juno R2 board USB Issue (EHCI probe failed)
>
> Hi Vikas,
>
> On 27/09/16 09:14, Vikas Sajjan wrote:
>> Adding USB mailing list.
>>
>>
>> On Tue, Sep 27, 2016 at 12:33 PM, Sajjan, Vikas C
>> <vikas.cha.sajjan@hpe.com> wrote:
>>> Hi All,
>>>
>>> I working on ARM juno R2 board, with latest kernel 4.8.rc7 and I get
>>> below USB EHCI probe error while booting with acpi=force.
>>>
>
> Are you using the latest UEFI EDK2 ?
> No, I am still using the UEFI binary which came as part of the Juno board.
>
>
>>> [ 1.223662] VFIO - User Level meta-driver version: 0.3
>>> [ 1.229335] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>>> [ 1.235882] ehci-pci: EHCI PCI platform driver
>>> [ 1.240359] ehci-platform: EHCI generic platform driver
>>> [ 1.245619] ehci-platform ARMH0D20:00: Error: DMA mask configuration failed
>>> [ 1.272491] ehci-platform: probe of ARMH0D20:00 failed with error -5
>>> [ 1.278876] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>>> [ 1.285071] ohci-pci: OHCI PCI platform driver
>>> [ 1.289548] ohci-platform: OHCI generic platform driver
>>> [ 1.294884] usbcore: registered new interface driver usb-storage
>>> [ 1.301231] mousedev: PS/2 mouse device common for all mice
>>> [ 1.307197] rtc-efi rtc-efi: rtc core: registered rtc-efi as rtc0
>>>
>>> But this error goes off, if I don't force ACPI booting, i.e., if I
>>> remove acpi=force from kernel command line , USB is detected and my
>>> RFS which is in the usb drive, gets mounted successfully.
>>>
>
> As I mentioned in private, I do get the same error if I drop _CCA in
> USB object of ACPI DSDT. Can you give it a spin with latest UEFI ?
>
> Sure, will try with latest UEFI.
>
I bet that's 8-12 months old. It puts the banner during boot with the
build date. You can try to follow [1] or access it from [2]
--
Regards,
Sudeep
[1] https://community.arm.com/docs/DOC-11395
[2]
http://snapshots.linaro.org/member-builds/armlt-platforms-release/32/juno-uefi.zip
^ permalink raw reply
* ARM juno R2 board USB Issue (EHCI probe failed)
From: Sajjan, Vikas C @ 2016-09-27 8:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <22e151c5-fc83-a48c-b130-f633fac8674f@arm.com>
Hi Sudeep,
-----Original Message-----
From: Sudeep Holla [mailto:sudeep.holla at arm.com]
Sent: Tuesday, September 27, 2016 2:21 PM
To: Vikas Sajjan <sajjan.linux@gmail.com>; linux-usb at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-acpi at vger.kernel.org
Cc: Sudeep Holla <sudeep.holla@arm.com>; mark.rutland at arm.com; lorenzo.pieralisi at arm.com; Sajjan, Vikas C <vikas.cha.sajjan@hpe.com>
Subject: Re: ARM juno R2 board USB Issue (EHCI probe failed)
Hi Vikas,
On 27/09/16 09:14, Vikas Sajjan wrote:
> Adding USB mailing list.
>
>
> On Tue, Sep 27, 2016 at 12:33 PM, Sajjan, Vikas C
> <vikas.cha.sajjan@hpe.com> wrote:
>> Hi All,
>>
>> I working on ARM juno R2 board, with latest kernel 4.8.rc7 and I get
>> below USB EHCI probe error while booting with acpi=force.
>>
Are you using the latest UEFI EDK2 ?
No, I am still using the UEFI binary which came as part of the Juno board.
>> [ 1.223662] VFIO - User Level meta-driver version: 0.3
>> [ 1.229335] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>> [ 1.235882] ehci-pci: EHCI PCI platform driver
>> [ 1.240359] ehci-platform: EHCI generic platform driver
>> [ 1.245619] ehci-platform ARMH0D20:00: Error: DMA mask configuration failed
>> [ 1.272491] ehci-platform: probe of ARMH0D20:00 failed with error -5
>> [ 1.278876] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>> [ 1.285071] ohci-pci: OHCI PCI platform driver
>> [ 1.289548] ohci-platform: OHCI generic platform driver
>> [ 1.294884] usbcore: registered new interface driver usb-storage
>> [ 1.301231] mousedev: PS/2 mouse device common for all mice
>> [ 1.307197] rtc-efi rtc-efi: rtc core: registered rtc-efi as rtc0
>>
>> But this error goes off, if I don't force ACPI booting, i.e., if I
>> remove acpi=force from kernel command line , USB is detected and my
>> RFS which is in the usb drive, gets mounted successfully.
>>
As I mentioned in private, I do get the same error if I drop _CCA in USB object of ACPI DSDT. Can you give it a spin with latest UEFI ?
Sure, will try with latest UEFI.
Thanks and Regards
Vikas Sajjan
--
Regards,
Sudeep
^ permalink raw reply
* ARM juno R2 board USB Issue (EHCI probe failed)
From: Sudeep Holla @ 2016-09-27 8:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGm_ybhc4DKYkDtE8dVzhC3-kJk138Lbm-zAhepQiyUnuqZQHg@mail.gmail.com>
Hi Vikas,
On 27/09/16 09:14, Vikas Sajjan wrote:
> Adding USB mailing list.
>
>
> On Tue, Sep 27, 2016 at 12:33 PM, Sajjan, Vikas C
> <vikas.cha.sajjan@hpe.com> wrote:
>> Hi All,
>>
>> I working on ARM juno R2 board, with latest kernel 4.8.rc7 and I get below
>> USB EHCI probe error while booting with acpi=force.
>>
Are you using the latest UEFI EDK2 ?
>> [ 1.223662] VFIO - User Level meta-driver version: 0.3
>> [ 1.229335] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>> [ 1.235882] ehci-pci: EHCI PCI platform driver
>> [ 1.240359] ehci-platform: EHCI generic platform driver
>> [ 1.245619] ehci-platform ARMH0D20:00: Error: DMA mask configuration failed
>> [ 1.272491] ehci-platform: probe of ARMH0D20:00 failed with error -5
>> [ 1.278876] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>> [ 1.285071] ohci-pci: OHCI PCI platform driver
>> [ 1.289548] ohci-platform: OHCI generic platform driver
>> [ 1.294884] usbcore: registered new interface driver usb-storage
>> [ 1.301231] mousedev: PS/2 mouse device common for all mice
>> [ 1.307197] rtc-efi rtc-efi: rtc core: registered rtc-efi as rtc0
>>
>> But this error goes off, if I don't force ACPI booting, i.e., if I remove
>> acpi=force from kernel command line , USB is detected and my RFS which is
>> in the usb drive, gets mounted successfully.
>>
As I mentioned in private, I do get the same error if I drop _CCA in
USB object of ACPI DSDT. Can you give it a spin with latest UEFI ?
--
Regards,
Sudeep
^ permalink raw reply
* [PATCH v2 4/4] PM / AVS: rockchip-cpu-avs: add driver handling Rockchip cpu avs
From: Finley Xiao @ 2016-09-27 8:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20776501.pZ2NDOzLK3@phil>
? 2016/9/26 16:05, Heiko Stuebner ??:
> Am Montag, 26. September 2016, 09:25:11 CEST schrieb Viresh Kumar:
>> On 12-09-16, 14:55, Stephen Boyd wrote:
>>> On 08/29, Viresh Kumar wrote:
>>>> On 18-08-16, 16:52, Finlye Xiao wrote:
>>>>> +static int rockchip_adjust_opp_table(struct device *cpu_dev,
>>>>> + struct cpufreq_frequency_table *table,
>>>>> + int volt)
>>>>> +{
>>>>> + struct opp_table *opp_table;
>>>>> + struct cpufreq_frequency_table *pos;
>>>>> + struct dev_pm_opp *opp;
>>>>> +
>>>>> + if (!volt)
>>>>> + return 0;
>>>>> +
>>>>> + rcu_read_lock();
>>>>> +
>>>>> + opp_table = _find_opp_table(cpu_dev);
>>>>> + if (IS_ERR(opp_table)) {
>>>>> + rcu_read_unlock();
>>>>> + return PTR_ERR(opp_table);
>>>>> + }
>>>>> +
>>>>> + cpufreq_for_each_valid_entry(pos, table) {
>>>>> + opp = dev_pm_opp_find_freq_exact(cpu_dev, pos->frequency * 1000,
>>>>> + true);
>>>>> + if (IS_ERR(opp))
>>>>> + continue;
>>>>> +
>>>>> + opp->u_volt += volt;
>>>>> + opp->u_volt_min += volt;
>>>>> + opp->u_volt_max += volt;
>>>>> + }
>>>>> +
>>>>> + rcu_read_unlock();
>>>>> +
>>>>> + return 0;
>>>>> +}
>>>> I wouldn't prefer altering the opp tables from individual drivers at
>>>> all. At the least, it should be done via some helpers exposed by the
>>>> core.
>>>>
>>>> But before that I would like to hear from Stephen a bit as I recall he
>>>> was also working on something similar.
>>> I had a patch to modify the voltage at runtime for the "current"
>>> OPP. Now that we have regulator and clk control inside OPP that
>>> became a little easier to do without having to do some notifier
>>> from the OPP layer to the consumers. I haven't had time to revive
>>> those patches though. Should we do that?
>> Perhaps yes, we should have a common place for doing all that.
>>
>>> Does this need to modify
>>> anything besides the OPP the device is currently running at?
>> Finlye, can you please answer this ?
> If I understand it correctly, depending on the leakage value stored in an
> efuse, all opp voltages are reduced by a certain value. Right now the driver
> does it in one go for the full opp table, but of course could also do it for
> each new opp individually before it gets set.
>
Yes? it is necessary to modify all opp voltages and I agreed with Heiko.
>
--
Finley
^ permalink raw reply
* [PATCH] simplefb: Disable and release clocks and regulators in destroy callback
From: Tomi Valkeinen @ 2016-09-27 8:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20160907090919.27187-1-wens@csie.org>
On 07/09/16 12:09, Chen-Yu Tsai wrote:
> simplefb gets unregister when a proper framebuffer driver comes in and
> kicks it out. However the claimed clocks and regulators stay enabled
> as they are only released in the platform device remove function, which
> in theory would never get called.
>
> Move the clock/regulator cleanup into the framebuffer destroy callback,
> which gets called as part of the framebuffer unregister process.
>
> Note this introduces asymmetry in how the resources are claimed and
> released.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> drivers/video/fbdev/simplefb.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
Thanks, queued for 4.9.
Tomi
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^ permalink raw reply
* ARM juno R2 board USB Issue (EHCI probe failed)
From: Vikas Sajjan @ 2016-09-27 8:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <AT5PR84MB005284C92DEA45ADF67A4F55D9CC0@AT5PR84MB0052.NAMPRD84.PROD.OUTLOOK.COM>
Adding USB mailing list.
On Tue, Sep 27, 2016 at 12:33 PM, Sajjan, Vikas C
<vikas.cha.sajjan@hpe.com> wrote:
> Hi All,
>
> I working on ARM juno R2 board, with latest kernel 4.8.rc7 and I get below USB EHCI probe error while booting with acpi=force.
>
> EFI stub: Booting Linux Kernel...
> ConvertPages: Incompatible memory types
> EFI stub: Using DTB from command line
> EFI stub: Exiting boot services and installing virtual address map...
> [ 0.000000] Booting Linux on physical CPU 0x100
> [ 0.000000] Linux version 4.8.0-rc7-00142-gb1f2beb (vikas at dctxvm241) (gcc version 4.8.3 20140401 (prerelease) (crosstool-NG linaro-1.13.1-4.8-2014.04 - Linaro GCC 4.8-2014.04) ) #48 SMP PREEMPT Mon Sep 26 15:31:48 IST 2016
> [ 0.000000] Boot CPU: AArch64 Processor [410fd033]
> [ 0.000000] efi: Getting EFI parameters from FDT:
> [ 0.000000] efi: EFI v2.50 by ARM Juno EFI Oct 15 2015 14:16:39
> [ 0.000000] efi: ACPI=0xfe750000 ACPI 2.0=0xfe750014 PROP=0xfe794370
> [ 0.000000] cma: Reserved 16 MiB at 0x00000000fd400000
> [ 0.000000] ACPI: Early table checksum verification disabled
> [ 0.000000] ACPI: RSDP 0x00000000FE750014 000024 (v02 ARMLTD)
> [ 0.000000] ACPI: XSDT 0x00000000FE7400E8 00003C (v01 ARMLTD ARM-JUNO 20140727 01000013)
> [ 0.000000] ACPI: FACP 0x00000000FE720000 00010C (v05 ARMLTD ARM-JUNO 20140727 ARM 00000099)
> [ 0.000000] ACPI: DSDT 0x00000000FE6F0000 000317 (v01 ARMLTD ARM-JUNO 20140727 INTL 20140214)
> [ 0.000000] ACPI: GTDT 0x00000000FE710000 000060 (v02 ARMLTD ARM-JUNO 20140727 ARM 00000099)
> [ 0.000000] ACPI: APIC 0x00000000FE700000 000224 (v01 ARMLTD ARM-JUNO 20140727 ARM 00000099)
> [ 0.000000] psci: probing for conduit method from ACPI.
> [ 0.000000] psci: PSCIv1.0 detected in firmware.
> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
> [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
> [ 0.000000] percpu: Embedded 21 pages/cpu @ffff80097feb8000 s47488 r8192 d30336 u86016
> [ 0.000000] Detected VIPT I-cache on CPU0
> [ 0.000000] CPU features: enabling workaround for ARM erratum 845719
> [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 2060048
> [ 0.000000] Kernel command line: dtb=board.dtb initrd=ramdisk.img console=ttyAMA0,115200 acpi=force root=/dev/sda1
> [ 0.000000] log_buf_len individual max cpu contribution: 4096 bytes
> [ 0.000000] log_buf_len total cpu_extra contributions: 20480 bytes
> . . . . . . . .
> . . . . . . . .
> . . . . . . . .
> . . . . . . . .
> [ 1.223662] VFIO - User Level meta-driver version: 0.3
> [ 1.229335] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
> [ 1.235882] ehci-pci: EHCI PCI platform driver
> [ 1.240359] ehci-platform: EHCI generic platform driver
> [ 1.245619] ehci-platform ARMH0D20:00: Error: DMA mask configuration failed
> [ 1.272491] ehci-platform: probe of ARMH0D20:00 failed with error -5
> [ 1.278876] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
> [ 1.285071] ohci-pci: OHCI PCI platform driver
> [ 1.289548] ohci-platform: OHCI generic platform driver
> [ 1.294884] usbcore: registered new interface driver usb-storage
> [ 1.301231] mousedev: PS/2 mouse device common for all mice
> [ 1.307197] rtc-efi rtc-efi: rtc core: registered rtc-efi as rtc0
>
> But this error goes off, if I don't force ACPI booting, i.e., if I remove acpi=force from kernel command line , USB is detected and my RFS which is in the usb drive, gets mounted successfully.
>
> Thanks and Regards
> Vikas Sajjan
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v3 2/2] ARM: exynos_defconfig: Remove old non-working MIPI driver
From: Tomi Valkeinen @ 2016-09-27 8:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1474014760-23173-2-git-send-email-k.kozlowski@samsung.com>
On 16/09/16 11:32, Krzysztof Kozlowski wrote:
> The Exynos MIPI driver does not work anymore (it is board file only) so
> it is removed. Remove also config options.
>
> Cc: Inki Dae <inki.dae@samsung.com>
> Cc: Donghwa Lee <dh09.lee@samsung.com>
> Cc: Kyungmin Park <kyungmin.park@samsung.com>
> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>
> ---
>
> This does not really depend on patch #1. The driver is dysfunctional and
> it does not work so defconfig change can be applied separately.
>
> Changes since v2:
> 1. Remove also EXYNOS_MIPI_DSI, pointed out by Tomi Valkeinen.
>
> Changes since v1:
> 1. New patch.
> ---
> arch/arm/configs/exynos_defconfig | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
> index 4e484f406419..c58f6841f8aa 100644
> --- a/arch/arm/configs/exynos_defconfig
> +++ b/arch/arm/configs/exynos_defconfig
> @@ -168,8 +168,6 @@ CONFIG_DRM_PANEL_SAMSUNG_LD9040=y
> CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y
> CONFIG_DRM_NXP_PTN3460=y
> CONFIG_DRM_PARADE_PS8622=y
> -CONFIG_EXYNOS_VIDEO=y
> -CONFIG_EXYNOS_MIPI_DSI=y
> CONFIG_LCD_CLASS_DEVICE=y
> CONFIG_LCD_PLATFORM=y
> CONFIG_BACKLIGHT_PWM=y
>
Thanks, queued these for 4.9.
Tomi
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^ permalink raw reply
* [PATCH 15/19] reset: sti: Remove STiH415/6 reset support
From: Philipp Zabel @ 2016-09-27 8:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473859677-9231-16-git-send-email-peter.griffin@linaro.org>
Hi Peter,
Am Mittwoch, den 14.09.2016, 14:27 +0100 schrieb Peter Griffin:
> Support for STiH415/6 SoCs is being removed from the
> kernel because the platforms are obsolete. This patch removes
> the reset drivers for these SoC's.
>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> Cc: <p.zabel@pengutronix.de>
> ---
> arch/arm/mach-sti/Kconfig | 2 -
> drivers/reset/sti/Kconfig | 8 ---
> drivers/reset/sti/Makefile | 2 -
> drivers/reset/sti/reset-stih415.c | 112 -----------------------------
> drivers/reset/sti/reset-stih416.c | 143 --------------------------------------
> 5 files changed, 267 deletions(-)
> delete mode 100644 drivers/reset/sti/reset-stih415.c
> delete mode 100644 drivers/reset/sti/reset-stih416.c
>
> diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
> index 119e110..f8eeeff 100644
> --- a/arch/arm/mach-sti/Kconfig
> +++ b/arch/arm/mach-sti/Kconfig
> @@ -28,7 +28,6 @@ if ARCH_STI
> config SOC_STIH415
> bool "STiH415 STMicroelectronics Consumer Electronics family"
> default y
> - select STIH415_RESET
> help
> This enables support for STMicroelectronics Digital Consumer
> Electronics family StiH415 parts, primarily targeted at set-top-box
> @@ -38,7 +37,6 @@ config SOC_STIH415
> config SOC_STIH416
> bool "STiH416 STMicroelectronics Consumer Electronics family"
> default y
> - select STIH416_RESET
> help
> This enables support for STMicroelectronics Digital Consumer
> Electronics family StiH416 parts, primarily targeted at set-top-box
> diff --git a/drivers/reset/sti/Kconfig b/drivers/reset/sti/Kconfig
> index 6131785..71592b5 100644
> --- a/drivers/reset/sti/Kconfig
> +++ b/drivers/reset/sti/Kconfig
> @@ -3,14 +3,6 @@ if ARCH_STI
> config STI_RESET_SYSCFG
> bool
>
> -config STIH415_RESET
> - bool
> - select STI_RESET_SYSCFG
> -
> -config STIH416_RESET
> - bool
> - select STI_RESET_SYSCFG
> -
> config STIH407_RESET
> bool
> select STI_RESET_SYSCFG
> diff --git a/drivers/reset/sti/Makefile b/drivers/reset/sti/Makefile
> index dc85dfb..f9d8241 100644
> --- a/drivers/reset/sti/Makefile
> +++ b/drivers/reset/sti/Makefile
> @@ -1,5 +1,3 @@
> obj-$(CONFIG_STI_RESET_SYSCFG) += reset-syscfg.o
>
> -obj-$(CONFIG_STIH415_RESET) += reset-stih415.o
> -obj-$(CONFIG_STIH416_RESET) += reset-stih416.o
> obj-$(CONFIG_STIH407_RESET) += reset-stih407.o
> diff --git a/drivers/reset/sti/reset-stih415.c b/drivers/reset/sti/reset-stih415.c
> deleted file mode 100644
> index 6f220cd..0000000
> --- a/drivers/reset/sti/reset-stih415.c
> +++ /dev/null
> @@ -1,112 +0,0 @@
> -/*
> - * Copyright (C) 2013 STMicroelectronics (R&D) Limited
> - * Author: Stephen Gallimore <stephen.gallimore@st.com>
> - * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - */
> -#include <linux/module.h>
> -#include <linux/of.h>
> -#include <linux/of_platform.h>
> -#include <linux/platform_device.h>
> -
> -#include <dt-bindings/reset/stih415-resets.h>
> -
> -#include "reset-syscfg.h"
> -
> -/*
> - * STiH415 Peripheral powerdown definitions.
> - */
> -static const char stih415_front[] = "st,stih415-front-syscfg";
> -static const char stih415_rear[] = "st,stih415-rear-syscfg";
> -static const char stih415_sbc[] = "st,stih415-sbc-syscfg";
> -static const char stih415_lpm[] = "st,stih415-lpm-syscfg";
> -
> -#define STIH415_PDN_FRONT(_bit) \
> - _SYSCFG_RST_CH(stih415_front, SYSCFG_114, _bit, SYSSTAT_187, _bit)
> -
> -#define STIH415_PDN_REAR(_cntl, _stat) \
> - _SYSCFG_RST_CH(stih415_rear, SYSCFG_336, _cntl, SYSSTAT_384, _stat)
> -
> -#define STIH415_SRST_REAR(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih415_rear, _reg, _bit)
> -
> -#define STIH415_SRST_SBC(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih415_sbc, _reg, _bit)
> -
> -#define STIH415_SRST_FRONT(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih415_front, _reg, _bit)
> -
> -#define STIH415_SRST_LPM(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih415_lpm, _reg, _bit)
> -
> -#define SYSCFG_114 0x38 /* Powerdown request EMI/NAND/Keyscan */
> -#define SYSSTAT_187 0x15c /* Powerdown status EMI/NAND/Keyscan */
> -
> -#define SYSCFG_336 0x90 /* Powerdown request USB/SATA/PCIe */
> -#define SYSSTAT_384 0x150 /* Powerdown status USB/SATA/PCIe */
> -
> -#define SYSCFG_376 0x130 /* Reset generator 0 control 0 */
> -#define SYSCFG_166 0x108 /* Softreset Ethernet 0 */
> -#define SYSCFG_31 0x7c /* Softreset Ethernet 1 */
> -#define LPM_SYSCFG_1 0x4 /* Softreset IRB */
> -
> -static const struct syscfg_reset_channel_data stih415_powerdowns[] = {
> - [STIH415_EMISS_POWERDOWN] = STIH415_PDN_FRONT(0),
> - [STIH415_NAND_POWERDOWN] = STIH415_PDN_FRONT(1),
> - [STIH415_KEYSCAN_POWERDOWN] = STIH415_PDN_FRONT(2),
> - [STIH415_USB0_POWERDOWN] = STIH415_PDN_REAR(0, 0),
> - [STIH415_USB1_POWERDOWN] = STIH415_PDN_REAR(1, 1),
> - [STIH415_USB2_POWERDOWN] = STIH415_PDN_REAR(2, 2),
> - [STIH415_SATA0_POWERDOWN] = STIH415_PDN_REAR(3, 3),
> - [STIH415_SATA1_POWERDOWN] = STIH415_PDN_REAR(4, 4),
> - [STIH415_PCIE_POWERDOWN] = STIH415_PDN_REAR(5, 8),
> -};
> -
> -static const struct syscfg_reset_channel_data stih415_softresets[] = {
> - [STIH415_ETH0_SOFTRESET] = STIH415_SRST_FRONT(SYSCFG_166, 0),
> - [STIH415_ETH1_SOFTRESET] = STIH415_SRST_SBC(SYSCFG_31, 0),
> - [STIH415_IRB_SOFTRESET] = STIH415_SRST_LPM(LPM_SYSCFG_1, 6),
> - [STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9),
> - [STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10),
> - [STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11),
> - [STIH415_KEYSCAN_SOFTRESET] = STIH415_SRST_LPM(LPM_SYSCFG_1, 8),
> -};
> -
> -static struct syscfg_reset_controller_data stih415_powerdown_controller = {
> - .wait_for_ack = true,
> - .nr_channels = ARRAY_SIZE(stih415_powerdowns),
> - .channels = stih415_powerdowns,
> -};
> -
> -static struct syscfg_reset_controller_data stih415_softreset_controller = {
> - .wait_for_ack = false,
> - .active_low = true,
> - .nr_channels = ARRAY_SIZE(stih415_softresets),
> - .channels = stih415_softresets,
> -};
> -
> -static const struct of_device_id stih415_reset_match[] = {
> - { .compatible = "st,stih415-powerdown",
> - .data = &stih415_powerdown_controller, },
> - { .compatible = "st,stih415-softreset",
> - .data = &stih415_softreset_controller, },
> - {},
> -};
> -
> -static struct platform_driver stih415_reset_driver = {
> - .probe = syscfg_reset_probe,
> - .driver = {
> - .name = "reset-stih415",
> - .of_match_table = stih415_reset_match,
> - },
> -};
> -
> -static int __init stih415_reset_init(void)
> -{
> - return platform_driver_register(&stih415_reset_driver);
> -}
> -arch_initcall(stih415_reset_init);
> diff --git a/drivers/reset/sti/reset-stih416.c b/drivers/reset/sti/reset-stih416.c
> deleted file mode 100644
> index c581d606e..0000000
> --- a/drivers/reset/sti/reset-stih416.c
> +++ /dev/null
> @@ -1,143 +0,0 @@
> -/*
> - * Copyright (C) 2013 STMicroelectronics (R&D) Limited
> - * Author: Stephen Gallimore <stephen.gallimore@st.com>
> - * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - */
> -#include <linux/module.h>
> -#include <linux/of.h>
> -#include <linux/of_platform.h>
> -#include <linux/platform_device.h>
> -
> -#include <dt-bindings/reset/stih416-resets.h>
> -
> -#include "reset-syscfg.h"
> -
> -/*
> - * STiH416 Peripheral powerdown definitions.
> - */
> -static const char stih416_front[] = "st,stih416-front-syscfg";
> -static const char stih416_rear[] = "st,stih416-rear-syscfg";
> -static const char stih416_sbc[] = "st,stih416-sbc-syscfg";
> -static const char stih416_lpm[] = "st,stih416-lpm-syscfg";
> -static const char stih416_cpu[] = "st,stih416-cpu-syscfg";
> -
> -#define STIH416_PDN_FRONT(_bit) \
> - _SYSCFG_RST_CH(stih416_front, SYSCFG_1500, _bit, SYSSTAT_1578, _bit)
> -
> -#define STIH416_PDN_REAR(_cntl, _stat) \
> - _SYSCFG_RST_CH(stih416_rear, SYSCFG_2525, _cntl, SYSSTAT_2583, _stat)
> -
> -#define SYSCFG_1500 0x7d0 /* Powerdown request EMI/NAND/Keyscan */
> -#define SYSSTAT_1578 0x908 /* Powerdown status EMI/NAND/Keyscan */
> -
> -#define SYSCFG_2525 0x834 /* Powerdown request USB/SATA/PCIe */
> -#define SYSSTAT_2583 0x91c /* Powerdown status USB/SATA/PCIe */
> -
> -#define SYSCFG_2552 0x8A0 /* Reset Generator control 0 */
> -#define SYSCFG_1539 0x86c /* Softreset Ethernet 0 */
> -#define SYSCFG_510 0x7f8 /* Softreset Ethernet 1 */
> -#define LPM_SYSCFG_1 0x4 /* Softreset IRB */
> -#define SYSCFG_2553 0x8a4 /* Softreset SATA0/1, PCIE0/1 */
> -#define SYSCFG_7563 0x8cc /* MPE softresets 0 */
> -#define SYSCFG_7564 0x8d0 /* MPE softresets 1 */
> -
> -#define STIH416_SRST_CPU(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih416_cpu, _reg, _bit)
> -
> -#define STIH416_SRST_FRONT(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih416_front, _reg, _bit)
> -
> -#define STIH416_SRST_REAR(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih416_rear, _reg, _bit)
> -
> -#define STIH416_SRST_LPM(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih416_lpm, _reg, _bit)
> -
> -#define STIH416_SRST_SBC(_reg, _bit) \
> - _SYSCFG_RST_CH_NO_ACK(stih416_sbc, _reg, _bit)
> -
> -static const struct syscfg_reset_channel_data stih416_powerdowns[] = {
> - [STIH416_EMISS_POWERDOWN] = STIH416_PDN_FRONT(0),
> - [STIH416_NAND_POWERDOWN] = STIH416_PDN_FRONT(1),
> - [STIH416_KEYSCAN_POWERDOWN] = STIH416_PDN_FRONT(2),
> - [STIH416_USB0_POWERDOWN] = STIH416_PDN_REAR(0, 0),
> - [STIH416_USB1_POWERDOWN] = STIH416_PDN_REAR(1, 1),
> - [STIH416_USB2_POWERDOWN] = STIH416_PDN_REAR(2, 2),
> - [STIH416_USB3_POWERDOWN] = STIH416_PDN_REAR(6, 5),
> - [STIH416_SATA0_POWERDOWN] = STIH416_PDN_REAR(3, 3),
> - [STIH416_SATA1_POWERDOWN] = STIH416_PDN_REAR(4, 4),
> - [STIH416_PCIE0_POWERDOWN] = STIH416_PDN_REAR(7, 9),
> - [STIH416_PCIE1_POWERDOWN] = STIH416_PDN_REAR(5, 8),
> -};
> -
> -static const struct syscfg_reset_channel_data stih416_softresets[] = {
> - [STIH416_ETH0_SOFTRESET] = STIH416_SRST_FRONT(SYSCFG_1539, 0),
> - [STIH416_ETH1_SOFTRESET] = STIH416_SRST_SBC(SYSCFG_510, 0),
> - [STIH416_IRB_SOFTRESET] = STIH416_SRST_LPM(LPM_SYSCFG_1, 6),
> - [STIH416_USB0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 9),
> - [STIH416_USB1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 10),
> - [STIH416_USB2_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 11),
> - [STIH416_USB3_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 28),
> - [STIH416_SATA0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 7),
> - [STIH416_SATA1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 3),
> - [STIH416_PCIE0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 15),
> - [STIH416_PCIE1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 2),
> - [STIH416_AUD_DAC_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 14),
> - [STIH416_HDTVOUT_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 5),
> - [STIH416_VTAC_M_RX_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 25),
> - [STIH416_VTAC_A_RX_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 26),
> - [STIH416_SYNC_HD_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 5),
> - [STIH416_SYNC_SD_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 6),
> - [STIH416_BLITTER_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 10),
> - [STIH416_GPU_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 11),
> - [STIH416_VTAC_M_TX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 18),
> - [STIH416_VTAC_A_TX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 19),
> - [STIH416_VTG_AUX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 21),
> - [STIH416_JPEG_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 23),
> - [STIH416_HVA_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 2),
> - [STIH416_COMPO_M_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 3),
> - [STIH416_COMPO_A_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 4),
> - [STIH416_VP8_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 10),
> - [STIH416_VTG_MAIN_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 16),
> - [STIH416_KEYSCAN_SOFTRESET] = STIH416_SRST_LPM(LPM_SYSCFG_1, 8),
> -};
> -
> -static struct syscfg_reset_controller_data stih416_powerdown_controller = {
> - .wait_for_ack = true,
> - .nr_channels = ARRAY_SIZE(stih416_powerdowns),
> - .channels = stih416_powerdowns,
> -};
> -
> -static struct syscfg_reset_controller_data stih416_softreset_controller = {
> - .wait_for_ack = false,
> - .active_low = true,
> - .nr_channels = ARRAY_SIZE(stih416_softresets),
> - .channels = stih416_softresets,
> -};
> -
> -static const struct of_device_id stih416_reset_match[] = {
> - { .compatible = "st,stih416-powerdown",
> - .data = &stih416_powerdown_controller, },
> - { .compatible = "st,stih416-softreset",
> - .data = &stih416_softreset_controller, },
> - {},
> -};
> -
> -static struct platform_driver stih416_reset_driver = {
> - .probe = syscfg_reset_probe,
> - .driver = {
> - .name = "reset-stih416",
> - .of_match_table = stih416_reset_match,
> - },
> -};
> -
> -static int __init stih416_reset_init(void)
> -{
> - return platform_driver_register(&stih416_reset_driver);
> -}
> -arch_initcall(stih416_reset_init);
Can I pick up patches 15 and 19, or are there dependencies in the
series?
In the latter case,
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
to merge both together with the other patches. Currently there is no
conflict with changes queued from the reset tree.
regards
Philipp
^ permalink raw reply
* [PATCH V2 6/6] arm64: Add uprobe support
From: Pratyush Anand @ 2016-09-27 7:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1474960629.git.panand@redhat.com>
This patch adds support for uprobe on ARM64 architecture.
Unit tests for following have been done so far and they have been found
working
1. Step-able instructions, like sub, ldr, add etc.
2. Simulation-able like ret, cbnz, cbz etc.
3. uretprobe
4. Reject-able instructions like sev, wfe etc.
5. trapped and abort xol path
6. probe at unaligned user address.
7. longjump test cases
Currently it does not support aarch32 instruction probing.
Signed-off-by: Pratyush Anand <panand@redhat.com>
---
arch/arm64/Kconfig | 3 +
arch/arm64/include/asm/cacheflush.h | 1 +
arch/arm64/include/asm/debug-monitors.h | 3 +
arch/arm64/include/asm/ptrace.h | 8 ++
arch/arm64/include/asm/thread_info.h | 5 +-
arch/arm64/include/asm/uprobes.h | 36 ++++++
arch/arm64/kernel/probes/Makefile | 2 +
arch/arm64/kernel/probes/uprobes.c | 221 ++++++++++++++++++++++++++++++++
arch/arm64/kernel/signal.c | 3 +
arch/arm64/mm/flush.c | 2 +-
10 files changed, 282 insertions(+), 2 deletions(-)
create mode 100644 arch/arm64/include/asm/uprobes.h
create mode 100644 arch/arm64/kernel/probes/uprobes.c
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 113326e637f0..2bee1b0b99af 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -236,6 +236,9 @@ config PGTABLE_LEVELS
default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47
default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48
+config ARCH_SUPPORTS_UPROBES
+ def_bool y
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
index 2e5fb976a572..e9f64ecb75ce 100644
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -71,6 +71,7 @@ extern void __flush_dcache_area(void *addr, size_t len);
extern void __clean_dcache_area_poc(void *addr, size_t len);
extern void __clean_dcache_area_pou(void *addr, size_t len);
extern long __flush_cache_user_range(unsigned long start, unsigned long end);
+extern void sync_icache_aliases(void *kaddr, unsigned long len);
static inline void flush_cache_mm(struct mm_struct *mm)
{
diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
index b71420a12f26..a44cf5225429 100644
--- a/arch/arm64/include/asm/debug-monitors.h
+++ b/arch/arm64/include/asm/debug-monitors.h
@@ -68,6 +68,9 @@
#define BRK64_ESR_MASK 0xFFFF
#define BRK64_ESR_KPROBES 0x0004
#define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (BRK64_ESR_KPROBES << 5))
+/* uprobes BRK opcodes with ESR encoding */
+#define BRK64_ESR_UPROBES 0x0005
+#define BRK64_OPCODE_UPROBES (AARCH64_BREAK_MON | (BRK64_ESR_UPROBES << 5))
/* AArch32 */
#define DBG_ESR_EVT_BKPT 0x4
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index ada08b5b036d..513daf050e84 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -217,6 +217,14 @@ int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task);
#include <asm-generic/ptrace.h>
+#define procedure_link_pointer(regs) ((regs)->regs[30])
+
+static inline void procedure_link_pointer_set(struct pt_regs *regs,
+ unsigned long val)
+{
+ procedure_link_pointer(regs) = val;
+}
+
#undef profile_pc
extern unsigned long profile_pc(struct pt_regs *regs);
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index e9ea5a6bd449..f6859831462e 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -112,6 +112,7 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_NEED_RESCHED 1
#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */
#define TIF_FOREIGN_FPSTATE 3 /* CPU's FP state is not current's */
+#define TIF_UPROBE 4 /* uprobe breakpoint or singlestep */
#define TIF_NOHZ 7
#define TIF_SYSCALL_TRACE 8
#define TIF_SYSCALL_AUDIT 9
@@ -132,10 +133,12 @@ static inline struct thread_info *current_thread_info(void)
#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
#define _TIF_SECCOMP (1 << TIF_SECCOMP)
+#define _TIF_UPROBE (1 << TIF_UPROBE)
#define _TIF_32BIT (1 << TIF_32BIT)
#define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \
- _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE)
+ _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \
+ _TIF_UPROBE)
#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
_TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \
diff --git a/arch/arm64/include/asm/uprobes.h b/arch/arm64/include/asm/uprobes.h
new file mode 100644
index 000000000000..8d004073d0e8
--- /dev/null
+++ b/arch/arm64/include/asm/uprobes.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2014-2016 Pratyush Anand <panand@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _ASM_UPROBES_H
+#define _ASM_UPROBES_H
+
+#include <asm/debug-monitors.h>
+#include <asm/insn.h>
+#include <asm/probes.h>
+
+#define MAX_UINSN_BYTES AARCH64_INSN_SIZE
+
+#define UPROBE_SWBP_INSN BRK64_OPCODE_UPROBES
+#define UPROBE_SWBP_INSN_SIZE AARCH64_INSN_SIZE
+#define UPROBE_XOL_SLOT_BYTES MAX_UINSN_BYTES
+
+typedef u32 uprobe_opcode_t;
+
+struct arch_uprobe_task {
+};
+
+struct arch_uprobe {
+ union {
+ u8 insn[MAX_UINSN_BYTES];
+ u8 ixol[MAX_UINSN_BYTES];
+ };
+ struct arch_probe_insn api;
+ bool simulate;
+};
+
+#endif
diff --git a/arch/arm64/kernel/probes/Makefile b/arch/arm64/kernel/probes/Makefile
index ce06312e3d34..89b6df613dde 100644
--- a/arch/arm64/kernel/probes/Makefile
+++ b/arch/arm64/kernel/probes/Makefile
@@ -1,3 +1,5 @@
obj-$(CONFIG_KPROBES) += kprobes.o decode-insn.o \
kprobes_trampoline.o \
simulate-insn.o
+obj-$(CONFIG_UPROBES) += uprobes.o decode-insn.o \
+ simulate-insn.o
diff --git a/arch/arm64/kernel/probes/uprobes.c b/arch/arm64/kernel/probes/uprobes.c
new file mode 100644
index 000000000000..d30d13040346
--- /dev/null
+++ b/arch/arm64/kernel/probes/uprobes.c
@@ -0,0 +1,221 @@
+/*
+ * Copyright (C) 2014-2016 Pratyush Anand <panand@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/highmem.h>
+#include <linux/ptrace.h>
+#include <linux/uprobes.h>
+#include <asm/cacheflush.h>
+
+#include "decode-insn.h"
+
+#define UPROBE_INV_FAULT_CODE UINT_MAX
+
+bool is_trap_insn(uprobe_opcode_t *insn)
+{
+ return false;
+}
+
+void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
+ void *src, unsigned long len)
+{
+ void *xol_page_kaddr = kmap_atomic(page);
+ void *dst = xol_page_kaddr + (vaddr & ~PAGE_MASK);
+
+ /* Initialize the slot */
+ memcpy(dst, src, len);
+
+ /* flush caches (dcache/icache) */
+ sync_icache_aliases(dst, len);
+
+ kunmap_atomic(xol_page_kaddr);
+}
+
+unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
+{
+ return instruction_pointer(regs);
+}
+
+int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
+ unsigned long addr)
+{
+ probe_opcode_t insn;
+
+ /* TODO: Currently we do not support AARCH32 instruction probing */
+ if (test_bit(TIF_32BIT, &mm->context.flags))
+ return -EINVAL;
+ else if (!IS_ALIGNED(addr, AARCH64_INSN_SIZE))
+ return -EINVAL;
+
+ insn = *(probe_opcode_t *)(&auprobe->insn[0]);
+
+ switch (arm_probe_decode_insn(insn, &auprobe->api)) {
+ case INSN_REJECTED:
+ return -EINVAL;
+
+ case INSN_GOOD_NO_SLOT:
+ auprobe->simulate = true;
+ break;
+
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
+{
+ struct uprobe_task *utask = current->utask;
+
+ /* Initialize with an invalid fault code to detect if ol insn trapped */
+ current->thread.fault_code = UPROBE_INV_FAULT_CODE;
+
+ /* Instruction points to execute ol */
+ instruction_pointer_set(regs, utask->xol_vaddr);
+
+ user_enable_single_step(current);
+
+ return 0;
+}
+
+int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
+{
+ struct uprobe_task *utask = current->utask;
+
+ WARN_ON_ONCE(current->thread.fault_code != UPROBE_INV_FAULT_CODE);
+
+ /* Instruction points to execute next to breakpoint address */
+ instruction_pointer_set(regs, utask->vaddr + 4);
+
+ user_disable_single_step(current);
+
+ return 0;
+}
+bool arch_uprobe_xol_was_trapped(struct task_struct *t)
+{
+ /*
+ * Between arch_uprobe_pre_xol and arch_uprobe_post_xol, if an xol
+ * insn itself is trapped, then detect the case with the help of
+ * invalid fault code which is being set in arch_uprobe_pre_xol
+ */
+ if (t->thread.fault_code != UPROBE_INV_FAULT_CODE)
+ return true;
+
+ return false;
+}
+
+bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
+{
+ probe_opcode_t insn;
+ unsigned long addr;
+
+ if (!auprobe->simulate)
+ return false;
+
+ insn = *(probe_opcode_t *)(&auprobe->insn[0]);
+ addr = instruction_pointer(regs);
+
+ if (auprobe->api.handler)
+ auprobe->api.handler(insn, addr, regs);
+
+ return true;
+}
+
+void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
+{
+ struct uprobe_task *utask = current->utask;
+
+ /*
+ * Task has received a fatal signal, so reset back to probbed
+ * address.
+ */
+ instruction_pointer_set(regs, utask->vaddr);
+
+ user_disable_single_step(current);
+}
+
+bool arch_uretprobe_is_alive(struct return_instance *ret, enum rp_check ctx,
+ struct pt_regs *regs)
+{
+ /*
+ * If a simple branch instruction (B) was called for retprobed
+ * assembly label then return true even when regs->sp and ret->stack
+ * are same. It will ensure that cleanup and reporting of return
+ * instances corresponding to callee label is done when
+ * handle_trampoline for called function is executed.
+ */
+ if (ctx == RP_CHECK_CHAIN_CALL)
+ return regs->sp <= ret->stack;
+ else
+ return regs->sp < ret->stack;
+}
+
+unsigned long
+arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr,
+ struct pt_regs *regs)
+{
+ unsigned long orig_ret_vaddr;
+
+ orig_ret_vaddr = procedure_link_pointer(regs);
+ /* Replace the return addr with trampoline addr */
+ procedure_link_pointer_set(regs, trampoline_vaddr);
+
+ return orig_ret_vaddr;
+}
+
+int arch_uprobe_exception_notify(struct notifier_block *self,
+ unsigned long val, void *data)
+{
+ return NOTIFY_DONE;
+}
+
+static int uprobe_breakpoint_handler(struct pt_regs *regs,
+ unsigned int esr)
+{
+ if (user_mode(regs) && uprobe_pre_sstep_notifier(regs))
+ return DBG_HOOK_HANDLED;
+
+ return DBG_HOOK_ERROR;
+}
+
+static int uprobe_single_step_handler(struct pt_regs *regs,
+ unsigned int esr)
+{
+ struct uprobe_task *utask = current->utask;
+
+ if (user_mode(regs)) {
+ WARN_ON(utask &&
+ (instruction_pointer(regs) != utask->xol_vaddr + 4));
+
+ if (uprobe_post_sstep_notifier(regs))
+ return DBG_HOOK_HANDLED;
+ }
+
+ return DBG_HOOK_ERROR;
+}
+
+/* uprobe breakpoint handler hook */
+static struct break_hook uprobes_break_hook = {
+ .esr_mask = BRK64_ESR_MASK,
+ .esr_val = BRK64_ESR_UPROBES,
+ .fn = uprobe_breakpoint_handler,
+};
+
+/* uprobe single step handler hook */
+static struct step_hook uprobes_step_hook = {
+ .fn = uprobe_single_step_handler,
+};
+
+static int __init arch_init_uprobes(void)
+{
+ register_break_hook(&uprobes_break_hook);
+ register_step_hook(&uprobes_step_hook);
+
+ return 0;
+}
+
+device_initcall(arch_init_uprobes);
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index 404dd67080b9..c7b6de62f9d3 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -414,6 +414,9 @@ asmlinkage void do_notify_resume(struct pt_regs *regs,
} else {
local_irq_enable();
+ if (thread_flags & _TIF_UPROBE)
+ uprobe_notify_resume(regs);
+
if (thread_flags & _TIF_SIGPENDING)
do_signal(regs);
diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
index 8377329d8c97..2d78d5a9b89f 100644
--- a/arch/arm64/mm/flush.c
+++ b/arch/arm64/mm/flush.c
@@ -32,7 +32,7 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
__flush_icache_all();
}
-static void sync_icache_aliases(void *kaddr, unsigned long len)
+void sync_icache_aliases(void *kaddr, unsigned long len)
{
unsigned long addr = (unsigned long)kaddr;
--
2.7.4
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