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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Jie Luo <jie.luo@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Luo Jie <quic_luoj@quicinc.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	quic_kkumarcs@quicinc.com, quic_linchen@quicinc.com,
	quic_leiwei@quicinc.com, quic_pavir@quicinc.com,
	quic_suruchia@quicinc.com
Subject: Re: [PATCH 1/5] clk: qcom: cmnpll: Account for reference clock divider
Date: Thu, 4 Dec 2025 11:16:57 +0100	[thread overview]
Message-ID: <9f8eda70-e077-4925-bc80-f95e35464f87@oss.qualcomm.com> (raw)
In-Reply-To: <5a982965-4964-4f50-87b6-e3b8a1182876@oss.qualcomm.com>

On 12/4/25 8:44 AM, Jie Luo wrote:
> 
> 
> On 12/1/2025 9:42 PM, Konrad Dybcio wrote:
>> On 11/28/25 3:29 PM, Jie Luo wrote:
>>>
>>>
>>> On 11/28/2025 7:38 PM, Konrad Dybcio wrote:
>>>> On 11/28/25 9:40 AM, Luo Jie wrote:
>>>>> The clk_cmn_pll_recalc_rate() function must account for the reference clock
>>>>> divider programmed in CMN_PLL_REFCLK_CONFIG. Without this fix, platforms
>>>>> with a reference divider other than 1 calculate incorrect CMN PLL rates.
>>>>> For example, on IPQ5332 where the reference divider is 2, the computed rate
>>>>> becomes twice the actual output.
>>>>>
>>>>> Read CMN_PLL_REFCLK_DIV and divide the parent rate by this value before
>>>>> applying the 2 * FACTOR scaling. This yields the correct rate calculation:
>>>>> rate = (parent_rate / ref_div) * 2 * factor.
>>>>>
>>>>> Maintain backward compatibility with earlier platforms (e.g. IPQ9574,
>>>>> IPQ5424, IPQ5018) that use ref_div = 1.
>>>>
>>>> I'm not sure how to interpret this. Is the value fixed on these platforms
>>>> you mentioned, and always shows up as 0?
>>>>
>>>> Konrad
>>>
>>> On these platforms the hardware ref_div register comes up with a value
>>> of 1 by default. It is, however, still a programmable field and not
>>> strictly fixed to 1.
>>>
>>> The ref_div == 0 check in this patch is only meant as a safety net to
>>> avoid a divide‑by‑zero in the rate calculation.
>>
>> I think some sort of a warning/bugsplat would be good to have here,
>> however I see that clk-rcg2.c : clk_gfx3d_determine_rate() apparently
>> also silently fixes up a div0..
>>
>> Konrad
> 
> I agree it would be better to at least flag this as an invalid
> configuration. I can update the code to emit a warning (e.g. WARN_ON
> (!ref_div) while still clamping ref_div to a sane value to avoid
> crashing in production. That way we preserve the safety net but also
> get some visibility if this ever happens.

if (WARN_ON(div == 0))

sounds good!

Konrad

  reply	other threads:[~2025-12-04 10:17 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-28  8:40 [PATCH 0/5] Add CMN PLL clock controller support for IPQ5332 Luo Jie
2025-11-28  8:40 ` [PATCH 1/5] clk: qcom: cmnpll: Account for reference clock divider Luo Jie
2025-11-28 11:38   ` Konrad Dybcio
2025-11-28 14:29     ` Jie Luo
2025-12-01 13:42       ` Konrad Dybcio
2025-12-04  7:44         ` Jie Luo
2025-12-04 10:16           ` Konrad Dybcio [this message]
2025-11-28  8:40 ` [PATCH 2/5] dt-bindings: clock: qcom: Add CMN PLL support for IPQ5332 SoC Luo Jie
2025-11-28  9:18   ` Rob Herring (Arm)
2025-11-28  9:39   ` Krzysztof Kozlowski
2025-11-28  8:40 ` [PATCH 3/5] clk: qcom: cmnpll: Add IPQ5332 SoC support Luo Jie
2025-12-01 13:52   ` Konrad Dybcio
2025-12-04  8:09     ` Jie Luo
2025-12-04 13:48       ` Konrad Dybcio
2025-12-05 12:11         ` Jie Luo
2025-11-28  8:40 ` [PATCH 4/5] arm64: dts: ipq5332: Add CMN PLL node for networking hardware Luo Jie
2025-12-01 13:52   ` Konrad Dybcio
2025-12-04  7:46     ` Jie Luo
2025-11-28  8:40 ` [PATCH 5/5] arm64: dts: qcom: Represent xo_board as fixed-factor clock on IPQ5332 Luo Jie
2025-12-01 13:53   ` Konrad Dybcio

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