Linux clock framework development
 help / color / mirror / Atom feed
From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: Rex-BC Chen <rex-bc.chen@mediatek.com>,
	mturquette@baylibre.com, sboyd@kernel.org
Cc: matthias.bgg@gmail.com, p.zabel@pengutronix.de,
	chun-jie.chen@mediatek.com, wenst@chromium.org,
	runyang.chen@mediatek.com, linux-kernel@vger.kernel.org,
	allen-kh.cheng@mediatek.com, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH V2 08/12] clk: mediatek: reset: Add new register reset function with device
Date: Thu, 21 Apr 2022 11:07:44 +0200	[thread overview]
Message-ID: <bff10500-4b63-9553-2ce0-3e46eb261d7a@collabora.com> (raw)
In-Reply-To: <20220420130527.23200-9-rex-bc.chen@mediatek.com>

Il 20/04/22 15:05, Rex-BC Chen ha scritto:
> Some clock drvier only support device_node, so we still remain
> register reset function with device_node and add a function to
> register reset controller with device.
> 
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
>   drivers/clk/mediatek/clk-mt2701-eth.c |  2 +-
>   drivers/clk/mediatek/clk-mt2701-g3d.c |  2 +-
>   drivers/clk/mediatek/clk-mt2701-hif.c |  2 +-
>   drivers/clk/mediatek/clk-mt2701.c     |  4 +--
>   drivers/clk/mediatek/clk-mt2712.c     |  4 +--
>   drivers/clk/mediatek/clk-mt7622-eth.c |  2 +-
>   drivers/clk/mediatek/clk-mt7622-hif.c |  4 +--
>   drivers/clk/mediatek/clk-mt7622.c     |  4 +--
>   drivers/clk/mediatek/clk-mt7629-eth.c |  2 +-
>   drivers/clk/mediatek/clk-mt7629-hif.c |  4 +--
>   drivers/clk/mediatek/clk-mt8183.c     |  2 +-
>   drivers/clk/mediatek/reset.c          | 43 +++++++++++++++++++++++++++
>   drivers/clk/mediatek/reset.h          |  2 ++
>   13 files changed, 61 insertions(+), 16 deletions(-)
> 


..snip..

> diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c
> index b164b1da7dd3..1173111af3ab 100644
> --- a/drivers/clk/mediatek/reset.c
> +++ b/drivers/clk/mediatek/reset.c
> @@ -107,4 +107,47 @@ int mtk_clk_register_rst_ctrl(struct device_node *np,
>   	return ret;
>   }
>   
> +int mtk_clk_register_rst_ctrl_with_dev(struct device *dev,
> +				       const struct mtk_clk_rst_desc *desc)
> +{
> +	struct device_node *np = dev->of_node;
> +	struct regmap *regmap;
> +	struct mtk_clk_rst_data *data;
> +	int ret;
> +
> +	if (!desc) {
> +		dev_err(dev, "mtk clock reset desc is NULL\n");
> +		return -EINVAL;
> +	}
> +
> +	if (desc->version >= MTK_RST_MAX) {
> +		dev_err(dev, "Error version number: %d\n", desc->version);
> +		return -EINVAL;
> +	}
> +
> +	regmap = device_node_to_regmap(np);
> +	if (IS_ERR(regmap)) {
> +		dev_err(dev, "Cannot find regmap %pe\n", regmap);
> +		return -EINVAL;
> +	}
> +
> +	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> +	if (!data)
> +		return -ENOMEM;
> +
> +	data->desc = desc;
> +	data->regmap = regmap;
> +	data->rcdev.owner = THIS_MODULE;
> +	data->rcdev.nr_resets = desc->reg_num * 32;
> +	data->rcdev.ops = rst_op[desc->version];
> +	data->rcdev.of_node = np;
> +	data->rcdev.dev = dev;
> +
> +	ret = devm_reset_controller_register(dev, &data->rcdev);
> +	if (ret)
> +		dev_err(dev, "could not register reset controller: %d\n", ret);

	if (ret) {
		dev_err(dev, "could not register reset controller: %d\n", ret);
		return ret;
	}

	return 0;

> +
> +	return ret;
> +}
> +
>   MODULE_LICENSE("GPL");

  reply	other threads:[~2022-04-21  9:07 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-20 13:05 [PATCH V2 00/12] Cleanup MediaTek clk reset drivers and support MT8192/MT8195 Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 01/12] clk: mediatek: reset: Fix written reset bit offset Rex-BC Chen
2022-04-21  9:08   ` AngeloGioacchino Del Regno
2022-04-20 13:05 ` [PATCH V2 02/12] clk: mediatek: reset: Use simple reset operations Rex-BC Chen
2022-04-21  7:52   ` Chen-Yu Tsai
2022-04-22  3:58     ` Rex-BC Chen
2022-04-21  9:08   ` AngeloGioacchino Del Regno
2022-04-22  4:57     ` Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 03/12] clk: mediatek: reset: Refine functions of set_clr Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno
2022-04-22  5:00     ` Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 04/12] clk: mediatek: reset: Merge and revise reset register function Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno
2022-04-22  5:01     ` Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 05/12] clk: mediatek: reset: Add reset.h Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno
2022-04-21  9:14     ` Chen-Yu Tsai
2022-04-21  9:41       ` Chen-Yu Tsai
2022-04-22  5:02     ` Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 06/12] clk: mediatek: reset: Revise structure to control reset register Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno
2022-04-22  5:04     ` Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 07/12] clk: mediatek: reset: Add return for clock reset register function Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno
2022-04-22  5:04     ` Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 08/12] clk: mediatek: reset: Add new register reset function with device Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno [this message]
2022-04-22  5:05     ` Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 09/12] clk: mediatek: reset: Add support for input offset and bit from DT Rex-BC Chen
2022-04-21  5:36   ` Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno
2022-04-22  5:06     ` Rex-BC Chen
2022-04-20 13:05 ` [PATCH V2 10/12] clk: mediatek: reset: Add reset support for simple probe Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno
2022-04-20 13:05 ` [PATCH V2 11/12] clk: mediatek: reset: Add infra_ao reset support for MT8192 Rex-BC Chen
2022-04-21  6:53   ` Chen-Yu Tsai
2022-04-22  4:00     ` Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno
2022-04-20 13:05 ` [PATCH V2 12/12] clk: mediatek: reset: Add infra_ao reset support for MT8195 Rex-BC Chen
2022-04-21  9:07   ` AngeloGioacchino Del Regno

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=bff10500-4b63-9553-2ce0-3e46eb261d7a@collabora.com \
    --to=angelogioacchino.delregno@collabora.com \
    --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
    --cc=allen-kh.cheng@mediatek.com \
    --cc=chun-jie.chen@mediatek.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=mturquette@baylibre.com \
    --cc=p.zabel@pengutronix.de \
    --cc=rex-bc.chen@mediatek.com \
    --cc=runyang.chen@mediatek.com \
    --cc=sboyd@kernel.org \
    --cc=wenst@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox