Re: [PATCH v5 14/14] cxl/mem: Add debugfs output for QTG related data

[Dave Jiang <dave.jiang@intel.com>]

On 5/12/23 8:36 AM, Jonathan Cameron wrote:
> On Mon, 08 May 2023 13:48:16 -0700
> Dave Jiang <dave.jiang@intel.com> wrote:
> 
>> Add debugfs output to /sys/kernel/debug/cxl/memX/qtgmap
>> The debugfs attribute will dump out all the DSMAS ranges and the associated
>> QTG ID exported by the CXL device CDAT.
>>
>> Suggested-by: Dan Williams <dan.j.williams@intel.com>
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> 
> LTGM, though seems we haven't been keeping up with ABI docs for other
> stuff in debugfs. That wants fixing but is unrelated to this.
> 
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
>>
>> ---
>> v4:
>> - Use cxlds->qos_list instead of the stray cxlmd->qos_list
>> ---
>>   Documentation/ABI/testing/debugfs-cxl |   11 +++++++++++
>>   MAINTAINERS                           |    1 +
>>   drivers/cxl/mem.c                     |   17 +++++++++++++++++
>>   3 files changed, 29 insertions(+)
>>   create mode 100644 Documentation/ABI/testing/debugfs-cxl
>>
>> diff --git a/Documentation/ABI/testing/debugfs-cxl b/Documentation/ABI/testing/debugfs-cxl
>> new file mode 100644
>> index 000000000000..0f36eeb7e59b
>> --- /dev/null
>> +++ b/Documentation/ABI/testing/debugfs-cxl
>> @@ -0,0 +1,11 @@
>> +What:		/sys/kernel/debug/cxl/memX/qtg_map
>> +Date:		Mar, 2023
>> +KernelVersion:	v6.4
>> +Contact:	linux-cxl@vger.kernel.org
>> +Description:
>> +		(RO) Entries of all Device Physical Address (DPA) ranges
>> +		provided by the device Coherent Device Attributes Table (CDAT)
>> +		Device Scoped Memory Affinity Structure (DSMAS) entries with
>> +		the matching QoS Throttling Group (QTG) id calculated from the
>> +		latency and bandwidth of the CXL path from the memory device
>> +		to the CPU.
> 
> Curious. This file should already exist as there is clearly more debugfs ABI
> from the code below.  Perhaps a precursor patch to create the file and document
> existing interfaces?

Looks like Alison got it into 6.4-rc1.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=50d527f52cbf0680c87d11a254383ca730c5c19f

I just need to wait for cxl/next to rebase to 6.4-rc so I can rebase the 
series.

> 
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index fd8c4c560f8d..256e4e57017c 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -5171,6 +5171,7 @@ M:	Ben Widawsky <bwidawsk@kernel.org>
>>   M:	Dan Williams <dan.j.williams@intel.com>
>>   L:	linux-cxl@vger.kernel.org
>>   S:	Maintained
>> +F:	Documentation/ABI/testing/debugfs-cxl
>>   F:	drivers/cxl/
>>   F:	include/uapi/linux/cxl_mem.h
>>   
>> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
>> index 39c4b54f0715..587e261a7f76 100644
>> --- a/drivers/cxl/mem.c
>> +++ b/drivers/cxl/mem.c
>> @@ -45,6 +45,22 @@ static int cxl_mem_dpa_show(struct seq_file *file, void *data)
>>   	return 0;
>>   }
>>   
>> +static int cxl_mem_qtg_show(struct seq_file *file, void *data)
>> +{
>> +	struct device *dev = file->private;
>> +	struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
>> +	struct cxl_dev_state *cxlds = cxlmd->cxlds;
>> +	struct perf_prop_entry *perf;
>> +
>> +	list_for_each_entry(perf, &cxlds->perf_list, list) {
>> +		seq_printf(file, "%08llx-%08llx : QoS Class: %u\n",
>> +			   perf->dpa_range.start, perf->dpa_range.end,
>> +			   perf->qos_class);
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>>   static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd,
>>   				 struct cxl_dport *parent_dport)
>>   {
>> @@ -117,6 +133,7 @@ static int cxl_mem_probe(struct device *dev)
>>   
>>   	dentry = cxl_debugfs_create_dir(dev_name(dev));
>>   	debugfs_create_devm_seqfile(dev, "dpamem", dentry, cxl_mem_dpa_show);
>> +	debugfs_create_devm_seqfile(dev, "qtgmap", dentry, cxl_mem_qtg_show);
>>   	rc = devm_add_action_or_reset(dev, remove_debugfs, dentry);
>>   	if (rc)
>>   		return rc;
>>
>>
>