From: Ben Zong-You Xie <ben717@andestech.com>
Cc: <devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <alex@ghiti.fr>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<tglx@linutronix.de>, <daniel.lezcano@linaro.org>,
<prabhakar.mahadev-lad.rj@bp.renesas.com>, <tim609@andestech.com>,
"Ben Zong-You Xie" <ben717@andestech.com>
Subject: [PATCH v2 9/9] riscv: defconfig: enable Andes SoC
Date: Sat, 3 May 2025 23:18:29 +0800 [thread overview]
Message-ID: <20250503151829.605006-10-ben717@andestech.com> (raw)
In-Reply-To: <20250503151829.605006-1-ben717@andestech.com>
Enable Andes SoC config in defconfig to allow the default
upstream kernel to boot on Voyager board.
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
---
arch/riscv/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 3c8e16d71e17..c9214635fb2f 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -25,6 +25,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_SYSFS_SYSCALL is not set
CONFIG_PROFILING=y
+CONFIG_ARCH_ANDES=y
CONFIG_ARCH_MICROCHIP=y
CONFIG_ARCH_SIFIVE=y
CONFIG_ARCH_SOPHGO=y
--
2.34.1
next prev parent reply other threads:[~2025-05-03 15:46 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-03 15:18 [PATCH v2 0/9] add Voyager board support Ben Zong-You Xie
2025-05-03 15:18 ` [PATCH v2 1/9] riscv: add Andes SoC family Kconfig support Ben Zong-You Xie
2025-05-03 15:18 ` [PATCH v2 2/9] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings Ben Zong-You Xie
2025-05-03 15:18 ` [PATCH v2 3/9] dt-bindings: interrupt-controller: add Andes QiLai PLIC Ben Zong-You Xie
2025-05-03 15:18 ` [PATCH v2 4/9] dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller Ben Zong-You Xie
2025-05-06 16:24 ` Conor Dooley
2025-05-03 15:18 ` [PATCH v2 5/9] dt-bindings: timer: add Andes machine timer Ben Zong-You Xie
2025-05-06 16:27 ` Conor Dooley
2025-05-03 15:18 ` [PATCH v2 6/9] dt-bindings: cache: ax45mp-cache: allow variable cache-sets for Andes L2 cache Ben Zong-You Xie
2025-05-06 16:23 ` Conor Dooley
2025-05-09 14:57 ` Conor Dooley
2025-05-03 15:18 ` [PATCH v2 7/9] riscv: dts: andes: add QiLai SoC device tree Ben Zong-You Xie
2025-05-03 15:18 ` [PATCH v2 8/9] riscv: dts: andes: add Voyager board " Ben Zong-You Xie
2025-05-03 15:18 ` Ben Zong-You Xie [this message]
2025-05-06 16:26 ` [PATCH v2 9/9] riscv: defconfig: enable Andes SoC Conor Dooley
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