[PATCH v2 00/24] dt-bindings/dts: qcom: Fix PDC OS Direct Resource Voter region window size

[PATCH v2 00/24] dt-bindings/dts: qcom: Fix PDC OS Direct Resource Voter region window size

[Mukesh Ojha]

The Qualcomm PDC (Power Domain Controller) hardware exposes multiple
Direct Resource Voter (DRV) regions, each 0x10000 bytes in size, where
each region serves a specific system client like TZ, HYP, OS etc. Linux
only needs access to the OS DRV region.

Despite this, most platform DTS files described the PDC reg window as
0x30000 bytes three DRV regions which was wider than necessary and
matched the driver's QCOM_PDC_SIZE ioremap clamp introduced as a
workaround for early sm8150 DTs that under-reported the window.

v1 of this series [1] addressed this in two parts: driver cleanup
(tightening the ioremap clamp to 0x10000, refactoring version-specific
interrupt enable paths, etc.) and DT corrections. The driver portion
will be send separately depending on this series. This v2 sends the
remaining DT-only portion.

Patch 1 corrects the binding example, which still showed the old 0x30000
window and would mislead anyone writing a new PDC node.

Patches 2-24 correct the PDC reg size to 0x10000 across 23 platforms:
sdm845, sdm670, sc7180, sc7280, sc8180x, sm8150, sc8280xp, sm8250,
sm8350, sm8450, sm8550, sm8650, sm4450, x1e80100, sm6350, sar2130p,
talos, monaco, lemans, sdx75, milos, qdu1000 and eliza.

The net result is that every PDC node in the tree now describes exactly
one register region of 0x10000 bytes — the OS DRV region that the
driver actually maps.

[1] https://lore.kernel.org/lkml/20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com/

Changes in v2:
  - Dropped driver patches and send them separately so that it can be
    picked by irqchip maintainer.
  - Rebased on linux-next (next-20260518)
  - Dropped the changes which was removing second reg field in pdc.

Mukesh Ojha (24):
  dt-bindings: qcom,pdc: Fix OS DRV reg size in example
  arm64: dts: qcom: sdm845: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sdm670: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sc7180: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sc7280: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sc8180x: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8150: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sc8280xp: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8250: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8350: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8450: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8550: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm8650: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm4450: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: x1e80100: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sm6350: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sar2130p: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: talos: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: monaco: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: lemans: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: sdx75: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: milos: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: qdu1000: Reduce OS PDC DRV span to 0x10000
  arm64: dts: qcom: eliza: Reduce OS PDC DRV span to 0x10000

 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml      | 2 +-
 arch/arm64/boot/dts/qcom/eliza.dtsi                             | 2 +-
 arch/arm64/boot/dts/qcom/hamoa.dtsi                             | 2 +-
 arch/arm64/boot/dts/qcom/kodiak.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/lemans.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/milos.dtsi                             | 2 +-
 arch/arm64/boot/dts/qcom/monaco.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/qdu1000.dtsi                           | 2 +-
 arch/arm64/boot/dts/qcom/sar2130p.dtsi                          | 2 +-
 arch/arm64/boot/dts/qcom/sc7180.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sc8180x.dtsi                           | 2 +-
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi                          | 2 +-
 arch/arm64/boot/dts/qcom/sdm670.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sdx75.dtsi                             | 2 +-
 arch/arm64/boot/dts/qcom/sm4450.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm6350.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8150.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8250.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8350.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8450.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8550.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/sm8650.dtsi                            | 2 +-
 arch/arm64/boot/dts/qcom/talos.dtsi                             | 2 +-
 24 files changed, 24 insertions(+), 24 deletions(-)

-- 
2.53.0

[PATCH v2 01/24] dt-bindings: qcom,pdc: Fix OS DRV reg size in example

[Mukesh Ojha]

PDC instances have multiple 0x10000-byte DRV regions, with each region
serving a specific client like HLOS (High level operating system),
TrustZone, Hypervisor etc.,. The OS-visible PDC instance should uses its
own DRV region, while other DRV regions belong to other clients.

Update the binding example to describe a single OS DRV region by
changing the reg size from 0x30000 to 0x10000. This matches the example
with the OS-facing PDC nodes used on Qualcomm platforms and avoids
suggesting that the example should span multiple client regions.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 07a46c5457a4..607b0e74de68 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -99,7 +99,7 @@ examples:
 
     pdc: interrupt-controller@b220000 {
         compatible = "qcom,sdm845-pdc", "qcom,pdc";
-        reg = <0xb220000 0x30000>;
+        reg = <0xb220000 0x10000>;
         qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
         #interrupt-cells = <2>;
         interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 02/24] arm64: dts: qcom: sdm845: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sdm845 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 4ae8627d6dbc..e9a31a5ff04f 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -5102,7 +5102,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc_intc: interrupt-controller@b220000 {
 			compatible = "qcom,sdm845-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
 			#interrupt-cells = <2>;
 			interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 03/24] arm64: dts: qcom: sdm670: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sdm670 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sdm670.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 30844b150c80..5c60ea36f04a 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -1646,7 +1646,7 @@ usb_1_dwc3: usb@a600000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sdm670-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 40>, <41 521 7>, <49 529 4>,
 					  <54 534 24>, <79 559 15>, <94 609 15>,
 					  <115 630 7>;
-- 
2.53.0

[PATCH v2 04/24] arm64: dts: qcom: sc7180: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sc7180 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 8341a7c4a4c6..5d985a48a62a 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3510,7 +3510,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sc7180-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
 			#interrupt-cells = <2>;
 			interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 05/24] arm64: dts: qcom: sc7280: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sc7280 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
index c51beada8c7d..33050643e4e6 100644
--- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
+++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
@@ -5739,7 +5739,7 @@ opp-810000000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sc7280-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,
 					  <55 306 4>, <59 312 3>, <62 374 2>,
 					  <64 434 2>, <66 438 3>, <69 86 1>,
-- 
2.53.0

[PATCH v2 06/24] arm64: dts: qcom: sc8180x: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sc8180x spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index e87e82fa73e9..a7ea47f07be2 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3554,7 +3554,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sc8180x-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>;
 			#interrupt-cells = <2>;
 			interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 07/24] arm64: dts: qcom: sm8150: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8150 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 0e101096209a..661848ef5eee 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -4174,7 +4174,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8150-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>;
+			reg = <0 0x0b220000 0 0x10000>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
 					  <125 63 1>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 08/24] arm64: dts: qcom: sc8280xp: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sc8280xp spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index ee02acd18856..9dad61ab5dbf 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -5326,7 +5326,7 @@ dispcc0: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sc8280xp-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
 			qcom,pdc-ranges = <0 480 40>,
 					  <40 140 14>,
 					  <54 263 1>,
-- 
2.53.0

[PATCH v2 09/24] arm64: dts: qcom: sm8250: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8250 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 7076720413ab..23aa483e5c43 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -5053,7 +5053,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8250-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
 					  <125 63 1>, <126 716 12>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 10/24] arm64: dts: qcom: sm8350: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8350 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index c830953156ec..ca235ce899c9 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3174,7 +3174,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8350-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;
 			qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,   <55 306 4>,
 					  <59 312 3>, <62 374 2>,  <64 434 2>,   <66 438 3>,
 					  <69 86 1>,  <70 520 54>, <124 609 31>, <155 63 1>,
-- 
2.53.0

[PATCH v2 11/24] arm64: dts: qcom: sm8450: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8450 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index e0c37ce3042a..04b15ee62681 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3728,7 +3728,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8450-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 			qcom,pdc-ranges = <0 480 12>, <14 494 24>, <40 520 54>,
 					  <94 609 31>, <125 63 1>, <126 716 12>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 12/24] arm64: dts: qcom: sm8550: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8550 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index b7a7c49db077..7805a6a08a2f 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -4602,7 +4602,7 @@ usb_1_dwc3_ss: endpoint {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8550-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
 					  <125 63 1>, <126 716 12>,
 					  <138 251 5>;
-- 
2.53.0

[PATCH v2 13/24] arm64: dts: qcom: sm8650: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm8650 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 1604bc8cff37..7a66b79ed336 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5987,7 +5987,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm8650-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 
 			interrupt-parent = <&intc>;
 
-- 
2.53.0

[PATCH v2 14/24] arm64: dts: qcom: sm4450: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm4450 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm4450.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
index 696e2e0841ad..b7dc40f3778c 100644
--- a/arch/arm64/boot/dts/qcom/sm4450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
@@ -464,7 +464,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm4450-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 			qcom,pdc-ranges = <0 480 94>, <94 494 31>,
 					  <125 63 1>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 15/24] arm64: dts: qcom: x1e80100: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on x1e80100 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/hamoa.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 4ba751a65142..b5516655db8c 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -6047,7 +6047,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,x1e80100-pdc", "qcom,pdc";
-			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;
 
 			qcom,pdc-ranges = <0 480 42>, <42 251 5>,
 					  <47 522 52>, <99 609 32>,
-- 
2.53.0

[PATCH v2 16/24] arm64: dts: qcom: sm6350: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sm6350 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index d6adf68563cb..fe1750303f16 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2557,7 +2557,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sm6350-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x17c000f0 0x0 0x64>;
+			reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x17c000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
 					  <125 63 1>, <126 655 12>, <138 139 15>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 17/24] arm64: dts: qcom: sar2130p: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sar2130p spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sar2130p.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
index d65ad0df6865..c4d48f657e5d 100644
--- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
@@ -2417,7 +2417,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sar2130p-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
+			reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x174000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 94>,
 					  <94 609 31>,
 					  <125 63 1>,
-- 
2.53.0

[PATCH v2 18/24] arm64: dts: qcom: talos: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on talos spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/talos.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index fb1bbc51bb8a..4b6adad72751 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -4624,7 +4624,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,qcs615-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>,
+			reg = <0x0 0x0b220000 0x0 0x10000>,
 			      <0x0 0x17c000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
 			interrupt-parent = <&intc>;
-- 
2.53.0

[PATCH v2 19/24] arm64: dts: qcom: monaco: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on monaco spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/monaco.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 7b1d57460f1e..62903daa9cf2 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -6073,7 +6073,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,qcs8300-pdc", "qcom,pdc";
-			reg = <0x0 0xb220000 0x0 0x30000>,
+			reg = <0x0 0xb220000 0x0 0x10000>,
 			      <0x0 0x17c000f0 0x0 0x64>;
 			interrupt-parent = <&intc>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 20/24] arm64: dts: qcom: lemans: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on lemans spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/lemans.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index bc7b4f65ad5e..932948362eb3 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -5865,7 +5865,7 @@ dispcc0: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sa8775p-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>,
+			reg = <0x0 0x0b220000 0x0 0x10000>,
 			      <0x0 0x17c000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 40>,
 					  <40 140 14>,
-- 
2.53.0

[PATCH v2 21/24] arm64: dts: qcom: sdx75: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on sdx75 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index d1b61530b562..85cc9c6e6f83 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -1100,7 +1100,7 @@ usb_1_dwc3_ss: endpoint {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sdx75-pdc", "qcom,pdc";
-			reg = <0x0 0xb220000 0x0 0x30000>,
+			reg = <0x0 0xb220000 0x0 0x10000>,
 			      <0x0 0x174000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 147 52>,
 					  <52 266 32>,
-- 
2.53.0

[PATCH v2 22/24] arm64: dts: qcom: milos: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on milos spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/milos.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
index f09b30ea96ee..4e5cd0f29ec9 100644
--- a/arch/arm64/boot/dts/qcom/milos.dtsi
+++ b/arch/arm64/boot/dts/qcom/milos.dtsi
@@ -1980,7 +1980,7 @@ dispcc: clock-controller@af00000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,milos-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x30000>,
+			reg = <0x0 0x0b220000 0x0 0x10000>,
 			      <0x0 0x174000f0 0x0 0x64>;
 			interrupt-parent = <&intc>;
 
-- 
2.53.0

[PATCH v2 23/24] arm64: dts: qcom: qdu1000: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on qdu1000 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 952d4270d118..26cc86d12f72 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1054,7 +1054,7 @@ usb_1_dwc3_ss: endpoint {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,qdu1000-pdc", "qcom,pdc";
-			reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
+			reg = <0x0 0xb220000 0x0 0x10000>, <0x0 0x174000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 12>, <14 494 24>, <40 520 54>,
 					  <94 609 31>, <125 63 1>;
 			#interrupt-cells = <2>;
-- 
2.53.0

[PATCH v2 24/24] arm64: dts: qcom: eliza: Reduce OS PDC DRV span to 0x10000

[Mukesh Ojha]

The OS PDC DRV register window on eliza spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x40000 to 0x10000.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/eliza.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom/eliza.dtsi
index 24c680795481..190728d3e752 100644
--- a/arch/arm64/boot/dts/qcom/eliza.dtsi
+++ b/arch/arm64/boot/dts/qcom/eliza.dtsi
@@ -917,7 +917,7 @@ lpass_lpicx_noc: interconnect@7420000 {
 
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,eliza-pdc", "qcom,pdc";
-			reg = <0x0 0x0b220000 0x0 0x40000>,
+			reg = <0x0 0x0b220000 0x0 0x10000>,
 			      <0x0 0x174000f0 0x0 0x64>;
 
 			qcom,pdc-ranges = <0 480 8>, <8 719 1>, <9 718 1>,
-- 
2.53.0

Re: [PATCH v2 14/24] arm64: dts: qcom: sm4450: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the `reg` span to 0x10000 in the device tree is futile without an accompanying driver change and will intentionally trigger a boot warning.
--

commit befb5e3c3aa5e0f54a7fff3d0f4a5e96013f4a7e
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sm4450: Reduce OS PDC DRV span to 0x10000

The OS PDC DRV register window on sm4450 spans 0x10000 bytes, so this
commit reduces the size of the first reg entry from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
> --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
> @@ -464,7 +464,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sm4450-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
> +			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;

[Severity: Medium]
Will this change cause a boot warning and fail to actually reduce the mapping
size?

Looking at the qcom-pdc driver in drivers/irqchip/qcom-pdc.c, it enforces a
minimum mapping size of QCOM_PDC_SIZE (0x30000) for all devices to maintain
backward compatibility. In qcom_pdc_probe(), it calculates the size as:

	res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);

If the device tree provides a size smaller than 0x30000 (like 0x10000), the
driver automatically expands the mapping back to 0x30000 and logs a warning:
"%pOF: invalid reg size, please fix DT".

Since there are no accompanying driver changes to gracefully accept the smaller
size for newer compatibles like "qcom,sm4450-pdc", does this patch introduce a
spurious warning on every boot without achieving the intended mapping
reduction?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=14

Re: [PATCH v2 11/24] arm64: dts: qcom: sm8450: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC register window to 0x10000 bytes in the device tree triggers an unconditional boot warning from the qcom-pdc driver and fails to actually reduce the memory mapping size at runtime.
--

commit 146bc09492c2a09bab10da04c80ce9d1782cd06d
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sm8450: Reduce OS PDC DRV span to 0x10000

The OS PDC DRV register window on sm8450 spans 0x10000 bytes. This commit
reduces the size of the first reg entry from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 03bf30b53f289..1724204852553 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -3728,7 +3728,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sm8450-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
> +			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;

[Severity: Medium]
Will this reduction trigger a boot warning and fail to actually reduce the
memory mapped size at runtime?

Looking at qcom_pdc_probe() in drivers/irqchip/qcom-pdc.c, the driver has a
hardcoded minimum region size of QCOM_PDC_SIZE (0x30000) to work around older
broken device trees:

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
    ...
    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", node);
    ...
}

If the resource size is reduced to 0x10000 in the device tree without removing
or updating this constraint in the driver, the driver will print the
"invalid reg size" warning on boot and continue to ioremap 0x30000 bytes
anyway.

>  			qcom,pdc-ranges = <0 480 12>, <14 494 24>, <40 520 54>,
>  					  <94 609 31>, <125 63 1>, <126 716 12>;
>  			#interrupt-cells = <2>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=11

Re: [PATCH v2 13/24] arm64: dts: qcom: sm8650: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size to 0x10000 in the device tree triggers a persistent boot warning and fails to actually reduce the mapped memory region size because the driver enforces a hardcoded minimum size.
--

commit 5e3df9b8bc840c5ea7f6601a836f855af7f989d4
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sm8650: Reduce OS PDC DRV span to 0x10000

This commit reduces the size of the first reg entry in the PDC interrupt
controller node from 0x30000 to 0x10000 on the sm8650 platform.

> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 1604bc8cff373..7a66b79ed336c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -5987,7 +5987,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sm8650-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
> +			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;

[Severity: Medium]
Will this reduction in the reg size trigger a warning on every boot?

Looking at drivers/irqchip/qcom-pdc.c, the driver has a hardcoded minimum
size for the PDC resource:

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
    ...
    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", node);
    ...
}

Since QCOM_PDC_SIZE is defined as 0x30000, reducing the DT reg size to
0x10000 will cause the driver to print this warning.

Additionally, because the driver uses the calculated res_size for its ioremap
call, it appears it will still map 0x30000 bytes regardless of this DT
change.

Does the qcom-pdc driver need to be updated to handle the smaller size
without forcing this workaround before the DT is changed?

>  
>  			interrupt-parent = <&intc>;
>

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=13

Re: [PATCH v2 09/24] arm64: dts: qcom: sm8250: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size to 0x10000 conflicts with the qcom-pdc driver's hardcoded minimum size constraint, triggering a spurious boot warning and failing to actually reduce the mapped memory region.
--

commit d119056e24f5f045fcb50e0c6e437fe3a3f6f22f
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sm8250: Reduce OS PDC DRV span to 0x10000

This commit reduces the register window size for the OS PDC DRV on the sm8250
platform from 0x30000 to 0x10000 bytes.

> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 7076720413ab2..23aa483e5c439 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -5053,7 +5053,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sm8250-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
> +			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;

[Severity: Medium]
Will this change cause a spurious boot warning and fail to actually reduce the
mapped memory region?

Looking at the driver in drivers/irqchip/qcom-pdc.c, qcom_pdc_probe() enforces
a minimum register window size of 0x30000 bytes (QCOM_PDC_SIZE):

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
    ...
    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", node);
    ...
}

Since the driver evaluates res_size to 0x30000 and the new DT size is 0x10000,
it seems this will trigger the warning and still map 0x30000 bytes at runtime.

Does the qcom-pdc driver also need an update to handle this smaller size?

>  			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
>  					  <125 63 1>, <126 716 12>;
>  			#interrupt-cells = <2>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=9

Re: [PATCH v2 03/24] arm64: dts: qcom: sdm670: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size to 0x10000 conflicts with the `qcom-pdc` driver, triggering a boot warning.
--

commit 91616deec930abcc3788af870cfe06cc7cfb6809
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sdm670: Reduce OS PDC DRV span to 0x10000

This commit reduces the size of the PDC register window in the sdm670 device
tree from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> @@ -1618,7 +1618,7 @@ usb_1_dwc3: usb@a600000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sdm670-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>;
> +			reg = <0 0x0b220000 0 0x10000>;

[Severity: Medium]
Will this change trigger a boot warning from the qcom-pdc driver?

Looking at drivers/irqchip/qcom-pdc.c, the driver enforces a minimum
mapping size of 0x30000:

drivers/irqchip/qcom-pdc.c:
#define QCOM_PDC_SIZE 0x30000

...

qcom_pdc_probe() {
	...
	res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
	if (res_size > resource_size(&res))
		pr_warn("%pOF: invalid reg size, please fix DT\n", node);
	...
}

If the device tree size is reduced to 0x10000, won't the driver fall back
to the 0x30000 minimum anyway and log an "invalid reg size, please fix DT"
warning during boot?

>  			qcom,pdc-ranges = <0 480 40>, <41 521 7>, <49 529 4>,
>  					  <54 534 24>, <79 559 15>, <94 609 15>,
>  					  <115 630 7>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=3

Re: [PATCH v2 12/24] arm64: dts: qcom: sm8550: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the OS PDC DRV register window to 0x10000 in the DT without updating the qcom-pdc driver triggers a spurious boot warning and nullifies the size reduction.
--

commit af73b863314fd2efa87dbeb8a5636a342659cea6
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sm8550: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window size from 0x30000 to
0x10000 in the sm8550 device tree.

> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 912525e9bca6f..de04610ef47e8 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -4245,7 +4245,7 @@ usb_1_dwc3_ss: endpoint {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sm8550-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
> +			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;

[Severity: Medium]
Does this reduction trigger a boot warning and map 0x30000 bytes anyway?

Looking at drivers/irqchip/qcom-pdc.c, QCOM_PDC_SIZE is hardcoded to
0x30000.

The driver calculates the actual mapping size using:
res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);

With the DT size reduced to 0x10000, res_size still evaluates to 0x30000.
The driver then checks if (res_size > resource_size(&res)), which becomes
true, and unconditionally emits pr_warn("%pOF: invalid reg size, please fix
DT\n", node) on boot.

Furthermore, it proceeds to call ioremap(res.start, res_size), mapping
0x30000 bytes instead of the intended 0x10000. This seems to nullify the
size reduction introduced by this patch.

>  			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
>  					  <125 63 1>, <126 716 12>,
>  					  <138 251 5>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=12

Re: [PATCH v2 04/24] arm64: dts: qcom: sc7180: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size to 0x10000 in the device tree triggers a kernel boot warning in the `qcom-pdc` driver and fails to reduce the actually mapped memory region.
--

commit 81fc1fb188abb3ae08146cf2e02b2febea3e2f77
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sc7180: Reduce OS PDC DRV span to 0x10000

The OS PDC DRV register window on sc7180 spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index a4b17564469ee..3961948c7ee81 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -3507,7 +3507,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sc7180-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>;
> +			reg = <0 0x0b220000 0 0x10000>;

[Severity: Medium]
Will this change trigger a new boot warning?

The qcom-pdc driver enforces a minimum region size of 0x30000 via
QCOM_PDC_SIZE:

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
	...
	res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
	if (res_size > resource_size(&res))
		pr_warn("%pOF: invalid reg size, please fix DT\n", node);
	...
}

Because QCOM_PDC_SIZE is 0x30000, setting the device tree reg size to 0x10000
will cause the driver to expand the size back to 0x30000 during mapping and
print the "invalid reg size" warning.

Are there corresponding driver updates planned to handle the reduced size?

>  			qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=4

Re: [PATCH v2 06/24] arm64: dts: qcom: sc8180x: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the `reg` property size to 0x10000 in the device tree triggers a hardcoded override and a boot warning in the PDC driver, failing to actually reduce the mapped memory size.
--

commit 801af88b2159c6cae68a0fa2faaac6413c1a3461
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sc8180x: Reduce OS PDC DRV span to 0x10000

The OS PDC DRV register window on sc8180x spans 0x10000 bytes. Reduce
the size of the first reg entry from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> index f45deb188c6c0..bafdbcd329e9a 100644
> --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> @@ -3554,7 +3554,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sc8180x-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>;
> +			reg = <0 0x0b220000 0 0x10000>;

[Severity: Medium]
Will this change actually reduce the mapped memory size, or will it just
trigger a warning on boot?

Looking at the qcom-pdc driver in drivers/irqchip/qcom-pdc.c, there is a
hardcoded minimum size check for the reg property:

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
	...
	res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
	if (res_size > resource_size(&res))
		pr_warn("%pOF: invalid reg size, please fix DT\n", node);

	...
	pdc_base = ioremap(res.start, res_size);
	...
}

Since QCOM_PDC_SIZE is 0x30000, passing a size of 0x10000 here will cause the
driver to expand the mapped memory back to 0x30000 and emit a warning on every
boot.

Does the driver logic need to be updated alongside this device tree change to
prevent this warning and successfully reduce the memory footprint?

>  			qcom,pdc-ranges = <0 480 94>, <94 609 31>;
>  			#interrupt-cells = <2>;
>  			interrupt-parent = <&intc>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=6

Re: [PATCH v2 05/24] arm64: dts: qcom: sc7280: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the DT `reg` size to 0x10000 triggers an unconditional boot warning in the driver and fails to actually reduce the mapped memory size.
--

commit ca8b3ceb39b1e7babb13309a5b7e9f3fdc180c22
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sc7280: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window on the sc7280 platform
from 0x30000 to 0x10000 bytes in the device tree.

> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> index 988ca5f7c8a0e..c94375a35473e 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -5736,7 +5736,7 @@ opp-810000000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sc7280-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>;
> +			reg = <0 0x0b220000 0 0x10000>;

[Severity: Medium]
Will this change trigger a boot warning and fail to actually reduce the
mapped memory size?

Looking at the qcom-pdc driver in drivers/irqchip/qcom-pdc.c, the driver
enforces a minimum mapping size via QCOM_PDC_SIZE (0x30000). In
qcom_pdc_probe(), it executes:

	res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
	if (res_size > resource_size(&res))
		pr_warn("%pOF: invalid reg size, please fix DT\n", node);

By reducing the device tree reg size to 0x10000 without a simultaneous
driver update, the driver overrides the mapping size back to 0x30000 and
unconditionally emits the "invalid reg size, please fix DT" warning on
every boot.

Does the driver need an update alongside this change to avoid overriding
the size and emitting the spurious warning?

>  			qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,
>  					  <55 306 4>, <59 312 3>, <62 374 2>,
>  					  <64 434 2>, <66 438 3>, <69 86 1>,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=5

Re: [PATCH v2 15/24] arm64: dts: qcom: x1e80100: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the `reg` size in the Device Tree without updating the `qcom-pdc` driver causes a boot warning and fails to actually reduce the mapped memory region.
--

commit 905355b7e18725670918048d9deb9a052ae4824e
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: x1e80100: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window on x1e80100 from
0x30000 to 0x10000 bytes.

> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> index 051dee0764167..5056d1f7a6d31 100644
> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> @@ -6100,7 +6100,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,x1e80100-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
> +			reg = <0 0x0b220000 0 0x10000>, <0 0x174000f0 0 0x64>;

[Severity: Medium]
Will this change trigger a boot warning and still map 0x30000 bytes?

Looking at the qcom-pdc driver (drivers/irqchip/qcom-pdc.c), it appears to
hardcode a minimum size:

#define QCOM_PDC_SIZE 0x30000

And in qcom_pdc_probe(), it checks the size against this minimum:

    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", np);

If this device tree patch is applied without a corresponding driver change to
relax the 0x30000 requirement, it looks like it will unconditionally warn
during boot and force the mapped size back to 0x30000 anyway.

>  
>  			qcom,pdc-ranges = <0 480 42>, <42 251 5>,
>  					  <47 522 52>, <99 609 32>,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=15

Re: [PATCH v2 16/24] arm64: dts: qcom: sm6350: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC register size to 0x10000 in the device tree conflicts with a hardcoded minimum size in the qcom-pdc driver, triggering an unconditional boot warning and failing to reduce the actual mapping size.
--

commit 69f94a7d9aef9ae59edc53727a9252af84f188ba
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sm6350: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window on the sm6350 platform.
It changes the size of the first register entry in the device tree from
0x30000 to 0x10000 bytes.

> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> index 034545d2af2d1..771e25c63a2a7 100644
> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
[ ... ]
> @@ -2491,7 +2491,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sm6350-pdc", "qcom,pdc";
> -			reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x17c000f0 0x0 0x64>;
> +			reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x17c000f0 0x0 0x64>;

[Severity: Medium]
Will this size reduction trigger an unconditional boot warning on sm6350?

Looking at the qcom-pdc driver probe function, the driver enforces a minimum
register window size of QCOM_PDC_SIZE, which is defined as 0x30000:

drivers/irqchip/qcom-pdc.c:qcom_pdc_init() {
    ...
    res_size = max_t(size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", node);
    ...
}

Because the device tree specified size is now less than 0x30000, it appears
the driver will emit this warning on boot and continue to expand the mapping
back up to 0x30000 anyway.

Are there accompanying driver changes planned to support a 0x10000 size?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=16

Re: [PATCH v2 17/24] arm64: dts: qcom: sar2130p: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the DT `reg` size to 0x10000 triggers a spurious warning in the `qcom-pdc` driver and fails to reduce the actual memory-mapped size.
--

commit 8b2158db7b47bcc229b63f723441f15fd882711f
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sar2130p: Reduce OS PDC DRV span to 0x10000

This commit reduces the first reg entry size of the PDC interrupt controller
on the sar2130p platform from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
> --- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
> @@ -2417,7 +2417,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sar2130p-pdc", "qcom,pdc";
> -			reg = <0x0 0x0b220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
> +			reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x174000f0 0x0 0x64>;

[Severity: Medium]
Will this reduction trigger a boot warning in the qcom-pdc driver and fail
to reduce the actual memory-mapped size?

The qcom-pdc driver in drivers/irqchip/qcom-pdc.c enforces a minimum mapped
memory region size of QCOM_PDC_SIZE (0x30000). During probe, if the device
tree specifies a region smaller than 0x30000, it overrides it back to 0x30000
and logs a warning:

drivers/irqchip/qcom-pdc.c:qcom_pdc_init() {
    ...
    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", np);
    ...
}

Should the qcom-pdc driver be updated to allow smaller mappings alongside
this device tree change to avoid a permanent boot warning?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=17

Re: [PATCH v2 08/24] arm64: dts: qcom: sc8280xp: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size in the Device Tree to 0x10000 conflicts with a hardcoded minimum size in the `qcom-pdc` driver, triggering a boot warning and failing to actually reduce the mapped memory region.
--

commit f287ceb4ab3c87315be7a295204872af77c4b75d
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sc8280xp: Reduce OS PDC DRV span to 0x10000

This commit reduces the size of the first reg entry in the OS PDC DRV
register window from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -5299,7 +5299,7 @@ dispcc0: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sc8280xp-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
> +			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;

[Severity: Medium]
Does this change trigger a boot warning?

Looking at qcom_pdc_probe() in drivers/irqchip/qcom-pdc.c, the driver
enforces a minimum size of QCOM_PDC_SIZE (0x30000) for backward
compatibility:

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
    ...
    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", np);
    ...
    pdc_base = ioremap(res.start, res_size);
    ...
}

Since 0x10000 is smaller than 0x30000, it seems this will cause the
driver to print the warning on every boot.

Also, because of the max_t() operation, the driver still maps 0x30000
bytes, meaning the mapped region size is not actually reduced at runtime.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=8

Re: [PATCH v2 24/24] arm64: dts: qcom: eliza: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size to 0x10000 triggers a hardcoded warning in `drivers/irqchip/qcom-pdc.c` and fails to actually reduce the mapped region size.
--

commit 5004f072e69f0ca2826142cbc32ed05f15a06f65
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: eliza: Reduce OS PDC DRV span to 0x10000

This commit reduces the size of the first reg entry in the OS PDC DRV
register window on eliza from 0x40000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom/eliza.dtsi
> index 4a7a0ac40ce62..24f92ca9f9ef4 100644
> --- a/arch/arm64/boot/dts/qcom/eliza.dtsi
> +++ b/arch/arm64/boot/dts/qcom/eliza.dtsi
> @@ -885,7 +885,7 @@ lpass_lpicx_noc: interconnect@7420000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,eliza-pdc", "qcom,pdc";
> -			reg = <0x0 0x0b220000 0x0 0x40000>,
> +			reg = <0x0 0x0b220000 0x0 0x10000>,

[Severity: Medium]
Does this introduce a regression by triggering an invalid reg size warning
during boot?

Looking at drivers/irqchip/qcom-pdc.c, qcom_pdc_probe() calculates the
mapping size like this:

    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);

where QCOM_PDC_SIZE is defined as 0x30000. If the resource size from the
device tree is smaller than QCOM_PDC_SIZE, the driver issues a warning:

    pr_warn("%pOF: invalid reg size, please fix DT\n", node);

Since this reduces the size to 0x10000, res_size evaluates to max(0x10000,
0x30000) = 0x30000. Will the driver still ioremap 0x30000 bytes despite
this change, and emit the warning on every boot?

>  			      <0x0 0x174000f0 0x0 0x64>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=24

Re: [PATCH v2 18/24] arm64: dts: qcom: talos: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC register span to 0x10000 causes the qcom-pdc driver to emit a boot warning and override the size back to 0x30000, negating the purpose of the patch.
--

commit d70fb9cd4a6ef5ac1791e6576ca81f3526300257
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: talos: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window size for talos in the
device tree. It changes the first reg entry size from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
> index ff5afbfce2a47..6f6c9fe1758b1 100644
> --- a/arch/arm64/boot/dts/qcom/talos.dtsi
> +++ b/arch/arm64/boot/dts/qcom/talos.dtsi
> @@ -4529,7 +4529,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,qcs615-pdc", "qcom,pdc";
> -			reg = <0x0 0x0b220000 0x0 0x30000>,
> +			reg = <0x0 0x0b220000 0x0 0x10000>,

[Severity: Medium]
Will this regression cause a boot warning and be overridden by the driver?

Looking at drivers/irqchip/qcom-pdc.c, the driver enforces a minimum region
size of 0x30000:

#define QCOM_PDC_SIZE 0x30000
...
	res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
	if (res_size > resource_size(&res))
		pr_warn("%pOF: invalid reg size, please fix DT\n", node);

Because the device tree size is now smaller than QCOM_PDC_SIZE, the driver
will print this warning on every boot, and will still ioremap the full
0x30000 bytes anyway.

Does the qcom-pdc driver need an update to handle the smaller 0x10000 size
properly alongside this device tree change?

>  			      <0x0 0x17c000f0 0x0 0x64>;
>  			qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=18

Re: [PATCH v2 07/24] arm64: dts: qcom: sm8150: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size to 0x10000 in the Device Tree triggers a persistent boot warning and fails to actually reduce the mapped region.
--

commit 0bc4a6740625a7680dd3bd2099be3c1e864d5c1a
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sm8150: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window size from 0x30000 to
0x10000 in the sm8150 device tree.

> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 0e101096209ab..661848ef5eee2 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -4174,7 +4174,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sm8150-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>;
> +			reg = <0 0x0b220000 0 0x10000>;

[Severity: Medium]
Will this trigger a persistent boot warning and fail to actually reduce the
mapped region?

Looking at the qcom-pdc driver in drivers/irqchip/qcom-pdc.c, it contains
fallback logic that enforces a minimum resource size of QCOM_PDC_SIZE
(0x30000):

	res_size = max_t(resource_size_t, resource_size(res), QCOM_PDC_SIZE);

If the size provided by the device tree is less than 0x30000, it prints
a warning on boot:

	if (res_size > resource_size(res))
		pr_warn("%pOF: invalid reg size, please fix DT\n", np);

Because 0x10000 is smaller than 0x30000, won't this cause the driver to
print the warning on every boot while still remapping the full 0x30000
bytes anyway? 

Does the driver's fallback logic need to be updated before applying this
device tree change?

>  			qcom,pdc-ranges = <0 480 94>, <94 609 31>,
>  					  <125 63 1>;
>  			#interrupt-cells = <2>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=7

Re: [PATCH v2 02/24] arm64: dts: qcom: sdm845: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size to 0x10000 in the device tree triggers a kernel warning on boot and fails to reduce the actually mapped memory window due to driver hardcoding.
--

commit 525b0faef29c12db278a9396c520eabc83c6363b
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sdm845: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window size from 0x30000 to
0x10000 in the sdm845 device tree.

> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -5102,7 +5102,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc_intc: interrupt-controller@b220000 {
>  			compatible = "qcom,sdm845-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>;
> +			reg = <0 0x0b220000 0 0x10000>;

[Severity: Medium]
Will reducing this register size trigger a boot warning from the qcom-pdc
driver?

Looking at the driver implementation in drivers/irqchip/qcom-pdc.c, the
probe function appears to enforce a minimum mapping size of 0x30000 via a
hardcoded QCOM_PDC_SIZE limit.

If the device tree specifies a smaller size, does the driver emit a warning
like "invalid reg size, please fix DT" and then map 0x30000 bytes anyway?

Since there are no corresponding driver patches in this series to adjust
QCOM_PDC_SIZE, will this result in a persistent boot-time warning without
actually reducing the mapped memory window?

>  			qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
>  			#interrupt-cells = <2>;
>  			interrupt-parent = <&intc>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=2

Re: [PATCH v2 23/24] arm64: dts: qcom: qdu1000: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the `reg` property size to 0x10000 in the Device Tree without corresponding driver updates triggers a spurious boot warning and fails to actually reduce the mapped memory region.
--

commit 274d7b2d940f67e9aa192b8dc62aee5356984aee
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: qdu1000: Reduce OS PDC DRV span to 0x10000

This commit reduces the size of the first reg entry for the OS PDC DRV
register window on qdu1000 from 0x30000 to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> index 952d4270d1181..26cc86d12f725 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> @@ -1054,7 +1054,7 @@ usb_1_dwc3_ss: endpoint {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,qdu1000-pdc", "qcom,pdc";
> -			reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
> +			reg = <0x0 0xb220000 0x0 0x10000>, <0x0 0x174000f0 0x0 0x64>;

[Severity: Medium]
Could this introduce a regression where a spurious boot warning is
triggered, while failing to actually reduce the mapped memory region?

Looking at the qcom-pdc driver in drivers/irqchip/qcom-pdc.c, it defines a
minimum size QCOM_PDC_SIZE of 0x30000. During probe, it evaluates:

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
    ...
    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", np);
    ...
}

Since the new device tree size (0x10000) is smaller than QCOM_PDC_SIZE
(0x30000), the max_t() operation forces the driver to still unconditionally
map 0x30000 bytes, ignoring the intended reduction.

Furthermore, because the evaluated size is now strictly greater than the
provided size, does this mean the driver will print the "invalid reg size,
please fix DT" warning on every boot?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=23

Re: [PATCH v2 10/24] arm64: dts: qcom: sm8350: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC register size to 0x10000 in the device tree triggers a spurious boot warning because the irq-qcom-pdc driver hardcodes a minimum size expectation of 0x30000.
--

commit 05076204b4916b97559866917e2826b903983008
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sm8350: Reduce OS PDC DRV span to 0x10000

The commit reduces the size of the first reg entry for the OS PDC DRV register
window on sm8350 from 0x30000 to 0x10000 bytes.

> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index c830953156ec6..ca235ce899c92 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> @@ -3174,7 +3174,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sm8350-pdc", "qcom,pdc";
> -			reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
> +			reg = <0 0x0b220000 0 0x10000>, <0 0x17c000f0 0 0x60>;

[Severity: Medium]
Will this change trigger a spurious boot warning in the driver?

Looking at drivers/irqchip/qcom-pdc.c, the driver calculates the resource
size using a hardcoded QCOM_PDC_SIZE of 0x30000:

    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", node);

Since this patch reduces the device tree reg size to 0x10000, it appears
this condition will evaluate to true and print a warning on every boot,
even though the driver overrides the map size anyway.

Does the driver need to be updated alongside this device tree change to
avoid polluting dmesg?

>  			qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,   <55 306 4>,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=10

Re: [PATCH v2 21/24] arm64: dts: qcom: sdx75: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the DT `reg` size to 0x10000 fails to reduce the actual mapped region and triggers a spurious boot warning in the qcom-pdc driver.
--

commit dab6e413e3615f1cfba52619b3f47d4bdda8763b
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: sdx75: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window on sdx75. It changes the
size of the first reg entry for the pdc interrupt-controller from 0x30000
to 0x10000.

> diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
> --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
[ ... ]
> @@ -1100,7 +1100,7 @@ usb_1_dwc3_ss: endpoint {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sdx75-pdc", "qcom,pdc";
> -			reg = <0x0 0xb220000 0x0 0x30000>,
> +			reg = <0x0 0xb220000 0x0 0x10000>,

[Severity: Medium]
Will this change actually reduce the mapped memory window at runtime, or
does it just trigger a boot warning?

Looking at the qcom-pdc driver in drivers/irqchip/qcom-pdc.c, it appears
to enforce a minimum mapping size:

    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);

Where QCOM_PDC_SIZE is 0x30000. If the device tree size is reduced to
0x10000, the driver forces the size back to 0x30000 and unconditionally
prints this warning:

    if (res_size > resource_size(&res))
        pr_warn("%pOF: invalid reg size, please fix DT\n", node);

Should the qcom-pdc driver be patched to accept 0x10000-sized regions
before or alongside this device tree change?

>  			      <0x0 0x174000f0 0x0 0x64>;
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=21

Re: [PATCH v2 22/24] arm64: dts: qcom: milos: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the PDC `reg` size to 0x10000 triggers a boot warning from the `qcom-pdc` driver and fails to reduce the actual mapped memory size.
--

commit bd9d32425fcdb7b1f806e074d8d4e1621656dc67
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: milos: Reduce OS PDC DRV span to 0x10000

This commit reduces the first reg entry size of the OS PDC DRV register
window on milos from 0x30000 to 0x10000 bytes.

> diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
> index 4a64a98a434b6..c2b25f0dec0cf 100644
> --- a/arch/arm64/boot/dts/qcom/milos.dtsi
> +++ b/arch/arm64/boot/dts/qcom/milos.dtsi
> @@ -1948,7 +1948,7 @@ dispcc: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,milos-pdc", "qcom,pdc";
> -			reg = <0x0 0x0b220000 0x0 0x30000>,
> +			reg = <0x0 0x0b220000 0x0 0x10000>,

[Severity: Medium]
Does this change trigger a warning in the pdc driver during boot?

Looking at drivers/irqchip/qcom-pdc.c, the driver hardcodes a minimum
mapping size:

#define QCOM_PDC_SIZE 0x30000

And in qcom_pdc_probe(), it forces the mapping to be at least that size:

    res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
    if (res_size > resource_size(&res))
            pr_warn("%pOF: invalid reg size, please fix DT\n", node);

Since the driver expands the mapping back to 0x30000 and prints this
warning when the devicetree size is smaller, it seems this patch will
pollute the kernel log without actually reducing the mapped memory region.

Should the qcom-pdc driver be updated to support the smaller size before
or alongside this devicetree change?

>  			      <0x0 0x174000f0 0x0 0x64>;
>  			interrupt-parent = <&intc>;
>

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=22

Re: [PATCH v2 20/24] arm64: dts: qcom: lemans: Reduce OS PDC DRV span to 0x10000

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Reducing the DT `reg` size to `0x10000` triggers a kernel boot warning and mapping override in the `qcom-pdc` driver.
--

commit 35903595a207aeb5cc83a80438e763bb0fb48abe
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>

arm64: dts: qcom: lemans: Reduce OS PDC DRV span to 0x10000

This commit reduces the OS PDC DRV register window from 0x30000 to
0x10000 bytes for the pdc node on the Lemans platform.

> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
> index fe6e763518230..603d98002b405 100644
> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
> @@ -5543,7 +5543,7 @@ dispcc0: clock-controller@af00000 {
>  
>  		pdc: interrupt-controller@b220000 {
>  			compatible = "qcom,sa8775p-pdc", "qcom,pdc";
> -			reg = <0x0 0x0b220000 0x0 0x30000>,
> +			reg = <0x0 0x0b220000 0x0 0x10000>,
[Severity: Medium]
Will this reduction in the reg size trigger a boot warning from the qcom-pdc
driver?

Looking at drivers/irqchip/qcom-pdc.c:qcom_pdc_probe(), the driver hardcodes a
minimum resource size of 0x30000 (QCOM_PDC_SIZE):

drivers/irqchip/qcom-pdc.c:qcom_pdc_probe() {
	...
	res_size = max_t(resource_size_t, resource_size(&res), QCOM_PDC_SIZE);
	if (res_size > resource_size(&res))
		pr_warn("%pOF: invalid reg size, please fix DT\n", node);
	...
}

If the device tree size is less than 0x30000, the driver forcibly expands the
mapped size back to 0x30000 and unconditionally prints a warning.

Is there a companion patch to update the driver, or does this need to be fixed
to avoid the warning and actually reduce the mapped size in the kernel?

>  			      <0x0 0x17c000f0 0x0 0x64>;
>  			qcom,pdc-ranges = <0 480 40>,
>  					  <40 140 14>,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com?part=20