Re: [PATCH 17/18] arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] The device tree overlay extends `port@0` of the deserializer but fails to override its `status = "disabled"` property to `"okay"`.
- [Medium] The Makefile edits replace the generic V3Link fusion board DTB targets with camera-specific IMX219 targets, removing the ability to build the base fusion board device tree.
- [Medium] Fixed regulators for the IMX219 sensor are defined in the root node with generic names, which will cause collisions if multiple cameras are connected.
- [Low] The clock node name `imx219-xclk-00` does not conform to the `fixed-clock` binding schema.
--

commit a4f2bcb00cd6e7f16649b1b005247013f5bca8a0
Author: Jianzhong Xu <xuj@ti.com>

arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer

Arducam V3Link camera solution is shipped with an UB953 serializer
and an IMX219 sensor. Add an overlay for interfacing the UB953 serilaizer
and IMX219 sensor with the RX0 port on the UB960 deserializer.

Link: https://docs.arducam.com/V3Link-Camera-Solution/V3Link-Camera-Solution-on-TI-Platform/Introduction/

> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 824acb0d8ee3c..c8e29fdbe37f5 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
[ ... ]
> @@ -318,16 +321,18 @@ k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \
>  	k3-am68-sk-base-board-pcie1-ep.dtbo
>  k3-am68-sk-fpdlink-fusion-dtbs := k3-am68-sk-base-board.dtb \
>  	k3-j721e-sk-fpdlink-fusion.dtbo
> -k3-am68-sk-v3link-fusion-dtbs := k3-am68-sk-base-board.dtb \
> -	k3-am68-sk-v3link-fusion.dtbo
> +k3-am68-sk-v3link-fusion-imx219-dtbs := k3-am68-sk-base-board.dtb \
> +	k3-am68-sk-v3link-fusion.dtbo \
> +	k3-v3link-imx219-0-0.dtbo

[Severity: Medium]
Does replacing these generic V3Link fusion board DTB targets instead of
appending new ones break the ability to build the base fusion board device
tree? 

It appears users relying on the generic fusion board DTB to attach different
types of camera modules will no longer have those generic targets generated.

[ ... ]
> diff --git a/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso b/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso
> new file mode 100644
> index 0000000000000..049438f9fc898
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso
> @@ -0,0 +1,127 @@
[ ... ]
> +&{/} {
> +	clk_imx219_fixed_00: imx219-xclk-00 {

[Severity: Low]
Does the node name imx219-xclk-00 conform to the fixed-clock binding schema?
It looks like this might trigger a dtbs_check warning and should perhaps be
named clock-imx219-00 instead.

> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <24000000>;
> +	};
> +
> +	reg_2p8v: regulator-2p8v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "2P8V";

[Severity: Medium]
Will these generic regulator node and string names cause collisions if multiple
cameras are connected?

If another similar overlay is applied for a second port, would it merge the
identical node names or fail to register due to a duplicate regulator-name?
Could these include port-specific suffixes like regulator-imx219-0-0-2p8v?

> +		regulator-min-microvolt = <2800000>;
> +		regulator-max-microvolt = <2800000>;
> +		regulator-always-on;
> +	};
[ ... ]
> +&deserializer_0_ports {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	/* FPDLink RX 0 */
> +	port@0 {
> +		reg = <0>;
> +
> +		ub960_fpd3_1_in: endpoint {
> +			remote-endpoint = <&ub953_1_out>;
> +		};
> +	};

[Severity: High]
Does this port@0 extension need to include a status = "okay" property?

If the base board overlay k3-am68-sk-v3link-fusion.dtso initialized port@0
with status = "disabled", would the OF graph API skip endpoints because the
parent port remains disabled in the final DTB?

> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=17