Re: [PATCH V3 1/3] dt-binding: Add register-settings binding

[Chintan Vankar <c-vankar@ti.com>]

Hello Rajesh,

On 25/07/25 10:52, Rajesh Gumasta wrote:
> Add a new device-tree binding for a 'reg-settings' node that can be
> added to any device. This 'reg-settings' is used to populate register
> settings that need to be programmed for a given operating mode of the
> device. An example usage of the 'reg-settings' node is shown below for
> the NVIDIA Tegra MMC controller which needs to program a specific
> 'num-tuning-iterations' value in a register field for each operating
> mode:
> 
>    mmc@700b0000 {
> 
>      reg-settings {
> 
>        default-settings {
>          /* Default register setting */
>          nvidia,num-tuning-iterations = <0>;
>        };
> 
>        sdr50 {
>          /* SDR50 register setting */
>          nvidia,num-tuning-iterations = <4>;
>        };
> 
>        sdr104 {
>          /* SDR104 register setting */
>          nvidia,num-tuning-iterations = <2>;
>        };
> 
>        hs200 {
>          /* HS200 register setting */
>          nvidia,num-tuning-iterations = <2>;
>        };
>      };
>    };
> 
> The 'reg-settings' child nodes are defined according to the operating
> modes supported for a given device. Properties within each operating
> mode are then defined by the bindings for the devices that require them.
> 
> Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com>
> ---
>   .../bindings/regset/register-settings.yaml    | 31 +++++++++++++++++++
>   1 file changed, 31 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/regset/register-settings.yaml
> 
> diff --git a/Documentation/devicetree/bindings/regset/register-settings.yaml b/Documentation/devicetree/bindings/regset/register-settings.yaml
> new file mode 100644
> index 000000000000..4366cdd72813
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/regset/register-settings.yaml
> @@ -0,0 +1,31 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/regset/register-settings.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Register Settings
> +
> +maintainers:
> +  - Thierry Reding <thierry.reding@gmail.com>
> +  - Krishna Yarlagadda <kyarlagadda@nvidia.com>
> +  - Rajesh Gumasta <rgumasta@nvidia.com>
> +  - Jon Hunter <jonathanh@nvidia.com>
> +
> +description: |
> +  Register Settings provides a generic way to specify register configurations
> +  for any hardware controllers. Settings are specified under a "reg-settings"
> +  sub-node under the controller device tree node. It allows defining both
> +  default and operating mode specific register settings in the device tree.
> +
> +properties:
> +  reg-settings:
> +    type: object
> +    description: |
> +      Container node for register settings configurations. Each child node
> +      represents a specific configuration mode or operating condition.
> +
> +    additionalProperties:
> +      type: object
> +
> +additionalProperties: true

Following your series, I would like to bring to your attention that
Texas Instruments SoCs also have a component which requires similar kind
of configuration, named Timesync Router(TSR). It enables the
multiplexing of M inputs to N outputs, where inputs can be selectively
driven based on N output configuration. A detailed explanation of the
TSR and our attempts we tried to implement TSR can be found in following
RFC series:
https://lore.kernel.org/all/20250605063422.3813260-1-c-vankar@ti.com/
https://lore.kernel.org/all/20250205160119.136639-1-c-vankar@ti.com/

To implement TSR, the relevant registers must be configured via the
device tree. We initially assumed that the device could be handled as a
mux-controller and could be extended in the same subsystem, but it was
ineffective. Having explored both the approaches, we now plan to
implement TSR within misc subsystem, which aligns with the dt-bindings
that you have proposed in this series.

The purpose to replying over this series is to inform you that we also
have a component requiring configuration as outlined in this series. Let
us know if you have any suggestions for this.

Regards,
Chintan.