From: sashiko-bot@kernel.org
To: "Hans Zhang" <18255117159@163.com>
Cc: linux-pci@vger.kernel.org, wsa+renesas@sang-engineering.com
Subject: Re: [PATCH v2 2/8] PCI: cadence: LGA: Add max_link_speed field and 100 ms delay after link training
Date: Wed, 06 May 2026 20:39:17 +0000 [thread overview]
Message-ID: <20260506203918.7F1B4C2BCB0@smtp.kernel.org> (raw)
In-Reply-To: <20260506152346.166056-3-18255117159@163.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The generic PCIe compliance fix is silently bypassed for several Cadence host controllers due to uninitialized `max_link_speed`.
--
commit c86b1055b143ccb331408ed591540753d03613ac
Author: Hans Zhang <18255117159@163.com>
PCI: cadence: LGA: Add max_link_speed field and 100 ms delay after link training
This commit adds a mandatory 100 ms delay after link training completes for
speeds > 5.0 GT/s in the Cadence PCIe host controller to comply with PCIe
r6.0. It adds a max_link_speed field to track the speed and triggers the
delay if this speed is greater than 2.
> diff --git a/drivers/pci/controller/cadence/pcie-cadence-host-common.c b/drivers/pci/controller/cadence/pcie-cadence-host-common.c
> index 2b0211870f02a..51376f69d0076 100644
> --- a/drivers/pci/controller/cadence/pcie-cadence-host-common.c
> +++ b/drivers/pci/controller/cadence/pcie-cadence-host-common.c
[ ... ]
> @@ -115,6 +116,9 @@ int cdns_pcie_host_start_link(struct cdns_pcie_rc *rc,
> if (!ret && rc->quirk_retrain_flag)
> ret = cdns_pcie_retrain(pcie, pcie_link_up);
>
> + if (!ret)
> + pcie_wait_after_link_train(pcie->max_link_speed);
Since struct cdns_pcie is zero-initialized by glue drivers, max_link_speed
will default to 0 for drivers that are not updated by this series (such as
pcie-sg2042.c, pci-sky1.c, and pcie-cadence-plat.c).
If max_link_speed is 0, the condition max_link_speed > 2 in
pcie_wait_after_link_train() will evaluate to false, meaning the mandatory
100ms compliance delay will be bypassed for those platforms.
Could the core driver dynamically read the hardware capability (for example,
from cdns_pcie_readl(pcie, ... + PCI_EXP_LNKCAP) & PCI_EXP_LNKCAP_SLS) when
max_link_speed is 0 to ensure compliance across all Cadence host platforms?
> +
> return ret;
> }
> EXPORT_SYMBOL_GPL(cdns_pcie_host_start_link);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260506152346.166056-1-18255117159@163.com?part=2
next prev parent reply other threads:[~2026-05-06 20:39 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-06 15:23 [PATCH v2 0/8] PCI: Add common helper for 100 ms delay after link training Hans Zhang
2026-05-06 15:23 ` [PATCH v2 1/8] PCI: Add pcie_wait_after_link_train() helper Hans Zhang
2026-05-06 15:34 ` Biju Das
2026-05-06 16:16 ` Hans Zhang
2026-05-06 15:55 ` Manivannan Sadhasivam
2026-05-06 16:13 ` Hans Zhang
2026-05-06 20:18 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 2/8] PCI: cadence: LGA: Add max_link_speed field and 100 ms delay after link training Hans Zhang
2026-05-06 15:31 ` Biju Das
2026-05-06 16:21 ` Hans Zhang
2026-05-06 16:27 ` Biju Das
2026-05-06 16:31 ` Hans Zhang
2026-05-06 16:03 ` Manivannan Sadhasivam
2026-05-06 16:14 ` Hans Zhang
2026-05-06 20:39 ` sashiko-bot [this message]
2026-05-06 15:23 ` [PATCH v2 3/8] PCI: cadence: HPA: Add " Hans Zhang
2026-05-06 21:05 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 4/8] PCI: j721e: Set max_link_speed to enable 100 ms delay after link up Hans Zhang
2026-05-06 16:04 ` Manivannan Sadhasivam
2026-05-06 16:11 ` Hans Zhang
2026-05-06 16:51 ` Manivannan Sadhasivam
2026-05-06 21:12 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 5/8] PCI: dwc: Use common pcie_wait_after_link_train() helper Hans Zhang
2026-05-06 15:23 ` [PATCH v2 6/8] PCI: aardvark: Add 100 ms delay after link training Hans Zhang
2026-05-06 21:48 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 7/8] PCI: mediatek-gen3: " Hans Zhang
2026-05-06 22:14 ` sashiko-bot
2026-05-06 15:23 ` [PATCH v2 8/8] PCI: rzg3s-host: " Hans Zhang
2026-05-06 16:52 ` Claudiu Beznea
2026-05-09 16:25 ` Hans Zhang
2026-05-06 22:28 ` sashiko-bot
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