Re: [PATCH v2 3/8] PCI: cadence: HPA: Add 100 ms delay after link training

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The mandatory 100 ms PCIe link training delay will be silently bypassed for the Cadence HPA path because `pcie->max_link_speed` is never initialized.
--

commit febef6953b8de7d70ee1c2d2e0d894d52ff3e063
Author: Hans Zhang <18255117159@163.com>

PCI: cadence: HPA: Add 100 ms delay after link training

This commit adds a 100 ms delay after link training for the Cadence HPA PCIe
controller by calling pcie_wait_after_link_train(). It intends to ensure
compliance with the PCIe specification for speeds greater than 5.0 GT/s.

> diff --git a/drivers/pci/controller/cadence/pcie-cadence-host-hpa.c b/drivers/pci/controller/cadence/pcie-cadence-host-hpa.c
> index 0f540bed58e88..62e939906785b 100644
> --- a/drivers/pci/controller/cadence/pcie-cadence-host-hpa.c
> +++ b/drivers/pci/controller/cadence/pcie-cadence-host-hpa.c
[ ... ]
> @@ -304,6 +305,8 @@ int cdns_pcie_hpa_host_link_setup(struct cdns_pcie_rc *rc)
>  	ret = cdns_pcie_host_wait_for_link(pcie, cdns_pcie_hpa_link_up);
>  	if (ret)
>  		dev_dbg(dev, "PCIe link never came up\n");
> +	else
> +		pcie_wait_after_link_train(pcie->max_link_speed);

Will pcie->max_link_speed ever be initialized to a value greater than 2 in the
HPA path?

The inline function pcie_wait_after_link_train() executes the 100 ms delay only
if max_link_speed > 2:

drivers/pci/pci.h:pcie_wait_after_link_train() {
	if (max_link_speed > 2)
		msleep(PCIE_RESET_CONFIG_WAIT_MS);
}

The HPA path is uniquely utilized by the pci-sky1.c glue driver, but neither
pci-sky1.c nor the Cadence core code appears to parse or assign a value to
pcie->max_link_speed.

Because the struct cdns_pcie is zero-initialized, pcie->max_link_speed remains
0. Passing 0 to pcie_wait_after_link_train() fails the condition check, which
seems to completely bypass the required 100 ms delay.

>  
>  	return ret;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260506152346.166056-1-18255117159@163.com?part=3