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From: <dan.j.williams@intel.com>
To: Terry Bowman <terry.bowman@amd.com>, <dave@stgolabs.net>,
	<jonathan.cameron@huawei.com>, <dave.jiang@intel.com>,
	<alison.schofield@intel.com>, <dan.j.williams@intel.com>,
	<bhelgaas@google.com>, <shiju.jose@huawei.com>,
	<ming.li@zohomail.com>, <Smita.KoralahalliChannabasappa@amd.com>,
	<rrichter@amd.com>, <dan.carpenter@linaro.org>,
	<PradeepVineshReddy.Kodamati@amd.com>, <lukas@wunner.de>,
	<Benjamin.Cheatham@amd.com>,
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	<linux-cxl@vger.kernel.org>, <alucerop@amd.com>,
	<ira.weiny@intel.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<terry.bowman@amd.com>
Subject: Re: [RESEND v13 06/25] cxl: Move CXL driver's RCH error handling into core/ras_rch.c
Date: Tue, 18 Nov 2025 19:20:13 -0800	[thread overview]
Message-ID: <691d376d5a132_1a3751004d@dwillia2-mobl4.notmuch> (raw)
In-Reply-To: <20251104170305.4163840-7-terry.bowman@amd.com>

Terry Bowman wrote:
> Restricted CXL Host (RCH) protocol error handling uses a procedure distinct
> from the CXL Virtual Hierarchy (VH) handling. This is because of the
> differences in the RCH and VH topologies. Improve the maintainability and
> add ability to enable/disable RCH handling.
> 
> Move and combine the RCH handling code into a single block conditionally
> compiled with the CONFIG_CXL_RCH_RAS kernel config.
> 
> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> 
> ---
> 
> Changes in v12->v13:
> - None
> 
> Changes v11->v12:
> - Moved CXL_RCH_RAS Kconfig definition here from following commit.
> 
> Changes v10->v11:
> - New patch
> ---
>  drivers/cxl/Kconfig        |   7 +++
>  drivers/cxl/core/Makefile  |   1 +
>  drivers/cxl/core/core.h    |   5 +-
>  drivers/cxl/core/pci.c     | 115 -----------------------------------
>  drivers/cxl/core/ras_rch.c | 120 +++++++++++++++++++++++++++++++++++++
>  tools/testing/cxl/Kbuild   |   1 +
>  6 files changed, 132 insertions(+), 117 deletions(-)
>  create mode 100644 drivers/cxl/core/ras_rch.c
> 
> diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
> index 217888992c88..ffe6ad981434 100644
> --- a/drivers/cxl/Kconfig
> +++ b/drivers/cxl/Kconfig
> @@ -237,4 +237,11 @@ config CXL_RAS
>  	def_bool y
>  	depends on ACPI_APEI_GHES && PCIEAER && CXL_PCI
>  
> +config CXL_RCH_RAS
> +	bool "CXL: Restricted CXL Host (RCH) protocol error handling"
> +	def_bool n

"n" is already the default... but I think this optionality should be
scrapped.

> +	depends on CXL_RAS
> +	help
> +	  RAS support for Restricted CXL Host (RCH) defined in CXL1.1.

I can not imagine an end user or distro ever knowing that they need to
disable or enable this option. What is the motivation for making this
support optional going forward and defaulting RCH error handling off
after all this time?

...does it get in the way of VH error handling?

Otherwise the decluttering of adding a ras_rch.c file looks ok on its
own.

  parent reply	other threads:[~2025-11-19  3:20 UTC|newest]

Thread overview: 103+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-04 17:02 [RESEND v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2025-11-04 17:02 ` [RESEND v13 01/25] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h Terry Bowman
2025-11-04 17:50   ` Jonathan Cameron
2025-11-19  3:19   ` dan.j.williams
2025-12-08 18:04   ` Bjorn Helgaas
2025-12-08 22:13     ` Bowman, Terry
2025-11-04 17:02 ` [RESEND v13 02/25] PCI/CXL: Introduce pcie_is_cxl() Terry Bowman
2025-11-04 17:52   ` Jonathan Cameron
2025-11-19  3:19   ` dan.j.williams
2025-11-19 15:55     ` Bowman, Terry
2025-11-19 23:34       ` dan.j.williams
2025-11-21 20:31   ` Gregory Price
2025-11-04 17:02 ` [RESEND v13 03/25] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Terry Bowman
2025-11-04 17:53   ` Jonathan Cameron
2025-11-19  3:20   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 04/25] cxl/pci: Remove unnecessary CXL RCH " Terry Bowman
2025-11-19  3:20   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 05/25] cxl: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c Terry Bowman
2025-11-19  3:20   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 06/25] cxl: Move CXL driver's RCH error handling into core/ras_rch.c Terry Bowman
2025-11-04 18:03   ` Jonathan Cameron
2025-11-19  3:20   ` dan.j.williams [this message]
2025-11-19 16:07     ` Bowman, Terry
2025-11-04 17:02 ` [RESEND v13 07/25] CXL/AER: Replace device_lock() in cxl_rch_handle_error_iter() with guard() lock Terry Bowman
2025-11-04 18:05   ` Jonathan Cameron
2025-11-04 19:53   ` Dave Jiang
2025-11-19  3:20   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 08/25] CXL/AER: Move AER drivers RCH error handling into pcie/aer_cxl_rch.c Terry Bowman
2025-11-19  3:20   ` dan.j.williams
2025-11-19  8:26     ` Lukas Wunner
2025-11-19 23:36       ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 09/25] PCI/AER: Report CXL or PCIe bus error type in trace logging Terry Bowman
2025-11-04 18:08   ` Jonathan Cameron
2025-11-04 18:26   ` Bjorn Helgaas
2025-11-04 17:02 ` [RESEND v13 10/25] cxl/pci: Update RAS handler interfaces to also support CXL Ports Terry Bowman
2025-11-04 18:10   ` Jonathan Cameron
2025-11-11  8:17   ` Alison Schofield
2025-11-19  3:19   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 11/25] cxl/pci: Log message if RAS registers are unmapped Terry Bowman
2025-11-19  3:27   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 12/25] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports Terry Bowman
2025-11-19 21:23   ` dan.j.williams
2025-11-19 22:02     ` Bowman, Terry
2025-11-19 23:40       ` dan.j.williams
2025-11-21 14:56         ` Bowman, Terry
2025-11-04 17:02 ` [RESEND v13 13/25] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors Terry Bowman
2025-11-05  8:30   ` Alejandro Lucero Palau
2025-11-19 22:00   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 14/25] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers Terry Bowman
2025-11-04 18:15   ` Jonathan Cameron
2025-11-04 20:03   ` Dave Jiang
2025-11-11  8:23   ` Alison Schofield
2025-11-04 17:02 ` [RESEND v13 15/25] CXL/PCI: Introduce PCI_ERS_RESULT_PANIC Terry Bowman
2025-11-04 19:03   ` Bjorn Helgaas
2025-11-20  0:17   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 16/25] CXL/AER: Introduce pcie/aer_cxl_vh.c in AER driver for forwarding CXL errors Terry Bowman
2025-11-20  0:44   ` dan.j.williams
2025-11-20  0:53   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 17/25] cxl: Introduce cxl_pci_drv_bound() to check for bound driver Terry Bowman
2025-11-05 17:51   ` Gregory Price
2025-11-05 19:03     ` Gregory Price
2025-11-05 22:26       ` Gregory Price
2025-11-06 17:11         ` Gregory Price
2025-11-06 23:32         ` Bowman, Terry
2025-11-11  8:33   ` Alison Schofield
2025-11-13 21:42     ` Alison Schofield
2025-11-13 22:39       ` Bowman, Terry
2025-11-20  1:24   ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 18/25] cxl: Change CXL handlers to use guard() instead of scoped_guard() Terry Bowman
2025-11-04 18:18   ` Jonathan Cameron
2025-11-04 20:15   ` Dave Jiang
2025-11-04 17:02 ` [RESEND v13 19/25] cxl/pci: Introduce CXL protocol error handlers for Endpoints Terry Bowman
2025-11-04 18:29   ` Jonathan Cameron
2025-11-04 19:09   ` Bjorn Helgaas
2025-11-04 17:03 ` [RESEND v13 20/25] CXL/PCI: Introduce CXL Port protocol error handlers Terry Bowman
2025-11-04 18:32   ` Jonathan Cameron
2025-11-04 21:20   ` Dave Jiang
2025-11-04 21:27     ` Bowman, Terry
2025-11-04 23:39       ` Dave Jiang
2025-11-04 17:03 ` [RESEND v13 21/25] PCI/AER: Dequeue forwarded CXL error Terry Bowman
2025-11-04 18:40   ` Jonathan Cameron
2025-11-04 18:45   ` Bjorn Helgaas
2025-11-20  3:33   ` dan.j.williams
2025-11-04 17:03 ` [RESEND v13 22/25] CXL/PCI: Export and rename merge_result() to pci_ers_merge_result() Terry Bowman
2025-11-04 18:41   ` Jonathan Cameron
2025-11-04 19:03   ` Bjorn Helgaas
2025-11-14 15:20     ` Bowman, Terry
2025-11-14 16:09       ` Jonathan Cameron
2025-11-04 17:03 ` [RESEND v13 23/25] CXL/PCI: Introduce CXL uncorrectable protocol error recovery Terry Bowman
2025-11-04 18:47   ` Jonathan Cameron
2025-11-04 23:43     ` Dave Jiang
2025-11-05 14:59       ` Bowman, Terry
2025-11-05 16:10         ` Dave Jiang
2025-11-11  8:37   ` Alison Schofield
2025-12-08 18:40   ` Bjorn Helgaas
2025-11-04 17:03 ` [RESEND v13 24/25] CXL/PCI: Enable CXL protocol errors during CXL Port probe Terry Bowman
2025-11-04 17:03 ` [RESEND v13 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup Terry Bowman
2025-11-20  3:10   ` dan.j.williams
2025-11-04 19:11 ` [RESEND v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging Bjorn Helgaas
2025-11-04 21:54   ` Bowman, Terry
2025-11-04 22:12     ` Bjorn Helgaas
2025-12-04 17:30       ` Bowman, Terry
2025-12-08 18:42         ` Bjorn Helgaas

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