From: Lukas Wunner <lukas@wunner.de>
To: dan.j.williams@intel.com
Cc: Terry Bowman <terry.bowman@amd.com>,
dave@stgolabs.net, jonathan.cameron@huawei.com,
dave.jiang@intel.com, alison.schofield@intel.com,
bhelgaas@google.com, shiju.jose@huawei.com, ming.li@zohomail.com,
Smita.KoralahalliChannabasappa@amd.com, rrichter@amd.com,
dan.carpenter@linaro.org, PradeepVineshReddy.Kodamati@amd.com,
Benjamin.Cheatham@amd.com,
sathyanarayanan.kuppuswamy@linux.intel.com,
linux-cxl@vger.kernel.org, alucerop@amd.com, ira.weiny@intel.com,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [RESEND v13 08/25] CXL/AER: Move AER drivers RCH error handling into pcie/aer_cxl_rch.c
Date: Wed, 19 Nov 2025 09:26:27 +0100 [thread overview]
Message-ID: <aR1_M_i3yIygd8v-@wunner.de> (raw)
In-Reply-To: <691d377611d7b_1a37510056@dwillia2-mobl4.notmuch>
On Tue, Nov 18, 2025 at 07:20:22PM -0800, dan.j.williams@intel.com wrote:
> > +++ b/drivers/pci/pcie/aer.c
> > @@ -1130,7 +1130,7 @@ static bool find_source_device(struct pci_dev *parent,
> > * Note: AER must be enabled and supported by the device which must be
> > * checked in advance, e.g. with pcie_aer_is_native().
> > */
> > -static void pci_aer_unmask_internal_errors(struct pci_dev *dev)
> > +void pci_aer_unmask_internal_errors(struct pci_dev *dev)
> > {
> > int aer = dev->aer_cap;
> > u32 mask;
> > @@ -1143,116 +1143,25 @@ static void pci_aer_unmask_internal_errors(struct pci_dev *dev)
> > mask &= ~PCI_ERR_COR_INTERNAL;
> > pci_write_config_dword(dev, aer + PCI_ERR_COR_MASK, mask);
> > }
> > +EXPORT_SYMBOL_GPL(pci_aer_unmask_internal_errors);
>
> I can not imagine any other driver but the CXL core consuming this
> symbol, so how about:
>
> EXPORT_SYMBOL_FOR_MODULES(pci_aer_unmask_internal_errors, "cxl_core")
The "xe" driver needs to unmask Uncorrectable Internal Errors
(the default is "masked" per PCIe r7.0 sec 7.8.4.3) and could
take advantage of this helper, so I've asked Terry to keep it
available for anyone to use:
https://lore.kernel.org/all/aK66OcdL4Meb0wFt@wunner.de/
Thanks,
Lukas
next prev parent reply other threads:[~2025-11-19 8:26 UTC|newest]
Thread overview: 103+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-04 17:02 [RESEND v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2025-11-04 17:02 ` [RESEND v13 01/25] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h Terry Bowman
2025-11-04 17:50 ` Jonathan Cameron
2025-11-19 3:19 ` dan.j.williams
2025-12-08 18:04 ` Bjorn Helgaas
2025-12-08 22:13 ` Bowman, Terry
2025-11-04 17:02 ` [RESEND v13 02/25] PCI/CXL: Introduce pcie_is_cxl() Terry Bowman
2025-11-04 17:52 ` Jonathan Cameron
2025-11-19 3:19 ` dan.j.williams
2025-11-19 15:55 ` Bowman, Terry
2025-11-19 23:34 ` dan.j.williams
2025-11-21 20:31 ` Gregory Price
2025-11-04 17:02 ` [RESEND v13 03/25] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Terry Bowman
2025-11-04 17:53 ` Jonathan Cameron
2025-11-19 3:20 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 04/25] cxl/pci: Remove unnecessary CXL RCH " Terry Bowman
2025-11-19 3:20 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 05/25] cxl: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c Terry Bowman
2025-11-19 3:20 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 06/25] cxl: Move CXL driver's RCH error handling into core/ras_rch.c Terry Bowman
2025-11-04 18:03 ` Jonathan Cameron
2025-11-19 3:20 ` dan.j.williams
2025-11-19 16:07 ` Bowman, Terry
2025-11-04 17:02 ` [RESEND v13 07/25] CXL/AER: Replace device_lock() in cxl_rch_handle_error_iter() with guard() lock Terry Bowman
2025-11-04 18:05 ` Jonathan Cameron
2025-11-04 19:53 ` Dave Jiang
2025-11-19 3:20 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 08/25] CXL/AER: Move AER drivers RCH error handling into pcie/aer_cxl_rch.c Terry Bowman
2025-11-19 3:20 ` dan.j.williams
2025-11-19 8:26 ` Lukas Wunner [this message]
2025-11-19 23:36 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 09/25] PCI/AER: Report CXL or PCIe bus error type in trace logging Terry Bowman
2025-11-04 18:08 ` Jonathan Cameron
2025-11-04 18:26 ` Bjorn Helgaas
2025-11-04 17:02 ` [RESEND v13 10/25] cxl/pci: Update RAS handler interfaces to also support CXL Ports Terry Bowman
2025-11-04 18:10 ` Jonathan Cameron
2025-11-11 8:17 ` Alison Schofield
2025-11-19 3:19 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 11/25] cxl/pci: Log message if RAS registers are unmapped Terry Bowman
2025-11-19 3:27 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 12/25] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports Terry Bowman
2025-11-19 21:23 ` dan.j.williams
2025-11-19 22:02 ` Bowman, Terry
2025-11-19 23:40 ` dan.j.williams
2025-11-21 14:56 ` Bowman, Terry
2025-11-04 17:02 ` [RESEND v13 13/25] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors Terry Bowman
2025-11-05 8:30 ` Alejandro Lucero Palau
2025-11-19 22:00 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 14/25] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers Terry Bowman
2025-11-04 18:15 ` Jonathan Cameron
2025-11-04 20:03 ` Dave Jiang
2025-11-11 8:23 ` Alison Schofield
2025-11-04 17:02 ` [RESEND v13 15/25] CXL/PCI: Introduce PCI_ERS_RESULT_PANIC Terry Bowman
2025-11-04 19:03 ` Bjorn Helgaas
2025-11-20 0:17 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 16/25] CXL/AER: Introduce pcie/aer_cxl_vh.c in AER driver for forwarding CXL errors Terry Bowman
2025-11-20 0:44 ` dan.j.williams
2025-11-20 0:53 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 17/25] cxl: Introduce cxl_pci_drv_bound() to check for bound driver Terry Bowman
2025-11-05 17:51 ` Gregory Price
2025-11-05 19:03 ` Gregory Price
2025-11-05 22:26 ` Gregory Price
2025-11-06 17:11 ` Gregory Price
2025-11-06 23:32 ` Bowman, Terry
2025-11-11 8:33 ` Alison Schofield
2025-11-13 21:42 ` Alison Schofield
2025-11-13 22:39 ` Bowman, Terry
2025-11-20 1:24 ` dan.j.williams
2025-11-04 17:02 ` [RESEND v13 18/25] cxl: Change CXL handlers to use guard() instead of scoped_guard() Terry Bowman
2025-11-04 18:18 ` Jonathan Cameron
2025-11-04 20:15 ` Dave Jiang
2025-11-04 17:02 ` [RESEND v13 19/25] cxl/pci: Introduce CXL protocol error handlers for Endpoints Terry Bowman
2025-11-04 18:29 ` Jonathan Cameron
2025-11-04 19:09 ` Bjorn Helgaas
2025-11-04 17:03 ` [RESEND v13 20/25] CXL/PCI: Introduce CXL Port protocol error handlers Terry Bowman
2025-11-04 18:32 ` Jonathan Cameron
2025-11-04 21:20 ` Dave Jiang
2025-11-04 21:27 ` Bowman, Terry
2025-11-04 23:39 ` Dave Jiang
2025-11-04 17:03 ` [RESEND v13 21/25] PCI/AER: Dequeue forwarded CXL error Terry Bowman
2025-11-04 18:40 ` Jonathan Cameron
2025-11-04 18:45 ` Bjorn Helgaas
2025-11-20 3:33 ` dan.j.williams
2025-11-04 17:03 ` [RESEND v13 22/25] CXL/PCI: Export and rename merge_result() to pci_ers_merge_result() Terry Bowman
2025-11-04 18:41 ` Jonathan Cameron
2025-11-04 19:03 ` Bjorn Helgaas
2025-11-14 15:20 ` Bowman, Terry
2025-11-14 16:09 ` Jonathan Cameron
2025-11-04 17:03 ` [RESEND v13 23/25] CXL/PCI: Introduce CXL uncorrectable protocol error recovery Terry Bowman
2025-11-04 18:47 ` Jonathan Cameron
2025-11-04 23:43 ` Dave Jiang
2025-11-05 14:59 ` Bowman, Terry
2025-11-05 16:10 ` Dave Jiang
2025-11-11 8:37 ` Alison Schofield
2025-12-08 18:40 ` Bjorn Helgaas
2025-11-04 17:03 ` [RESEND v13 24/25] CXL/PCI: Enable CXL protocol errors during CXL Port probe Terry Bowman
2025-11-04 17:03 ` [RESEND v13 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup Terry Bowman
2025-11-20 3:10 ` dan.j.williams
2025-11-04 19:11 ` [RESEND v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging Bjorn Helgaas
2025-11-04 21:54 ` Bowman, Terry
2025-11-04 22:12 ` Bjorn Helgaas
2025-12-04 17:30 ` Bowman, Terry
2025-12-08 18:42 ` Bjorn Helgaas
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