Re: [PATCH] PCI: dwc: ep: Cache MSI outbound iATU mapping

[Niklas Cassel <cassel@kernel.org>]

On Mon, Dec 22, 2025 at 01:49:21PM +0530, Krishna Chaitanya Chundru wrote:
> On 12/10/2025 12:43 PM, Niklas Cassel wrote:
> > @@ -786,14 +819,36 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
> >   	}
> >   	msg_addr = dw_pcie_ep_align_addr(epc, msg_addr, &map_size, &offset);
> > -	ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
> > -				  map_size);
> > -	if (ret)
> > -		return ret;
> > -	writel(msg_data, ep->msi_mem + offset);
> > +	/*
> > +	 * Program the outbound iATU once and keep it enabled.
> > +	 *
> > +	 * The spec warns that updating iATU registers while there are
> > +	 * operations in flight on the AXI bridge interface is not
> > +	 * supported, so we avoid reprogramming the region on every MSI-X,
> > +	 * specifically unmapping immediately after writel().
> > +	 */
> > +	if (!ep->msi_iatu_mapped) {
> This is wrong, in MSIX each vector can give you different address, you can't
> expect same address for
> all the vectors in MSIX table. In ARM based system you might see only single
> address for X86 this will
> change.

Ok, thank you. I did not know.


> 
> And also we see in MSIX the address are getting updated at runtime with x86
> windows host machines.

My idea was to add a pci_epc_set_currently_enabled_irq_type() API, and then
let the EPF driver call that if it wants to change the IRQ type.

But... if the msg_addr can change at runtime, even when the IRQ type does
not change, then a pci_epc_set_currently_enabled_irq_type() API will not
help.

I guess we will need to come up with something else for the MSI-X case.


> 
> Use the MSIX doorbell method which will not use iATU at all,
> dw_pcie_ep_raise_msix_irq_doorbell().

AFAICT, right now, the only driver ever calling this function is:
drivers/pci/controller/dwc/pci-layerscape-ep.c

Are you suggesting that we somehow change all the other DWC based EPC
drivers' .raise_irq() callback to call dw_pcie_ep_raise_msix_irq_doorbell()
instead of dw_pcie_ep_raise_msix_irq() for case PCI_IRQ_MSIX ?

That sounds like a big change that would need to be tested and verified
for each DWC based EPC driver.


Kind regards,
Niklas