From: Niklas Cassel <cassel@kernel.org>
To: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Frank Li" <Frank.Li@nxp.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Koichiro Den" <den@valinux.co.jp>,
linux-pci@vger.kernel.org, "Shawn Lin" <shawn.lin@rock-chips.com>
Subject: Re: [PATCH] PCI: dwc: ep: Cache MSI outbound iATU mapping
Date: Mon, 22 Dec 2025 14:00:31 +0100 [thread overview]
Message-ID: <aUlA7y95SUC-QA4T@ryzen> (raw)
In-Reply-To: <3b34aa66-a418-4f6b-930a-0728d87d79b6@oss.qualcomm.com>
+ Shawn
On Mon, Dec 22, 2025 at 05:53:27PM +0530, Krishna Chaitanya Chundru wrote:
>
>
> On 12/22/2025 4:41 PM, Niklas Cassel wrote:
> > On Mon, Dec 22, 2025 at 03:28:30PM +0530, Manivannan Sadhasivam wrote:
> > > > Use the MSIX doorbell method which will not use iATU at all,
> > > > dw_pcie_ep_raise_msix_irq_doorbell().
> > > >
> > > I think this is the safe bet since this feature doesn't seem like an optional
> > > one.
> > >
> > > Niklas, if you can just fix MSI in this patch and leave out MSI-X for the vendor
> > > drivers to transition to doorbell, I'm OK to merge it. Otherwise, I don't know
> > > how you can reliably fix MSI-X generation with AXI slave interface.
> > FWIW, I did try to simply change:
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> > index 8f2cc1ef25e3..00770f9786e3 100644
> > --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> > +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> > @@ -319,7 +319,8 @@ static int rockchip_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
> > case PCI_IRQ_MSI:
> > return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num);
> > case PCI_IRQ_MSIX:
> > - return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num);
> > + return dw_pcie_ep_raise_msix_irq_doorbell(ep, func_no,
> > + interrupt_num);
> > default:
> > dev_err(pci->dev, "UNKNOWN IRQ type\n");
> > }
> >
> >
> > For the pcie-dw-rockchip driver, but it is not working:
> > [ 130.042849] nvme nvme0: I/O tag 0 (1000) QID 0 timeout, completion polled
> >
> > Without this change, things work.
> >
> > Perhaps this feature is not an optional one, but at least we will require
> > more changes than a simple one liner.
> Hi Niklas,
>
> It should be automatic only, no extra configurations should be
> required, I believe your
> HW doesn't support this feature, from spec 6..0a, sec 3.9.1.3
> iMSIX-TX: Integrated MSI-X Transmit (USP)
> I believe your HW is not generated with MSIX_TABLE_EN =1. In that
> case you can't use this feature.
Looking at the RK3588 TRM, it does have register:
USP_PCIE_PL_MSIX_DOORBELL_OFF
Address: Operational Base + offset (0x0248)
Port Logic registers start at offset 0x700 on this SoC,
so 0x700 + 0x248 == 0x948, which matches:
drivers/pci/controller/dwc/pcie-designware.h:#define PCIE_MSIX_DOORBELL 0x948
I don't think the TRM would include this register if the
DWC coere was not generated with MSIX_TABLE_EN=1.
Shawn, any suggestions?
For full thread, see:
https://lore.kernel.org/linux-pci/3b34aa66-a418-4f6b-930a-0728d87d79b6@oss.qualcomm.com/T/#t
FWIW, Krishna Chaitanya, I did try the dw_pcie_ep_raise_msix_irq_doorbell()
change above also with the pci-epf-test EPF driver, and it also caused the
pci-epf-test driver to stop working.
Kind regards,
Niklas
next prev parent reply other threads:[~2025-12-22 13:00 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-10 7:13 [PATCH] PCI: dwc: ep: Cache MSI outbound iATU mapping Niklas Cassel
2025-12-22 8:19 ` Krishna Chaitanya Chundru
2025-12-22 8:36 ` Niklas Cassel
2025-12-22 8:42 ` Krishna Chaitanya Chundru
2025-12-22 8:49 ` Niklas Cassel
2025-12-22 9:58 ` Manivannan Sadhasivam
2025-12-22 10:42 ` Niklas Cassel
2025-12-22 11:11 ` Niklas Cassel
2025-12-22 11:19 ` Manivannan Sadhasivam
2025-12-22 12:23 ` Krishna Chaitanya Chundru
2025-12-22 13:00 ` Niklas Cassel [this message]
2025-12-23 1:12 ` Shawn Lin
2025-12-23 4:35 ` Krishna Chaitanya Chundru
2025-12-23 6:23 ` Shawn Lin
2025-12-23 7:12 ` Niklas Cassel
2026-01-05 11:06 ` Niklas Cassel
2026-01-06 1:37 ` Shawn Lin
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