Re: [PATCH] PCI: dwc: ep: Cache MSI outbound iATU mapping

[Niklas Cassel <cassel@kernel.org>]

On Mon, Dec 22, 2025 at 03:28:30PM +0530, Manivannan Sadhasivam wrote:
> > This is wrong, in MSIX each vector can give you different address, you can't
> > expect same address for
> > all the vectors in MSIX table. In ARM based system you might see only single
> > address for X86 this will
> > change.
> > 
> > And also we see in MSIX the address are getting updated at runtime with x86
> > windows host machines.
> > 
> 
> The spec allows changing the MSI-X address/data pair when the corresponding
> vector is *masked*, and classifies the behavior as undefined if address/data
> pair gets changed while the vector is *unmasked*.

MSI also supports masking as an optional feature.

Too bad that the spec just mentions that the cached MSI-X address/data is
allowed to be changed when masked, but does not mention the same for MSI.


> 
> If we were to enable caching, then we need to take note of the above point. But
> the EP implementation doesn't get any notification when the vector gets
> masked/unmasked dynamically, which makes it trickier to implement the caching in
> SW.
> 
> > Use the MSIX doorbell method which will not use iATU at all,
> > dw_pcie_ep_raise_msix_irq_doorbell().
> > 
> 
> I think this is the safe bet since this feature doesn't seem like an optional
> one.
> 
> Niklas, if you can just fix MSI in this patch and leave out MSI-X for the vendor
> drivers to transition to doorbell, I'm OK to merge it. Otherwise, I don't know
> how you can reliably fix MSI-X generation with AXI slave interface.

Sounds like a plan.


Kind regards,
Niklas