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From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: sashiko-reviews@lists.linux.dev
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [Patch v9 13/24] perf: Add sampling support for SIMD registers
Date: Wed, 8 Jul 2026 09:13:51 +0800	[thread overview]
Message-ID: <b27063e8-b230-40e0-a5ae-a902612e8845@linux.intel.com> (raw)
In-Reply-To: <20260706023436.5DFDD1F00A3A@smtp.kernel.org>


On 7/6/2026 10:34 AM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
>
> New issues:
> - [Medium] Uninitialized, flag-gated syscall parameters are unconditionally passed to and evaluated by the validation function `perf_simd_reg_validate()`, breaking trust boundaries.
>
> Pre-existing issues:
> - [High] The dynamic size added by PERF_SAMPLE_REGS_INTR (and exacerbated by SIMD registers) bypasses the size capping applied during PERF_SAMPLE_STACK_USER, leading to a U16_MAX integer overflow and ring buffer corruption.
> --
>
> commit 8a8cf6dc3b640f823c8a7990b8c46e78cd38719e
> Author: Kan Liang <kan.liang@linux.intel.com>
>
> perf: Add sampling support for SIMD registers
>
> This commit introduces support for sampling SIMD registers during profiling
> by adding new attribute fields to the perf_event_attr structure. It provides
> a new output format and the PERF_SAMPLE_REGS_ABI_SIMD ABI to represent the
> number and width of these registers based on user configuration.
>
>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>> index 0239864029bec..ce93c23b3a33f 100644
>> --- a/kernel/events/core.c
>> +++ b/kernel/events/core.c
>> @@ -8773,6 +8877,10 @@ void perf_prepare_sample(struct perf_sample_data *data,
>>  			u64 mask = event->attr.sample_regs_intr;
>>  
>>  			size += hweight64(mask) * sizeof(u64);
>> +			if (event_has_simd_regs(event)) {
>> +				size += perf_update_xregs_size(event, true);
>> +				data->regs_intr.abi |= PERF_SAMPLE_REGS_ABI_SIMD;
>> +			}
>>  		}
>>  
>>  		data->dyn_size += size;
> [Severity: High]
> This is a pre-existing issue, but does adding this new SIMD register size
> cause a buffer overrun by overflowing data->dyn_size past USHRT_MAX?
>
> Earlier in perf_prepare_sample(), when PERF_SAMPLE_STACK_USER is processed,
> perf_sample_ustack_size() caps the stack dump size so that the total dynamic
> size precisely reaches USHRT_MAX. 
>
> Since PERF_SAMPLE_REGS_INTR is unconditionally processed after
> PERF_SAMPLE_STACK_USER, adding its size (which can now be significantly
> larger with SIMD registers) to data->dyn_size will exceed 65535 bytes.
>
> Could this truncate the 16-bit header size and cause perf_output_sample()
> to write far more data than was allocated in the ring buffer?

The function perf_simd_reg_validate() would check if SIMD register size
exceeds USHRT_MAX. If so, the event creation would fail before sampling.


>
>> [ ... ]
>> @@ -13694,6 +13809,16 @@ static int perf_copy_attr(struct perf_event_attr __user *uattr,
>>  		ret = perf_reg_validate(attr->sample_regs_user);
>>  		if (ret)
>>  			return ret;
>> +		ret = perf_simd_reg_validate(attr->sample_type,
>> +					     attr->sample_simd_regs_enabled,
>> +					     attr->sample_simd_vec_reg_qwords,
>> +					     attr->sample_simd_vec_reg_intr,
>> +					     attr->sample_simd_vec_reg_user,
>> +					     attr->sample_simd_pred_reg_qwords,
>> +					     attr->sample_simd_pred_reg_intr,
>> +					     attr->sample_simd_pred_reg_user);
>> +		if (ret)
>> +			return ret;
>>  	}
> [Severity: Medium]
> Could this pass uninitialized syscall parameters to the validation logic?
>
> When PERF_SAMPLE_REGS_USER is set but PERF_SAMPLE_REGS_INTR is not, the user
> is not required to initialize the sample_simd_vec_reg_intr or
> sample_simd_pred_reg_intr fields. 
>
> If perf_simd_reg_validate() evaluates these uninitialized fields:
>
> arch/x86/kernel/perf_regs.c:perf_simd_reg_validate() {
>     if (!vec_mask_intr && !vec_mask_user)
>         return -EINVAL;
> }
>
> Does this allow an invalid configuration where vec_mask_user is zero to
> bypass validation because vec_mask_intr contains non-zero garbage data?

Hmm, it looks a overkill here. It would be fair enough to check REGS_USER
and REGS_INTR separately. Thanks.


>

  reply	other threads:[~2026-07-08  1:13 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-06  1:54 [Patch v9 00/24] Support SIMD/eGPRs/SSP registers sampling for perf Dapeng Mi
2026-07-06  1:54 ` [Patch v9 01/24] perf/x86: Fix two error-path and hybrid PMU guard issues Dapeng Mi
2026-07-06  2:21   ` sashiko-bot
2026-07-06  8:05     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 02/24] perf/x86: Move hybrid PMU initialization before x86_pmu_starting_cpu() Dapeng Mi
2026-07-06  2:18   ` sashiko-bot
2026-07-06  8:33     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 03/24] perf/x86/intel: Enable large PEBS sampling for XMMs Dapeng Mi
2026-07-06  1:54 ` [Patch v9 04/24] perf/x86/intel: Convert x86_perf_regs to per-cpu variables Dapeng Mi
2026-07-06  1:54 ` [Patch v9 05/24] perf: Eliminate duplicate arch-specific function definitions Dapeng Mi
2026-07-06  1:54 ` [Patch v9 06/24] perf/x86: Use x86_perf_regs in NMI handlers Dapeng Mi
2026-07-06  2:31   ` sashiko-bot
2026-07-06  8:43     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 07/24] x86/fpu/xstate: Add xsaves_nmi() helper Dapeng Mi
2026-07-06  2:18   ` sashiko-bot
2026-07-06  9:09     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 08/24] x86/fpu: Add update_fpu_state_and_flag() helper Dapeng Mi
2026-07-06  2:22   ` sashiko-bot
2026-07-06  9:15     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 09/24] perf: Move and enhance has_extended_regs() for arch-specific use Dapeng Mi
2026-07-06  1:54 ` [Patch v9 10/24] perf/x86/intel: Consolidate PMU capability updates Dapeng Mi
2026-07-06  1:54 ` [Patch v9 11/24] perf/x86: Enable XMM register sampling for non-PEBS events Dapeng Mi
2026-07-06  2:34   ` sashiko-bot
2026-07-06  9:47     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 12/24] perf/x86: Enable XMM register sampling for REGS_USER case Dapeng Mi
2026-07-06  2:35   ` sashiko-bot
2026-07-07  9:59     ` Mi, Dapeng
2026-07-08  0:56       ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 13/24] perf: Add sampling support for SIMD registers Dapeng Mi
2026-07-06  2:34   ` sashiko-bot
2026-07-08  1:13     ` Mi, Dapeng [this message]
2026-07-06  1:54 ` [Patch v9 14/24] perf/x86: Support XMM sampling using sample_simd_vec_reg_* fields Dapeng Mi
2026-07-06  6:45   ` sashiko-bot
2026-07-08  1:27     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 15/24] perf/x86: Support YMM " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 16/24] perf/x86: Support ZMM " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 17/24] perf/x86: Support OPMASK sampling using sample_simd_pred_reg_* fields Dapeng Mi
2026-07-06  1:54 ` [Patch v9 18/24] perf: Enhance perf_reg_validate() with simd_enabled argument Dapeng Mi
2026-07-06  1:54 ` [Patch v9 19/24] perf/x86: Support eGPRs sampling using sample_regs_* fields Dapeng Mi
2026-07-06  1:54 ` [Patch v9 20/24] perf/x86: Support SSP " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 21/24] perf/x86/intel: Support arch-PEBS based SIMD/eGPRs/SSP sampling Dapeng Mi
2026-07-06  1:54 ` [Patch v9 22/24] perf/x86/intel: Enable PERF_PMU_CAP_SIMD_REGS capability Dapeng Mi
2026-07-06  2:57   ` sashiko-bot
2026-07-08  1:51     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 23/24] perf/x86: Activate back-to-back NMI detection for arch-PEBS induced NMIs Dapeng Mi
2026-07-06  1:54 ` [Patch v9 24/24] perf/x86/intel: Add sanity check for PEBS fragment size Dapeng Mi
2026-07-06  5:04   ` sashiko-bot
2026-07-08  2:03     ` Mi, Dapeng

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