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From: Andi Kleen <andi@firstfloor.org>
To: peterz@infradead.org
Cc: eranian@google.com, linux-kernel@vger.kernel.org,
	Andi Kleen <ak@linux.intel.com>,
	tglx@linutronix.de
Subject: [PATCH 1/9] x86: Add a native_perf_sched_clock_from_tsc
Date: Sun, 10 May 2015 12:22:39 -0700	[thread overview]
Message-ID: <1431285767-27027-2-git-send-email-andi@firstfloor.org> (raw)
In-Reply-To: <1431285767-27027-1-git-send-email-andi@firstfloor.org>

From: Andi Kleen <ak@linux.intel.com>

PEBSv3 has a raw TSC time stamp in its memory buffer that
later needs to to be converted to perf_clock. Add a
native_sched_clock_from_tsc() that works the same
as native_sched_clock, but starts with an already given TSC
value.

Right now I ignore paravirt for this. It will just get
the native clock. But there isn't para virtualized PEBS anyways.

Cc: tglx@linutronix.de
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
 arch/x86/include/asm/tsc.h | 1 +
 arch/x86/kernel/tsc.c      | 8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 94605c0..aad56eb 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -51,6 +51,7 @@ extern int unsynchronized_tsc(void);
 extern int check_tsc_unstable(void);
 extern int check_tsc_disabled(void);
 extern unsigned long native_calibrate_tsc(void);
+extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
 
 extern int tsc_clocksource_reliable;
 
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 5054497..c16afd5 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -296,6 +296,14 @@ u64 native_sched_clock(void)
 	return cycles_2_ns(tsc_now);
 }
 
+/*
+ * Generate a sched_clock if you already have a TSC value.
+ */
+u64 native_sched_clock_from_tsc(u64 tsc)
+{
+	return cycles_2_ns(tsc);
+}
+
 /* We need to define a real function for sched_clock, to override the
    weak default version */
 #ifdef CONFIG_PARAVIRT
-- 
1.9.3


  reply	other threads:[~2015-05-10 19:23 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-10 19:22 perf: Add basic Skylake PMU support v2 Andi Kleen
2015-05-10 19:22 ` Andi Kleen [this message]
2015-08-04  8:55   ` [tip:perf/core] perf/x86: Add a native_perf_sched_clock_from_tsc( ) tip-bot for Andi Kleen
2015-05-10 19:22 ` [PATCH 2/9] x86, perf: Add support for PEBSv3 profiling Andi Kleen
2015-08-04  8:56   ` [tip:perf/core] perf/x86/intel: " tip-bot for Andi Kleen
2015-05-10 19:22 ` [PATCH 3/9] x86: Add new MSRs and MSR bits used for Skylake perfmon Andi Kleen
2015-08-04  8:56   ` [tip:perf/core] x86: Add new MSRs and MSR bits used for Intel Skylake PMU support tip-bot for Andi Kleen
2015-05-10 19:22 ` [PATCH 4/9] perf: Add cycles to branch_info Andi Kleen
2015-08-04  8:57   ` [tip:perf/core] " tip-bot for Andi Kleen
2015-05-10 19:22 ` [PATCH 5/9] x86, perf: Add support for LBRv5 Andi Kleen
2015-08-04  8:57   ` [tip:perf/core] perf/x86/intel/lbr: " tip-bot for Andi Kleen
2015-05-10 19:22 ` [PATCH 6/9] x86, perf: Add Skylake support Andi Kleen
2015-08-04  8:59   ` [tip:perf/core] perf/x86/intel: Add Intel Skylake PMU support tip-bot for Andi Kleen
2015-05-10 19:22 ` [PATCH 7/9] x86, perf: Handle new arch perfmon v4 status bits Andi Kleen
2015-08-04  8:57   ` [tip:perf/core] perf/x86/intel: " tip-bot for Andi Kleen
2015-05-10 19:22 ` [PATCH 8/9] x86, perf: Optimize v4 LBR unfreezing Andi Kleen
2015-08-04  8:58   ` [tip:perf/core] perf/x86/intel/lbr: " tip-bot for Andi Kleen
2015-05-10 19:22 ` [PATCH 9/9] x86, perf: Move PMU ACK after LBR read Andi Kleen
2015-05-11 16:23   ` Peter Zijlstra
2015-05-11 16:32     ` Stephane Eranian
2015-05-11 16:36       ` Peter Zijlstra
2015-05-11 16:43         ` Stephane Eranian
2015-05-11 16:48           ` Andi Kleen
2015-08-04  8:58   ` [tip:perf/core] perf/x86/intel: Move PMU ACK to " tip-bot for Andi Kleen
  -- strict thread matches above, loose matches on Subject: below --
2015-05-07 22:56 perf: Add basic Skylake PMU support Andi Kleen
2015-05-07 22:56 ` [PATCH 1/9] x86: Add a native_perf_sched_clock_from_tsc Andi Kleen

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