From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Ingo Molnar <mingo@elte.hu>,
Arjan van de Veen <arjan@infradead.org>,
Andreas Herrmann <andreas.herrmann3@amd.com>
Subject: [patch 4/6] x86: use cpuid to check MWAIT support for C1
Date: Thu, 12 Jun 2008 10:28:51 -0000 [thread overview]
Message-ID: <20080610171712.357812343@linutronix.de> (raw)
In-Reply-To: 20080610171639.551369443@linutronix.de
[-- Attachment #1: 0004-eb744213eda636f876ec8f9de12169350a5f44f8.patch --]
[-- Type: text/plain, Size: 1538 bytes --]
cpuid(0x05) provides extended information about MWAIT in EDX when bit
0 of ECX is set. Bit 4-7 of EDX determine whether MWAIT is supported
for C1. C1E enabled CPUs have these bits set to 0.
Based on an ealier patch from Andi Kleen.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
---
arch/x86/kernel/process.c | 28 ++++++++++++++++++++--------
1 file changed, 20 insertions(+), 8 deletions(-)
Index: linux-2.6/arch/x86/kernel/process.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/process.c
+++ linux-2.6/arch/x86/kernel/process.c
@@ -122,19 +122,31 @@ static void poll_idle(void)
*
* idle=mwait overrides this decision and forces the usage of mwait.
*/
+
+#define MWAIT_INFO 0x05
+#define MWAIT_ECX_EXTENDED_INFO 0x01
+#define MWAIT_EDX_C1 0xf0
+
static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
{
+ u32 eax, ebx, ecx, edx;
+
if (force_mwait)
return 1;
- if (c->x86_vendor == X86_VENDOR_AMD) {
- switch(c->x86) {
- case 0x10:
- case 0x11:
- return 0;
- }
- }
- return 1;
+ if (c->cpuid_level < MWAIT_INFO)
+ return 0;
+
+ cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
+ /* Check, whether EDX has extended info about MWAIT */
+ if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
+ return 1;
+
+ /*
+ * edx enumerates MONITOR/MWAIT extensions. Check, whether C1
+ * supports MWAIT
+ */
+ return edx & MWAIT_EDX_C1;
}
void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
--
next prev parent reply other threads:[~2008-06-12 10:30 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-06-12 10:28 [patch 0/6] AMD C1E aware idle support Thomas Gleixner
2008-06-12 10:28 ` [patch 1/6] x86: simplify idle selection Thomas Gleixner
2008-06-12 10:28 ` [patch 2/6] x86: cleanup C1E enabled detection Thomas Gleixner
2008-06-12 10:28 ` [patch 3/6] x86: use cpuinfo to check for interrupt pending message msr Thomas Gleixner
2008-06-13 6:55 ` Andreas Herrmann
2008-06-13 12:38 ` Thomas Gleixner
2008-06-13 14:28 ` Andreas Herrmann
2008-06-12 10:28 ` Thomas Gleixner [this message]
2008-06-12 10:28 ` [patch 5/6] x86: move more common idle functions/variables to process.c Thomas Gleixner
2008-06-12 10:29 ` [patch 6/6] x86: add c1e aware idle function Thomas Gleixner
2008-06-13 0:55 ` Andrew Morton
2008-06-13 6:02 ` Thomas Gleixner
2008-06-13 7:28 ` Andrew Morton
2008-06-18 19:21 ` Pavel Machek
2008-06-18 20:26 ` Rafael J. Wysocki
2008-06-18 21:58 ` Thomas Gleixner
2008-06-18 22:04 ` Rafael J. Wysocki
2008-06-18 22:17 ` Thomas Gleixner
2008-06-18 22:27 ` Rafael J. Wysocki
2008-06-12 12:31 ` [patch 0/6] AMD C1E aware idle support Rafael J. Wysocki
2008-06-12 12:32 ` Ingo Molnar
[not found] ` <200806131118.31160.rjw@sisk.pl>
2008-06-13 11:52 ` Rafael J. Wysocki
2008-06-12 13:09 ` Thomas Gleixner
2008-06-12 14:24 ` Andreas Herrmann
2008-06-12 15:48 ` Thomas Gleixner
2008-06-14 21:27 ` Maciej W. Rozycki
2008-06-18 22:47 ` Len Brown
2008-07-04 14:35 ` Andreas Herrmann
2008-07-04 15:18 ` [PATCH] x86: emphasize that c1e aware idle stuff is AMD specific Andreas Herrmann
2008-08-05 17:42 ` [patch 0/6] AMD C1E aware idle support Pavel Machek
2008-08-06 13:21 ` Andreas Herrmann
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