[PATCH v2 19/32] hw/arm: phytium: Connect the Phytium E2000 I2C controller

[Bin Meng <bin.meng@processmission.com>]

Instantiate the DesignWare-compatible I2C controller during E2000 SoC
realization and wire its documented interrupt.

Leave board-specific I2C slave devices unmodeled.

Signed-off-by: Bin Meng <bin.meng@processmission.com>

---

Changes in v2:
- Move the I2C controller into the E2000 SoC

 include/hw/arm/phytium_e2000.h |  1 +
 hw/arm/phytium_e2000.c         | 18 ++++++++++++++++++
 hw/arm/Kconfig                 |  1 +
 3 files changed, 20 insertions(+)

diff --git a/include/hw/arm/phytium_e2000.h b/include/hw/arm/phytium_e2000.h
index 15aa1cddd1..228d1ecab0 100644
--- a/include/hw/arm/phytium_e2000.h
+++ b/include/hw/arm/phytium_e2000.h
@@ -40,6 +40,7 @@ enum {
     PHYTIUM_E2000_UART3,
     PHYTIUM_E2000_UART4,
     PHYTIUM_E2000_UART5,
+    PHYTIUM_E2000_I2C,
     PHYTIUM_E2000_UART6,
     PHYTIUM_E2000_CLK_CTRL,
     PHYTIUM_E2000_SYSTEM_CTRL,
diff --git a/hw/arm/phytium_e2000.c b/hw/arm/phytium_e2000.c
index e3fea5ada1..c282de7088 100644
--- a/hw/arm/phytium_e2000.c
+++ b/hw/arm/phytium_e2000.c
@@ -21,6 +21,7 @@
 #include "hw/core/qdev-properties.h"
 #include "hw/intc/arm_gicv3_common.h"
 #include "hw/intc/arm_gicv3_its_common.h"
+#include "hw/i2c/designware_i2c.h"
 #include "hw/misc/phytium_e2000_ddr.h"
 #include "hw/misc/phytium_e2000_mhu.h"
 #include "hw/misc/phytium_e2000_pbr.h"
@@ -67,6 +68,7 @@ const MemMapEntry phytium_e2000_memmap[] = {
     [PHYTIUM_E2000_UART3] =          { 0x2800f000, 0x00001000 },
     [PHYTIUM_E2000_UART4] =          { 0x28014000, 0x00001000 },
     [PHYTIUM_E2000_UART5] =          { 0x2802a000, 0x00001000 },
+    [PHYTIUM_E2000_I2C] =            { 0x28030000, 0x00001000 },
     [PHYTIUM_E2000_UART6] =          { 0x28032000, 0x00001000 },
     [PHYTIUM_E2000_CLK_CTRL] =       { 0x28100000, 0x00001000 },
     [PHYTIUM_E2000_SYSTEM_CTRL] =    { 0x30000000, 0x00001000 },
@@ -108,6 +110,8 @@ static const int phytium_e2000_uart_irqmap[] = {
     [6] = 107,
 };
 
+static const int phytium_e2000_i2c_irq = 106;
+
 static const uint8_t phytium_e2000_gem_num_queues[] = { 8, 4, 4, 4 };
 
 static const int
@@ -341,6 +345,19 @@ static void phytium_e2000_create_unimplemented_region(
                             phytium_e2000_memmap[map_idx].base, -1000);
 }
 
+static void phytium_e2000_create_i2c(PhytiumE2000SoCState *s)
+{
+    DeviceState *dev = qdev_new(TYPE_DESIGNWARE_I2C);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+
+    object_property_add_child(OBJECT(s), "i2c", OBJECT(dev));
+    sysbus_realize_and_unref(sbd, &error_fatal);
+    sysbus_mmio_map_overlap(sbd, 0,
+        phytium_e2000_memmap[PHYTIUM_E2000_I2C].base, 1);
+    sysbus_connect_irq(sbd, 0,
+        qdev_get_gpio_in(s->gic, phytium_e2000_i2c_irq));
+}
+
 static void phytium_e2000_create_gem(PhytiumE2000SoCState *s, int index)
 {
     DeviceState *dev = qdev_new(TYPE_CADENCE_GEM);
@@ -774,6 +791,7 @@ static void phytium_e2000_soc_realize(DeviceState *dev, Error **errp)
     for (i = 0; i < PHYTIUM_E2000_NUM_UARTS; i++) {
         phytium_e2000_create_uart(s, i);
     }
+    phytium_e2000_create_i2c(s);
     for (i = 0; i < PHYTIUM_E2000_NUM_GEMS; i++) {
         phytium_e2000_create_gem(s, i);
     }
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index e4111eaec2..a77a4c2a09 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -133,6 +133,7 @@ config PHYTIUM_E2000
     imply PCI_DEVICES
     select ARM_GIC
     select CADENCE
+    select DESIGNWARE_I2C
     select DW_MCI
     select PCI_EXPRESS
     select PCI_EXPRESS_GENERIC_BRIDGE
-- 
2.53.0