[PATCH v2 22/32] hw/arm: phytium: Connect the Phytium E2000 random generator

[Bin Meng <bin.meng@processmission.com>]

Instantiate the RNG during E2000 SoC realization and map it over the
placeholder.

Signed-off-by: Bin Meng <bin.meng@processmission.com>

---

Changes in v2:
- Move the random generator into the E2000 SoC

 include/hw/arm/phytium_e2000.h |  1 +
 hw/arm/phytium_e2000.c         | 14 ++++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/include/hw/arm/phytium_e2000.h b/include/hw/arm/phytium_e2000.h
index 079f7298e9..ee645ce530 100644
--- a/include/hw/arm/phytium_e2000.h
+++ b/include/hw/arm/phytium_e2000.h
@@ -57,6 +57,7 @@ enum {
     PHYTIUM_E2000_GEM1,
     PHYTIUM_E2000_GEM2,
     PHYTIUM_E2000_GEM3,
+    PHYTIUM_E2000_RNG_REGS,
     PHYTIUM_E2000_PLATFORM_CTRL,
     PHYTIUM_E2000_SECURITY_CTRL,
     PHYTIUM_E2000_CHIP_CTRL,
diff --git a/hw/arm/phytium_e2000.c b/hw/arm/phytium_e2000.c
index e74005289f..33617e793a 100644
--- a/hw/arm/phytium_e2000.c
+++ b/hw/arm/phytium_e2000.c
@@ -25,6 +25,7 @@
 #include "hw/misc/phytium_e2000_ddr.h"
 #include "hw/misc/phytium_e2000_mhu.h"
 #include "hw/misc/phytium_e2000_pbr.h"
+#include "hw/misc/phytium_e2000_rng.h"
 #include "hw/misc/unimp.h"
 #include "hw/net/cadence_gem.h"
 #include "hw/pci/pci.h"
@@ -87,6 +88,7 @@ const MemMapEntry phytium_e2000_memmap[] = {
     [PHYTIUM_E2000_GEM1] =           { 0x3200e000, 0x00002000 },
     [PHYTIUM_E2000_GEM2] =           { 0x32010000, 0x00002000 },
     [PHYTIUM_E2000_GEM3] =           { 0x32012000, 0x00002000 },
+    [PHYTIUM_E2000_RNG_REGS] =       { 0x32a36000, 0x00001000 },
     [PHYTIUM_E2000_PLATFORM_CTRL] =  { 0x32e40000, 0x00010000 },
     [PHYTIUM_E2000_SECURITY_CTRL] =  { 0x32f00000, 0x00001000 },
     [PHYTIUM_E2000_CHIP_CTRL] =      { 0x33000000, 0x00010000 },
@@ -594,6 +596,17 @@ static void phytium_e2000_create_ddr_status(PhytiumE2000SoCState *s)
     sysbus_mmio_map_overlap(sbd, 0, PHYTIUM_E2000_DDR_STATUS_BASE, 2);
 }
 
+static void phytium_e2000_create_rng(PhytiumE2000SoCState *s)
+{
+    DeviceState *dev = qdev_new(TYPE_PHYTIUM_E2000_RNG);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+
+    object_property_add_child(OBJECT(s), "rng", OBJECT(dev));
+    sysbus_realize_and_unref(sbd, &error_fatal);
+    sysbus_mmio_map_overlap(sbd, 0,
+        phytium_e2000_memmap[PHYTIUM_E2000_RNG_REGS].base, 2);
+}
+
 static void phytium_e2000_create_scp_sram(PhytiumE2000SoCState *s)
 {
     /*
@@ -812,6 +825,7 @@ static void phytium_e2000_soc_realize(DeviceState *dev, Error **errp)
 
     phytium_e2000_create_scp_sram(s);
     phytium_e2000_create_mhu(s);
+    phytium_e2000_create_rng(s);
     phytium_e2000_create_ddr_status(s);
 
     for (i = 0; i < PHYTIUM_E2000_NUM_MCIS; i++) {
-- 
2.53.0