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From: Andi Shyti <andi.shyti@linux.intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
	Matt Roper <matthew.d.roper@intel.com>,
	Chris Wilson <chris@chris-wilson.co.uk>,
	Mika Kuoppala <mika.kuoppala@linux.intel.com>,
	Nirmoy Das <nirmoy.das@intel.com>,
	Andrzej Hajda <andrzej.hajda@intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-evel <dri-devel@lists.freedesktop.org>,
	linux-stable <stable@vger.kernel.org>,
	Andi Shyti <andi.shyti@linux.intel.com>
Subject: [PATCH v7 7/9] drm/i915/gt: Ensure memory quiesced before invalidation for all engines
Date: Thu, 20 Jul 2023 23:07:35 +0200	[thread overview]
Message-ID: <20230720210737.761400-8-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20230720210737.761400-1-andi.shyti@linux.intel.com>

Commit af9e423a8aae ("drm/i915/gt: Ensure memory quiesced before
invalidation") has made sure that the memory is quiesced before
invalidating the AUX CCS table. Do it for all the other engines
and not just RCS.

Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: <stable@vger.kernel.org> # v5.8+
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 36 ++++++++++++++++--------
 1 file changed, 25 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 202d6ff8b5264..b6dd22eb2d9b2 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -316,26 +316,40 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
 int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)
 {
 	intel_engine_mask_t aux_inv = 0;
-	u32 cmd, *cs;
+	u32 cmd_flush = 0;
+	u32 cmd = 4;
+	u32 *cs;
 
-	cmd = 4;
-	if (mode & EMIT_INVALIDATE) {
+	if (mode & EMIT_INVALIDATE)
 		cmd += 2;
 
-		if (HAS_AUX_CCS(rq->engine->i915) &&
-		    (rq->engine->class == VIDEO_DECODE_CLASS ||
-		     rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) {
-			aux_inv = rq->engine->mask &
-				~GENMASK(_BCS(I915_MAX_BCS - 1), BCS0);
-			if (aux_inv)
-				cmd += 4;
-		}
+	if (HAS_AUX_CCS(rq->engine->i915))
+		aux_inv = rq->engine->mask &
+			  ~GENMASK(_BCS(I915_MAX_BCS - 1), BCS0);
+
+	/*
+	 * On Aux CCS platforms the invalidation of the Aux
+	 * table requires quiescing memory traffic beforehand
+	 */
+	if (aux_inv) {
+		cmd += 4; /* for the AUX invalidation */
+		cmd += 2; /* for the engine quiescing */
+
+		cmd_flush = MI_FLUSH_DW;
+
+		if (rq->engine->class == COPY_ENGINE_CLASS)
+			cmd_flush |= MI_FLUSH_DW_CCS;
 	}
 
 	cs = intel_ring_begin(rq, cmd);
 	if (IS_ERR(cs))
 		return PTR_ERR(cs);
 
+	if (cmd_flush) {
+		*cs++ = cmd_flush;
+		*cs++ = 0;
+	}
+
 	if (mode & EMIT_INVALIDATE)
 		*cs++ = preparser_disable(true);
 
-- 
2.40.1


  parent reply	other threads:[~2023-07-20 21:08 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-20 21:07 [PATCH v7 0/9] Update AUX invalidation sequence Andi Shyti
2023-07-20 21:07 ` [PATCH v7 1/9] drm/i915/gt: Cleanup aux invalidation registers Andi Shyti
2023-07-20 21:07 ` [PATCH v7 2/9] drm/i915: Add the has_aux_ccs device property Andi Shyti
2023-07-21  9:25   ` [v7,2/9] " Krzysztofik, Janusz
2023-07-21 10:02     ` Andi Shyti
2023-07-21  9:41   ` [Intel-gfx] [PATCH v7 2/9] " Andrzej Hajda
2023-07-21 10:00     ` Andi Shyti
2023-07-20 21:07 ` [PATCH v7 3/9] drm/i915/gt: Ensure memory quiesced before invalidation Andi Shyti
2023-07-20 21:07 ` [PATCH v7 4/9] drm/i915/gt: Rename flags with bit_group_X according to the datasheet Andi Shyti
2023-07-20 21:07 ` [PATCH v7 5/9] drm/i915/gt: Enable the CCS_FLUSH bit in the pipe control Andi Shyti
2023-07-21 10:05   ` [Intel-gfx] " Andrzej Hajda
2023-07-21 10:10     ` Andi Shyti
2023-07-21 10:17   ` Andrzej Hajda
2023-07-21 10:23     ` Andi Shyti
2023-07-21 11:41   ` [v7,5/9] " Krzysztofik, Janusz
2023-07-21 12:09     ` Andi Shyti
2023-07-20 21:07 ` [PATCH v7 6/9] drm/i915/gt: Refactor intel_emit_pipe_control_cs() in a single function Andi Shyti
2023-07-21 10:10   ` [Intel-gfx] " Andrzej Hajda
2023-07-21 10:12     ` Andi Shyti
2023-07-21 11:54   ` [v7,6/9] " Krzysztofik, Janusz
2023-07-20 21:07 ` Andi Shyti [this message]
2023-07-21 12:10   ` [v7,7/9] drm/i915/gt: Ensure memory quiesced before invalidation for all engines Krzysztofik, Janusz
2023-07-21 12:45     ` Andi Shyti
2023-07-20 21:07 ` [PATCH v7 8/9] drm/i915/gt: Poll aux invalidation register bit on invalidation Andi Shyti
2023-07-20 21:07 ` [PATCH v7 9/9] drm/i915/gt: Support aux invalidation on all engines Andi Shyti
2023-07-21 13:39   ` [v7,9/9] " Krzysztofik, Janusz
2023-07-21 14:02     ` Andi Shyti

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