From: tien.fong.chee@intel.com
To: u-boot@lists.denx.de
Cc: Marek Vasut <marex@denx.de>,
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>,
Meng Tingting <tingting.meng@intel.com>,
Yuslaimi Alif Zakuan <alif.zakuan.yuslaimi@intel.com>,
Hea Kok Kiang <kok.kiang.hea@intel.com>,
Tien Fong Chee <tien.fong.chee@intel.com>
Subject: [PATCH v1 14/20] configs: agilex5: Add configuration for malloc pool
Date: Fri, 20 Sep 2024 15:02:36 +0800 [thread overview]
Message-ID: <20240920070242.20884-15-tien.fong.chee@intel.com> (raw)
In-Reply-To: <20240920070242.20884-1-tien.fong.chee@intel.com>
From: Tien Fong Chee <tien.fong.chee@intel.com>
Adding configuration for SPL malloc pool.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
configs/socfpga_agilex5_defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig
index dc1cef3754e..81bbe967dcf 100644
--- a/configs/socfpga_agilex5_defconfig
+++ b/configs/socfpga_agilex5_defconfig
@@ -29,6 +29,10 @@ CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 initrd=0x90000000 root=/dev/ram0 rw init=/sbin/init ramdisk_size=10000000 earlycon panic=-1 nosmp kvm-arm.mode=nvhe"
CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xbfa00000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_CACHE=y
--
2.25.1
next prev parent reply other threads:[~2024-09-20 7:06 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-20 7:02 [PATCH v1 00/20] SoCFPGA: Add Boot Support for Agilex 5 in U-Boot tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 01/20] arm: socfpga: agilex5: Add new system manager base addresses tien.fong.chee
2024-09-21 13:47 ` Marek Vasut
2024-09-24 4:45 ` Chee, Tien Fong
2024-09-24 18:35 ` Marek Vasut
2024-09-20 7:02 ` [PATCH v1 02/20] arm: socfpga: Add support for agilex5 clock manager tien.fong.chee
2024-09-21 13:47 ` Marek Vasut
2024-09-24 5:58 ` Chee, Tien Fong
2024-09-20 7:02 ` [PATCH v1 03/20] linker: Add SPL linker script for SoC64 devices tien.fong.chee
2024-09-21 13:48 ` Marek Vasut
2024-09-24 5:48 ` Chee, Tien Fong
2024-09-24 18:35 ` Marek Vasut
2024-09-25 6:06 ` Chee, Tien Fong
2024-09-25 12:50 ` Marek Vasut
2024-09-20 7:02 ` [PATCH v1 04/20] arm: socfpga: agilex5: Add low level initialization tien.fong.chee
2024-09-21 13:49 ` Marek Vasut
2024-09-24 3:14 ` Chee, Tien Fong
2024-09-24 18:32 ` Marek Vasut
2024-09-25 5:40 ` Chee, Tien Fong
2024-09-25 12:50 ` Marek Vasut
2024-09-26 6:02 ` Chee, Tien Fong
2024-09-26 22:37 ` Marek Vasut
2024-09-27 4:53 ` Chee, Tien Fong
2024-09-20 7:02 ` [PATCH v1 05/20] arm: socfpga: Add handoff data support for SoCFPGA Agilex5 device tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 06/20] arm: dts: agilex5: Add HPS cache coherency unit configuration settings tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 07/20] arm: dts: agilex5: Add firewall configure settings tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 08/20] arm: dts: agilex5: Enable XGMAC tien.fong.chee
2024-09-21 13:50 ` Marek Vasut
2024-09-24 6:02 ` Chee, Tien Fong
2024-09-24 18:36 ` Marek Vasut
2024-09-25 6:13 ` Chee, Tien Fong
2024-09-25 12:51 ` Marek Vasut
2024-09-26 5:43 ` Chee, Tien Fong
2024-09-20 7:02 ` [PATCH v1 09/20] sysreset: Add reset support to SoCFPGA Agilex5 device tien.fong.chee
2024-09-21 13:51 ` Marek Vasut
2024-09-24 8:52 ` Chee, Tien Fong
2024-09-20 7:02 ` [PATCH v1 10/20] arm: socfpga: agilex5: Enable cache flush for system memory cache in CCU tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 11/20] arm: socfpga: agilex5: Add SMMU initialization tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 12/20] arm: socfpga: agilex5: Update CPU info tien.fong.chee
2024-09-21 13:53 ` Marek Vasut
2024-09-24 6:05 ` Chee, Tien Fong
2024-09-20 7:02 ` [PATCH v1 13/20] arm: socfpga: Export board ID as U-Boot environment variable tien.fong.chee
2024-09-21 13:53 ` Marek Vasut
2024-09-24 7:30 ` Chee, Tien Fong
2024-09-20 7:02 ` tien.fong.chee [this message]
2024-09-20 7:02 ` [PATCH v1 15/20] arm: socfpga: smc: Add memory coherency support to mailbox command tien.fong.chee
2024-09-21 13:58 ` Marek Vasut
2024-09-24 6:03 ` Chee, Tien Fong
2024-09-20 7:02 ` [PATCH v1 16/20] ddr: altera: Add DDR driver for Agilex5 series tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 17/20] arm: socfpga: agilex5: Add SPL for Agilex5 SoCFPGA tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 18/20] configs: socfpga: soc64: agilex5: Enable XGMAC tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 19/20] arm: socfpga: soc64: Add support for board_boot_order() tien.fong.chee
2024-09-20 7:02 ` [PATCH v1 20/20] configs: socfpga: soc64: agilex5: Enable QSPI boot with UBI / UBIFS tien.fong.chee
2024-09-20 7:25 ` [PATCH v1 00/20] SoCFPGA: Add Boot Support for Agilex 5 in U-Boot Simon Glass
2024-09-20 7:30 ` Chee, Tien Fong
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