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From: tien.fong.chee@intel.com
To: u-boot@lists.denx.de
Cc: Marek Vasut <marex@denx.de>,
	Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>,
	Meng Tingting <tingting.meng@intel.com>,
	Yuslaimi Alif Zakuan <alif.zakuan.yuslaimi@intel.com>,
	Hea Kok Kiang <kok.kiang.hea@intel.com>,
	Tien Fong Chee <tien.fong.chee@intel.com>
Subject: [PATCH v1 20/20] configs: socfpga: soc64: agilex5: Enable QSPI boot with UBI / UBIFS
Date: Fri, 20 Sep 2024 15:02:42 +0800	[thread overview]
Message-ID: <20240920070242.20884-21-tien.fong.chee@intel.com> (raw)
In-Reply-To: <20240920070242.20884-1-tien.fong.chee@intel.com>

From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@intel.com>

Add the required configuration in the U-Boot env to enable Linux QSPI
boot with UBI / UBIFS.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
 configs/socfpga_agilex5_defconfig      | 1 +
 include/configs/socfpga_soc64_common.h | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig
index a4a5064d9c2..4ac118f1fec 100644
--- a/configs/socfpga_agilex5_defconfig
+++ b/configs/socfpga_agilex5_defconfig
@@ -37,6 +37,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_SPL_CACHE=y
 CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_SPL_MTD=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000
 CONFIG_SPL_ATF=y
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index b7ee1dbf201..7a44f042165 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -56,6 +56,11 @@
 
 #define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
 	"bootcmd_qspi=ubi detach; sf probe && " \
+	"setenv mtdids 'nor0=nor0,nand0=nand.0' && " \
+	"setenv mtdparts 'mtdparts=nor0:66m(u-boot),190m(root); " \
+	"nand.0:2m(nand_uboot),500m(nand_root)' && " \
+	"env select UBI; saveenv && " \
+	"ubi part root && " \
 	"if ubi part root && ubi readvol ${scriptaddr} script; " \
 	"then echo QSPI: Running script from UBIFS; " \
 	"elif sf read ${scriptaddr} ${qspiscriptaddr} ${scriptsize}; " \
-- 
2.25.1


  parent reply	other threads:[~2024-09-20  7:07 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-20  7:02 [PATCH v1 00/20] SoCFPGA: Add Boot Support for Agilex 5 in U-Boot tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 01/20] arm: socfpga: agilex5: Add new system manager base addresses tien.fong.chee
2024-09-21 13:47   ` Marek Vasut
2024-09-24  4:45     ` Chee, Tien Fong
2024-09-24 18:35       ` Marek Vasut
2024-09-20  7:02 ` [PATCH v1 02/20] arm: socfpga: Add support for agilex5 clock manager tien.fong.chee
2024-09-21 13:47   ` Marek Vasut
2024-09-24  5:58     ` Chee, Tien Fong
2024-09-20  7:02 ` [PATCH v1 03/20] linker: Add SPL linker script for SoC64 devices tien.fong.chee
2024-09-21 13:48   ` Marek Vasut
2024-09-24  5:48     ` Chee, Tien Fong
2024-09-24 18:35       ` Marek Vasut
2024-09-25  6:06         ` Chee, Tien Fong
2024-09-25 12:50           ` Marek Vasut
2024-09-20  7:02 ` [PATCH v1 04/20] arm: socfpga: agilex5: Add low level initialization tien.fong.chee
2024-09-21 13:49   ` Marek Vasut
2024-09-24  3:14     ` Chee, Tien Fong
2024-09-24 18:32       ` Marek Vasut
2024-09-25  5:40         ` Chee, Tien Fong
2024-09-25 12:50           ` Marek Vasut
2024-09-26  6:02             ` Chee, Tien Fong
2024-09-26 22:37               ` Marek Vasut
2024-09-27  4:53                 ` Chee, Tien Fong
2024-09-20  7:02 ` [PATCH v1 05/20] arm: socfpga: Add handoff data support for SoCFPGA Agilex5 device tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 06/20] arm: dts: agilex5: Add HPS cache coherency unit configuration settings tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 07/20] arm: dts: agilex5: Add firewall configure settings tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 08/20] arm: dts: agilex5: Enable XGMAC tien.fong.chee
2024-09-21 13:50   ` Marek Vasut
2024-09-24  6:02     ` Chee, Tien Fong
2024-09-24 18:36       ` Marek Vasut
2024-09-25  6:13         ` Chee, Tien Fong
2024-09-25 12:51           ` Marek Vasut
2024-09-26  5:43             ` Chee, Tien Fong
2024-09-20  7:02 ` [PATCH v1 09/20] sysreset: Add reset support to SoCFPGA Agilex5 device tien.fong.chee
2024-09-21 13:51   ` Marek Vasut
2024-09-24  8:52     ` Chee, Tien Fong
2024-09-20  7:02 ` [PATCH v1 10/20] arm: socfpga: agilex5: Enable cache flush for system memory cache in CCU tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 11/20] arm: socfpga: agilex5: Add SMMU initialization tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 12/20] arm: socfpga: agilex5: Update CPU info tien.fong.chee
2024-09-21 13:53   ` Marek Vasut
2024-09-24  6:05     ` Chee, Tien Fong
2024-09-20  7:02 ` [PATCH v1 13/20] arm: socfpga: Export board ID as U-Boot environment variable tien.fong.chee
2024-09-21 13:53   ` Marek Vasut
2024-09-24  7:30     ` Chee, Tien Fong
2024-09-20  7:02 ` [PATCH v1 14/20] configs: agilex5: Add configuration for malloc pool tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 15/20] arm: socfpga: smc: Add memory coherency support to mailbox command tien.fong.chee
2024-09-21 13:58   ` Marek Vasut
2024-09-24  6:03     ` Chee, Tien Fong
2024-09-20  7:02 ` [PATCH v1 16/20] ddr: altera: Add DDR driver for Agilex5 series tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 17/20] arm: socfpga: agilex5: Add SPL for Agilex5 SoCFPGA tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 18/20] configs: socfpga: soc64: agilex5: Enable XGMAC tien.fong.chee
2024-09-20  7:02 ` [PATCH v1 19/20] arm: socfpga: soc64: Add support for board_boot_order() tien.fong.chee
2024-09-20  7:02 ` tien.fong.chee [this message]
2024-09-20  7:25 ` [PATCH v1 00/20] SoCFPGA: Add Boot Support for Agilex 5 in U-Boot Simon Glass
2024-09-20  7:30   ` Chee, Tien Fong

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