From: Ralf Baechle <ralf@linux-mips.org>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: Kevin Cernekee <cernekee@gmail.com>,
Shinya Kuribayashi <skuribay@pobox.com>,
linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH resend 5/9] MIPS: sync after cacheflush
Date: Tue, 19 Oct 2010 13:34:41 +0100 [thread overview]
Message-ID: <20101019123441.GJ27377@linux-mips.org> (raw)
In-Reply-To: <alpine.LFD.2.00.1010190146360.15889@eddie.linux-mips.org>
On Tue, Oct 19, 2010 at 01:57:43AM +0100, Maciej W. Rozycki wrote:
> Ah, the old issue of the write-back barrier. I can't comment on
> Loongson, but for DEC IIRC the write-back buffer only needs to be taken
> care of for uncached writes and they take a path separate to cached
> writes. I'd have to dig out the details to be sure. IIRC the most
> pathological case was the R2020 WB chip, but that was only used on systems
> that didn't do DMA (namely DECstatation 3100 and 2100 boxes).
See R4000 User's Manual Version 2, page 326, "Uncached Loads and Stores".
Of course this can only happen on cache coherent or multiprocessor systems.
I guess none of the supported DEC MIPS systems is affected.
Ralf
next prev parent reply other threads:[~2010-10-19 12:34 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-16 21:22 [PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-16 21:22 ` [PATCH 2/9] MIPS: Add BMIPS processor types to Kconfig Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-17 17:01 ` Florian Fainelli
2010-10-16 21:22 ` [PATCH 3/9] MIPS: Add BMIPS CP0 register definitions Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-20 7:23 ` Ralf Baechle
2010-10-16 21:22 ` [PATCH 4/9] MIPS: Install handlers for software IRQs Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-21 14:44 ` Ralf Baechle
2011-05-19 12:31 ` Ralf Baechle
2010-10-16 21:22 ` [PATCH resend 5/9] MIPS: sync after cacheflush Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-18 13:44 ` Shinya Kuribayashi
2010-10-18 18:34 ` Kevin Cernekee
2010-10-19 0:03 ` Shinya Kuribayashi
2010-10-19 0:51 ` Kevin Cernekee
2010-10-19 13:30 ` Shinya Kuribayashi
2010-10-19 0:57 ` Maciej W. Rozycki
2010-10-19 12:34 ` Ralf Baechle [this message]
2010-10-19 20:11 ` Maciej W. Rozycki
2010-10-20 8:05 ` Gleb O. Raiko
2010-10-20 17:26 ` Maciej W. Rozycki
2010-10-21 8:52 ` Gleb O. Raiko
2010-10-24 5:12 ` Maciej W. Rozycki
2010-10-18 19:19 ` Ralf Baechle
2010-10-18 19:41 ` Kevin Cernekee
2010-10-18 22:50 ` Ralf Baechle
2010-10-19 0:45 ` Maciej W. Rozycki
2010-10-19 8:54 ` Gleb O. Raiko
2010-10-19 9:17 ` Ralf Baechle
2010-10-19 10:15 ` Gleb O. Raiko
2010-10-16 21:22 ` [PATCH resend 6/9] MIPS: pfn_valid() is broken on low memory HIGHMEM systems Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-16 21:22 ` [PATCH v2 resend 7/9] MIPS: Move FIXADDR_TOP into spaces.h Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-16 21:22 ` [PATCH resend 8/9] MIPS: Honor L2 bypass bit Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-19 16:16 ` Ralf Baechle
2010-10-16 21:22 ` [PATCH resend 9/9] MIPS: Allow UserLocal on MIPS_R1 processors Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-21 14:32 ` Ralf Baechle
2010-10-17 16:59 ` [PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code Florian Fainelli
2010-10-20 7:19 ` Ralf Baechle
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