All of lore.kernel.org
 help / color / mirror / Atom feed
From: Kevin Cernekee <cernekee@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH 2/9] MIPS: Add BMIPS processor types to Kconfig
Date: Sat, 16 Oct 2010 14:22:31 -0700	[thread overview]
Message-ID: <adc90cbb99148b1f3a1e880caba50fa4@localhost> (raw)
In-Reply-To: <17ebecce124618ddf83ec6fe8e526f93@localhost>

Add processor feature definitions for BMIPS3300, BMIPS4350, BMIPS4380,
and BMIPS5000.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
 arch/mips/Kconfig |   63 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 63 insertions(+), 0 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 5526faa..1403926 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1332,6 +1332,57 @@ config CPU_CAVIUM_OCTEON
 	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
 	  Full details can be found at http://www.caviumnetworks.com.
 
+config CPU_BMIPS3300
+	bool "BMIPS3300"
+	depends on SYS_HAS_CPU_BMIPS3300
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select WEAK_ORDERING
+	help
+	  Broadcom BMIPS3300 processors.
+
+config CPU_BMIPS4350
+	bool "BMIPS4350"
+	depends on SYS_HAS_CPU_BMIPS4350
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select SYS_SUPPORTS_SMP
+	select SYS_SUPPORTS_HOTPLUG_CPU
+	select WEAK_ORDERING
+	help
+	  Broadcom BMIPS4350 processors.
+
+config CPU_BMIPS4380
+	bool "BMIPS4380"
+	depends on SYS_HAS_CPU_BMIPS4380
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select SYS_SUPPORTS_SMP
+	select SYS_SUPPORTS_HOTPLUG_CPU
+	select WEAK_ORDERING
+	help
+	  Broadcom BMIPS4380 processors.
+
+config CPU_BMIPS5000
+	bool "BMIPS5000"
+	depends on SYS_HAS_CPU_BMIPS5000
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select CPU_SUPPORTS_HIGHMEM
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select SYS_SUPPORTS_SMP
+	select SYS_SUPPORTS_HOTPLUG_CPU
+	select WEAK_ORDERING
+	help
+	  Broadcom BMIPS5000 processors.
+
 endchoice
 
 if CPU_LOONGSON2F
@@ -1450,6 +1501,18 @@ config SYS_HAS_CPU_SB1
 config SYS_HAS_CPU_CAVIUM_OCTEON
 	bool
 
+config SYS_HAS_CPU_BMIPS3300
+	bool
+
+config SYS_HAS_CPU_BMIPS4350
+	bool
+
+config SYS_HAS_CPU_BMIPS4380
+	bool
+
+config SYS_HAS_CPU_BMIPS5000
+	bool
+
 #
 # CPU may reorder R->R, R->W, W->R, W->W
 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
-- 
1.7.0.4

WARNING: multiple messages have this Message-ID (diff)
From: Kevin Cernekee <cernekee@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: [PATCH 2/9] MIPS: Add BMIPS processor types to Kconfig
Date: Sat, 16 Oct 2010 14:22:31 -0700	[thread overview]
Message-ID: <adc90cbb99148b1f3a1e880caba50fa4@localhost> (raw)
Message-ID: <20101016212231.SXJp1u9SS1WGw46isPoLuR4dN2KvYQBFsQ2Cy75gBnA@z> (raw)
In-Reply-To: <17ebecce124618ddf83ec6fe8e526f93@localhost>

Add processor feature definitions for BMIPS3300, BMIPS4350, BMIPS4380,
and BMIPS5000.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
 arch/mips/Kconfig |   63 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 63 insertions(+), 0 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 5526faa..1403926 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1332,6 +1332,57 @@ config CPU_CAVIUM_OCTEON
 	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
 	  Full details can be found at http://www.caviumnetworks.com.
 
+config CPU_BMIPS3300
+	bool "BMIPS3300"
+	depends on SYS_HAS_CPU_BMIPS3300
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select WEAK_ORDERING
+	help
+	  Broadcom BMIPS3300 processors.
+
+config CPU_BMIPS4350
+	bool "BMIPS4350"
+	depends on SYS_HAS_CPU_BMIPS4350
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select SYS_SUPPORTS_SMP
+	select SYS_SUPPORTS_HOTPLUG_CPU
+	select WEAK_ORDERING
+	help
+	  Broadcom BMIPS4350 processors.
+
+config CPU_BMIPS4380
+	bool "BMIPS4380"
+	depends on SYS_HAS_CPU_BMIPS4380
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select SYS_SUPPORTS_SMP
+	select SYS_SUPPORTS_HOTPLUG_CPU
+	select WEAK_ORDERING
+	help
+	  Broadcom BMIPS4380 processors.
+
+config CPU_BMIPS5000
+	bool "BMIPS5000"
+	depends on SYS_HAS_CPU_BMIPS5000
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select CPU_SUPPORTS_HIGHMEM
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select SYS_SUPPORTS_SMP
+	select SYS_SUPPORTS_HOTPLUG_CPU
+	select WEAK_ORDERING
+	help
+	  Broadcom BMIPS5000 processors.
+
 endchoice
 
 if CPU_LOONGSON2F
@@ -1450,6 +1501,18 @@ config SYS_HAS_CPU_SB1
 config SYS_HAS_CPU_CAVIUM_OCTEON
 	bool
 
+config SYS_HAS_CPU_BMIPS3300
+	bool
+
+config SYS_HAS_CPU_BMIPS4350
+	bool
+
+config SYS_HAS_CPU_BMIPS4380
+	bool
+
+config SYS_HAS_CPU_BMIPS5000
+	bool
+
 #
 # CPU may reorder R->R, R->W, W->R, W->W
 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
-- 
1.7.0.4

  reply	other threads:[~2010-10-16 21:44 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-10-16 21:22 [PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee
2010-10-16 21:22 ` Kevin Cernekee [this message]
2010-10-16 21:22   ` [PATCH 2/9] MIPS: Add BMIPS processor types to Kconfig Kevin Cernekee
2010-10-17 17:01   ` Florian Fainelli
2010-10-16 21:22 ` [PATCH 3/9] MIPS: Add BMIPS CP0 register definitions Kevin Cernekee
2010-10-16 21:22   ` Kevin Cernekee
2010-10-20  7:23   ` Ralf Baechle
2010-10-16 21:22 ` [PATCH 4/9] MIPS: Install handlers for software IRQs Kevin Cernekee
2010-10-16 21:22   ` Kevin Cernekee
2010-10-21 14:44   ` Ralf Baechle
2011-05-19 12:31   ` Ralf Baechle
2010-10-16 21:22 ` [PATCH resend 5/9] MIPS: sync after cacheflush Kevin Cernekee
2010-10-16 21:22   ` Kevin Cernekee
2010-10-18 13:44   ` Shinya Kuribayashi
2010-10-18 18:34     ` Kevin Cernekee
2010-10-19  0:03       ` Shinya Kuribayashi
2010-10-19  0:51         ` Kevin Cernekee
2010-10-19 13:30           ` Shinya Kuribayashi
2010-10-19  0:57       ` Maciej W. Rozycki
2010-10-19 12:34         ` Ralf Baechle
2010-10-19 20:11           ` Maciej W. Rozycki
2010-10-20  8:05             ` Gleb O. Raiko
2010-10-20 17:26               ` Maciej W. Rozycki
2010-10-21  8:52                 ` Gleb O. Raiko
2010-10-24  5:12                   ` Maciej W. Rozycki
2010-10-18 19:19     ` Ralf Baechle
2010-10-18 19:41       ` Kevin Cernekee
2010-10-18 22:50         ` Ralf Baechle
2010-10-19  0:45           ` Maciej W. Rozycki
2010-10-19  8:54         ` Gleb O. Raiko
2010-10-19  9:17           ` Ralf Baechle
2010-10-19 10:15             ` Gleb O. Raiko
2010-10-16 21:22 ` [PATCH resend 6/9] MIPS: pfn_valid() is broken on low memory HIGHMEM systems Kevin Cernekee
2010-10-16 21:22   ` Kevin Cernekee
2010-10-16 21:22 ` [PATCH v2 resend 7/9] MIPS: Move FIXADDR_TOP into spaces.h Kevin Cernekee
2010-10-16 21:22   ` Kevin Cernekee
2010-10-16 21:22 ` [PATCH resend 8/9] MIPS: Honor L2 bypass bit Kevin Cernekee
2010-10-16 21:22   ` Kevin Cernekee
2010-10-19 16:16   ` Ralf Baechle
2010-10-16 21:22 ` [PATCH resend 9/9] MIPS: Allow UserLocal on MIPS_R1 processors Kevin Cernekee
2010-10-16 21:22   ` Kevin Cernekee
2010-10-21 14:32   ` Ralf Baechle
2010-10-17 16:59 ` [PATCH 1/9] MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code Florian Fainelli
2010-10-20  7:19 ` Ralf Baechle

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=adc90cbb99148b1f3a1e880caba50fa4@localhost \
    --to=cernekee@gmail.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.