[PATCH 00/27] cpus: Add common CPUClass::exception_name() handler

["Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>]

Add qemu_excp_name() to resolve QEMU internal exception
values.

Add a common CPUClass::exception_name() callback so the
generic exception logger can resolve architecture-specific
exception values to human-readable names.

Re-use existing methods (expose prototype or refactor) when
available otherwise implement new ones (AVR, X86, MicroBlaze,
S390x, TriCore and Xtensa).

This series is the base for consolidating exception management
in accel/tcg/ (more series to be posted on top).

Philippe Mathieu-Daudé (25):
  cpus: Add helper to log raised exceptions with '-d int'
  cpus: Introduce CPUClass::exception_name() handler
  target/alpha: Register CPUClass::exception_name() handler
  target/arm: Register CPUClass::exception_name() handler
  target/avr: Implement and register CPUClass::exception_name()
  target/hexagon: Register CPUClass::exception_name() handler
  target/hppa: Register CPUClass::exception_name() handler
  target/i386: Replace magic value by proper EXCP0E_PAGE definition
  target/i386: Implement and register CPUClass::exception_name()
  target/loongarch: Register CPUClass::exception_name() handler
  target/m68k: Register CPUClass::exception_name() handler
  target/microblaze: Implement and register CPUClass::exception_name()
  target/mips: Remove unuseful EXCP_LAST definition
  target/mips: Register CPUClass::exception_name() handler
  target/or1k: Register CPUClass::exception_name() handler
  target/ppc: Register CPUClass::exception_name() handler
  target/riscv: Register CPUClass::exception_name() handler
  target/rx: Unify BRK and INT trap handling
  target/rx: Register CPUClass::exception_name() handler
  target/s390x: Implement and register CPUClass::exception_name()
  target/sh4: Register CPUClass::exception_name() handler
  target/sparc: Remove well tested DEBUG_PCALL definition
  target/sparc: Register CPUClass::exception_name() handler
  target/tricore: Implement and register CPUClass::exception_name()
  target/xtensa: Implement and register CPUClass::exception_name()

Yonggang Luo (2):
  target/rx: Define exception vector constants
  target/sh4: Define exception vector constants

 include/hw/core/cpu.h          |   2 +
 target/alpha/cpu.h             |   1 +
 target/arm/cpu.h               |   2 +
 target/avr/cpu.h               |   2 +
 target/hexagon/cpu_bits.h      |   2 +
 target/hppa/cpu.h              |   2 +
 target/i386/cpu.h              |   2 +
 target/loongarch/internals.h   |   2 +
 target/m68k/cpu.h              |   2 +
 target/microblaze/cpu.h        |   2 +
 target/mips/cpu.h              |   4 +-
 target/mips/tcg/tcg-internal.h |   2 -
 target/or1k/cpu.h              |   2 +
 target/ppc/cpu.h               |   2 +
 target/riscv/cpu.h             |   1 +
 target/rx/cpu.h                |  14 ++++
 target/rx/helper.h             |   3 +-
 target/s390x/cpu.h             |   2 +
 target/sh4/cpu.h               |  21 +++++
 target/sparc/cpu.h             |   1 +
 target/tricore/cpu.h           |   2 +
 target/xtensa/cpu.h            |   2 +
 accel/tcg/cpu-exec-common.c    |  38 ++++++++++
 target/alpha/cpu.c             |   1 +
 target/alpha/helper.c          |  82 +++++++++++---------
 target/arm/cpu.c               |   1 +
 target/arm/helper.c            |  79 +++++++++----------
 target/avr/cpu.c               |  19 +++++
 target/hexagon/cpu.c           |  37 +++++++++
 target/hexagon/hexswi.c        |  30 +-------
 target/hppa/int_helper.c       |  91 +++++++++++-----------
 target/i386/cpu.c              |  33 ++++++++
 target/i386/tcg/excp_helper.c  |   5 +-
 target/i386/tcg/seg_helper.c   |   8 +-
 target/loongarch/cpu.c         |  38 ++++++++++
 target/loongarch/tcg/tcg_cpu.c |  45 -----------
 target/m68k/cpu.c              |   1 +
 target/m68k/op_helper.c        |   8 +-
 target/microblaze/cpu.c        |  17 +++++
 target/mips/cpu.c              |   1 +
 target/mips/tcg/exception.c    |  12 +--
 target/or1k/cpu.c              |   1 +
 target/or1k/exception.c        |  24 ++++++
 target/or1k/interrupt.c        |  19 +----
 target/ppc/cpu_init.c          |   1 +
 target/ppc/excp_helper.c       |   5 +-
 target/riscv/cpu.c             |  29 ++++---
 target/riscv/tcg/op_helper.c   |   2 +-
 target/rx/cpu.c                |   1 +
 target/rx/helper.c             |  62 +++++++++------
 target/rx/op_helper.c          |  17 ++---
 target/rx/translate.c          |  23 +++---
 target/s390x/cpu.c             |   1 +
 target/s390x/interrupt.c       |  18 +++++
 target/s390x/tcg/excp_helper.c |   6 +-
 target/s390x/tcg/misc_helper.c |   3 +-
 target/sh4/helper.c            | 135 +++++++++++++++++----------------
 target/sh4/op_helper.c         |  16 ++--
 target/sparc/cpu.c             |   1 +
 target/sparc/int32_helper.c    |  23 +++---
 target/sparc/int64_helper.c    |  42 +++++-----
 target/tricore/cpu.c           |  21 +++++
 target/xtensa/cpu.c            |  26 +++++++
 target/xtensa/exc_helper.c     |   3 +-
 64 files changed, 692 insertions(+), 408 deletions(-)

-- 
2.55.0