From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
Subject: [PATCH 01/27] cpus: Add helper to log raised exceptions with '-d int'
Date: Wed, 7 Oct 2026 11:44:49 +0200 [thread overview]
Message-ID: <20261007094516.75732-2-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20261007094516.75732-1-philmd@oss.qualcomm.com>
Add log_raise_exception(), a common helper cpu_loop_*() can
call to log a raised exception when '-d int' is used, and
qemu_excp_name() to resolve QEMU-internal exceptions to names.
Use it in cpu_loop_exit_atomic() to log the EXCP_ATOMIC reason.
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
accel/tcg/cpu-exec-common.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
index 68077c8fd9d..2ac8380d0bb 100644
--- a/accel/tcg/cpu-exec-common.c
+++ b/accel/tcg/cpu-exec-common.c
@@ -89,6 +89,37 @@ void tcg_update_all_cflags(void)
}
}
+#define EXCP_QEMU_INTERNAL 0x10000
+
+static const char *qemu_excp_name(int excp)
+{
+ static const char *excp_name[] = {
+ [EXCP_INTERRUPT - EXCP_QEMU_INTERNAL] = "async interruption",
+ [EXCP_HLT - EXCP_QEMU_INTERNAL] = "hlt instruction",
+ [EXCP_DEBUG - EXCP_QEMU_INTERNAL] = "debug",
+ [EXCP_HALTED - EXCP_QEMU_INTERNAL] = "halted",
+ [EXCP_YIELD - EXCP_QEMU_INTERNAL] = "yield",
+ [EXCP_ATOMIC - EXCP_QEMU_INTERNAL] = "emulate atomic",
+ };
+ assert(excp >= EXCP_QEMU_INTERNAL);
+ excp -= EXCP_QEMU_INTERNAL;
+ if ((excp < ARRAY_SIZE(excp_name)) && excp_name[excp]) {
+ return excp_name[excp];
+ }
+ return "undocumented";
+}
+
+static void log_raise_exception(const CPUState *cpu, int excp)
+{
+ if (!qemu_loglevel_mask(CPU_LOG_INT)) {
+ return;
+ }
+ if (excp >= EXCP_QEMU_INTERNAL) {
+ qemu_log_mask(CPU_LOG_INT, "raise exception: 0x%x (internal: %s)\n",
+ excp, qemu_excp_name(excp));
+ }
+}
+
/* exit the current TB, but without causing any exception to be raised */
void cpu_loop_exit_noexc(CPUState *cpu)
{
@@ -118,5 +149,6 @@ void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc)
/* Prevent looping if already executing in a serial context. */
g_assert(!cpu_in_serial_context(cpu));
cpu->exception_index = EXCP_ATOMIC;
+ log_raise_exception(cpu, EXCP_ATOMIC);
cpu_loop_exit_restore(cpu, pc);
}
--
2.55.0
next prev parent reply other threads:[~2026-10-07 9:52 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 9:44 [PATCH 00/27] cpus: Add common CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-07 9:44 ` Philippe Mathieu-Daudé [this message]
2026-10-07 10:47 ` [PATCH 01/27] cpus: Add helper to log raised exceptions with '-d int' Philippe Mathieu-Daudé
2026-10-07 11:00 ` Daniel P. Berrangé
2026-10-07 15:24 ` Yonggang Luo
2026-10-07 9:44 ` [PATCH 02/27] cpus: Introduce CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-07 9:44 ` [PATCH 03/27] target/alpha: Register " Philippe Mathieu-Daudé
2026-10-07 9:44 ` [PATCH 04/27] target/arm: " Philippe Mathieu-Daudé
2026-10-07 9:44 ` [PATCH 05/27] target/avr: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-07 9:44 ` [PATCH 06/27] target/hexagon: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-09 1:34 ` Brian Cain
2026-10-07 9:44 ` [PATCH 07/27] target/hppa: " Philippe Mathieu-Daudé
2026-10-07 9:44 ` [PATCH 08/27] target/i386: Replace magic value by proper EXCP0E_PAGE definition Philippe Mathieu-Daudé
2026-10-07 9:44 ` [PATCH 09/27] target/i386: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-07 9:44 ` [PATCH 10/27] target/loongarch: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-08 1:31 ` Bibo Mao
2026-10-07 9:44 ` [PATCH 11/27] target/m68k: " Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 12/27] target/microblaze: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 13/27] target/mips: Remove unuseful EXCP_LAST definition Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 14/27] target/mips: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 15/27] target/or1k: " Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 16/27] target/ppc: " Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 17/27] target/riscv: " Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 18/27] target/rx: Unify BRK and INT trap handling Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 19/27] target/rx: Define exception vector constants Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 20/27] target/rx: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 21/27] target/s390x: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 22/27] target/sh4: Define exception vector constants Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 23/27] target/sh4: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 24/27] target/sparc: Remove well tested DEBUG_PCALL definition Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 25/27] target/sparc: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 26/27] target/tricore: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-07 9:45 ` [PATCH 27/27] target/xtensa: " Philippe Mathieu-Daudé
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