From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Subject: [PATCH v2 29/33] target/sh4: Use a static table in sh4_exception_name()
Date: Wed, 21 Oct 2026 05:14:02 +0200 [thread overview]
Message-ID: <20261021031407.24862-30-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20261021031407.24862-1-philmd@oss.qualcomm.com>
Replace the switch statement with a static lookup table.
Suggested-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
target/sh4/helper.c | 65 +++++++++++++--------------------------------
1 file changed, 19 insertions(+), 46 deletions(-)
diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 5856bab6983..a4f80b10d3c 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -49,54 +49,27 @@
const char *sh4_exception_name(int excp)
{
- const char *name;
+ /* Exception codes (EXPEVT) are multiples of 0x20 */
+ static const char * const excp_names[] = {
+ [SH4_EXCP_ADDR_ERROR >> 5] = "addr_error",
+ [SH4_EXCP_TLB_MISS >> 5] = "tlb_miss",
+ [SH4_EXCP_TLB_VIOLATION >> 5] = "tlb_violation",
+ [SH4_EXCP_ILLEGAL_INSTRUCTION >> 5] = "illegal_instruction",
+ [SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION >> 5] = "slot_illegal_instruction",
+ [SH4_EXCP_FPU_DISABLE >> 5] = "fpu_disable",
+ [SH4_EXCP_SLOT_FPU_DISABLE >> 5] = "slot_fpu",
+ [SH4_EXCP_DATA_WRITE >> 5] = "data_write",
+ [SH4_EXCP_DTLB_MISS_WRITE >> 5] = "dtlb_miss_write",
+ [SH4_EXCP_DTLB_VIOLATION_WRITE >> 5] = "dtlb_violation_write",
+ [SH4_EXCP_FPU >> 5] = "fpu_exception",
+ [SH4_EXCP_INITIAL_PAGE_WRITE >> 5] = "initial_page_write",
+ [SH4_EXCP_TRAPA >> 5] = "trapa",
+ };
- switch (excp) {
- case SH4_EXCP_ADDR_ERROR:
- name = "addr_error";
- break;
- case SH4_EXCP_TLB_MISS:
- name = "tlb_miss";
- break;
- case SH4_EXCP_TLB_VIOLATION:
- name = "tlb_violation";
- break;
- case SH4_EXCP_ILLEGAL_INSTRUCTION:
- name = "illegal_instruction";
- break;
- case SH4_EXCP_SLOT_ILLEGAL_INSTRUCTION:
- name = "slot_illegal_instruction";
- break;
- case SH4_EXCP_FPU_DISABLE:
- name = "fpu_disable";
- break;
- case SH4_EXCP_SLOT_FPU_DISABLE:
- name = "slot_fpu";
- break;
- case SH4_EXCP_DATA_WRITE:
- name = "data_write";
- break;
- case SH4_EXCP_DTLB_MISS_WRITE:
- name = "dtlb_miss_write";
- break;
- case SH4_EXCP_DTLB_VIOLATION_WRITE:
- name = "dtlb_violation_write";
- break;
- case SH4_EXCP_FPU:
- name = "fpu_exception";
- break;
- case SH4_EXCP_INITIAL_PAGE_WRITE:
- name = "initial_page_write";
- break;
- case SH4_EXCP_TRAPA:
- name = "trapa";
- break;
- default:
- name = "???";
- break;
+ if (excp & 0x1f) {
+ return "unknown";
}
-
- return name;
+ return ARRAY_ELEM_OR_NULL(excp_names, excp >> 5) ?: "unknown";
}
#if defined(CONFIG_USER_ONLY)
--
2.55.0
next prev parent reply other threads:[~2026-10-21 3:21 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 3:13 [PATCH v2 00/33] cpus: Add common CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 01/33] qemu/osdep: Add ARRAY_ELEM_OR_NULL() macro Philippe Mathieu-Daudé
2026-10-21 16:18 ` Pierrick Bouvier
2026-10-21 16:19 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 02/33] cpus: Add helper to log raised exceptions with '-d int' Philippe Mathieu-Daudé
2026-10-21 16:22 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 03/33] cpus: Introduce CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 04/33] target/alpha: Register " Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 05/33] target/alpha: Use a static table in alpha_exception_name() Philippe Mathieu-Daudé
2026-10-21 16:19 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 06/33] target/arm: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 07/33] target/avr: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 08/33] target/hexagon: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 09/33] target/hppa: " Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 10/33] target/i386: Replace magic value by proper EXCP0E_PAGE definition Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 11/33] target/i386: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 12/33] target/loongarch: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 13/33] target/m68k: " Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 14/33] target/m68k: Use a static table in m68k_exception_name() Philippe Mathieu-Daudé
2026-10-21 16:20 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 15/33] target/microblaze: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 16/33] target/mips: Remove unuseful EXCP_LAST definition Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 17/33] target/mips: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 18/33] target/or1k: " Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 19/33] target/ppc: Dump EBB exceptions names Philippe Mathieu-Daudé
2026-10-21 16:22 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 20/33] target/ppc: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 21/33] target/ppc: Use a static table in powerpc_excp_name() Philippe Mathieu-Daudé
2026-10-21 16:21 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 22/33] target/riscv: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 23/33] target/rx: Unify BRK and INT trap handling Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 24/33] target/rx: Define exception vector constants Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 25/33] target/rx: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 26/33] target/s390x: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 27/33] target/sh4: Define exception vector constants Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 28/33] target/sh4: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:14 ` Philippe Mathieu-Daudé [this message]
2026-10-21 16:21 ` [PATCH v2 29/33] target/sh4: Use a static table in sh4_exception_name() Pierrick Bouvier
2026-10-21 3:14 ` [PATCH v2 30/33] target/sparc: Remove well tested DEBUG_PCALL definition Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 31/33] target/sparc: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 32/33] target/tricore: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 33/33] target/xtensa: " Philippe Mathieu-Daudé
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