From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
qemu-s390x@nongnu.org,
Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Subject: [PATCH v2 05/33] target/alpha: Use a static table in alpha_exception_name()
Date: Wed, 21 Oct 2026 05:13:38 +0200 [thread overview]
Message-ID: <20261021031407.24862-6-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20261021031407.24862-1-philmd@oss.qualcomm.com>
Replace the switch statement with a static lookup table.
Suggested-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
target/alpha/helper.c | 54 +++++++++++--------------------------------
1 file changed, 14 insertions(+), 40 deletions(-)
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index cedb0006892..0fdb73074ad 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -37,47 +37,21 @@
const char *alpha_exception_name(int excp)
{
- const char *name;
+ static const char * const excp_names[] = {
+ [EXCP_RESET] = "reset",
+ [EXCP_MCHK] = "mchk",
+ [EXCP_SMP_INTERRUPT] = "smp_interrupt",
+ [EXCP_CLK_INTERRUPT] = "clk_interrupt",
+ [EXCP_DEV_INTERRUPT] = "dev_interrupt",
+ [EXCP_MMFAULT] = "mmfault",
+ [EXCP_UNALIGN] = "unalign",
+ [EXCP_OPCDEC] = "opcdec",
+ [EXCP_ARITH] = "arith",
+ [EXCP_FEN] = "fen",
+ [EXCP_CALL_PAL] = "call_pal",
+ };
- switch (excp) {
- case EXCP_RESET:
- name = "reset";
- break;
- case EXCP_MCHK:
- name = "mchk";
- break;
- case EXCP_SMP_INTERRUPT:
- name = "smp_interrupt";
- break;
- case EXCP_CLK_INTERRUPT:
- name = "clk_interrupt";
- break;
- case EXCP_DEV_INTERRUPT:
- name = "dev_interrupt";
- break;
- case EXCP_MMFAULT:
- name = "mmfault";
- break;
- case EXCP_UNALIGN:
- name = "unalign";
- break;
- case EXCP_OPCDEC:
- name = "opcdec";
- break;
- case EXCP_ARITH:
- name = "arith";
- break;
- case EXCP_FEN:
- name = "fen";
- break;
- case EXCP_CALL_PAL:
- name = "call_pal";
- break;
- default:
- name = "<unknown>";
- break;
- }
- return name;
+ return ARRAY_ELEM_OR_NULL(excp_names, excp) ?: "unknown";
}
uint64_t cpu_alpha_load_fpcr(CPUAlphaState *env)
--
2.55.0
next prev parent reply other threads:[~2026-10-21 3:17 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 3:13 [PATCH v2 00/33] cpus: Add common CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 01/33] qemu/osdep: Add ARRAY_ELEM_OR_NULL() macro Philippe Mathieu-Daudé
2026-10-21 16:18 ` Pierrick Bouvier
2026-10-21 16:19 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 02/33] cpus: Add helper to log raised exceptions with '-d int' Philippe Mathieu-Daudé
2026-10-21 16:22 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 03/33] cpus: Introduce CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 04/33] target/alpha: Register " Philippe Mathieu-Daudé
2026-10-21 3:13 ` Philippe Mathieu-Daudé [this message]
2026-10-21 16:19 ` [PATCH v2 05/33] target/alpha: Use a static table in alpha_exception_name() Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 06/33] target/arm: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 07/33] target/avr: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 08/33] target/hexagon: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 09/33] target/hppa: " Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 10/33] target/i386: Replace magic value by proper EXCP0E_PAGE definition Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 11/33] target/i386: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 12/33] target/loongarch: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 13/33] target/m68k: " Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 14/33] target/m68k: Use a static table in m68k_exception_name() Philippe Mathieu-Daudé
2026-10-21 16:20 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 15/33] target/microblaze: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 16/33] target/mips: Remove unuseful EXCP_LAST definition Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 17/33] target/mips: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 18/33] target/or1k: " Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 19/33] target/ppc: Dump EBB exceptions names Philippe Mathieu-Daudé
2026-10-21 16:22 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 20/33] target/ppc: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 21/33] target/ppc: Use a static table in powerpc_excp_name() Philippe Mathieu-Daudé
2026-10-21 16:21 ` Pierrick Bouvier
2026-10-21 3:13 ` [PATCH v2 22/33] target/riscv: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 23/33] target/rx: Unify BRK and INT trap handling Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 24/33] target/rx: Define exception vector constants Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 25/33] target/rx: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:13 ` [PATCH v2 26/33] target/s390x: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 27/33] target/sh4: Define exception vector constants Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 28/33] target/sh4: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 29/33] target/sh4: Use a static table in sh4_exception_name() Philippe Mathieu-Daudé
2026-10-21 16:21 ` Pierrick Bouvier
2026-10-21 3:14 ` [PATCH v2 30/33] target/sparc: Remove well tested DEBUG_PCALL definition Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 31/33] target/sparc: Register CPUClass::exception_name() handler Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 32/33] target/tricore: Implement and register CPUClass::exception_name() Philippe Mathieu-Daudé
2026-10-21 3:14 ` [PATCH v2 33/33] target/xtensa: " Philippe Mathieu-Daudé
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