Re: [PATCH 16/18] drm/i915/dpll: Rename intel_<release/reserve>_dpll

[Jani Nikula <jani.nikula@linux.intel.com>]

On Fri, 09 May 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> Rename intel_<release/reserve>_dpll to
> intel_dpll_<release/reserve> in an effort to keep names of
> exported functions start with the filename.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/display/intel_display.c  |  2 +-
>  drivers/gpu/drm/i915/display/intel_dpll.c     |  4 +--
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 26 +++++++++----------
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 10 +++----
>  4 files changed, 21 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 8ee4833daede..d26c2fd201dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6434,7 +6434,7 @@ int intel_atomic_check(struct drm_device *dev,
>  
>  		any_ms = true;
>  
> -		intel_release_dplls(state, crtc);
> +		intel_dpll_release(state, crtc);
>  	}
>  
>  	if (any_ms && !check_digital_port_conflicts(state)) {
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> index e25411c4171c..6a0bb12eafc4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -1189,7 +1189,7 @@ static int hsw_crtc_get_dpll(struct intel_atomic_state *state,
>  	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
>  		return 0;
>  
> -	return intel_reserve_dplls(state, crtc, encoder);
> +	return intel_dpll_reserve(state, crtc, encoder);
>  }
>  
>  static int dg2_crtc_compute_clock(struct intel_atomic_state *state,
> @@ -1414,7 +1414,7 @@ static int ilk_crtc_get_dpll(struct intel_atomic_state *state,
>  	if (!crtc_state->has_pch_encoder)
>  		return 0;
>  
> -	return intel_reserve_dplls(state, crtc, NULL);
> +	return intel_dpll_reserve(state, crtc, NULL);
>  }
>  
>  static u32 vlv_dpll(const struct intel_crtc_state *crtc_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index c954515145a3..65dd8c3a3aed 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -56,8 +56,8 @@
>   * users of a PLL are tracked and that tracking is integrated with the atomic
>   * modset interface. During an atomic operation, required PLLs can be reserved
>   * for a given CRTC and encoder configuration by calling
> - * intel_reserve_dplls() and previously reserved PLLs can be released
> - * with intel_release_dplls().
> + * intel_dpll_reserve() and previously reserved PLLs can be released
> + * with intel_dpll_release().
>   * Changes to the users are first staged in the atomic state, and then made
>   * effective by calling intel_dpll_swap_state() during the atomic
>   * commit phase.
> @@ -4410,7 +4410,7 @@ int intel_compute_dplls(struct intel_atomic_state *state,
>  }
>  
>  /**
> - * intel_reserve_dplls - reserve DPLLs for CRTC and encoder combination
> + * intel_dpll_reserve - reserve DPLLs for CRTC and encoder combination
>   * @state: atomic state
>   * @crtc: CRTC to reserve DPLLs for
>   * @encoder: encoder
> @@ -4423,15 +4423,15 @@ int intel_compute_dplls(struct intel_atomic_state *state,
>   * calling intel_dpll_swap_state().
>   *
>   * The reserved DPLLs should be released by calling
> - * intel_release_dplls().
> + * intel_dpll_release().
>   *
>   * Returns:
>   * 0 if all required DPLLs were successfully reserved,
>   * negative error code otherwise.
>   */
> -int intel_reserve_dplls(struct intel_atomic_state *state,
> -			struct intel_crtc *crtc,
> -			struct intel_encoder *encoder)
> +int intel_dpll_reserve(struct intel_atomic_state *state,
> +		       struct intel_crtc *crtc,
> +		       struct intel_encoder *encoder)
>  {
>  	struct intel_display *display = to_intel_display(state);
>  	const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
> @@ -4443,18 +4443,18 @@ int intel_reserve_dplls(struct intel_atomic_state *state,
>  }
>  
>  /**
> - * intel_release_dplls - end use of DPLLs by CRTC in atomic state
> + * intel_dpll_release - end use of DPLLs by CRTC in atomic state
>   * @state: atomic state
>   * @crtc: crtc from which the DPLLs are to be released
>   *
> - * This function releases all DPLLs reserved by intel_reserve_dplls()
> + * This function releases all DPLLs reserved by intel_dpll_reserve()
>   * from the current atomic commit @state and the old @crtc atomic state.
>   *
>   * The new configuration in the atomic commit @state is made effective by
>   * calling intel_dpll_swap_state().
>   */
> -void intel_release_dplls(struct intel_atomic_state *state,
> -			 struct intel_crtc *crtc)
> +void intel_dpll_release(struct intel_atomic_state *state,
> +			struct intel_crtc *crtc)
>  {
>  	struct intel_display *display = to_intel_display(state);
>  	const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
> @@ -4462,7 +4462,7 @@ void intel_release_dplls(struct intel_atomic_state *state,
>  	/*
>  	 * FIXME: this function is called for every platform having a
>  	 * compute_clock hook, even though the platform doesn't yet support
> -	 * the global DPLL framework and intel_reserve_dplls() is not
> +	 * the global DPLL framework and intel_dpll_reserve() is not
>  	 * called on those.
>  	 */
>  	if (!dpll_mgr)
> @@ -4478,7 +4478,7 @@ void intel_release_dplls(struct intel_atomic_state *state,
>   * @encoder: encoder determining the type of port DPLL
>   *
>   * Update the active DPLL for the given @crtc/@encoder in @crtc's atomic state,
> - * from the port DPLLs reserved previously by intel_reserve_dplls(). The
> + * from the port DPLLs reserved previously by intel_dpll_reserve(). The
>   * DPLL selected will be based on the current mode of the encoder's port.
>   */
>  void intel_update_active_dpll(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index 8b596a96344f..4f8074580582 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -399,11 +399,11 @@ void assert_dpll(struct intel_display *display,
>  int intel_compute_dplls(struct intel_atomic_state *state,
>  			struct intel_crtc *crtc,
>  			struct intel_encoder *encoder);
> -int intel_reserve_dplls(struct intel_atomic_state *state,
> -			struct intel_crtc *crtc,
> -			struct intel_encoder *encoder);
> -void intel_release_dplls(struct intel_atomic_state *state,
> -			 struct intel_crtc *crtc);
> +int intel_dpll_reserve(struct intel_atomic_state *state,
> +		       struct intel_crtc *crtc,
> +		       struct intel_encoder *encoder);
> +void intel_dpll_release(struct intel_atomic_state *state,
> +			struct intel_crtc *crtc);
>  void intel_dpll_unreference_crtc(const struct intel_crtc *crtc,
>  				 const struct intel_dpll *pll,
>  				 struct intel_dpll_state *shared_dpll_state);

-- 
Jani Nikula, Intel