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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>,
	intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com,
	Suraj Kandpal <suraj.kandpal@intel.com>
Subject: Re: [PATCH 12/18] drm/i915/dpll: Add intel_encoder argument to get_hw_state hook
Date: Fri, 09 May 2025 13:25:57 +0300	[thread overview]
Message-ID: <87ecwykrm2.fsf@intel.com> (raw)
In-Reply-To: <20250509042729.1152004-13-suraj.kandpal@intel.com>

On Fri, 09 May 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> Add intel_encoder argument in the get_hw_state hook as encoders
> and the data stored within them are essential to read the hw state
> starting DISPLAY_VER() >= 14.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>

This is hard to review with no user at hand.

Also, what does it mean to pass NULL for the encoder?

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 38 ++++++++++++-------
>  1 file changed, 25 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 85f726b1c5c8..4a184d1e83a3 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -93,7 +93,8 @@ struct intel_dpll_funcs {
>  	 */
>  	bool (*get_hw_state)(struct intel_display *display,
>  			     struct intel_dpll *pll,
> -			     struct intel_dpll_hw_state *dpll_hw_state);
> +			     struct intel_dpll_hw_state *dpll_hw_state,
> +			     struct intel_encoder *encoder);
>  
>  	/*
>  	 * Hook for calculating the pll's output frequency based on its passed
> @@ -534,7 +535,8 @@ void intel_dpll_swap_state(struct intel_atomic_state *state)
>  
>  static bool ibx_pch_dpll_get_hw_state(struct intel_display *display,
>  				      struct intel_dpll *pll,
> -				      struct intel_dpll_hw_state *dpll_hw_state)
> +				      struct intel_dpll_hw_state *dpll_hw_state,
> +				      struct intel_encoder *encoder)
>  {
>  	struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
>  	const enum intel_dpll_id id = pll->info->id;
> @@ -757,7 +759,8 @@ static void hsw_ddi_spll_disable(struct intel_display *display,
>  
>  static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
>  				       struct intel_dpll *pll,
> -				       struct intel_dpll_hw_state *dpll_hw_state)
> +				       struct intel_dpll_hw_state *dpll_hw_state,
> +				       struct intel_encoder *encoder)
>  {
>  	struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
>  	const enum intel_dpll_id id = pll->info->id;
> @@ -779,7 +782,8 @@ static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
>  
>  static bool hsw_ddi_spll_get_hw_state(struct intel_display *display,
>  				      struct intel_dpll *pll,
> -				      struct intel_dpll_hw_state *dpll_hw_state)
> +				      struct intel_dpll_hw_state *dpll_hw_state,
> +				      struct intel_encoder *encoder)
>  {
>  	struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
>  	intel_wakeref_t wakeref;
> @@ -1305,7 +1309,8 @@ static void hsw_ddi_lcpll_disable(struct intel_display *display,
>  
>  static bool hsw_ddi_lcpll_get_hw_state(struct intel_display *display,
>  				       struct intel_dpll *pll,
> -				       struct intel_dpll_hw_state *dpll_hw_state)
> +				       struct intel_dpll_hw_state *dpll_hw_state,
> +				       struct intel_encoder *encoder)
>  {
>  	return true;
>  }
> @@ -1436,7 +1441,8 @@ static void skl_ddi_dpll0_disable(struct intel_display *display,
>  
>  static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
>  				     struct intel_dpll *pll,
> -				     struct intel_dpll_hw_state *dpll_hw_state)
> +				     struct intel_dpll_hw_state *dpll_hw_state,
> +				     struct intel_encoder *encoder)
>  {
>  	struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
>  	const struct skl_dpll_regs *regs = skl_dpll_regs;
> @@ -1474,7 +1480,8 @@ static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
>  
>  static bool skl_ddi_dpll0_get_hw_state(struct intel_display *display,
>  				       struct intel_dpll *pll,
> -				       struct intel_dpll_hw_state *dpll_hw_state)
> +				       struct intel_dpll_hw_state *dpll_hw_state,
> +				       struct intel_encoder *encoder)
>  {
>  	struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
>  	const struct skl_dpll_regs *regs = skl_dpll_regs;
> @@ -2172,7 +2179,8 @@ static void bxt_ddi_pll_disable(struct intel_display *display,
>  
>  static bool bxt_ddi_pll_get_hw_state(struct intel_display *display,
>  				     struct intel_dpll *pll,
> -				     struct intel_dpll_hw_state *dpll_hw_state)
> +				     struct intel_dpll_hw_state *dpll_hw_state,
> +				     struct intel_encoder *encoder)
>  {
>  	struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
>  	enum port port = (enum port)pll->info->id; /* 1:1 port->PLL mapping */
> @@ -3550,7 +3558,8 @@ static void icl_put_dplls(struct intel_atomic_state *state,
>  
>  static bool mg_pll_get_hw_state(struct intel_display *display,
>  				struct intel_dpll *pll,
> -				struct intel_dpll_hw_state *dpll_hw_state)
> +				struct intel_dpll_hw_state *dpll_hw_state,
> +				struct intel_encoder *encoder)
>  {
>  	struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
>  	const enum intel_dpll_id id = pll->info->id;
> @@ -3617,7 +3626,8 @@ static bool mg_pll_get_hw_state(struct intel_display *display,
>  
>  static bool dkl_pll_get_hw_state(struct intel_display *display,
>  				 struct intel_dpll *pll,
> -				 struct intel_dpll_hw_state *dpll_hw_state)
> +				 struct intel_dpll_hw_state *dpll_hw_state,
> +				 struct intel_encoder *encoder)
>  {
>  	struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
>  	const enum intel_dpll_id id = pll->info->id;
> @@ -3750,7 +3760,8 @@ static bool icl_pll_get_hw_state(struct intel_display *display,
>  
>  static bool combo_pll_get_hw_state(struct intel_display *display,
>  				   struct intel_dpll *pll,
> -				   struct intel_dpll_hw_state *dpll_hw_state)
> +				   struct intel_dpll_hw_state *dpll_hw_state,
> +				   struct intel_encoder *encoder)
>  {
>  	i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
>  
> @@ -3759,7 +3770,8 @@ static bool combo_pll_get_hw_state(struct intel_display *display,
>  
>  static bool tbt_pll_get_hw_state(struct intel_display *display,
>  				 struct intel_dpll *pll,
> -				 struct intel_dpll_hw_state *dpll_hw_state)
> +				 struct intel_dpll_hw_state *dpll_hw_state,
> +				 struct intel_encoder *encoder)
>  {
>  	return icl_pll_get_hw_state(display, pll, dpll_hw_state, TBT_PLL_ENABLE);
>  }
> @@ -4516,7 +4528,7 @@ bool intel_dpll_get_hw_state(struct intel_display *display,
>  			     struct intel_dpll *pll,
>  			     struct intel_dpll_hw_state *dpll_hw_state)
>  {
> -	return pll->info->funcs->get_hw_state(display, pll, dpll_hw_state);
> +	return pll->info->funcs->get_hw_state(display, pll, dpll_hw_state, NULL);
>  }
>  
>  static void readout_dpll_hw_state(struct intel_display *display,

-- 
Jani Nikula, Intel

  reply	other threads:[~2025-05-09 10:26 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-09  4:27 [PATCH 00/18] DPLL framework redesign Suraj Kandpal
2025-05-09  4:27 ` [PATCH 01/18] drm/i915/dpll: Rename intel_dpll Suraj Kandpal
2025-05-09 10:04   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 02/18] drm/i915/dpll: Rename intel_dpll_funcs Suraj Kandpal
2025-05-09 10:05   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 03/18] drm/i915/dpll: Rename intel_shared_dpll_state Suraj Kandpal
2025-05-09 10:07   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 04/18] drm/i915/dpll: Rename macro for_each_shared_dpll Suraj Kandpal
2025-05-09 10:07   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 05/18] drm/i915/dpll: Rename intel_shared_dpll_funcs Suraj Kandpal
2025-05-09 10:08   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 06/18] drm/i915/dpll: Rename intel_shared_dpll Suraj Kandpal
2025-05-09 10:13   ` Jani Nikula
2025-05-12  4:00     ` Kandpal, Suraj
2025-05-09  4:27 ` [PATCH 07/18] drm/i915/dpll: Move away from using shared dpll Suraj Kandpal
2025-05-09 10:17   ` Jani Nikula
2025-05-12  4:02     ` Kandpal, Suraj
2025-05-09  4:27 ` [PATCH 08/18] drm/i915/dpll: Rename crtc_get_shared_dpll Suraj Kandpal
2025-05-09 10:19   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 09/18] drm/i915/dpll: Change argument for enable hook in intel_dpll_funcs Suraj Kandpal
2025-05-09 10:22   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 10/18] drm/i915/drm: Rename disable hook in intel_dpll_global_func Suraj Kandpal
2025-05-09 10:24   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 11/18] drm/i915/dpll: Introduce new hook in intel_dpll_funcs Suraj Kandpal
2025-05-09 10:25   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 12/18] drm/i915/dpll: Add intel_encoder argument to get_hw_state hook Suraj Kandpal
2025-05-09 10:25   ` Jani Nikula [this message]
2025-05-09  4:27 ` [PATCH 13/18] drm/i915/dpll: Change arguments for get_freq hook Suraj Kandpal
2025-05-09 10:27   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 14/18] drm/i915/dpll: Rename intel_[enable/disable]_dpll Suraj Kandpal
2025-05-09 10:29   ` Jani Nikula
2025-05-12  3:19     ` Kandpal, Suraj
2025-05-09  4:27 ` [PATCH 15/18] drm/i915/dpll: Rename intel_unreference_dpll__crtc Suraj Kandpal
2025-05-09 10:31   ` Jani Nikula
2025-05-12  4:27     ` Kandpal, Suraj
2025-05-09  4:27 ` [PATCH 16/18] drm/i915/dpll: Rename intel_<release/reserve>_dpll Suraj Kandpal
2025-05-09 10:32   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 17/18] drm/i915/dpll: Rename intel_compute_dpll Suraj Kandpal
2025-05-09 10:33   ` Jani Nikula
2025-05-09  4:27 ` [PATCH 18/18] drm/i915/dpll: Rename intel_update_active_dpll Suraj Kandpal
2025-05-09 10:33   ` Jani Nikula
  -- strict thread matches above, loose matches on Subject: below --
2025-04-07  8:16 [PATCH 00/18] DPLL framework redesign Suraj Kandpal
2025-04-07  8:16 ` [PATCH 12/18] drm/i915/dpll: Add intel_encoder argument to get_hw_state hook Suraj Kandpal

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