* [PATCH v2 01/17] hw/misc/aspeed_hace: Support the crypto command in direct access mode
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 02/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2500 Jamin Lin
` (15 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
The crypt command register was previously stubbed out. Implement it for
the direct access mode, where HACE00/HACE04 point directly at contiguous
source and destination buffers. AES-128/192/256, DES and 3DES are
supported in ECB and CBC modes via the qcrypto cipher API; the IV and
key are read from the context buffer (HACE08) and, for CBC, the
resulting chaining IV is written back to the context.
The completion interrupt is now raised for every HACE variant as the
hardware does, which fixes the crypt command hang on the AST2500, AST2600
and AST1030. The AST2700 crypto engine still needs 64-bit DMA and
AES-GCM, which are added later, so it keeps its temporary interrupt-only
workaround until then.
For debugging, the context, source and destination buffers are dumped
through the existing aspeed_hace_hexdump trace event (disabled by
default). CTR mode, scatter-gather mode and AES-GCM are added separately.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/misc/aspeed_hace.c | 283 +++++++++++++++++++++++++++++++++++++++---
1 file changed, 269 insertions(+), 14 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index c61efe50c4..de4399f322 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -18,11 +18,44 @@
#include "qapi/error.h"
#include "migration/vmstate.h"
#include "crypto/hash.h"
+#include "crypto/cipher.h"
#include "hw/core/qdev-properties.h"
#include "hw/core/irq.h"
#include "trace.h"
-#define R_CRYPT_CMD (0x10 / 4)
+/* Crypto engine registers */
+#define R_CRYPT_SRC (0x00 / 4)
+#define R_CRYPT_DEST (0x04 / 4)
+#define R_CRYPT_CONTEXT (0x08 / 4)
+#define R_CRYPT_DATA_LEN (0x0c / 4)
+/* HACE0C[27:0] holds the crypto data length */
+#define CRYPT_DATA_LEN_MASK 0x0FFFFFFF
+#define R_CRYPT_CMD (0x10 / 4)
+/* Crypto engine command register (HACE10) bits */
+#define CRYPT_CMD_ENCRYPT BIT(7)
+#define CRYPT_CMD_ISR_EN BIT(12)
+#define CRYPT_CMD_DES_SELECT BIT(16)
+#define CRYPT_CMD_TRIPLE_DES BIT(17)
+#define CRYPT_CMD_SRC_SG_CTRL BIT(18)
+#define CRYPT_CMD_DST_SG_CTRL BIT(19)
+/* Operation mode HACE10[6:4] */
+#define CRYPT_CMD_OP_MODE_MASK (0x7 << 4)
+#define CRYPT_CMD_ECB (0x0 << 4)
+#define CRYPT_CMD_CBC (0x1 << 4)
+/* AES key length HACE10[3:2] */
+#define CRYPT_CMD_AES_KEY_LEN_MASK (0x3 << 2)
+#define CRYPT_CMD_AES256 (0x2 << 2)
+#define CRYPT_CMD_AES192 (0x1 << 2)
+#define CRYPT_CMD_AES128 (0x0 << 2)
+
+/*
+ * Crypto context buffer layout (HACE08). The IV is at the start of the buffer
+ * (DES places its 8 byte IV at offset 8) and the cipher key at offset 0x10.
+ */
+#define CRYPT_CTX_IV_OFFSET 0x00
+#define CRYPT_CTX_DES_IV_OFFSET 0x08
+#define CRYPT_CTX_KEY_OFFSET 0x10
+#define CRYPT_CTX_SIZE 0x30
#define R_STATUS (0x1c / 4)
#define HASH_IRQ BIT(9)
@@ -501,6 +534,216 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
}
}
+static bool crypt_aes_alg(uint32_t cmd, QCryptoCipherAlgo *alg, size_t *keylen)
+{
+ switch (cmd & CRYPT_CMD_AES_KEY_LEN_MASK) {
+ case CRYPT_CMD_AES128:
+ *alg = QCRYPTO_CIPHER_ALGO_AES_128;
+ *keylen = 16;
+ break;
+ case CRYPT_CMD_AES192:
+ *alg = QCRYPTO_CIPHER_ALGO_AES_192;
+ *keylen = 24;
+ break;
+ case CRYPT_CMD_AES256:
+ *alg = QCRYPTO_CIPHER_ALGO_AES_256;
+ *keylen = 32;
+ break;
+ default:
+ return false;
+ }
+
+ return true;
+}
+
+/*
+ * Decode the crypto command register into a libqcrypto algorithm/mode pair
+ * and the block/IV geometry. Returns false for unsupported selections.
+ */
+static bool crypt_decode_cmd(uint32_t cmd, QCryptoCipherAlgo *alg,
+ QCryptoCipherMode *mode, size_t *keylen,
+ size_t *blocklen, size_t *iv_offset)
+{
+ if (cmd & CRYPT_CMD_DES_SELECT) {
+ *blocklen = 8;
+ *iv_offset = CRYPT_CTX_DES_IV_OFFSET;
+ if (cmd & CRYPT_CMD_TRIPLE_DES) {
+ *alg = QCRYPTO_CIPHER_ALGO_3DES;
+ *keylen = 24;
+ } else {
+ *alg = QCRYPTO_CIPHER_ALGO_DES;
+ *keylen = 8;
+ }
+ } else {
+ *blocklen = 16;
+ *iv_offset = CRYPT_CTX_IV_OFFSET;
+ if (!crypt_aes_alg(cmd, alg, keylen)) {
+ return false;
+ }
+ }
+
+ switch (cmd & CRYPT_CMD_OP_MODE_MASK) {
+ case CRYPT_CMD_ECB:
+ *mode = QCRYPTO_CIPHER_MODE_ECB;
+ break;
+ case CRYPT_CMD_CBC:
+ *mode = QCRYPTO_CIPHER_MODE_CBC;
+ break;
+ default:
+ return false;
+ }
+
+ return true;
+}
+
+/*
+ * Direct access mode: the source/destination register (HACE00/HACE04) points
+ * at a single contiguous buffer in DRAM. Copy @len bytes between it and the
+ * bounce buffer @buf; when @to_dram is true @buf is written out, otherwise it
+ * is read in. Returns true on success.
+ */
+static bool crypt_prepare_direct(AspeedHACEState *s, uint64_t addr,
+ uint8_t *buf, uint32_t len, bool to_dram)
+{
+ return !address_space_rw(&s->dram_as, addr, MEMTXATTRS_UNSPECIFIED,
+ buf, len, to_dram);
+}
+
+/*
+ * Perform an AES/DES/3DES ECB/CBC operation in direct access mode: the source
+ * and destination are single contiguous buffers (HACE00/HACE04) and the IV/key
+ * come from the context buffer (HACE08). For CBC the resulting chaining IV is
+ * written back to the context buffer so the driver can continue the chain.
+ */
+static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
+{
+ uint32_t len = s->regs[R_CRYPT_DATA_LEN];
+ bool encrypt = cmd & CRYPT_CMD_ENCRYPT;
+ g_autoptr(QCryptoCipher) cipher = NULL;
+ g_autofree uint8_t *src_buf = NULL;
+ g_autofree uint8_t *dst_buf = NULL;
+ uint8_t ctx[CRYPT_CTX_SIZE];
+ Error *local_err = NULL;
+ QCryptoCipherMode mode;
+ QCryptoCipherAlgo alg;
+ const uint8_t *next_iv;
+ uint64_t ctx_addr;
+ uint64_t src_addr;
+ uint64_t dst_addr;
+ size_t iv_offset;
+ size_t blocklen;
+ size_t keylen;
+
+ if (len == 0) {
+ return;
+ }
+
+ if (!crypt_decode_cmd(cmd, &alg, &mode, &keylen, &blocklen, &iv_offset)) {
+ qemu_log_mask(LOG_UNIMP,
+ "%s: Unsupported crypt command 0x%x\n", __func__, cmd);
+ return;
+ }
+
+ if (!qcrypto_cipher_supports(alg, mode)) {
+ qemu_log_mask(LOG_UNIMP,
+ "%s: cipher mode not supported by the crypto backend\n",
+ __func__);
+ return;
+ }
+
+ /* Fetch the IV and key from the context buffer in DRAM. */
+ ctx_addr = s->regs[R_CRYPT_CONTEXT];
+ if (address_space_read(&s->dram_as, ctx_addr, MEMTXATTRS_UNSPECIFIED,
+ ctx, sizeof(ctx))) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Failed to read context, addr=0x%" HWADDR_PRIx "\n",
+ __func__, ctx_addr);
+ return;
+ }
+
+ if (trace_event_get_state_backends(TRACE_ASPEED_HACE_HEXDUMP)) {
+ hace_hexdump("context", (char *)ctx, sizeof(ctx));
+ }
+
+ cipher = qcrypto_cipher_new(alg, mode, ctx + CRYPT_CTX_KEY_OFFSET, keylen,
+ &local_err);
+ if (cipher == NULL) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto cipher new failed: %s\n",
+ __func__, error_get_pretty(local_err));
+ error_free(local_err);
+ return;
+ }
+
+ if (mode != QCRYPTO_CIPHER_MODE_ECB &&
+ qcrypto_cipher_setiv(cipher, ctx + iv_offset, blocklen,
+ &local_err) < 0) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto cipher setiv failed: %s\n",
+ __func__, error_get_pretty(local_err));
+ error_free(local_err);
+ return;
+ }
+
+ src_buf = g_malloc0(len);
+ dst_buf = g_malloc0(len);
+
+ src_addr = s->regs[R_CRYPT_SRC];
+ if (!crypt_prepare_direct(s, src_addr, src_buf, len, false)) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Failed to read src, addr=0x%" HWADDR_PRIx "\n",
+ __func__, src_addr);
+ return;
+ }
+
+ if (trace_event_get_state_backends(TRACE_ASPEED_HACE_HEXDUMP)) {
+ hace_hexdump("src", (char *)src_buf, len);
+ }
+
+ if (encrypt) {
+ if (qcrypto_cipher_encrypt(cipher, src_buf, dst_buf, len,
+ &local_err) < 0) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: encrypt failed: %s\n",
+ __func__, error_get_pretty(local_err));
+ error_free(local_err);
+ return;
+ }
+ } else {
+ if (qcrypto_cipher_decrypt(cipher, src_buf, dst_buf, len,
+ &local_err) < 0) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: decrypt failed: %s\n",
+ __func__, error_get_pretty(local_err));
+ error_free(local_err);
+ return;
+ }
+ }
+
+ dst_addr = s->regs[R_CRYPT_DEST];
+ if (!crypt_prepare_direct(s, dst_addr, dst_buf, len, true)) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Failed to write dst, addr=0x%" HWADDR_PRIx "\n",
+ __func__, dst_addr);
+ return;
+ }
+
+ if (trace_event_get_state_backends(TRACE_ASPEED_HACE_HEXDUMP)) {
+ hace_hexdump("dst", (char *)dst_buf, len);
+ }
+
+ if (mode == QCRYPTO_CIPHER_MODE_CBC) {
+ /*
+ * CBC chains on the last ciphertext block: the final block of the
+ * output when encrypting, or of the input when decrypting. Write it
+ * back as the IV for the next request.
+ */
+ next_iv = (encrypt ? dst_buf : src_buf) + len - blocklen;
+ if (address_space_write(&s->dram_as, ctx_addr + iv_offset,
+ MEMTXATTRS_UNSPECIFIED, next_iv, blocklen)) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Failed to write IV, addr=0x%" HWADDR_PRIx "\n",
+ __func__, ctx_addr + iv_offset);
+ }
+ }
+}
+
static uint64_t aspeed_hace_read(void *opaque, hwaddr addr, unsigned int size)
{
AspeedHACEState *s = ASPEED_HACE(opaque);
@@ -531,16 +774,22 @@ static void aspeed_hace_write(void *opaque, hwaddr addr, uint64_t data,
qemu_irq_lower(s->irq);
}
}
- if (ahc->raise_crypt_interrupt_workaround) {
- if (data & CRYPT_IRQ) {
- data &= ~CRYPT_IRQ;
+ if (data & CRYPT_IRQ) {
+ data &= ~CRYPT_IRQ;
- if (s->regs[addr] & CRYPT_IRQ) {
- qemu_irq_lower(s->irq);
- }
+ if (s->regs[addr] & CRYPT_IRQ) {
+ qemu_irq_lower(s->irq);
}
}
break;
+ case R_CRYPT_SRC:
+ case R_CRYPT_DEST:
+ case R_CRYPT_CONTEXT:
+ data &= ahc->src_mask;
+ break;
+ case R_CRYPT_DATA_LEN:
+ data &= CRYPT_DATA_LEN_MASK;
+ break;
case R_HASH_SRC:
data &= ahc->src_mask;
break;
@@ -589,13 +838,19 @@ static void aspeed_hace_write(void *opaque, hwaddr addr, uint64_t data,
break;
}
case R_CRYPT_CMD:
- qemu_log_mask(LOG_UNIMP, "%s: Crypt commands not implemented\n",
- __func__);
- if (ahc->raise_crypt_interrupt_workaround) {
- s->regs[R_STATUS] |= CRYPT_IRQ;
- if (data & CRYPT_IRQ_EN) {
- qemu_irq_raise(s->irq);
- }
+ /*
+ * The AST2700 crypto engine needs 64-bit DMA and AES-GCM, which are
+ * added later; until then it keeps the temporary workaround of only
+ * raising the completion interrupt without running the command.
+ */
+ if (!ahc->raise_crypt_interrupt_workaround) {
+ do_crypt_operation(s, data);
+ }
+
+ /* Hardware raises the crypt interrupt once the command finishes. */
+ s->regs[R_STATUS] |= CRYPT_IRQ;
+ if (data & CRYPT_CMD_ISR_EN) {
+ qemu_irq_raise(s->irq);
}
break;
case R_HASH_SRC_HI:
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 02/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2500
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
2026-07-15 3:33 ` [PATCH v2 01/17] hw/misc/aspeed_hace: Support the crypto command in direct access mode Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 03/17] hw/misc/aspeed_hace: Support scatter-gather mode for the crypto command Jamin Lin
` (14 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Add a crypto known-answer test harness and exercise the AST2500, which
uses the crypto engine's direct access mode. Each mode (AES/DES/3DES in
ECB and CBC) is a separate test that checks the ciphertext, the
plaintext round-trip and, for CBC, the chaining IV written back to the
context buffer.
The key/IV/plaintext/ciphertext values are taken verbatim from the Linux
kernel crypto self-test templates in crypto/testmgr.h.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/qtest/aspeed-hace-utils.h | 16 ++
tests/qtest/aspeed-hace-utils.c | 325 ++++++++++++++++++++++++++++++++
tests/qtest/aspeed_hace-test.c | 6 +
tests/qtest/meson.build | 6 +-
4 files changed, 351 insertions(+), 2 deletions(-)
diff --git a/tests/qtest/aspeed-hace-utils.h b/tests/qtest/aspeed-hace-utils.h
index 27ab2bb975..13feaa61e4 100644
--- a/tests/qtest/aspeed-hace-utils.h
+++ b/tests/qtest/aspeed-hace-utils.h
@@ -79,5 +79,21 @@ void aspeed_test_sha512_accum(const char *machine, const uint32_t base,
void aspeed_test_addresses(const char *machine, const uint32_t base,
const struct AspeedMasks *expected);
+/*
+ * Cipher modes a SoC's crypto engine supports, for aspeed_add_crypto_tests().
+ */
+enum {
+ CRYPT_MODE_ECB = 1 << 0,
+ CRYPT_MODE_CBC = 1 << 1,
+};
+
+/*
+ * Register the crypto known-answer tests that @modes selects (a mask of
+ * CRYPT_MODE_*) for the given machine. Each test is named
+ * "<prefix>/hace/crypto/<mode>".
+ */
+void aspeed_add_crypto_tests(const char *prefix, const char *machine,
+ uint32_t base, uint64_t dram, uint32_t modes);
+
#endif /* TESTS_ASPEED_HACE_UTILS_H */
diff --git a/tests/qtest/aspeed-hace-utils.c b/tests/qtest/aspeed-hace-utils.c
index 25450a296b..0355dd47af 100644
--- a/tests/qtest/aspeed-hace-utils.c
+++ b/tests/qtest/aspeed-hace-utils.c
@@ -9,6 +9,7 @@
#include "libqtest.h"
#include "qemu/bitops.h"
#include "qemu/bswap.h"
+#include "crypto/cipher.h"
#include "aspeed-hace-utils.h"
/*
@@ -645,3 +646,327 @@ void aspeed_test_addresses(const char *machine, const uint32_t base,
qtest_quit(s);
}
+/*
+ * Crypto engine register layout (offsets from the HACE base).
+ */
+#define HACE_CRYPTO_SRC 0x00
+#define HACE_CRYPTO_DEST 0x04
+#define HACE_CRYPTO_CONTEXT 0x08
+#define HACE_CRYPTO_DATA_LEN 0x0c
+#define HACE_CRYPTO_CMD 0x10
+
+/* Crypto command bits */
+#define HACE_CMD_ENCRYPT BIT(7)
+#define HACE_CMD_ISR_EN BIT(12)
+#define HACE_CMD_DES_SELECT BIT(16)
+#define HACE_CMD_TRIPLE_DES BIT(17)
+#define HACE_CMD_SRC_SG_CTRL BIT(18)
+#define HACE_CMD_DST_SG_CTRL BIT(19)
+#define HACE_CMD_OP_MODE_MASK (0x7 << 4)
+#define HACE_CMD_ECB (0x0 << 4)
+#define HACE_CMD_CBC (0x1 << 4)
+#define HACE_CMD_AES128 (0x0 << 2)
+
+/* Context buffer layout: IV (DES at +8), key at +0x10 */
+#define HACE_CTX_KEY_OFFSET 0x10
+#define HACE_CTX_SIZE 0x30
+
+/*
+ * Crypto known-answer test vectors, taken verbatim from the Linux kernel
+ * crypto self-test templates in crypto/testmgr.h:
+ *
+ * https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/crypto/testmgr.h?h=v6.18
+ *
+ * The originating template is noted above each block. CTR and the longer CBC
+ * vectors are truncated to a single block (still a valid known-answer test as
+ * the first block only depends on the IV).
+ */
+
+/* aes_tv_template[0] (FIPS-197) */
+static const uint8_t aes128_ecb_key[16] = {
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f };
+static const uint8_t aes128_ecb_ptext[16] = {
+ 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,
+ 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff };
+static const uint8_t aes128_ecb_ctext[16] = {
+ 0x69, 0xc4, 0xe0, 0xd8, 0x6a, 0x7b, 0x04, 0x30,
+ 0xd8, 0xcd, 0xb7, 0x80, 0x70, 0xb4, 0xc5, 0x5a };
+
+/* aes_cbc_tv_template[0] (RFC 3602) */
+static const uint8_t aes128_cbc_key[16] = {
+ 0x06, 0xa9, 0x21, 0x40, 0x36, 0xb8, 0xa1, 0x5b,
+ 0x51, 0x2e, 0x03, 0xd5, 0x34, 0x12, 0x00, 0x06 };
+static const uint8_t aes128_cbc_iv[16] = {
+ 0x3d, 0xaf, 0xba, 0x42, 0x9d, 0x9e, 0xb4, 0x30,
+ 0xb4, 0x22, 0xda, 0x80, 0x2c, 0x9f, 0xac, 0x41 };
+static const uint8_t aes128_cbc_ptext[16] = {
+ 0x53, 0x69, 0x6e, 0x67, 0x6c, 0x65, 0x20, 0x62,
+ 0x6c, 0x6f, 0x63, 0x6b, 0x20, 0x6d, 0x73, 0x67 };
+static const uint8_t aes128_cbc_ctext[16] = {
+ 0xe3, 0x53, 0x77, 0x9c, 0x10, 0x79, 0xae, 0xb8,
+ 0x27, 0x08, 0x94, 0x2d, 0xbe, 0x77, 0x18, 0x1a };
+static const uint8_t aes128_cbc_ivout[16] = {
+ 0xe3, 0x53, 0x77, 0x9c, 0x10, 0x79, 0xae, 0xb8,
+ 0x27, 0x08, 0x94, 0x2d, 0xbe, 0x77, 0x18, 0x1a };
+
+/* des_tv_template[0] (Applied Cryptography) */
+static const uint8_t des_ecb_key[8] = {
+ 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef };
+static const uint8_t des_ecb_ptext[8] = {
+ 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xe7 };
+static const uint8_t des_ecb_ctext[8] = {
+ 0xc9, 0x57, 0x44, 0x25, 0x6a, 0x5e, 0xd3, 0x1d };
+
+/* des_cbc_tv_template[0] (OpenSSL), first block */
+static const uint8_t des_cbc_key[8] = {
+ 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef };
+static const uint8_t des_cbc_iv[8] = {
+ 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 };
+static const uint8_t des_cbc_ptext[8] = {
+ 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x20 };
+static const uint8_t des_cbc_ctext[8] = {
+ 0xcc, 0xd1, 0x73, 0xff, 0xab, 0x20, 0x39, 0xf4 };
+
+/* des3_ede_tv_template[0] (OpenSSL) */
+static const uint8_t tdes_ecb_key[24] = {
+ 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+ 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+ 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 };
+static const uint8_t tdes_ecb_ptext[8] = {
+ 0x73, 0x6f, 0x6d, 0x65, 0x64, 0x61, 0x74, 0x61 };
+static const uint8_t tdes_ecb_ctext[8] = {
+ 0x18, 0xd7, 0x48, 0xe5, 0x63, 0x62, 0x05, 0x72 };
+
+/* des3_ede_cbc_tv_template[0] (OpenSSL), first block */
+static const uint8_t tdes_cbc_key[24] = {
+ 0xe9, 0xc0, 0xff, 0x2e, 0x76, 0x0b, 0x64, 0x24,
+ 0x44, 0x4d, 0x99, 0x5a, 0x12, 0xd6, 0x40, 0xc0,
+ 0xea, 0xc2, 0x84, 0xe8, 0x14, 0x95, 0xdb, 0xe8 };
+static const uint8_t tdes_cbc_iv[8] = {
+ 0x7d, 0x33, 0x88, 0x93, 0x0f, 0x93, 0xb2, 0x42 };
+static const uint8_t tdes_cbc_ptext[8] = {
+ 0x6f, 0x54, 0x20, 0x6f, 0x61, 0x4d, 0x79, 0x6e };
+static const uint8_t tdes_cbc_ctext[8] = {
+ 0x0e, 0x2d, 0xb6, 0x97, 0x3c, 0x56, 0x33, 0xf4 };
+
+typedef struct CryptTest {
+ QCryptoCipherMode mode;
+ QCryptoCipherAlgo alg;
+ /* expected context IV after encrypt, or NULL */
+ const uint8_t *iv_out;
+ const uint8_t *ptext;
+ const uint8_t *ctext;
+ const uint8_t *key;
+ const uint8_t *iv;
+ const char *name;
+ size_t keylen;
+ /* algorithm | mode | key size selection */
+ uint32_t cmd;
+ size_t ivlen;
+ size_t len;
+} CryptTest;
+
+static const CryptTest crypt_tests[] = {
+ {
+ .name = "aes128-ecb",
+ .cmd = HACE_CMD_AES128 | HACE_CMD_ECB,
+ .alg = QCRYPTO_CIPHER_ALGO_AES_128,
+ .mode = QCRYPTO_CIPHER_MODE_ECB,
+ .key = aes128_ecb_key,
+ .keylen = sizeof(aes128_ecb_key),
+ .ptext = aes128_ecb_ptext,
+ .ctext = aes128_ecb_ctext,
+ .len = sizeof(aes128_ecb_ptext),
+ },
+ {
+ .name = "aes128-cbc",
+ .cmd = HACE_CMD_AES128 | HACE_CMD_CBC,
+ .alg = QCRYPTO_CIPHER_ALGO_AES_128,
+ .mode = QCRYPTO_CIPHER_MODE_CBC,
+ .key = aes128_cbc_key,
+ .keylen = sizeof(aes128_cbc_key),
+ .iv = aes128_cbc_iv,
+ .ivlen = sizeof(aes128_cbc_iv),
+ .ptext = aes128_cbc_ptext,
+ .ctext = aes128_cbc_ctext,
+ .iv_out = aes128_cbc_ivout,
+ .len = sizeof(aes128_cbc_ptext),
+ },
+ {
+ .name = "des-ecb",
+ .cmd = HACE_CMD_DES_SELECT | HACE_CMD_ECB,
+ .alg = QCRYPTO_CIPHER_ALGO_DES,
+ .mode = QCRYPTO_CIPHER_MODE_ECB,
+ .key = des_ecb_key,
+ .keylen = sizeof(des_ecb_key),
+ .ptext = des_ecb_ptext,
+ .ctext = des_ecb_ctext,
+ .len = sizeof(des_ecb_ptext),
+ },
+ {
+ .name = "des-cbc",
+ .cmd = HACE_CMD_DES_SELECT | HACE_CMD_CBC,
+ .alg = QCRYPTO_CIPHER_ALGO_DES,
+ .mode = QCRYPTO_CIPHER_MODE_CBC,
+ .key = des_cbc_key,
+ .keylen = sizeof(des_cbc_key),
+ .iv = des_cbc_iv,
+ .ivlen = sizeof(des_cbc_iv),
+ .ptext = des_cbc_ptext,
+ .ctext = des_cbc_ctext,
+ .len = sizeof(des_cbc_ptext),
+ },
+ {
+ .name = "des3_ede-ecb",
+ .cmd = HACE_CMD_DES_SELECT | HACE_CMD_TRIPLE_DES | HACE_CMD_ECB,
+ .alg = QCRYPTO_CIPHER_ALGO_3DES,
+ .mode = QCRYPTO_CIPHER_MODE_ECB,
+ .key = tdes_ecb_key,
+ .keylen = sizeof(tdes_ecb_key),
+ .ptext = tdes_ecb_ptext,
+ .ctext = tdes_ecb_ctext,
+ .len = sizeof(tdes_ecb_ptext),
+ },
+ {
+ .name = "des3_ede-cbc",
+ .cmd = HACE_CMD_DES_SELECT | HACE_CMD_TRIPLE_DES | HACE_CMD_CBC,
+ .alg = QCRYPTO_CIPHER_ALGO_3DES,
+ .mode = QCRYPTO_CIPHER_MODE_CBC,
+ .key = tdes_cbc_key,
+ .keylen = sizeof(tdes_cbc_key),
+ .iv = tdes_cbc_iv,
+ .ivlen = sizeof(tdes_cbc_iv),
+ .ptext = tdes_cbc_ptext,
+ .ctext = tdes_cbc_ctext,
+ .len = sizeof(tdes_cbc_ptext),
+ },
+};
+
+/* DRAM offsets for the crypto test source, destination and context buffers. */
+#define CRYPT_OFF_SRC 0x10000
+#define CRYPT_OFF_DST 0x20000
+#define CRYPT_OFF_CTX 0x30000
+
+/* Describes one registered crypto test (qtest_add_data_func() data pointer). */
+typedef struct AspeedCryptoTest {
+ const char *machine;
+ uint64_t dram;
+ uint32_t base;
+ int index;
+} AspeedCryptoTest;
+
+/* Map a command's operation mode (HACE10[6:4]) to a CRYPT_MODE_* flag. */
+static uint32_t crypt_mode_flag(uint32_t cmd)
+{
+ switch (cmd & HACE_CMD_OP_MODE_MASK) {
+ case HACE_CMD_ECB:
+ return CRYPT_MODE_ECB;
+ case HACE_CMD_CBC:
+ return CRYPT_MODE_CBC;
+ default:
+ return 0;
+ }
+}
+
+static void crypt_write_ctx(QTestState *s, uint64_t ctx_addr,
+ const CryptTest *t)
+{
+ size_t iv_off = (t->cmd & HACE_CMD_DES_SELECT) ? 8 : 0;
+ uint8_t ctx[HACE_CTX_SIZE] = { 0 };
+
+ if (t->iv) {
+ memcpy(ctx + iv_off, t->iv, t->ivlen);
+ }
+ memcpy(ctx + HACE_CTX_KEY_OFFSET, t->key, t->keylen);
+ qtest_memwrite(s, ctx_addr, ctx, sizeof(ctx));
+}
+
+/* Run one crypto operation in direct access mode and read back the result. */
+static void crypt_run_direct(QTestState *s, uint32_t base, uint64_t dram,
+ const CryptTest *t, bool encrypt, uint8_t *out)
+{
+ const uint8_t *in = encrypt ? t->ptext : t->ctext;
+ uint32_t cmd = t->cmd | HACE_CMD_ISR_EN;
+ uint64_t src = dram + CRYPT_OFF_SRC;
+ uint64_t dst = dram + CRYPT_OFF_DST;
+ uint64_t ctx = dram + CRYPT_OFF_CTX;
+
+ if (encrypt) {
+ cmd |= HACE_CMD_ENCRYPT;
+ }
+
+ crypt_write_ctx(s, ctx, t);
+ qtest_memwrite(s, src, in, t->len);
+
+ qtest_writel(s, base + HACE_CRYPTO_SRC, (uint32_t)src);
+ qtest_writel(s, base + HACE_CRYPTO_DEST, (uint32_t)dst);
+ qtest_writel(s, base + HACE_CRYPTO_CONTEXT, (uint32_t)ctx);
+ qtest_writel(s, base + HACE_CRYPTO_DATA_LEN, t->len);
+ qtest_writel(s, base + HACE_CRYPTO_CMD, cmd);
+
+ g_assert_cmphex(qtest_readl(s, base + HACE_STS) & HACE_CRYPTO_ISR, ==,
+ HACE_CRYPTO_ISR);
+ qtest_writel(s, base + HACE_STS, HACE_CRYPTO_ISR);
+
+ qtest_memread(s, dst, out, t->len);
+}
+
+static void aspeed_test_crypto_direct(const void *data)
+{
+ const AspeedCryptoTest *c = data;
+ const CryptTest *t = &crypt_tests[c->index];
+ QTestState *s = qtest_init(c->machine);
+ uint8_t out[64];
+ uint8_t iv[16];
+ size_t iv_off;
+
+ g_assert_cmpuint(t->len, <=, sizeof(out));
+
+ /* Encrypt: ptext -> ctext */
+ crypt_run_direct(s, c->base, c->dram, t, true, out);
+ g_assert_cmpmem(out, t->len, t->ctext, t->len);
+
+ if (t->iv_out) {
+ iv_off = (t->cmd & HACE_CMD_DES_SELECT) ? 8 : 0;
+ qtest_memread(s, c->dram + CRYPT_OFF_CTX + iv_off, iv, t->ivlen);
+ g_assert_cmpmem(iv, t->ivlen, t->iv_out, t->ivlen);
+ }
+
+ /* Decrypt: ctext -> ptext */
+ crypt_run_direct(s, c->base, c->dram, t, false, out);
+ g_assert_cmpmem(out, t->len, t->ptext, t->len);
+
+ qtest_quit(s);
+}
+
+void aspeed_add_crypto_tests(const char *prefix, const char *machine,
+ uint32_t base, uint64_t dram, uint32_t modes)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(crypt_tests); i++) {
+ g_autofree char *path = NULL;
+ AspeedCryptoTest *t;
+
+ if (!(modes & crypt_mode_flag(crypt_tests[i].cmd))) {
+ continue;
+ }
+
+ if (!qcrypto_cipher_supports(crypt_tests[i].alg,
+ crypt_tests[i].mode)) {
+ g_printerr("# skip unsupported %s\n", crypt_tests[i].name);
+ continue;
+ }
+
+ path = g_strdup_printf("%s/hace/crypto/%s", prefix,
+ crypt_tests[i].name);
+ t = g_new0(AspeedCryptoTest, 1);
+ t->machine = machine;
+ t->base = base;
+ t->dram = dram;
+ t->index = i;
+ qtest_add_data_func_full(path, t, aspeed_test_crypto_direct, g_free);
+ }
+}
+
diff --git a/tests/qtest/aspeed_hace-test.c b/tests/qtest/aspeed_hace-test.c
index 38777020ca..4cb4c475e9 100644
--- a/tests/qtest/aspeed_hace-test.c
+++ b/tests/qtest/aspeed_hace-test.c
@@ -229,6 +229,12 @@ int main(int argc, char **argv)
qtest_add_func("ast2500/hace/sha256", test_sha256_ast2500);
qtest_add_func("ast2500/hace/md5", test_md5_ast2500);
+ /*
+ * The AST2500 crypto engine uses direct access mode and supports ECB/CBC.
+ */
+ aspeed_add_crypto_tests("ast2500", "-machine ast2500-evb", 0x1e6e3000,
+ 0x80000000, CRYPT_MODE_ECB | CRYPT_MODE_CBC);
+
qtest_add_func("ast2400/hace/addresses", test_addresses_ast2400);
qtest_add_func("ast2400/hace/sha512", test_sha512_ast2400);
qtest_add_func("ast2400/hace/sha256", test_sha256_ast2400);
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index 56ff860e21..d5bde77689 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -389,9 +389,11 @@ if get_option('replication').allowed()
endif
qtests = {
- 'aspeed_hace-test': files('aspeed-hace-utils.c', 'aspeed_hace-test.c'),
+ 'aspeed_hace-test': [files('aspeed-hace-utils.c', 'aspeed_hace-test.c'),
+ crypto],
'aspeed_smc-test': files('aspeed-smc-utils.c', 'aspeed_smc-test.c'),
- 'ast2700-hace-test': files('aspeed-hace-utils.c', 'ast2700-hace-test.c'),
+ 'ast2700-hace-test': [files('aspeed-hace-utils.c', 'ast2700-hace-test.c'),
+ crypto],
'ast2700-smc-test': files('aspeed-smc-utils.c', 'ast2700-smc-test.c'),
'bios-tables-test': [io, 'boot-sector.c', 'acpi-utils.c', 'tpm-emu.c'],
'cdrom-test': files('boot-sector.c'),
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 03/17] hw/misc/aspeed_hace: Support scatter-gather mode for the crypto command
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
2026-07-15 3:33 ` [PATCH v2 01/17] hw/misc/aspeed_hace: Support the crypto command in direct access mode Jamin Lin
2026-07-15 3:33 ` [PATCH v2 02/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2500 Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 04/17] hw/misc/aspeed_hace: Support the CTR " Jamin Lin
` (13 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
The AST2600 and later crypto engines drive the source and destination
through scatter-gather lists (HACE10[18]/[19]) rather than the single
contiguous buffers used by the AST2500 direct access mode. Each SG list
entry is a length word (SG_LIST_LEN_LAST marks the final entry) followed
by a DRAM address, matching the hash engine layout.
Add a crypt_prepare_sg() helper that gathers the source into / scatters
the destination out of the bounce buffer by walking the SG list, and
select it or the existing crypt_prepare_direct() from do_crypt_operation
based on HACE10[18], mirroring the hash engine's direct/scatter-gather
dispatch.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/misc/aspeed_hace.c | 70 +++++++++++++++++++++++++++++++++++++++----
1 file changed, 64 insertions(+), 6 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index de4399f322..3d3f1fc8dd 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -610,13 +610,58 @@ static bool crypt_prepare_direct(AspeedHACEState *s, uint64_t addr,
}
/*
- * Perform an AES/DES/3DES ECB/CBC operation in direct access mode: the source
- * and destination are single contiguous buffers (HACE00/HACE04) and the IV/key
- * come from the context buffer (HACE08). For CBC the resulting chaining IV is
- * written back to the context buffer so the driver can continue the chain.
+ * Scatter-gather mode: the source/destination register points at an SG list
+ * whose entries are a length word (SG_LIST_LEN_LAST flags the final entry)
+ * followed by a DRAM address, matching the hash engine layout. Gather @len
+ * bytes into @buf, or scatter @buf back out when @to_dram is true.
+ * Returns true on success.
+ */
+static bool crypt_prepare_sg(AspeedHACEState *s, uint64_t addr,
+ uint8_t *buf, uint32_t len, bool to_dram)
+{
+ uint32_t copied = 0;
+ uint32_t sg_addr;
+ uint32_t sg_len;
+ uint32_t entry;
+ int i;
+
+ for (i = 0; i < ASPEED_HACE_MAX_SG && copied < len; i++) {
+ entry = address_space_ldl_le(&s->dram_as, addr,
+ MEMTXATTRS_UNSPECIFIED, NULL);
+ sg_addr = address_space_ldl_le(&s->dram_as, addr + SG_LIST_LEN_SIZE,
+ MEMTXATTRS_UNSPECIFIED, NULL);
+ sg_len = entry & SG_LIST_LEN_MASK;
+
+ sg_addr &= SG_LIST_ADDR_MASK;
+ addr += SG_LIST_ENTRY_SIZE;
+
+ if (sg_len > len - copied) {
+ sg_len = len - copied;
+ }
+ if (address_space_rw(&s->dram_as, sg_addr, MEMTXATTRS_UNSPECIFIED,
+ buf + copied, sg_len, to_dram)) {
+ return false;
+ }
+ copied += sg_len;
+
+ if (entry & SG_LIST_LEN_LAST) {
+ break;
+ }
+ }
+
+ return copied == len;
+}
+
+/*
+ * Perform an AES/DES/3DES ECB/CBC operation. The source and destination are
+ * either single contiguous buffers (direct access mode) or scatter-gather
+ * lists (HACE10[18]/[19]), addressed by HACE00/HACE04; the IV/key come from
+ * the context buffer (HACE08). For CBC the resulting chaining IV is written
+ * back to the context buffer so the driver can continue the chain.
*/
static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
{
+ bool sg_mode = cmd & CRYPT_CMD_SRC_SG_CTRL;
uint32_t len = s->regs[R_CRYPT_DATA_LEN];
bool encrypt = cmd & CRYPT_CMD_ENCRYPT;
g_autoptr(QCryptoCipher) cipher = NULL;
@@ -633,6 +678,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
size_t iv_offset;
size_t blocklen;
size_t keylen;
+ bool status;
if (len == 0) {
return;
@@ -686,8 +732,14 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
src_buf = g_malloc0(len);
dst_buf = g_malloc0(len);
+ /* Gather the source into the bounce buffer, per the selected mode. */
src_addr = s->regs[R_CRYPT_SRC];
- if (!crypt_prepare_direct(s, src_addr, src_buf, len, false)) {
+ if (sg_mode) {
+ status = crypt_prepare_sg(s, src_addr, src_buf, len, false);
+ } else {
+ status = crypt_prepare_direct(s, src_addr, src_buf, len, false);
+ }
+ if (!status) {
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Failed to read src, addr=0x%" HWADDR_PRIx "\n",
__func__, src_addr);
@@ -716,8 +768,14 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
}
}
+ /* Scatter the result back out, per the selected mode. */
dst_addr = s->regs[R_CRYPT_DEST];
- if (!crypt_prepare_direct(s, dst_addr, dst_buf, len, true)) {
+ if (sg_mode) {
+ status = crypt_prepare_sg(s, dst_addr, dst_buf, len, true);
+ } else {
+ status = crypt_prepare_direct(s, dst_addr, dst_buf, len, true);
+ }
+ if (!status) {
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Failed to write dst, addr=0x%" HWADDR_PRIx "\n",
__func__, dst_addr);
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 04/17] hw/misc/aspeed_hace: Support the CTR mode for the crypto command
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (2 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 03/17] hw/misc/aspeed_hace: Support scatter-gather mode for the crypto command Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 05/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2600 Jamin Lin
` (12 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
The AST2600, AST1030 and later crypto engines add AES/DES/3DES CTR mode
(HACE10[6:4] = 0b100) on top of the ECB/CBC modes shared with the
AST2500. Decode the CTR selection, round the working buffers up to a
whole block so the stream-like final block is still processed a block at
a time, and write the counter advanced by the number of blocks consumed
back to the context buffer so the driver can continue across requests.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/misc/aspeed_hace.c | 50 ++++++++++++++++++++++++++++++++++++++-----
1 file changed, 45 insertions(+), 5 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 3d3f1fc8dd..09d0515271 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -42,6 +42,7 @@
#define CRYPT_CMD_OP_MODE_MASK (0x7 << 4)
#define CRYPT_CMD_ECB (0x0 << 4)
#define CRYPT_CMD_CBC (0x1 << 4)
+#define CRYPT_CMD_CTR (0x4 << 4)
/* AES key length HACE10[3:2] */
#define CRYPT_CMD_AES_KEY_LEN_MASK (0x3 << 2)
#define CRYPT_CMD_AES256 (0x2 << 2)
@@ -589,6 +590,9 @@ static bool crypt_decode_cmd(uint32_t cmd, QCryptoCipherAlgo *alg,
case CRYPT_CMD_CBC:
*mode = QCRYPTO_CIPHER_MODE_CBC;
break;
+ case CRYPT_CMD_CTR:
+ *mode = QCRYPTO_CIPHER_MODE_CTR;
+ break;
default:
return false;
}
@@ -652,6 +656,22 @@ static bool crypt_prepare_sg(AspeedHACEState *s, uint64_t addr,
return copied == len;
}
+/*
+ * Add @add to the big-endian counter block @ctr (@len bytes) in place, so the
+ * CTR mode counter can be advanced by the number of blocks just consumed.
+ */
+static void crypt_be_add(uint8_t *ctr, size_t len, uint64_t add)
+{
+ size_t i = len;
+
+ while (i > 0 && add) {
+ i--;
+ add += ctr[i];
+ ctr[i] = add & 0xff;
+ add >>= 8;
+ }
+}
+
/*
* Perform an AES/DES/3DES ECB/CBC operation. The source and destination are
* either single contiguous buffers (direct access mode) or scatter-gather
@@ -677,6 +697,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
uint64_t dst_addr;
size_t iv_offset;
size_t blocklen;
+ size_t buf_len;
size_t keylen;
bool status;
@@ -729,8 +750,14 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
return;
}
- src_buf = g_malloc0(len);
- dst_buf = g_malloc0(len);
+ /*
+ * Round the working buffers up to a whole block. Block modes are already
+ * block-aligned; the stream-like CTR mode may leave a partial final block
+ * that the engine still processes a full block at a time.
+ */
+ buf_len = QEMU_ALIGN_UP(len, blocklen);
+ src_buf = g_malloc0(buf_len);
+ dst_buf = g_malloc0(buf_len);
/* Gather the source into the bounce buffer, per the selected mode. */
src_addr = s->regs[R_CRYPT_SRC];
@@ -751,7 +778,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
}
if (encrypt) {
- if (qcrypto_cipher_encrypt(cipher, src_buf, dst_buf, len,
+ if (qcrypto_cipher_encrypt(cipher, src_buf, dst_buf, buf_len,
&local_err) < 0) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: encrypt failed: %s\n",
__func__, error_get_pretty(local_err));
@@ -759,7 +786,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
return;
}
} else {
- if (qcrypto_cipher_decrypt(cipher, src_buf, dst_buf, len,
+ if (qcrypto_cipher_decrypt(cipher, src_buf, dst_buf, buf_len,
&local_err) < 0) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: decrypt failed: %s\n",
__func__, error_get_pretty(local_err));
@@ -792,13 +819,26 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
* output when encrypting, or of the input when decrypting. Write it
* back as the IV for the next request.
*/
- next_iv = (encrypt ? dst_buf : src_buf) + len - blocklen;
+ next_iv = (encrypt ? dst_buf : src_buf) + buf_len - blocklen;
if (address_space_write(&s->dram_as, ctx_addr + iv_offset,
MEMTXATTRS_UNSPECIFIED, next_iv, blocklen)) {
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Failed to write IV, addr=0x%" HWADDR_PRIx "\n",
__func__, ctx_addr + iv_offset);
}
+ } else if (mode == QCRYPTO_CIPHER_MODE_CTR) {
+ /*
+ * CTR chains on the counter, which advances by one per block. Add the
+ * number of blocks processed (buf_len / blocklen) and write it back.
+ */
+ crypt_be_add(ctx + iv_offset, blocklen, buf_len / blocklen);
+ if (address_space_write(&s->dram_as, ctx_addr + iv_offset,
+ MEMTXATTRS_UNSPECIFIED, ctx + iv_offset,
+ blocklen)) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Failed to write IV, addr=0x%" HWADDR_PRIx "\n",
+ __func__, ctx_addr + iv_offset);
+ }
}
}
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 05/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2600
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (3 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 04/17] hw/misc/aspeed_hace: Support the CTR " Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 06/17] tests/qtest/aspeed-hace: Test the crypto command on the AST1030 Jamin Lin
` (11 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Extend the crypto known-answer tests to cover the AST2600 crypto engine,
which drives the source and destination through scatter-gather lists and
adds CTR mode on top of the ECB/CBC modes shared with the AST2500.
Add a scatter-gather runner that describes each buffer with three
non-adjacent fragments to exercise the gather/scatter path, add
AES/DES/3DES CTR vectors (verifying the counter written back to the
context buffer), and give aspeed_add_crypto_tests() a mode mask and a
scatter-gather flag so each SoC registers exactly the modes and transfer
method it supports. Register the AST2600 with ECB/CBC/CTR in
scatter-gather mode.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/qtest/aspeed-hace-utils.h | 7 +-
tests/qtest/aspeed-hace-utils.c | 217 +++++++++++++++++++++++++++++++-
tests/qtest/aspeed_hace-test.c | 8 +-
3 files changed, 224 insertions(+), 8 deletions(-)
diff --git a/tests/qtest/aspeed-hace-utils.h b/tests/qtest/aspeed-hace-utils.h
index 13feaa61e4..82b0b3f93d 100644
--- a/tests/qtest/aspeed-hace-utils.h
+++ b/tests/qtest/aspeed-hace-utils.h
@@ -85,15 +85,18 @@ void aspeed_test_addresses(const char *machine, const uint32_t base,
enum {
CRYPT_MODE_ECB = 1 << 0,
CRYPT_MODE_CBC = 1 << 1,
+ CRYPT_MODE_CTR = 1 << 2,
};
/*
* Register the crypto known-answer tests that @modes selects (a mask of
* CRYPT_MODE_*) for the given machine. Each test is named
- * "<prefix>/hace/crypto/<mode>".
+ * "<prefix>/hace/crypto/<mode>". @sg selects scatter-gather mode (used by the
+ * AST2600 and later) instead of the AST2500 direct access mode.
*/
void aspeed_add_crypto_tests(const char *prefix, const char *machine,
- uint32_t base, uint64_t dram, uint32_t modes);
+ uint32_t base, uint64_t dram, uint32_t modes,
+ bool sg);
#endif /* TESTS_ASPEED_HACE_UTILS_H */
diff --git a/tests/qtest/aspeed-hace-utils.c b/tests/qtest/aspeed-hace-utils.c
index 0355dd47af..f582c88ef5 100644
--- a/tests/qtest/aspeed-hace-utils.c
+++ b/tests/qtest/aspeed-hace-utils.c
@@ -665,6 +665,7 @@ void aspeed_test_addresses(const char *machine, const uint32_t base,
#define HACE_CMD_OP_MODE_MASK (0x7 << 4)
#define HACE_CMD_ECB (0x0 << 4)
#define HACE_CMD_CBC (0x1 << 4)
+#define HACE_CMD_CTR (0x4 << 4)
#define HACE_CMD_AES128 (0x0 << 2)
/* Context buffer layout: IV (DES at +8), key at +0x10 */
@@ -750,6 +751,49 @@ static const uint8_t tdes_cbc_ptext[8] = {
static const uint8_t tdes_cbc_ctext[8] = {
0x0e, 0x2d, 0xb6, 0x97, 0x3c, 0x56, 0x33, 0xf4 };
+/* aes_ctr_tv_template[0] (NIST SP800-38A F.5.1), first block */
+static const uint8_t aes128_ctr_key[16] = {
+ 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
+ 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c };
+static const uint8_t aes128_ctr_iv[16] = {
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff };
+static const uint8_t aes128_ctr_ptext[16] = {
+ 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
+ 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a };
+static const uint8_t aes128_ctr_ctext[16] = {
+ 0x87, 0x4d, 0x61, 0x91, 0xb6, 0x20, 0xe3, 0x26,
+ 0x1b, 0xef, 0x68, 0x64, 0x99, 0x0d, 0xb6, 0xce };
+static const uint8_t aes128_ctr_ivout[16] = {
+ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+ 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xff, 0x00 };
+
+/* des_ctr_tv_template[0] (Crypto++), first block */
+static const uint8_t des_ctr_key[8] = {
+ 0xc9, 0x83, 0xa6, 0xc9, 0xec, 0x0f, 0x32, 0x55 };
+static const uint8_t des_ctr_iv[8] = {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd };
+static const uint8_t des_ctr_ptext[8] = {
+ 0x50, 0xb9, 0x22, 0xae, 0x17, 0x80, 0x0c, 0x75 };
+static const uint8_t des_ctr_ctext[8] = {
+ 0x2f, 0x96, 0x06, 0x0f, 0x50, 0xc9, 0x68, 0x03 };
+static const uint8_t des_ctr_ivout[8] = {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe };
+
+/* des3_ede_ctr_tv_template[0] (Crypto++), first block */
+static const uint8_t tdes_ctr_key[24] = {
+ 0x9c, 0xd6, 0xf3, 0x9c, 0xb9, 0x5a, 0x67, 0x00,
+ 0x5a, 0x67, 0x00, 0x2d, 0xce, 0xeb, 0x2d, 0xce,
+ 0xeb, 0xb4, 0x51, 0x72, 0xb4, 0x51, 0x72, 0x1f };
+static const uint8_t tdes_ctr_iv[8] = {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+static const uint8_t tdes_ctr_ptext[8] = {
+ 0x05, 0xec, 0x77, 0xfb, 0x42, 0xd5, 0x59, 0x20 };
+static const uint8_t tdes_ctr_ctext[8] = {
+ 0x07, 0xc2, 0x08, 0x20, 0x72, 0x1f, 0x49, 0xef };
+static const uint8_t tdes_ctr_ivout[8] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
+
typedef struct CryptTest {
QCryptoCipherMode mode;
QCryptoCipherAlgo alg;
@@ -841,12 +885,65 @@ static const CryptTest crypt_tests[] = {
.ctext = tdes_cbc_ctext,
.len = sizeof(tdes_cbc_ptext),
},
+ {
+ .name = "aes128-ctr",
+ .cmd = HACE_CMD_AES128 | HACE_CMD_CTR,
+ .alg = QCRYPTO_CIPHER_ALGO_AES_128,
+ .mode = QCRYPTO_CIPHER_MODE_CTR,
+ .key = aes128_ctr_key,
+ .keylen = sizeof(aes128_ctr_key),
+ .iv = aes128_ctr_iv,
+ .ivlen = sizeof(aes128_ctr_iv),
+ .ptext = aes128_ctr_ptext,
+ .ctext = aes128_ctr_ctext,
+ .iv_out = aes128_ctr_ivout,
+ .len = sizeof(aes128_ctr_ptext),
+ },
+ {
+ .name = "des-ctr",
+ .cmd = HACE_CMD_DES_SELECT | HACE_CMD_CTR,
+ .alg = QCRYPTO_CIPHER_ALGO_DES,
+ .mode = QCRYPTO_CIPHER_MODE_CTR,
+ .key = des_ctr_key,
+ .keylen = sizeof(des_ctr_key),
+ .iv = des_ctr_iv,
+ .ivlen = sizeof(des_ctr_iv),
+ .ptext = des_ctr_ptext,
+ .ctext = des_ctr_ctext,
+ .iv_out = des_ctr_ivout,
+ .len = sizeof(des_ctr_ptext),
+ },
+ {
+ .name = "des3_ede-ctr",
+ .cmd = HACE_CMD_DES_SELECT | HACE_CMD_TRIPLE_DES | HACE_CMD_CTR,
+ .alg = QCRYPTO_CIPHER_ALGO_3DES,
+ .mode = QCRYPTO_CIPHER_MODE_CTR,
+ .key = tdes_ctr_key,
+ .keylen = sizeof(tdes_ctr_key),
+ .iv = tdes_ctr_iv,
+ .ivlen = sizeof(tdes_ctr_iv),
+ .ptext = tdes_ctr_ptext,
+ .ctext = tdes_ctr_ctext,
+ .iv_out = tdes_ctr_ivout,
+ .len = sizeof(tdes_ctr_ptext),
+ },
};
/* DRAM offsets for the crypto test source, destination and context buffers. */
#define CRYPT_OFF_SRC 0x10000
#define CRYPT_OFF_DST 0x20000
#define CRYPT_OFF_CTX 0x30000
+/* Scatter-gather list offsets (each list has CRYPT_SG_FRAGS entries). */
+#define CRYPT_OFF_SRC_SG 0x40000
+#define CRYPT_OFF_DST_SG 0x50000
+/*
+ * The scatter-gather tests split each buffer into CRYPT_SG_FRAGS fragments,
+ * each placed CRYPT_SG_FRAG_STRIDE apart so the fragments never abut. The gaps
+ * make the test fail if the engine ignores the list and reads one contiguous
+ * block.
+ */
+#define CRYPT_SG_FRAGS 3
+#define CRYPT_SG_FRAG_STRIDE 0x1000
/* Describes one registered crypto test (qtest_add_data_func() data pointer). */
typedef struct AspeedCryptoTest {
@@ -854,6 +951,7 @@ typedef struct AspeedCryptoTest {
uint64_t dram;
uint32_t base;
int index;
+ bool sg;
} AspeedCryptoTest;
/* Map a command's operation mode (HACE10[6:4]) to a CRYPT_MODE_* flag. */
@@ -864,6 +962,8 @@ static uint32_t crypt_mode_flag(uint32_t cmd)
return CRYPT_MODE_ECB;
case HACE_CMD_CBC:
return CRYPT_MODE_CBC;
+ case HACE_CMD_CTR:
+ return CRYPT_MODE_CTR;
default:
return 0;
}
@@ -912,7 +1012,104 @@ static void crypt_run_direct(QTestState *s, uint32_t base, uint64_t dram,
qtest_memread(s, dst, out, t->len);
}
-static void aspeed_test_crypto_direct(const void *data)
+/*
+ * Byte range [*frag_off, *frag_off + *frag_len) of fragment @index when an
+ * @len-byte buffer is split into CRYPT_SG_FRAGS pieces; the last piece takes
+ * the remainder of an uneven split.
+ */
+static void crypt_frag_range(uint32_t len, int index,
+ uint32_t *frag_off, uint32_t *frag_len)
+{
+ uint32_t base = len / CRYPT_SG_FRAGS;
+
+ *frag_off = base * index;
+ *frag_len = (index == CRYPT_SG_FRAGS - 1) ? len - *frag_off : base;
+}
+
+/*
+ * Scatter [in, len) across CRYPT_SG_FRAGS buffers based at @base_off and spaced
+ * CRYPT_SG_FRAG_STRIDE apart, then build the SG list describing them at @list.
+ * When @in is NULL only the list is built (used for the destination, which the
+ * engine fills in).
+ */
+static void crypt_make_sg(QTestState *s, uint64_t dram, uint32_t base_off,
+ uint64_t list, const uint8_t *in, uint32_t len)
+{
+ struct AspeedSgList sg[CRYPT_SG_FRAGS];
+ uint32_t frag_off;
+ uint32_t frag_len;
+ uint64_t buf;
+ int i;
+
+ for (i = 0; i < CRYPT_SG_FRAGS; i++) {
+ crypt_frag_range(len, i, &frag_off, &frag_len);
+ buf = dram + base_off + i * CRYPT_SG_FRAG_STRIDE;
+
+ if (in) {
+ qtest_memwrite(s, buf, in + frag_off, frag_len);
+ }
+ sg[i].len = cpu_to_le32(frag_len | (i == CRYPT_SG_FRAGS - 1 ?
+ SG_LIST_LEN_LAST : 0));
+ sg[i].addr = cpu_to_le32((uint32_t)buf);
+ }
+
+ qtest_memwrite(s, list, sg, sizeof(sg));
+}
+
+/* Gather a scatter-gathered result back from the CRYPT_SG_FRAGS buffers. */
+static void crypt_gather_sg(QTestState *s, uint64_t dram, uint32_t base_off,
+ uint8_t *out, uint32_t len)
+{
+ uint32_t frag_off;
+ uint32_t frag_len;
+ int i;
+
+ for (i = 0; i < CRYPT_SG_FRAGS; i++) {
+ crypt_frag_range(len, i, &frag_off, &frag_len);
+ qtest_memread(s, dram + base_off + i * CRYPT_SG_FRAG_STRIDE,
+ out + frag_off, frag_len);
+ }
+}
+
+/*
+ * Run one block-cipher (ECB/CBC/CTR) operation in scatter-gather mode and read
+ * back the result. The source and destination are each split across
+ * CRYPT_SG_FRAGS non-adjacent DRAM buffers described by an SG list; the gaps
+ * ensure the test fails if the engine ignores the list and reads one
+ * contiguous block.
+ */
+static void crypt_run_sg(QTestState *s, uint32_t base, uint64_t dram,
+ const CryptTest *t, bool encrypt, uint8_t *out)
+{
+ const uint8_t *in = encrypt ? t->ptext : t->ctext;
+ uint64_t src_sg = dram + CRYPT_OFF_SRC_SG;
+ uint64_t dst_sg = dram + CRYPT_OFF_DST_SG;
+ uint64_t ctx = dram + CRYPT_OFF_CTX;
+ uint32_t cmd = t->cmd | HACE_CMD_ISR_EN | HACE_CMD_SRC_SG_CTRL |
+ HACE_CMD_DST_SG_CTRL;
+
+ if (encrypt) {
+ cmd |= HACE_CMD_ENCRYPT;
+ }
+
+ crypt_write_ctx(s, ctx, t);
+ crypt_make_sg(s, dram, CRYPT_OFF_SRC, src_sg, in, t->len);
+ crypt_make_sg(s, dram, CRYPT_OFF_DST, dst_sg, NULL, t->len);
+
+ qtest_writel(s, base + HACE_CRYPTO_SRC, (uint32_t)src_sg);
+ qtest_writel(s, base + HACE_CRYPTO_DEST, (uint32_t)dst_sg);
+ qtest_writel(s, base + HACE_CRYPTO_CONTEXT, (uint32_t)ctx);
+ qtest_writel(s, base + HACE_CRYPTO_DATA_LEN, t->len);
+ qtest_writel(s, base + HACE_CRYPTO_CMD, cmd);
+
+ g_assert_cmphex(qtest_readl(s, base + HACE_STS) & HACE_CRYPTO_ISR, ==,
+ HACE_CRYPTO_ISR);
+ qtest_writel(s, base + HACE_STS, HACE_CRYPTO_ISR);
+
+ crypt_gather_sg(s, dram, CRYPT_OFF_DST, out, t->len);
+}
+
+static void aspeed_test_crypto(const void *data)
{
const AspeedCryptoTest *c = data;
const CryptTest *t = &crypt_tests[c->index];
@@ -924,7 +1121,11 @@ static void aspeed_test_crypto_direct(const void *data)
g_assert_cmpuint(t->len, <=, sizeof(out));
/* Encrypt: ptext -> ctext */
- crypt_run_direct(s, c->base, c->dram, t, true, out);
+ if (c->sg) {
+ crypt_run_sg(s, c->base, c->dram, t, true, out);
+ } else {
+ crypt_run_direct(s, c->base, c->dram, t, true, out);
+ }
g_assert_cmpmem(out, t->len, t->ctext, t->len);
if (t->iv_out) {
@@ -934,14 +1135,19 @@ static void aspeed_test_crypto_direct(const void *data)
}
/* Decrypt: ctext -> ptext */
- crypt_run_direct(s, c->base, c->dram, t, false, out);
+ if (c->sg) {
+ crypt_run_sg(s, c->base, c->dram, t, false, out);
+ } else {
+ crypt_run_direct(s, c->base, c->dram, t, false, out);
+ }
g_assert_cmpmem(out, t->len, t->ptext, t->len);
qtest_quit(s);
}
void aspeed_add_crypto_tests(const char *prefix, const char *machine,
- uint32_t base, uint64_t dram, uint32_t modes)
+ uint32_t base, uint64_t dram, uint32_t modes,
+ bool sg)
{
int i;
@@ -966,7 +1172,8 @@ void aspeed_add_crypto_tests(const char *prefix, const char *machine,
t->base = base;
t->dram = dram;
t->index = i;
- qtest_add_data_func_full(path, t, aspeed_test_crypto_direct, g_free);
+ t->sg = sg;
+ qtest_add_data_func_full(path, t, aspeed_test_crypto, g_free);
}
}
diff --git a/tests/qtest/aspeed_hace-test.c b/tests/qtest/aspeed_hace-test.c
index 4cb4c475e9..61a3e3feb5 100644
--- a/tests/qtest/aspeed_hace-test.c
+++ b/tests/qtest/aspeed_hace-test.c
@@ -224,6 +224,12 @@ int main(int argc, char **argv)
qtest_add_func("ast2600/hace/sha384_accum", test_sha384_accum_ast2600);
qtest_add_func("ast2600/hace/sha256_accum", test_sha256_accum_ast2600);
+ /* The AST2600 crypto engine uses scatter-gather mode and adds CTR. */
+ aspeed_add_crypto_tests("ast2600", "-machine ast2600-evb", 0x1e6d0000,
+ 0x80000000,
+ CRYPT_MODE_ECB | CRYPT_MODE_CBC | CRYPT_MODE_CTR,
+ true);
+
qtest_add_func("ast2500/hace/addresses", test_addresses_ast2500);
qtest_add_func("ast2500/hace/sha512", test_sha512_ast2500);
qtest_add_func("ast2500/hace/sha256", test_sha256_ast2500);
@@ -233,7 +239,7 @@ int main(int argc, char **argv)
* The AST2500 crypto engine uses direct access mode and supports ECB/CBC.
*/
aspeed_add_crypto_tests("ast2500", "-machine ast2500-evb", 0x1e6e3000,
- 0x80000000, CRYPT_MODE_ECB | CRYPT_MODE_CBC);
+ 0x80000000, CRYPT_MODE_ECB | CRYPT_MODE_CBC, false);
qtest_add_func("ast2400/hace/addresses", test_addresses_ast2400);
qtest_add_func("ast2400/hace/sha512", test_sha512_ast2400);
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 06/17] tests/qtest/aspeed-hace: Test the crypto command on the AST1030
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (4 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 05/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2600 Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 07/17] crypto/cipher: Add GCM to QCryptoCipherMode Jamin Lin
` (10 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
The AST1030 reuses the AST2600 crypto engine, so it drives the same
scatter-gather transfers and supports the same ECB/CBC/CTR modes. Reuse
the crypto known-answer tests to cover it, registering the AST1030 with
the same modes and scatter-gather flag as the AST2600.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/qtest/aspeed_hace-test.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/tests/qtest/aspeed_hace-test.c b/tests/qtest/aspeed_hace-test.c
index 61a3e3feb5..42130df1e2 100644
--- a/tests/qtest/aspeed_hace-test.c
+++ b/tests/qtest/aspeed_hace-test.c
@@ -210,6 +210,12 @@ int main(int argc, char **argv)
qtest_add_func("ast1030/hace/sha384_accum", test_sha384_accum_ast1030);
qtest_add_func("ast1030/hace/sha256_accum", test_sha256_accum_ast1030);
+ /* The AST1030 reuses the AST2600 crypto engine (scatter-gather, CTR). */
+ aspeed_add_crypto_tests("ast1030", "-machine ast1030-evb", 0x7e6d0000,
+ 0x00000000,
+ CRYPT_MODE_ECB | CRYPT_MODE_CBC | CRYPT_MODE_CTR,
+ true);
+
qtest_add_func("ast2600/hace/addresses", test_addresses_ast2600);
qtest_add_func("ast2600/hace/sha512", test_sha512_ast2600);
qtest_add_func("ast2600/hace/sha384", test_sha384_ast2600);
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 07/17] crypto/cipher: Add GCM to QCryptoCipherMode
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (5 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 06/17] tests/qtest/aspeed-hace: Test the crypto command on the AST1030 Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 4:51 ` Markus Armbruster
2026-07-15 3:33 ` [PATCH v2 08/17] crypto/cipher: Add setaad/gettag for AEAD modes Jamin Lin
` (9 subsequent siblings)
16 siblings, 1 reply; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Introduce the GCM cipher mode so authenticated encryption can be built
on top of the existing qcrypto_cipher API. GCM is an IV-based mode, so
register it in mode_need_iv. No backend advertises it yet, so it stays
unsupported until a backend and the AAD/tag helpers are added in the
following patches.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Acked-by: Daniel P. Berrangé <berrange@redhat.com>
---
qapi/crypto.json | 4 +++-
crypto/cipher.c | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/qapi/crypto.json b/qapi/crypto.json
index 2b55befef9..6e3a98ff68 100644
--- a/qapi/crypto.json
+++ b/qapi/crypto.json
@@ -121,10 +121,12 @@
#
# @ctr: Counter (Since 2.8)
#
+# @gcm: Galois/Counter Mode (Since 11.2)
+#
# Since: 2.6
##
{ 'enum': 'QCryptoCipherMode',
- 'data': ['ecb', 'cbc', 'xts', 'ctr']}
+ 'data': ['ecb', 'cbc', 'xts', 'ctr', 'gcm']}
##
# @QCryptoIVGenAlgo:
diff --git a/crypto/cipher.c b/crypto/cipher.c
index 515165e0dc..52d071a90c 100644
--- a/crypto/cipher.c
+++ b/crypto/cipher.c
@@ -66,6 +66,7 @@ static const bool mode_need_iv[QCRYPTO_CIPHER_MODE__MAX] = {
[QCRYPTO_CIPHER_MODE_CBC] = true,
[QCRYPTO_CIPHER_MODE_XTS] = true,
[QCRYPTO_CIPHER_MODE_CTR] = true,
+ [QCRYPTO_CIPHER_MODE_GCM] = true,
};
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 07/17] crypto/cipher: Add GCM to QCryptoCipherMode
2026-07-15 3:33 ` [PATCH v2 07/17] crypto/cipher: Add GCM to QCryptoCipherMode Jamin Lin
@ 2026-07-15 4:51 ` Markus Armbruster
2026-07-23 12:48 ` Daniel P. Berrangé
0 siblings, 1 reply; 27+ messages in thread
From: Markus Armbruster @ 2026-07-15 4:51 UTC (permalink / raw)
To: Jamin Lin
Cc: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:All patches CC here, open list:ASPEED BMCs, Troy Lee
Jamin Lin <jamin_lin@aspeedtech.com> writes:
> Introduce the GCM cipher mode so authenticated encryption can be built
> on top of the existing qcrypto_cipher API. GCM is an IV-based mode, so
> register it in mode_need_iv. No backend advertises it yet, so it stays
> unsupported until a backend and the AAD/tag helpers are added in the
> following patches.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
> Acked-by: Daniel P. Berrangé <berrange@redhat.com>
Same person giving Reviewed-by and Acked-by is odd. Daniel, is this
what you want?
> ---
> qapi/crypto.json | 4 +++-
> crypto/cipher.c | 1 +
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/qapi/crypto.json b/qapi/crypto.json
> index 2b55befef9..6e3a98ff68 100644
> --- a/qapi/crypto.json
> +++ b/qapi/crypto.json
> @@ -121,10 +121,12 @@
> #
> # @ctr: Counter (Since 2.8)
> #
> +# @gcm: Galois/Counter Mode (Since 11.2)
> +#
> # Since: 2.6
> ##
> { 'enum': 'QCryptoCipherMode',
> - 'data': ['ecb', 'cbc', 'xts', 'ctr']}
> + 'data': ['ecb', 'cbc', 'xts', 'ctr', 'gcm']}
>
> ##
> # @QCryptoIVGenAlgo:
Acked-by: Markus Armbruster <armbru@redhat.com>
[...]
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v2 07/17] crypto/cipher: Add GCM to QCryptoCipherMode
2026-07-15 4:51 ` Markus Armbruster
@ 2026-07-23 12:48 ` Daniel P. Berrangé
0 siblings, 0 replies; 27+ messages in thread
From: Daniel P. Berrangé @ 2026-07-23 12:48 UTC (permalink / raw)
To: Markus Armbruster
Cc: Jamin Lin, Cédric Le Goater, Peter Maydell, Steven Lee,
Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, Eric Blake,
Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:All patches CC here, open list:ASPEED BMCs, Troy Lee
On Wed, Jul 15, 2026 at 06:51:41AM +0200, Markus Armbruster wrote:
> Jamin Lin <jamin_lin@aspeedtech.com> writes:
>
> > Introduce the GCM cipher mode so authenticated encryption can be built
> > on top of the existing qcrypto_cipher API. GCM is an IV-based mode, so
> > register it in mode_need_iv. No backend advertises it yet, so it stays
> > unsupported until a backend and the AAD/tag helpers are added in the
> > following patches.
> >
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
> > Acked-by: Daniel P. Berrangé <berrange@redhat.com>
>
> Same person giving Reviewed-by and Acked-by is odd. Daniel, is this
> what you want?
Acked-by in the sense that as crypto subsys maintainer, I'm happy for
it to be merged by aspeed/arm maintainer as part of this series.
>
> > ---
> > qapi/crypto.json | 4 +++-
> > crypto/cipher.c | 1 +
> > 2 files changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/qapi/crypto.json b/qapi/crypto.json
> > index 2b55befef9..6e3a98ff68 100644
> > --- a/qapi/crypto.json
> > +++ b/qapi/crypto.json
> > @@ -121,10 +121,12 @@
> > #
> > # @ctr: Counter (Since 2.8)
> > #
> > +# @gcm: Galois/Counter Mode (Since 11.2)
> > +#
> > # Since: 2.6
> > ##
> > { 'enum': 'QCryptoCipherMode',
> > - 'data': ['ecb', 'cbc', 'xts', 'ctr']}
> > + 'data': ['ecb', 'cbc', 'xts', 'ctr', 'gcm']}
> >
> > ##
> > # @QCryptoIVGenAlgo:
>
> Acked-by: Markus Armbruster <armbru@redhat.com>
>
>
> [...]
>
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 08/17] crypto/cipher: Add setaad/gettag for AEAD modes
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (6 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 07/17] crypto/cipher: Add GCM to QCryptoCipherMode Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 09/17] crypto/cipher-gcrypt: Implement AES-GCM Jamin Lin
` (8 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
AEAD modes such as GCM authenticate optional associated data (AAD) and
produce an authentication tag, which the block-cipher encrypt/decrypt
interface cannot express. Add qcrypto_cipher_setaad() and
qcrypto_cipher_gettag() plus the matching backend driver hooks. The
generic front-end reports an error when the selected mode's driver does
not implement them, so calling them on a non-AEAD mode fails cleanly.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
---
crypto/cipherpriv.h | 8 ++++++++
include/crypto/cipher.h | 36 ++++++++++++++++++++++++++++++++++++
crypto/cipher.c | 31 +++++++++++++++++++++++++++++++
3 files changed, 75 insertions(+)
diff --git a/crypto/cipherpriv.h b/crypto/cipherpriv.h
index 64737ce961..c4f995f369 100644
--- a/crypto/cipherpriv.h
+++ b/crypto/cipherpriv.h
@@ -34,6 +34,14 @@ struct QCryptoCipherDriver {
const uint8_t *iv, size_t niv,
Error **errp);
+ int (*cipher_setaad)(QCryptoCipher *cipher,
+ const uint8_t *aad, size_t len,
+ Error **errp);
+
+ int (*cipher_gettag)(QCryptoCipher *cipher,
+ uint8_t *tag, size_t len,
+ Error **errp);
+
void (*cipher_free)(QCryptoCipher *cipher);
};
diff --git a/include/crypto/cipher.h b/include/crypto/cipher.h
index 92939310ef..2e361411b9 100644
--- a/include/crypto/cipher.h
+++ b/include/crypto/cipher.h
@@ -235,4 +235,40 @@ int qcrypto_cipher_setiv(QCryptoCipher *cipher,
const uint8_t *iv, size_t niv,
Error **errp);
+/**
+ * qcrypto_cipher_setaad:
+ * @cipher: the cipher object
+ * @aad: the associated data to authenticate
+ * @len: the length of @aad
+ * @errp: pointer to a NULL-initialized error object
+ *
+ * For AEAD modes such as GCM, feed the associated data (AAD) that is
+ * authenticated but not encrypted. It must be called after
+ * qcrypto_cipher_setiv() and before the first encrypt/decrypt call. It is
+ * an error to call this on a mode that is not an AEAD mode.
+ *
+ * Returns: 0 on success, -1 on error
+ */
+int qcrypto_cipher_setaad(QCryptoCipher *cipher,
+ const uint8_t *aad, size_t len,
+ Error **errp);
+
+/**
+ * qcrypto_cipher_gettag:
+ * @cipher: the cipher object
+ * @tag: buffer to receive the authentication tag
+ * @len: the length of @tag
+ * @errp: pointer to a NULL-initialized error object
+ *
+ * For AEAD modes such as GCM, read back the authentication tag computed
+ * over the associated data and the message. It must be called after the
+ * encrypt/decrypt operation. It is an error to call this on a mode that is
+ * not an AEAD mode.
+ *
+ * Returns: 0 on success, -1 on error
+ */
+int qcrypto_cipher_gettag(QCryptoCipher *cipher,
+ uint8_t *tag, size_t len,
+ Error **errp);
+
#endif /* QCRYPTO_CIPHER_H */
diff --git a/crypto/cipher.c b/crypto/cipher.c
index 52d071a90c..67014aad6f 100644
--- a/crypto/cipher.c
+++ b/crypto/cipher.c
@@ -205,6 +205,37 @@ int qcrypto_cipher_setiv(QCryptoCipher *cipher,
}
+int qcrypto_cipher_setaad(QCryptoCipher *cipher,
+ const uint8_t *aad, size_t len,
+ Error **errp)
+{
+ const QCryptoCipherDriver *drv = cipher->driver;
+
+ if (!drv->cipher_setaad) {
+ error_setg(errp, "The cipher mode does not support associated data");
+ return -1;
+ }
+
+ return drv->cipher_setaad(cipher, aad, len, errp);
+}
+
+
+int qcrypto_cipher_gettag(QCryptoCipher *cipher,
+ uint8_t *tag, size_t len,
+ Error **errp)
+{
+ const QCryptoCipherDriver *drv = cipher->driver;
+
+ if (!drv->cipher_gettag) {
+ error_setg(errp,
+ "The cipher mode does not produce an authentication tag");
+ return -1;
+ }
+
+ return drv->cipher_gettag(cipher, tag, len, errp);
+}
+
+
void qcrypto_cipher_free(QCryptoCipher *cipher)
{
if (cipher) {
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 09/17] crypto/cipher-gcrypt: Implement AES-GCM
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (7 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 08/17] crypto/cipher: Add setaad/gettag for AEAD modes Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 10/17] crypto/cipher-nettle: " Jamin Lin
` (7 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Map QCRYPTO_CIPHER_MODE_GCM to GCRY_CIPHER_MODE_GCM and advertise it in
qcrypto_cipher_supports() for 128-bit block ciphers. Add a GCM driver
whose setiv accepts the (typically 96-bit) nonce, whose encrypt/decrypt
do not require block-aligned lengths, and which implements setaad via
gcry_cipher_authenticate() and gettag via gcry_cipher_gettag().
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Acked-by: Daniel P. Berrangé <berrange@redhat.com>
---
crypto/cipher-gcrypt.c.inc | 101 +++++++++++++++++++++++++++++++++++++
1 file changed, 101 insertions(+)
diff --git a/crypto/cipher-gcrypt.c.inc b/crypto/cipher-gcrypt.c.inc
index 12eb9ddb5a..fce09a3c77 100644
--- a/crypto/cipher-gcrypt.c.inc
+++ b/crypto/cipher-gcrypt.c.inc
@@ -65,6 +65,8 @@ static int qcrypto_cipher_mode_to_gcry_mode(QCryptoCipherMode mode)
return GCRY_CIPHER_MODE_CBC;
case QCRYPTO_CIPHER_MODE_CTR:
return GCRY_CIPHER_MODE_CTR;
+ case QCRYPTO_CIPHER_MODE_GCM:
+ return GCRY_CIPHER_MODE_GCM;
default:
return GCRY_CIPHER_MODE_NONE;
}
@@ -104,6 +106,10 @@ bool qcrypto_cipher_supports(QCryptoCipherAlgo alg,
case QCRYPTO_CIPHER_MODE_XTS:
case QCRYPTO_CIPHER_MODE_CTR:
return true;
+ case QCRYPTO_CIPHER_MODE_GCM:
+ /* GCM requires a 128-bit block cipher. */
+ return gcry_cipher_get_algo_blklen(
+ qcrypto_cipher_alg_to_gcry_alg(alg)) == 16;
default:
return false;
}
@@ -228,6 +234,99 @@ static const struct QCryptoCipherDriver qcrypto_gcrypt_ctr_driver = {
.cipher_free = qcrypto_gcrypt_ctx_free,
};
+/*
+ * GCM is an AEAD stream mode: the IV/nonce need not match the block size,
+ * the message length need not be a multiple of the block size, associated
+ * data is fed with gcry_cipher_authenticate() and the authentication tag is
+ * read back with gcry_cipher_gettag().
+ */
+static int qcrypto_gcrypt_gcm_setiv(QCryptoCipher *cipher,
+ const uint8_t *iv, size_t niv,
+ Error **errp)
+{
+ QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
+ gcry_error_t err;
+
+ gcry_cipher_reset(ctx->handle);
+ err = gcry_cipher_setiv(ctx->handle, iv, niv);
+ if (err != 0) {
+ error_setg(errp, "Cannot set IV: %s", gcry_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static int qcrypto_gcrypt_gcm_setaad(QCryptoCipher *cipher,
+ const uint8_t *aad, size_t len,
+ Error **errp)
+{
+ QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
+ gcry_error_t err;
+
+ err = gcry_cipher_authenticate(ctx->handle, aad, len);
+ if (err != 0) {
+ error_setg(errp, "Cannot set AAD: %s", gcry_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static int qcrypto_gcrypt_gcm_encrypt(QCryptoCipher *cipher, const void *in,
+ void *out, size_t len, Error **errp)
+{
+ QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
+ gcry_error_t err;
+
+ err = gcry_cipher_encrypt(ctx->handle, out, len, in, len);
+ if (err != 0) {
+ error_setg(errp, "Cannot encrypt data: %s", gcry_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static int qcrypto_gcrypt_gcm_decrypt(QCryptoCipher *cipher, const void *in,
+ void *out, size_t len, Error **errp)
+{
+ QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
+ gcry_error_t err;
+
+ err = gcry_cipher_decrypt(ctx->handle, out, len, in, len);
+ if (err != 0) {
+ error_setg(errp, "Cannot decrypt data: %s", gcry_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static int qcrypto_gcrypt_gcm_gettag(QCryptoCipher *cipher,
+ uint8_t *tag, size_t len, Error **errp)
+{
+ QCryptoCipherGcrypt *ctx = container_of(cipher, QCryptoCipherGcrypt, base);
+ gcry_error_t err;
+
+ err = gcry_cipher_gettag(ctx->handle, tag, len);
+ if (err != 0) {
+ error_setg(errp, "Cannot get tag: %s", gcry_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static const struct QCryptoCipherDriver qcrypto_gcrypt_gcm_driver = {
+ .cipher_encrypt = qcrypto_gcrypt_gcm_encrypt,
+ .cipher_decrypt = qcrypto_gcrypt_gcm_decrypt,
+ .cipher_setiv = qcrypto_gcrypt_gcm_setiv,
+ .cipher_setaad = qcrypto_gcrypt_gcm_setaad,
+ .cipher_gettag = qcrypto_gcrypt_gcm_gettag,
+ .cipher_free = qcrypto_gcrypt_ctx_free,
+};
+
static QCryptoCipher *qcrypto_cipher_ctx_new(QCryptoCipherAlgo alg,
QCryptoCipherMode mode,
const uint8_t *key,
@@ -259,6 +358,8 @@ static QCryptoCipher *qcrypto_cipher_ctx_new(QCryptoCipherAlgo alg,
if (mode == QCRYPTO_CIPHER_MODE_CTR) {
drv = &qcrypto_gcrypt_ctr_driver;
+ } else if (mode == QCRYPTO_CIPHER_MODE_GCM) {
+ drv = &qcrypto_gcrypt_gcm_driver;
} else {
drv = &qcrypto_gcrypt_driver;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 10/17] crypto/cipher-nettle: Implement AES-GCM
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (8 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 09/17] crypto/cipher-gcrypt: Implement AES-GCM Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-23 12:50 ` Daniel P. Berrangé
2026-07-15 3:33 ` [PATCH v2 11/17] crypto/cipher-gnutls: " Jamin Lin
` (6 subsequent siblings)
16 siblings, 1 reply; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Add the AES-GCM AEAD mode to the nettle backend so it is available when
QEMU is built with nettle instead of gcrypt. GCM is driven through
nettle's generic gcm_* interface, using the AES encrypt function for both
directions: gcm_set_iv() sets the (typically 96-bit) nonce, gcm_update()
feeds the associated data, gcm_encrypt()/gcm_decrypt() need not be block
aligned, and gcm_digest() produces the authentication tag.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
crypto/cipher-nettle.c.inc | 128 +++++++++++++++++++++++++++++++++++++
1 file changed, 128 insertions(+)
diff --git a/crypto/cipher-nettle.c.inc b/crypto/cipher-nettle.c.inc
index 1afdc391b4..d4847f0efe 100644
--- a/crypto/cipher-nettle.c.inc
+++ b/crypto/cipher-nettle.c.inc
@@ -27,6 +27,7 @@
#include <nettle/twofish.h>
#include <nettle/ctr.h>
#include <nettle/xts.h>
+#include <nettle/gcm.h>
#ifdef CONFIG_CRYPTO_SM4
#include <nettle/sm4.h>
#endif
@@ -410,6 +411,125 @@ DEFINE_ECB(qcrypto_nettle_sm4,
sm4_encrypt_native, sm4_decrypt_native)
#endif
+/*
+ * GCM is an AEAD mode built on AES (128-bit block only). Drive it through the
+ * generic gcm_* interface, using the block cipher's encrypt function for both
+ * directions; associated data is fed with gcm_update() and the authentication
+ * tag is produced by gcm_digest().
+ */
+typedef struct QCryptoNettleAESGCM {
+ QCryptoCipher base;
+ struct gcm_key gcm_key;
+ struct gcm_ctx gcm_ctx;
+ union {
+ struct aes128_ctx aes128;
+ struct aes192_ctx aes192;
+ struct aes256_ctx aes256;
+ } cipher;
+ nettle_cipher_func *encrypt;
+} QCryptoNettleAESGCM;
+
+static int qcrypto_nettle_aes_gcm_setiv(QCryptoCipher *cipher,
+ const uint8_t *iv, size_t niv,
+ Error **errp)
+{
+ QCryptoNettleAESGCM *ctx = container_of(cipher, QCryptoNettleAESGCM, base);
+
+ gcm_set_iv(&ctx->gcm_ctx, &ctx->gcm_key, niv, iv);
+ return 0;
+}
+
+static int qcrypto_nettle_aes_gcm_setaad(QCryptoCipher *cipher,
+ const uint8_t *aad, size_t len,
+ Error **errp)
+{
+ QCryptoNettleAESGCM *ctx = container_of(cipher, QCryptoNettleAESGCM, base);
+
+ gcm_update(&ctx->gcm_ctx, &ctx->gcm_key, len, aad);
+ return 0;
+}
+
+static int qcrypto_nettle_aes_gcm_encrypt(QCryptoCipher *cipher,
+ const void *in, void *out,
+ size_t len, Error **errp)
+{
+ QCryptoNettleAESGCM *ctx = container_of(cipher, QCryptoNettleAESGCM, base);
+
+ gcm_encrypt(&ctx->gcm_ctx, &ctx->gcm_key, &ctx->cipher, ctx->encrypt,
+ len, out, in);
+ return 0;
+}
+
+static int qcrypto_nettle_aes_gcm_decrypt(QCryptoCipher *cipher,
+ const void *in, void *out,
+ size_t len, Error **errp)
+{
+ QCryptoNettleAESGCM *ctx = container_of(cipher, QCryptoNettleAESGCM, base);
+
+ gcm_decrypt(&ctx->gcm_ctx, &ctx->gcm_key, &ctx->cipher, ctx->encrypt,
+ len, out, in);
+ return 0;
+}
+
+static int qcrypto_nettle_aes_gcm_gettag(QCryptoCipher *cipher,
+ uint8_t *tag, size_t len,
+ Error **errp)
+{
+ QCryptoNettleAESGCM *ctx = container_of(cipher, QCryptoNettleAESGCM, base);
+
+ gcm_digest(&ctx->gcm_ctx, &ctx->gcm_key, &ctx->cipher, ctx->encrypt,
+ len, tag);
+ return 0;
+}
+
+static const struct QCryptoCipherDriver qcrypto_nettle_aes_gcm_driver = {
+ .cipher_encrypt = qcrypto_nettle_aes_gcm_encrypt,
+ .cipher_decrypt = qcrypto_nettle_aes_gcm_decrypt,
+ .cipher_setiv = qcrypto_nettle_aes_gcm_setiv,
+ .cipher_setaad = qcrypto_nettle_aes_gcm_setaad,
+ .cipher_gettag = qcrypto_nettle_aes_gcm_gettag,
+ .cipher_free = qcrypto_cipher_ctx_free,
+};
+
+static QCryptoCipher *qcrypto_nettle_aes_gcm_ctx_new(QCryptoCipherAlgo alg,
+ const uint8_t *key,
+ size_t nkey,
+ Error **errp)
+{
+ QCryptoNettleAESGCM *ctx;
+
+ if (!qcrypto_cipher_validate_key_length(alg, QCRYPTO_CIPHER_MODE_GCM,
+ nkey, errp)) {
+ return NULL;
+ }
+
+ ctx = g_new0(QCryptoNettleAESGCM, 1);
+ ctx->base.driver = &qcrypto_nettle_aes_gcm_driver;
+
+ switch (alg) {
+ case QCRYPTO_CIPHER_ALGO_AES_128:
+ aes128_set_encrypt_key(&ctx->cipher.aes128, key);
+ ctx->encrypt = aes128_encrypt_native;
+ break;
+ case QCRYPTO_CIPHER_ALGO_AES_192:
+ aes192_set_encrypt_key(&ctx->cipher.aes192, key);
+ ctx->encrypt = aes192_encrypt_native;
+ break;
+ case QCRYPTO_CIPHER_ALGO_AES_256:
+ aes256_set_encrypt_key(&ctx->cipher.aes256, key);
+ ctx->encrypt = aes256_encrypt_native;
+ break;
+ default:
+ error_setg(errp, "Unsupported cipher algorithm %s with GCM mode",
+ QCryptoCipherAlgo_str(alg));
+ g_free(ctx);
+ return NULL;
+ }
+
+ gcm_set_key(&ctx->gcm_key, &ctx->cipher, ctx->encrypt);
+ return &ctx->base;
+}
+
bool qcrypto_cipher_supports(QCryptoCipherAlgo alg,
QCryptoCipherMode mode)
{
@@ -440,6 +560,10 @@ bool qcrypto_cipher_supports(QCryptoCipherAlgo alg,
case QCRYPTO_CIPHER_MODE_XTS:
case QCRYPTO_CIPHER_MODE_CTR:
return true;
+ case QCRYPTO_CIPHER_MODE_GCM:
+ return alg == QCRYPTO_CIPHER_ALGO_AES_128 ||
+ alg == QCRYPTO_CIPHER_ALGO_AES_192 ||
+ alg == QCRYPTO_CIPHER_ALGO_AES_256;
default:
return false;
}
@@ -451,6 +575,10 @@ static QCryptoCipher *qcrypto_cipher_ctx_new(QCryptoCipherAlgo alg,
size_t nkey,
Error **errp)
{
+ if (mode == QCRYPTO_CIPHER_MODE_GCM) {
+ return qcrypto_nettle_aes_gcm_ctx_new(alg, key, nkey, errp);
+ }
+
switch (mode) {
case QCRYPTO_CIPHER_MODE_ECB:
case QCRYPTO_CIPHER_MODE_CBC:
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 10/17] crypto/cipher-nettle: Implement AES-GCM
2026-07-15 3:33 ` [PATCH v2 10/17] crypto/cipher-nettle: " Jamin Lin
@ 2026-07-23 12:50 ` Daniel P. Berrangé
0 siblings, 0 replies; 27+ messages in thread
From: Daniel P. Berrangé @ 2026-07-23 12:50 UTC (permalink / raw)
To: Jamin Lin
Cc: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Kane Chen, Andrew Jeffery, Joel Stanley, Eric Blake,
Markus Armbruster, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:All patches CC here, open list:ASPEED BMCs, Troy Lee
On Wed, Jul 15, 2026 at 03:33:29AM +0000, Jamin Lin wrote:
> Add the AES-GCM AEAD mode to the nettle backend so it is available when
> QEMU is built with nettle instead of gcrypt. GCM is driven through
> nettle's generic gcm_* interface, using the AES encrypt function for both
> directions: gcm_set_iv() sets the (typically 96-bit) nonce, gcm_update()
> feeds the associated data, gcm_encrypt()/gcm_decrypt() need not be block
> aligned, and gcm_digest() produces the authentication tag.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> crypto/cipher-nettle.c.inc | 128 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 128 insertions(+)
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 11/17] crypto/cipher-gnutls: Implement AES-GCM
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (9 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 10/17] crypto/cipher-nettle: " Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-23 12:51 ` Daniel P. Berrangé
2026-07-15 3:33 ` [PATCH v2 12/17] tests/unit/test-crypto-cipher: Test AES-GCM mode Jamin Lin
` (5 subsequent siblings)
16 siblings, 1 reply; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Add the AES-GCM AEAD mode to the gnutls backend so it is available when
QEMU is built with gnutls (neither gcrypt nor nettle). GCM uses the
incremental gnutls_cipher_* API with the GNUTLS_CIPHER_AES_*_GCM
algorithms: gnutls_cipher_set_iv() sets the nonce, gnutls_cipher_add_auth()
feeds the associated data, gnutls_cipher_encrypt2()/decrypt2() process the
message, and gnutls_cipher_tag() reads back the authentication tag.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
crypto/cipher-gnutls.c.inc | 154 +++++++++++++++++++++++++++++++++++++
1 file changed, 154 insertions(+)
diff --git a/crypto/cipher-gnutls.c.inc b/crypto/cipher-gnutls.c.inc
index a8263fff6d..963b328fa1 100644
--- a/crypto/cipher-gnutls.c.inc
+++ b/crypto/cipher-gnutls.c.inc
@@ -48,6 +48,15 @@ bool qcrypto_cipher_supports(QCryptoCipherAlgo alg,
default:
return false;
}
+ case QCRYPTO_CIPHER_MODE_GCM:
+ switch (alg) {
+ case QCRYPTO_CIPHER_ALGO_AES_128:
+ case QCRYPTO_CIPHER_ALGO_AES_192:
+ case QCRYPTO_CIPHER_ALGO_AES_256:
+ return true;
+ default:
+ return false;
+ }
default:
return false;
}
@@ -223,6 +232,147 @@ static struct QCryptoCipherDriver gnutls_driver = {
.cipher_free = qcrypto_gnutls_cipher_free,
};
+/*
+ * GCM is an AEAD stream mode: the nonce need not match the block size, the
+ * message length need not be a multiple of the block size, associated data is
+ * fed with gnutls_cipher_add_auth() and the authentication tag is read back
+ * with gnutls_cipher_tag().
+ */
+static int
+qcrypto_gnutls_cipher_encrypt_gcm(QCryptoCipher *cipher,
+ const void *in, void *out,
+ size_t len, Error **errp)
+{
+ QCryptoCipherGnutls *ctx = container_of(cipher, QCryptoCipherGnutls, base);
+ int err;
+
+ err = gnutls_cipher_encrypt2(ctx->handle, in, len, out, len);
+ if (err != 0) {
+ error_setg(errp, "Cannot encrypt data: %s", gnutls_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static int
+qcrypto_gnutls_cipher_decrypt_gcm(QCryptoCipher *cipher,
+ const void *in, void *out,
+ size_t len, Error **errp)
+{
+ QCryptoCipherGnutls *ctx = container_of(cipher, QCryptoCipherGnutls, base);
+ int err;
+
+ err = gnutls_cipher_decrypt2(ctx->handle, in, len, out, len);
+ if (err != 0) {
+ error_setg(errp, "Cannot decrypt data: %s", gnutls_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static int
+qcrypto_gnutls_cipher_setiv_gcm(QCryptoCipher *cipher,
+ const uint8_t *iv, size_t niv,
+ Error **errp)
+{
+ QCryptoCipherGnutls *ctx = container_of(cipher, QCryptoCipherGnutls, base);
+
+ gnutls_cipher_set_iv(ctx->handle, (void *)iv, niv);
+
+ return 0;
+}
+
+static int
+qcrypto_gnutls_cipher_setaad_gcm(QCryptoCipher *cipher,
+ const uint8_t *aad, size_t len,
+ Error **errp)
+{
+ QCryptoCipherGnutls *ctx = container_of(cipher, QCryptoCipherGnutls, base);
+ int err;
+
+ err = gnutls_cipher_add_auth(ctx->handle, aad, len);
+ if (err != 0) {
+ error_setg(errp, "Cannot add associated data: %s",
+ gnutls_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static int
+qcrypto_gnutls_cipher_gettag_gcm(QCryptoCipher *cipher,
+ uint8_t *tag, size_t len,
+ Error **errp)
+{
+ QCryptoCipherGnutls *ctx = container_of(cipher, QCryptoCipherGnutls, base);
+ int err;
+
+ err = gnutls_cipher_tag(ctx->handle, tag, len);
+ if (err != 0) {
+ error_setg(errp, "Cannot get authentication tag: %s",
+ gnutls_strerror(err));
+ return -1;
+ }
+
+ return 0;
+}
+
+static struct QCryptoCipherDriver gnutls_gcm_driver = {
+ .cipher_encrypt = qcrypto_gnutls_cipher_encrypt_gcm,
+ .cipher_decrypt = qcrypto_gnutls_cipher_decrypt_gcm,
+ .cipher_setiv = qcrypto_gnutls_cipher_setiv_gcm,
+ .cipher_setaad = qcrypto_gnutls_cipher_setaad_gcm,
+ .cipher_gettag = qcrypto_gnutls_cipher_gettag_gcm,
+ .cipher_free = qcrypto_gnutls_cipher_free,
+};
+
+static QCryptoCipher *
+qcrypto_gnutls_aes_gcm_ctx_new(QCryptoCipherAlgo alg, const uint8_t *key,
+ size_t nkey, Error **errp)
+{
+ gnutls_datum_t gkey = { (unsigned char *)key, nkey };
+ gnutls_cipher_algorithm_t galg = GNUTLS_CIPHER_UNKNOWN;
+ QCryptoCipherGnutls *ctx;
+ int err;
+
+ switch (alg) {
+ case QCRYPTO_CIPHER_ALGO_AES_128:
+ galg = GNUTLS_CIPHER_AES_128_GCM;
+ break;
+ case QCRYPTO_CIPHER_ALGO_AES_192:
+ galg = GNUTLS_CIPHER_AES_192_GCM;
+ break;
+ case QCRYPTO_CIPHER_ALGO_AES_256:
+ galg = GNUTLS_CIPHER_AES_256_GCM;
+ break;
+ default:
+ error_setg(errp, "Unsupported cipher algorithm %s with GCM mode",
+ QCryptoCipherAlgo_str(alg));
+ return NULL;
+ }
+
+ if (!qcrypto_cipher_validate_key_length(alg, QCRYPTO_CIPHER_MODE_GCM,
+ nkey, errp)) {
+ return NULL;
+ }
+
+ ctx = g_new0(QCryptoCipherGnutls, 1);
+ ctx->base.driver = &gnutls_gcm_driver;
+ ctx->blocksize = 16;
+
+ err = gnutls_cipher_init(&ctx->handle, galg, &gkey, NULL);
+ if (err != 0) {
+ error_setg(errp, "Cannot initialize cipher: %s", gnutls_strerror(err));
+ g_free(ctx);
+ return NULL;
+ }
+
+ return &ctx->base;
+}
+
static QCryptoCipher *qcrypto_cipher_ctx_new(QCryptoCipherAlgo alg,
QCryptoCipherMode mode,
const uint8_t *key,
@@ -234,6 +384,10 @@ static QCryptoCipher *qcrypto_cipher_ctx_new(QCryptoCipherAlgo alg,
gnutls_cipher_algorithm_t galg = GNUTLS_CIPHER_UNKNOWN;
int err;
+ if (mode == QCRYPTO_CIPHER_MODE_GCM) {
+ return qcrypto_gnutls_aes_gcm_ctx_new(alg, key, nkey, errp);
+ }
+
switch (mode) {
case QCRYPTO_CIPHER_MODE_XTS:
switch (alg) {
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 11/17] crypto/cipher-gnutls: Implement AES-GCM
2026-07-15 3:33 ` [PATCH v2 11/17] crypto/cipher-gnutls: " Jamin Lin
@ 2026-07-23 12:51 ` Daniel P. Berrangé
0 siblings, 0 replies; 27+ messages in thread
From: Daniel P. Berrangé @ 2026-07-23 12:51 UTC (permalink / raw)
To: Jamin Lin
Cc: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Kane Chen, Andrew Jeffery, Joel Stanley, Eric Blake,
Markus Armbruster, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:All patches CC here, open list:ASPEED BMCs, Troy Lee
On Wed, Jul 15, 2026 at 03:33:31AM +0000, Jamin Lin wrote:
> Add the AES-GCM AEAD mode to the gnutls backend so it is available when
> QEMU is built with gnutls (neither gcrypt nor nettle). GCM uses the
> incremental gnutls_cipher_* API with the GNUTLS_CIPHER_AES_*_GCM
> algorithms: gnutls_cipher_set_iv() sets the nonce, gnutls_cipher_add_auth()
> feeds the associated data, gnutls_cipher_encrypt2()/decrypt2() process the
> message, and gnutls_cipher_tag() reads back the authentication tag.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> crypto/cipher-gnutls.c.inc | 154 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 154 insertions(+)
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 12/17] tests/unit/test-crypto-cipher: Test AES-GCM mode
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (10 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 11/17] crypto/cipher-gnutls: " Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-23 12:54 ` Daniel P. Berrangé
2026-07-15 3:33 ` [PATCH v2 13/17] hw/misc/aspeed_hace: Support 64-bit DMA for the crypto command Jamin Lin
` (4 subsequent siblings)
16 siblings, 1 reply; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Exercise the new GCM mode and the setaad/gettag helpers with the
canonical AES-GCM test vectors from the GCM specification (McGrew &
Viega, also NIST SP 800-38D): AES-128 and AES-256, with and without
associated data. Each vector is run through encrypt (checking the
ciphertext and the generated tag) and decrypt (checking the recovered
plaintext and the recomputed tag).
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/unit/test-crypto-cipher.c | 240 ++++++++++++++++++++++++++++++++
1 file changed, 240 insertions(+)
diff --git a/tests/unit/test-crypto-cipher.c b/tests/unit/test-crypto-cipher.c
index 1331d558cf..420c826df9 100644
--- a/tests/unit/test-crypto-cipher.c
+++ b/tests/unit/test-crypto-cipher.c
@@ -810,6 +810,230 @@ static void test_cipher_short_plaintext(void)
qcrypto_cipher_free(cipher);
}
+typedef struct QCryptoCipherGcmTestData QCryptoCipherGcmTestData;
+struct QCryptoCipherGcmTestData {
+ const char *path;
+ QCryptoCipherAlgo alg;
+ const char *key;
+ const char *iv;
+ /* associated data, or NULL for none */
+ const char *aad;
+ const char *plaintext;
+ const char *ciphertext;
+ const char *tag;
+};
+
+/*
+ * AES-GCM test vectors from "The Galois/Counter Mode of Operation (GCM)"
+ * (McGrew & Viega, also NIST SP 800-38D), with a 96-bit IV and a 128-bit
+ * tag. Each entry's "Test case N" label is the numbered test case from that
+ * document (Appendix B / the GCM specification's test vectors).
+ */
+static QCryptoCipherGcmTestData gcm_test_data[] = {
+ {
+ /* Test case 2 */
+ .path = "/crypto/cipher/aes-gcm-128-2",
+ .alg = QCRYPTO_CIPHER_ALGO_AES_128,
+ .key = "00000000000000000000000000000000",
+ .iv = "000000000000000000000000",
+ .plaintext = "00000000000000000000000000000000",
+ .ciphertext = "0388dace60b6a392f328c2b971b2fe78",
+ .tag = "ab6e47d42cec13bdf53a67b21257bddf",
+ },
+ {
+ /* Test case 3 (no AAD) */
+ .path = "/crypto/cipher/aes-gcm-128-3",
+ .alg = QCRYPTO_CIPHER_ALGO_AES_128,
+ .key = "feffe9928665731c6d6a8f9467308308",
+ .iv = "cafebabefacedbaddecaf888",
+ .plaintext =
+ "d9313225f88406e5a55909c5aff5269a"
+ "86a7a9531534f7da2e4c303d8a318a72"
+ "1c3c0c95956809532fcf0e2449a6b525"
+ "b16aedf5aa0de657ba637b391aafd255",
+ .ciphertext =
+ "42831ec2217774244b7221b784d0d49c"
+ "e3aa212f2c02a4e035c17e2329aca12e"
+ "21d514b25466931c7d8f6a5aac84aa05"
+ "1ba30b396a0aac973d58e091473f5985",
+ .tag = "4d5c2af327cd64a62cf35abd2ba6fab4",
+ },
+ {
+ /* Test case 4 (with AAD) */
+ .path = "/crypto/cipher/aes-gcm-128-4",
+ .alg = QCRYPTO_CIPHER_ALGO_AES_128,
+ .key = "feffe9928665731c6d6a8f9467308308",
+ .iv = "cafebabefacedbaddecaf888",
+ .aad = "feedfacedeadbeeffeedfacedeadbeefabaddad2",
+ .plaintext =
+ "d9313225f88406e5a55909c5aff5269a"
+ "86a7a9531534f7da2e4c303d8a318a72"
+ "1c3c0c95956809532fcf0e2449a6b525"
+ "b16aedf5aa0de657ba637b39",
+ .ciphertext =
+ "42831ec2217774244b7221b784d0d49c"
+ "e3aa212f2c02a4e035c17e2329aca12e"
+ "21d514b25466931c7d8f6a5aac84aa05"
+ "1ba30b396a0aac973d58e091",
+ .tag = "5bc94fbc3221a5db94fae95ae7121a47",
+ },
+ {
+ /* Test case 15 (AES-256, no AAD) */
+ .path = "/crypto/cipher/aes-gcm-256-15",
+ .alg = QCRYPTO_CIPHER_ALGO_AES_256,
+ .key =
+ "feffe9928665731c6d6a8f9467308308"
+ "feffe9928665731c6d6a8f9467308308",
+ .iv = "cafebabefacedbaddecaf888",
+ .plaintext =
+ "d9313225f88406e5a55909c5aff5269a"
+ "86a7a9531534f7da2e4c303d8a318a72"
+ "1c3c0c95956809532fcf0e2449a6b525"
+ "b16aedf5aa0de657ba637b391aafd255",
+ .ciphertext =
+ "522dc1f099567d07f47f37a32a84427d"
+ "643a8cdcbfe5c0c97598a2bd2555d1aa"
+ "8cb08e48590dbb3da7b08b1056828838"
+ "c5f61e6393ba7a0abcc9f662898015ad",
+ .tag = "b094dac5d93471bdec1a502270e3cc6c",
+ },
+ {
+ /* Test case 16 (AES-256, with AAD) */
+ .path = "/crypto/cipher/aes-gcm-256-16",
+ .alg = QCRYPTO_CIPHER_ALGO_AES_256,
+ .key =
+ "feffe9928665731c6d6a8f9467308308"
+ "feffe9928665731c6d6a8f9467308308",
+ .iv = "cafebabefacedbaddecaf888",
+ .aad = "feedfacedeadbeeffeedfacedeadbeefabaddad2",
+ .plaintext =
+ "d9313225f88406e5a55909c5aff5269a"
+ "86a7a9531534f7da2e4c303d8a318a72"
+ "1c3c0c95956809532fcf0e2449a6b525"
+ "b16aedf5aa0de657ba637b39",
+ .ciphertext =
+ "522dc1f099567d07f47f37a32a84427d"
+ "643a8cdcbfe5c0c97598a2bd2555d1aa"
+ "8cb08e48590dbb3da7b08b1056828838"
+ "c5f61e6393ba7a0abcc9f662",
+ .tag = "76fc6ece0f4e1768cddf8853bb2d551b",
+ },
+};
+
+static void test_cipher_gcm(const void *opaque)
+{
+ const QCryptoCipherGcmTestData *data = opaque;
+ g_autofree uint8_t *key = NULL;
+ g_autofree uint8_t *iv = NULL;
+ g_autofree uint8_t *aad = NULL;
+ g_autofree uint8_t *ptext = NULL;
+ g_autofree uint8_t *ctext = NULL;
+ g_autofree uint8_t *tagexp = NULL;
+ g_autofree uint8_t *out = NULL;
+ uint8_t tag[16];
+ size_t nkey;
+ size_t niv;
+ size_t naad = 0;
+ size_t nptext;
+ size_t nctext;
+ size_t ntag;
+ QCryptoCipher *cipher;
+
+ nkey = unhex_string(data->key, &key);
+ niv = unhex_string(data->iv, &iv);
+ nptext = unhex_string(data->plaintext, &ptext);
+ nctext = unhex_string(data->ciphertext, &ctext);
+ ntag = unhex_string(data->tag, &tagexp);
+ if (data->aad) {
+ naad = unhex_string(data->aad, &aad);
+ }
+
+ g_assert_cmpint(nptext, ==, nctext);
+ g_assert_cmpint(ntag, ==, sizeof(tag));
+ out = g_new0(uint8_t, nptext);
+
+ /* Encrypt: plaintext -> ciphertext, then read back the tag. */
+ cipher = qcrypto_cipher_new(data->alg, QCRYPTO_CIPHER_MODE_GCM,
+ key, nkey, &error_abort);
+ g_assert(cipher != NULL);
+ g_assert(qcrypto_cipher_setiv(cipher, iv, niv, &error_abort) == 0);
+ if (naad) {
+ g_assert(qcrypto_cipher_setaad(cipher, aad, naad, &error_abort) == 0);
+ }
+ g_assert(qcrypto_cipher_encrypt(cipher, ptext, out, nptext,
+ &error_abort) == 0);
+ g_assert_cmpmem(out, nptext, ctext, nctext);
+ g_assert(qcrypto_cipher_gettag(cipher, tag, sizeof(tag),
+ &error_abort) == 0);
+ g_assert_cmpmem(tag, sizeof(tag), tagexp, ntag);
+ qcrypto_cipher_free(cipher);
+
+ /* Decrypt: ciphertext -> plaintext, recomputed tag must match. */
+ memset(out, 0, nptext);
+ cipher = qcrypto_cipher_new(data->alg, QCRYPTO_CIPHER_MODE_GCM,
+ key, nkey, &error_abort);
+ g_assert(cipher != NULL);
+ g_assert(qcrypto_cipher_setiv(cipher, iv, niv, &error_abort) == 0);
+ if (naad) {
+ g_assert(qcrypto_cipher_setaad(cipher, aad, naad, &error_abort) == 0);
+ }
+ g_assert(qcrypto_cipher_decrypt(cipher, ctext, out, nctext,
+ &error_abort) == 0);
+ g_assert_cmpmem(out, nctext, ptext, nptext);
+ g_assert(qcrypto_cipher_gettag(cipher, tag, sizeof(tag),
+ &error_abort) == 0);
+ g_assert_cmpmem(tag, sizeof(tag), tagexp, ntag);
+ qcrypto_cipher_free(cipher);
+}
+
+/*
+ * Corrupt one ciphertext byte and confirm the recomputed GCM tag no longer
+ * matches: the authentication tag must detect tampering.
+ */
+static void test_cipher_gcm_tamper(const void *opaque)
+{
+ const QCryptoCipherGcmTestData *data = opaque;
+ g_autofree uint8_t *key = NULL;
+ g_autofree uint8_t *iv = NULL;
+ g_autofree uint8_t *aad = NULL;
+ g_autofree uint8_t *ctext = NULL;
+ g_autofree uint8_t *tagexp = NULL;
+ g_autofree uint8_t *out = NULL;
+ uint8_t tag[16];
+ size_t nkey;
+ size_t niv;
+ size_t naad = 0;
+ size_t nctext;
+ size_t ntag;
+ QCryptoCipher *cipher;
+
+ nkey = unhex_string(data->key, &key);
+ niv = unhex_string(data->iv, &iv);
+ nctext = unhex_string(data->ciphertext, &ctext);
+ ntag = unhex_string(data->tag, &tagexp);
+ if (data->aad) {
+ naad = unhex_string(data->aad, &aad);
+ }
+ out = g_new0(uint8_t, nctext);
+
+ /* Flip one ciphertext bit before decrypting. */
+ ctext[0] ^= 0x01;
+
+ cipher = qcrypto_cipher_new(data->alg, QCRYPTO_CIPHER_MODE_GCM,
+ key, nkey, &error_abort);
+ g_assert(cipher != NULL);
+ g_assert(qcrypto_cipher_setiv(cipher, iv, niv, &error_abort) == 0);
+ if (naad) {
+ g_assert(qcrypto_cipher_setaad(cipher, aad, naad, &error_abort) == 0);
+ }
+ g_assert(qcrypto_cipher_decrypt(cipher, ctext, out, nctext,
+ &error_abort) == 0);
+ g_assert(qcrypto_cipher_gettag(cipher, tag, sizeof(tag),
+ &error_abort) == 0);
+ g_assert(memcmp(tag, tagexp, ntag) != 0);
+ qcrypto_cipher_free(cipher);
+}
+
int main(int argc, char **argv)
{
size_t i;
@@ -828,6 +1052,22 @@ int main(int argc, char **argv)
}
}
+ for (i = 0; i < G_N_ELEMENTS(gcm_test_data); i++) {
+ if (qcrypto_cipher_supports(gcm_test_data[i].alg,
+ QCRYPTO_CIPHER_MODE_GCM)) {
+ g_autofree char *tamper = g_strdup_printf("%s/tamper",
+ gcm_test_data[i].path);
+
+ g_test_add_data_func(gcm_test_data[i].path, &gcm_test_data[i],
+ test_cipher_gcm);
+ g_test_add_data_func(tamper, &gcm_test_data[i],
+ test_cipher_gcm_tamper);
+ } else {
+ g_printerr("# skip unsupported %s:gcm\n",
+ QCryptoCipherAlgo_str(gcm_test_data[i].alg));
+ }
+ }
+
if (qcrypto_cipher_supports(QCRYPTO_CIPHER_ALGO_AES_256,
QCRYPTO_CIPHER_MODE_CBC)) {
g_test_add_func("/crypto/cipher/null-iv",
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 12/17] tests/unit/test-crypto-cipher: Test AES-GCM mode
2026-07-15 3:33 ` [PATCH v2 12/17] tests/unit/test-crypto-cipher: Test AES-GCM mode Jamin Lin
@ 2026-07-23 12:54 ` Daniel P. Berrangé
0 siblings, 0 replies; 27+ messages in thread
From: Daniel P. Berrangé @ 2026-07-23 12:54 UTC (permalink / raw)
To: Jamin Lin
Cc: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Kane Chen, Andrew Jeffery, Joel Stanley, Eric Blake,
Markus Armbruster, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:All patches CC here, open list:ASPEED BMCs, Troy Lee
On Wed, Jul 15, 2026 at 03:33:32AM +0000, Jamin Lin wrote:
> Exercise the new GCM mode and the setaad/gettag helpers with the
> canonical AES-GCM test vectors from the GCM specification (McGrew &
> Viega, also NIST SP 800-38D): AES-128 and AES-256, with and without
> associated data. Each vector is run through encrypt (checking the
> ciphertext and the generated tag) and decrypt (checking the recovered
> plaintext and the recomputed tag).
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> tests/unit/test-crypto-cipher.c | 240 ++++++++++++++++++++++++++++++++
> 1 file changed, 240 insertions(+)
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 13/17] hw/misc/aspeed_hace: Support 64-bit DMA for the crypto command
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (11 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 12/17] tests/unit/test-crypto-cipher: Test AES-GCM mode Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 14/17] hw/misc/aspeed_hace: Support the AES-GCM mode " Jamin Lin
` (3 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
The AST2700 crypto engine addresses DRAM with 64 bits, supplying the high
half of the source, destination and context addresses through HACE80,
HACE84 and HACE88. Add those registers and a crypt_get_addr() helper that
combines the low and high halves when the SoC has 64-bit DMA, mirroring
the hash engine. SoCs without 64-bit DMA (AST2500/AST2600/AST1030) ignore
the high registers, so their behaviour is unchanged.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/misc/aspeed_hace.c | 33 ++++++++++++++++++++++++++++++---
1 file changed, 30 insertions(+), 3 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 09d0515271..a807cc1422 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -58,6 +58,11 @@
#define CRYPT_CTX_KEY_OFFSET 0x10
#define CRYPT_CTX_SIZE 0x30
+/* AST2700 64-bit DMA high address registers for the crypto command */
+#define R_CRYPT_SRC_HI (0x80 / 4)
+#define R_CRYPT_DEST_HI (0x84 / 4)
+#define R_CRYPT_CONTEXT_HI (0x88 / 4)
+
#define R_STATUS (0x1c / 4)
#define HASH_IRQ BIT(9)
#define CRYPT_IRQ BIT(12)
@@ -672,6 +677,19 @@ static void crypt_be_add(uint8_t *ctr, size_t len, uint64_t add)
}
}
+static uint64_t crypt_get_addr(AspeedHACEState *s, int reg, int reg_hi)
+{
+ AspeedHACEClass *ahc = ASPEED_HACE_GET_CLASS(s);
+ uint64_t addr;
+
+ addr = deposit64(0, 0, 32, s->regs[reg]);
+ if (ahc->has_dma64) {
+ addr = deposit64(addr, 32, 32, s->regs[reg_hi]);
+ }
+
+ return addr;
+}
+
/*
* Perform an AES/DES/3DES ECB/CBC operation. The source and destination are
* either single contiguous buffers (direct access mode) or scatter-gather
@@ -719,7 +737,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
}
/* Fetch the IV and key from the context buffer in DRAM. */
- ctx_addr = s->regs[R_CRYPT_CONTEXT];
+ ctx_addr = crypt_get_addr(s, R_CRYPT_CONTEXT, R_CRYPT_CONTEXT_HI);
if (address_space_read(&s->dram_as, ctx_addr, MEMTXATTRS_UNSPECIFIED,
ctx, sizeof(ctx))) {
qemu_log_mask(LOG_GUEST_ERROR,
@@ -760,7 +778,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
dst_buf = g_malloc0(buf_len);
/* Gather the source into the bounce buffer, per the selected mode. */
- src_addr = s->regs[R_CRYPT_SRC];
+ src_addr = crypt_get_addr(s, R_CRYPT_SRC, R_CRYPT_SRC_HI);
if (sg_mode) {
status = crypt_prepare_sg(s, src_addr, src_buf, len, false);
} else {
@@ -796,7 +814,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
}
/* Scatter the result back out, per the selected mode. */
- dst_addr = s->regs[R_CRYPT_DEST];
+ dst_addr = crypt_get_addr(s, R_CRYPT_DEST, R_CRYPT_DEST_HI);
if (sg_mode) {
status = crypt_prepare_sg(s, dst_addr, dst_buf, len, true);
} else {
@@ -960,6 +978,15 @@ static void aspeed_hace_write(void *opaque, hwaddr addr, uint64_t data,
case R_HASH_KEY_BUFF_HI:
data &= ahc->key_hi_mask;
break;
+ case R_CRYPT_SRC_HI:
+ data &= ahc->src_hi_mask;
+ break;
+ case R_CRYPT_DEST_HI:
+ data &= ahc->dest_hi_mask;
+ break;
+ case R_CRYPT_CONTEXT_HI:
+ data &= ahc->key_hi_mask;
+ break;
default:
break;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 14/17] hw/misc/aspeed_hace: Support the AES-GCM mode for the crypto command
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (12 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 13/17] hw/misc/aspeed_hace: Support 64-bit DMA for the crypto command Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 15/17] hw/misc/aspeed_hace: Enable the crypto command on the AST2700 Jamin Lin
` (2 subsequent siblings)
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Implement the AES-GCM mode (HACE10[6:4] = 0b101) used by the AST2700
crypto engine: decode the GCM selection, read the 96-bit IV from the
context buffer, operate on the exact data length (GCM handles a partial
final block itself), and write the 128-bit authentication tag to the tag
buffer (HACE18/HACE8C). The hardware GCM path is only used without
associated data (the driver falls back to software otherwise), so AAD is
not modelled and a non-zero HACE14 is reported as unimplemented.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/misc/aspeed_hace.c | 70 ++++++++++++++++++++++++++++++++++++++-----
1 file changed, 62 insertions(+), 8 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index a807cc1422..927759b48f 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -31,6 +31,9 @@
/* HACE0C[27:0] holds the crypto data length */
#define CRYPT_DATA_LEN_MASK 0x0FFFFFFF
#define R_CRYPT_CMD (0x10 / 4)
+/* AES-GCM associated data length (HACE14) and tag write buffer (HACE18) */
+#define R_CRYPT_GCM_ADD_LEN (0x14 / 4)
+#define R_CRYPT_GCM_TAG (0x18 / 4)
/* Crypto engine command register (HACE10) bits */
#define CRYPT_CMD_ENCRYPT BIT(7)
#define CRYPT_CMD_ISR_EN BIT(12)
@@ -43,6 +46,7 @@
#define CRYPT_CMD_ECB (0x0 << 4)
#define CRYPT_CMD_CBC (0x1 << 4)
#define CRYPT_CMD_CTR (0x4 << 4)
+#define CRYPT_CMD_GCM (0x5 << 4)
/* AES key length HACE10[3:2] */
#define CRYPT_CMD_AES_KEY_LEN_MASK (0x3 << 2)
#define CRYPT_CMD_AES256 (0x2 << 2)
@@ -58,10 +62,15 @@
#define CRYPT_CTX_KEY_OFFSET 0x10
#define CRYPT_CTX_SIZE 0x30
+/* AES-GCM uses a 96-bit IV and a 128-bit authentication tag */
+#define CRYPT_GCM_IV_LEN 12
+#define CRYPT_GCM_TAG_LEN 16
+
/* AST2700 64-bit DMA high address registers for the crypto command */
#define R_CRYPT_SRC_HI (0x80 / 4)
#define R_CRYPT_DEST_HI (0x84 / 4)
#define R_CRYPT_CONTEXT_HI (0x88 / 4)
+#define R_CRYPT_GCM_TAG_HI (0x8c / 4)
#define R_STATUS (0x1c / 4)
#define HASH_IRQ BIT(9)
@@ -598,6 +607,9 @@ static bool crypt_decode_cmd(uint32_t cmd, QCryptoCipherAlgo *alg,
case CRYPT_CMD_CTR:
*mode = QCRYPTO_CIPHER_MODE_CTR;
break;
+ case CRYPT_CMD_GCM:
+ *mode = QCRYPTO_CIPHER_MODE_GCM;
+ break;
default:
return false;
}
@@ -691,11 +703,12 @@ static uint64_t crypt_get_addr(AspeedHACEState *s, int reg, int reg_hi)
}
/*
- * Perform an AES/DES/3DES ECB/CBC operation. The source and destination are
- * either single contiguous buffers (direct access mode) or scatter-gather
- * lists (HACE10[18]/[19]), addressed by HACE00/HACE04; the IV/key come from
- * the context buffer (HACE08). For CBC the resulting chaining IV is written
- * back to the context buffer so the driver can continue the chain.
+ * Perform an AES/DES/3DES ECB/CBC/CTR or AES-GCM operation. The source and
+ * destination are either single contiguous buffers (direct access mode) or
+ * scatter-gather lists (HACE10[18]/[19]), addressed by HACE00/HACE04; the
+ * IV/key come from the context buffer (HACE08). For CBC and CTR the resulting
+ * chaining state is written back to the context buffer so the driver can
+ * continue; for GCM the authentication tag is written to the tag buffer.
*/
static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
{
@@ -705,6 +718,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
g_autoptr(QCryptoCipher) cipher = NULL;
g_autofree uint8_t *src_buf = NULL;
g_autofree uint8_t *dst_buf = NULL;
+ uint8_t tag[CRYPT_GCM_TAG_LEN];
uint8_t ctx[CRYPT_CTX_SIZE];
Error *local_err = NULL;
QCryptoCipherMode mode;
@@ -713,10 +727,13 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
uint64_t ctx_addr;
uint64_t src_addr;
uint64_t dst_addr;
+ uint64_t tag_addr;
+ uint32_t aad_len;
size_t iv_offset;
size_t blocklen;
size_t buf_len;
size_t keylen;
+ size_t ivlen;
bool status;
if (len == 0) {
@@ -736,6 +753,20 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
return;
}
+ /* GCM uses a 96-bit IV; the block modes use a full-block IV. */
+ ivlen = (mode == QCRYPTO_CIPHER_MODE_GCM) ? CRYPT_GCM_IV_LEN : blocklen;
+
+ /*
+ * The hardware GCM path is only exercised without associated data (the
+ * driver falls back to software when there is any), so AAD is not modelled.
+ */
+ aad_len = s->regs[R_CRYPT_GCM_ADD_LEN] & CRYPT_DATA_LEN_MASK;
+ if (mode == QCRYPTO_CIPHER_MODE_GCM && aad_len != 0) {
+ qemu_log_mask(LOG_UNIMP,
+ "%s: GCM associated data is not implemented\n", __func__);
+ return;
+ }
+
/* Fetch the IV and key from the context buffer in DRAM. */
ctx_addr = crypt_get_addr(s, R_CRYPT_CONTEXT, R_CRYPT_CONTEXT_HI);
if (address_space_read(&s->dram_as, ctx_addr, MEMTXATTRS_UNSPECIFIED,
@@ -760,7 +791,7 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
}
if (mode != QCRYPTO_CIPHER_MODE_ECB &&
- qcrypto_cipher_setiv(cipher, ctx + iv_offset, blocklen,
+ qcrypto_cipher_setiv(cipher, ctx + iv_offset, ivlen,
&local_err) < 0) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto cipher setiv failed: %s\n",
__func__, error_get_pretty(local_err));
@@ -771,9 +802,11 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
/*
* Round the working buffers up to a whole block. Block modes are already
* block-aligned; the stream-like CTR mode may leave a partial final block
- * that the engine still processes a full block at a time.
+ * that the engine still processes a full block at a time. GCM handles a
+ * partial final block itself, so it operates on the exact length.
*/
- buf_len = QEMU_ALIGN_UP(len, blocklen);
+ buf_len = (mode == QCRYPTO_CIPHER_MODE_GCM) ?
+ len : QEMU_ALIGN_UP(len, blocklen);
src_buf = g_malloc0(buf_len);
dst_buf = g_malloc0(buf_len);
@@ -857,6 +890,24 @@ static void do_crypt_operation(AspeedHACEState *s, uint32_t cmd)
"%s: Failed to write IV, addr=0x%" HWADDR_PRIx "\n",
__func__, ctx_addr + iv_offset);
}
+ } else if (mode == QCRYPTO_CIPHER_MODE_GCM) {
+ /*
+ * GCM authenticates the message and writes the resulting tag to the
+ * dedicated tag buffer (HACE18/HACE8C).
+ */
+ if (qcrypto_cipher_gettag(cipher, tag, sizeof(tag), &local_err) < 0) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto cipher gettag failed: "
+ "%s\n", __func__, error_get_pretty(local_err));
+ error_free(local_err);
+ return;
+ }
+ tag_addr = crypt_get_addr(s, R_CRYPT_GCM_TAG, R_CRYPT_GCM_TAG_HI);
+ if (address_space_write(&s->dram_as, tag_addr, MEMTXATTRS_UNSPECIFIED,
+ tag, sizeof(tag))) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Failed to write tag, addr=0x%" HWADDR_PRIx "\n",
+ __func__, tag_addr);
+ }
}
}
@@ -987,6 +1038,9 @@ static void aspeed_hace_write(void *opaque, hwaddr addr, uint64_t data,
case R_CRYPT_CONTEXT_HI:
data &= ahc->key_hi_mask;
break;
+ case R_CRYPT_GCM_TAG_HI:
+ data &= ahc->dest_hi_mask;
+ break;
default:
break;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 15/17] hw/misc/aspeed_hace: Enable the crypto command on the AST2700
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (13 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 14/17] hw/misc/aspeed_hace: Support the AES-GCM mode " Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 16/17] tests/qtest/aspeed-hace: Test " Jamin Lin
2026-07-15 3:33 ` [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround Jamin Lin
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
With direct/scatter-gather access, 64-bit DMA and AES-GCM all in place,
the AST2700 crypto engine is now fully modelled. Drop its temporary
interrupt-only workaround so the crypto command runs for real, like the
other HACE variants.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
include/hw/misc/aspeed_hace.h | 1 -
hw/misc/aspeed_hace.c | 15 +--------------
2 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/include/hw/misc/aspeed_hace.h b/include/hw/misc/aspeed_hace.h
index b5416b0cb5..9b0e7683fa 100644
--- a/include/hw/misc/aspeed_hace.h
+++ b/include/hw/misc/aspeed_hace.h
@@ -49,7 +49,6 @@ struct AspeedHACEClass {
uint32_t key_mask;
uint32_t hash_mask;
uint64_t nr_regs;
- bool raise_crypt_interrupt_workaround;
uint32_t src_hi_mask;
uint32_t dest_hi_mask;
uint32_t key_hi_mask;
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 927759b48f..90d43c0676 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -1005,14 +1005,7 @@ static void aspeed_hace_write(void *opaque, hwaddr addr, uint64_t data,
break;
}
case R_CRYPT_CMD:
- /*
- * The AST2700 crypto engine needs 64-bit DMA and AES-GCM, which are
- * added later; until then it keeps the temporary workaround of only
- * raising the completion interrupt without running the command.
- */
- if (!ahc->raise_crypt_interrupt_workaround) {
- do_crypt_operation(s, data);
- }
+ do_crypt_operation(s, data);
/* Hardware raises the crypt interrupt once the command finishes. */
s->regs[R_STATUS] |= CRYPT_IRQ;
@@ -1216,12 +1209,6 @@ static void aspeed_ast2700_hace_class_init(ObjectClass *klass, const void *data)
ahc->dest_hi_mask = 0x00000003;
ahc->key_hi_mask = 0x00000003;
- /*
- * Currently, it does not support the CRYPT command. Instead, it only
- * sends an interrupt to notify the firmware that the crypt command
- * has completed. It is a temporary workaround.
- */
- ahc->raise_crypt_interrupt_workaround = true;
ahc->has_dma64 = true;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 16/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2700
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (14 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 15/17] hw/misc/aspeed_hace: Enable the crypto command on the AST2700 Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-15 3:33 ` [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround Jamin Lin
16 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
Cover the AST2700 crypto engine, which drives 64-bit scatter-gather DMA
and adds AES-GCM on top of the ECB/CBC/CTR modes shared with the AST2600.
Add AES-128 and AES-256 GCM known-answer vectors (GCM specification /
NIST SP 800-38D, no associated data) and a dedicated GCM runner that
programs the tag buffer and reads the tag back, checking it after both
encryption and decryption. Register the AST2700 with all four modes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/qtest/aspeed-hace-utils.h | 1 +
tests/qtest/aspeed-hace-utils.c | 163 +++++++++++++++++++++++++++++++-
tests/qtest/ast2700-hace-test.c | 9 ++
3 files changed, 172 insertions(+), 1 deletion(-)
diff --git a/tests/qtest/aspeed-hace-utils.h b/tests/qtest/aspeed-hace-utils.h
index 82b0b3f93d..a5601a3d65 100644
--- a/tests/qtest/aspeed-hace-utils.h
+++ b/tests/qtest/aspeed-hace-utils.h
@@ -86,6 +86,7 @@ enum {
CRYPT_MODE_ECB = 1 << 0,
CRYPT_MODE_CBC = 1 << 1,
CRYPT_MODE_CTR = 1 << 2,
+ CRYPT_MODE_GCM = 1 << 3,
};
/*
diff --git a/tests/qtest/aspeed-hace-utils.c b/tests/qtest/aspeed-hace-utils.c
index f582c88ef5..260eec043c 100644
--- a/tests/qtest/aspeed-hace-utils.c
+++ b/tests/qtest/aspeed-hace-utils.c
@@ -654,6 +654,8 @@ void aspeed_test_addresses(const char *machine, const uint32_t base,
#define HACE_CRYPTO_CONTEXT 0x08
#define HACE_CRYPTO_DATA_LEN 0x0c
#define HACE_CRYPTO_CMD 0x10
+#define HACE_CRYPTO_GCM_ADD_LEN 0x14
+#define HACE_CRYPTO_GCM_TAG 0x18
/* Crypto command bits */
#define HACE_CMD_ENCRYPT BIT(7)
@@ -666,7 +668,9 @@ void aspeed_test_addresses(const char *machine, const uint32_t base,
#define HACE_CMD_ECB (0x0 << 4)
#define HACE_CMD_CBC (0x1 << 4)
#define HACE_CMD_CTR (0x4 << 4)
+#define HACE_CMD_GCM (0x5 << 4)
#define HACE_CMD_AES128 (0x0 << 2)
+#define HACE_CMD_AES256 (0x2 << 2)
/* Context buffer layout: IV (DES at +8), key at +0x10 */
#define HACE_CTX_KEY_OFFSET 0x10
@@ -794,6 +798,59 @@ static const uint8_t tdes_ctr_ctext[8] = {
static const uint8_t tdes_ctr_ivout[8] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
+/*
+ * aes_gcm_tv_template[2] (AES-128) and [9] (AES-256), from the McGrew & Viega
+ * GCM spec (also NIST SP 800-38D), no AAD. Both cases share this plaintext/IV.
+ */
+static const uint8_t aes_gcm_ptext[64] = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39, 0x1a, 0xaf, 0xd2, 0x55 };
+static const uint8_t aes_gcm_iv[12] = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88 };
+
+/* aes_gcm_tv_template[2] (AES-128) */
+static const uint8_t aes128_gcm_key[16] = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08 };
+static const uint8_t aes128_gcm_ctext[64] = {
+ 0x42, 0x83, 0x1e, 0xc2, 0x21, 0x77, 0x74, 0x24,
+ 0x4b, 0x72, 0x21, 0xb7, 0x84, 0xd0, 0xd4, 0x9c,
+ 0xe3, 0xaa, 0x21, 0x2f, 0x2c, 0x02, 0xa4, 0xe0,
+ 0x35, 0xc1, 0x7e, 0x23, 0x29, 0xac, 0xa1, 0x2e,
+ 0x21, 0xd5, 0x14, 0xb2, 0x54, 0x66, 0x93, 0x1c,
+ 0x7d, 0x8f, 0x6a, 0x5a, 0xac, 0x84, 0xaa, 0x05,
+ 0x1b, 0xa3, 0x0b, 0x39, 0x6a, 0x0a, 0xac, 0x97,
+ 0x3d, 0x58, 0xe0, 0x91, 0x47, 0x3f, 0x59, 0x85 };
+static const uint8_t aes128_gcm_tag[16] = {
+ 0x4d, 0x5c, 0x2a, 0xf3, 0x27, 0xcd, 0x64, 0xa6,
+ 0x2c, 0xf3, 0x5a, 0xbd, 0x2b, 0xa6, 0xfa, 0xb4 };
+
+/* aes_gcm_tv_template[9] (AES-256) */
+static const uint8_t aes256_gcm_key[32] = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08,
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08 };
+static const uint8_t aes256_gcm_ctext[64] = {
+ 0x52, 0x2d, 0xc1, 0xf0, 0x99, 0x56, 0x7d, 0x07,
+ 0xf4, 0x7f, 0x37, 0xa3, 0x2a, 0x84, 0x42, 0x7d,
+ 0x64, 0x3a, 0x8c, 0xdc, 0xbf, 0xe5, 0xc0, 0xc9,
+ 0x75, 0x98, 0xa2, 0xbd, 0x25, 0x55, 0xd1, 0xaa,
+ 0x8c, 0xb0, 0x8e, 0x48, 0x59, 0x0d, 0xbb, 0x3d,
+ 0xa7, 0xb0, 0x8b, 0x10, 0x56, 0x82, 0x88, 0x38,
+ 0xc5, 0xf6, 0x1e, 0x63, 0x93, 0xba, 0x7a, 0x0a,
+ 0xbc, 0xc9, 0xf6, 0x62, 0x89, 0x80, 0x15, 0xad };
+static const uint8_t aes256_gcm_tag[16] = {
+ 0xb0, 0x94, 0xda, 0xc5, 0xd9, 0x34, 0x71, 0xbd,
+ 0xec, 0x1a, 0x50, 0x22, 0x70, 0xe3, 0xcc, 0x6c };
+
typedef struct CryptTest {
QCryptoCipherMode mode;
QCryptoCipherAlgo alg;
@@ -801,10 +858,13 @@ typedef struct CryptTest {
const uint8_t *iv_out;
const uint8_t *ptext;
const uint8_t *ctext;
+ /* expected GCM authentication tag, or NULL for non-AEAD modes */
+ const uint8_t *tag;
const uint8_t *key;
const uint8_t *iv;
const char *name;
size_t keylen;
+ size_t taglen;
/* algorithm | mode | key size selection */
uint32_t cmd;
size_t ivlen;
@@ -927,6 +987,36 @@ static const CryptTest crypt_tests[] = {
.iv_out = tdes_ctr_ivout,
.len = sizeof(tdes_ctr_ptext),
},
+ {
+ .name = "aes128-gcm",
+ .cmd = HACE_CMD_AES128 | HACE_CMD_GCM,
+ .alg = QCRYPTO_CIPHER_ALGO_AES_128,
+ .mode = QCRYPTO_CIPHER_MODE_GCM,
+ .key = aes128_gcm_key,
+ .keylen = sizeof(aes128_gcm_key),
+ .iv = aes_gcm_iv,
+ .ivlen = sizeof(aes_gcm_iv),
+ .ptext = aes_gcm_ptext,
+ .ctext = aes128_gcm_ctext,
+ .tag = aes128_gcm_tag,
+ .taglen = sizeof(aes128_gcm_tag),
+ .len = sizeof(aes_gcm_ptext),
+ },
+ {
+ .name = "aes256-gcm",
+ .cmd = HACE_CMD_AES256 | HACE_CMD_GCM,
+ .alg = QCRYPTO_CIPHER_ALGO_AES_256,
+ .mode = QCRYPTO_CIPHER_MODE_GCM,
+ .key = aes256_gcm_key,
+ .keylen = sizeof(aes256_gcm_key),
+ .iv = aes_gcm_iv,
+ .ivlen = sizeof(aes_gcm_iv),
+ .ptext = aes_gcm_ptext,
+ .ctext = aes256_gcm_ctext,
+ .tag = aes256_gcm_tag,
+ .taglen = sizeof(aes256_gcm_tag),
+ .len = sizeof(aes_gcm_ptext),
+ },
};
/* DRAM offsets for the crypto test source, destination and context buffers. */
@@ -944,6 +1034,8 @@ static const CryptTest crypt_tests[] = {
*/
#define CRYPT_SG_FRAGS 3
#define CRYPT_SG_FRAG_STRIDE 0x1000
+/* DRAM offset for the AES-GCM authentication tag write buffer. */
+#define CRYPT_OFF_TAG 0x60000
/* Describes one registered crypto test (qtest_add_data_func() data pointer). */
typedef struct AspeedCryptoTest {
@@ -964,6 +1056,8 @@ static uint32_t crypt_mode_flag(uint32_t cmd)
return CRYPT_MODE_CBC;
case HACE_CMD_CTR:
return CRYPT_MODE_CTR;
+ case HACE_CMD_GCM:
+ return CRYPT_MODE_GCM;
default:
return 0;
}
@@ -1109,6 +1203,47 @@ static void crypt_run_sg(QTestState *s, uint32_t base, uint64_t dram,
crypt_gather_sg(s, dram, CRYPT_OFF_DST, out, t->len);
}
+/*
+ * Run one AES-GCM operation in scatter-gather mode: like crypt_run_sg() but
+ * also program the tag write buffer (HACE18) with no associated data, and read
+ * the authentication tag back into @out_tag.
+ */
+static void crypt_run_gcm(QTestState *s, uint32_t base, uint64_t dram,
+ const CryptTest *t, bool encrypt, uint8_t *out,
+ uint8_t *out_tag)
+{
+ const uint8_t *in = encrypt ? t->ptext : t->ctext;
+ uint64_t src_sg = dram + CRYPT_OFF_SRC_SG;
+ uint64_t dst_sg = dram + CRYPT_OFF_DST_SG;
+ uint64_t ctx = dram + CRYPT_OFF_CTX;
+ uint32_t cmd = t->cmd | HACE_CMD_ISR_EN | HACE_CMD_SRC_SG_CTRL |
+ HACE_CMD_DST_SG_CTRL;
+
+ if (encrypt) {
+ cmd |= HACE_CMD_ENCRYPT;
+ }
+
+ crypt_write_ctx(s, ctx, t);
+ crypt_make_sg(s, dram, CRYPT_OFF_SRC, src_sg, in, t->len);
+ crypt_make_sg(s, dram, CRYPT_OFF_DST, dst_sg, NULL, t->len);
+
+ qtest_writel(s, base + HACE_CRYPTO_SRC, (uint32_t)src_sg);
+ qtest_writel(s, base + HACE_CRYPTO_DEST, (uint32_t)dst_sg);
+ qtest_writel(s, base + HACE_CRYPTO_CONTEXT, (uint32_t)ctx);
+ qtest_writel(s, base + HACE_CRYPTO_DATA_LEN, t->len);
+ qtest_writel(s, base + HACE_CRYPTO_GCM_ADD_LEN, 0);
+ qtest_writel(s, base + HACE_CRYPTO_GCM_TAG,
+ (uint32_t)(dram + CRYPT_OFF_TAG));
+ qtest_writel(s, base + HACE_CRYPTO_CMD, cmd);
+
+ g_assert_cmphex(qtest_readl(s, base + HACE_STS) & HACE_CRYPTO_ISR, ==,
+ HACE_CRYPTO_ISR);
+ qtest_writel(s, base + HACE_STS, HACE_CRYPTO_ISR);
+
+ crypt_gather_sg(s, dram, CRYPT_OFF_DST, out, t->len);
+ qtest_memread(s, dram + CRYPT_OFF_TAG, out_tag, t->taglen);
+}
+
static void aspeed_test_crypto(const void *data)
{
const AspeedCryptoTest *c = data;
@@ -1145,6 +1280,29 @@ static void aspeed_test_crypto(const void *data)
qtest_quit(s);
}
+static void aspeed_test_crypto_gcm(const void *data)
+{
+ const AspeedCryptoTest *c = data;
+ const CryptTest *t = &crypt_tests[c->index];
+ QTestState *s = qtest_init(c->machine);
+ uint8_t out[64];
+ uint8_t tag[16];
+
+ g_assert_cmpuint(t->len, <=, sizeof(out));
+
+ /* Encrypt: ptext -> ctext, then check the authentication tag. */
+ crypt_run_gcm(s, c->base, c->dram, t, true, out, tag);
+ g_assert_cmpmem(out, t->len, t->ctext, t->len);
+ g_assert_cmpmem(tag, t->taglen, t->tag, t->taglen);
+
+ /* Decrypt: ctext -> ptext, the recomputed tag must match. */
+ crypt_run_gcm(s, c->base, c->dram, t, false, out, tag);
+ g_assert_cmpmem(out, t->len, t->ptext, t->len);
+ g_assert_cmpmem(tag, t->taglen, t->tag, t->taglen);
+
+ qtest_quit(s);
+}
+
void aspeed_add_crypto_tests(const char *prefix, const char *machine,
uint32_t base, uint64_t dram, uint32_t modes,
bool sg)
@@ -1152,6 +1310,7 @@ void aspeed_add_crypto_tests(const char *prefix, const char *machine,
int i;
for (i = 0; i < ARRAY_SIZE(crypt_tests); i++) {
+ bool is_gcm = crypt_tests[i].mode == QCRYPTO_CIPHER_MODE_GCM;
g_autofree char *path = NULL;
AspeedCryptoTest *t;
@@ -1173,7 +1332,9 @@ void aspeed_add_crypto_tests(const char *prefix, const char *machine,
t->dram = dram;
t->index = i;
t->sg = sg;
- qtest_add_data_func_full(path, t, aspeed_test_crypto, g_free);
+ qtest_add_data_func_full(path, t,
+ is_gcm ? aspeed_test_crypto_gcm :
+ aspeed_test_crypto, g_free);
}
}
diff --git a/tests/qtest/ast2700-hace-test.c b/tests/qtest/ast2700-hace-test.c
index 508a34dd6c..3f0217d635 100644
--- a/tests/qtest/ast2700-hace-test.c
+++ b/tests/qtest/ast2700-hace-test.c
@@ -94,5 +94,14 @@ int main(int argc, char **argv)
qtest_add_func("ast2700/hace/sha384_accum", test_sha384_accum_ast2700);
qtest_add_func("ast2700/hace/sha256_accum", test_sha256_accum_ast2700);
+ /*
+ * The AST2700 crypto engine uses scatter-gather with 64-bit DMA and adds
+ * AES-GCM on top of the ECB/CBC/CTR modes shared with the AST2600.
+ */
+ aspeed_add_crypto_tests("ast2700", "-machine ast2700-evb", 0x12070000,
+ 0x400000000,
+ CRYPT_MODE_ECB | CRYPT_MODE_CBC | CRYPT_MODE_CTR |
+ CRYPT_MODE_GCM, true);
+
return g_test_run();
}
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround
2026-07-15 3:33 [PATCH v2 00/17] Support the ASPEED HACE crypto command Jamin Lin
` (15 preceding siblings ...)
2026-07-15 3:33 ` [PATCH v2 16/17] tests/qtest/aspeed-hace: Test " Jamin Lin
@ 2026-07-15 3:33 ` Jamin Lin
2026-07-20 5:51 ` Cédric Le Goater
16 siblings, 1 reply; 27+ messages in thread
From: Jamin Lin @ 2026-07-15 3:33 UTC (permalink / raw)
To: Daniel P. Berrangé, Cédric Le Goater, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Jamin Lin, Troy Lee
The AST2700 boot tests appended 'cryptomgr.notests=1' to the kernel
command line to skip the Linux crypto manager self-tests.
Now that the HACE crypto engine emulates the crypto command, the
self-tests pass, so drop the workaround and let them run. This also
exercises the HACE crypto emulation during the functional boot tests.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/functional/aarch64/test_aspeed_ast2700a1.py | 5 -----
tests/functional/aarch64/test_aspeed_ast2700a2.py | 5 -----
tests/functional/aarch64/test_aspeed_ast2700fc.py | 5 -----
3 files changed, 15 deletions(-)
diff --git a/tests/functional/aarch64/test_aspeed_ast2700a1.py b/tests/functional/aarch64/test_aspeed_ast2700a1.py
index b0c08854da..bc535449b5 100755
--- a/tests/functional/aarch64/test_aspeed_ast2700a1.py
+++ b/tests/functional/aarch64/test_aspeed_ast2700a1.py
@@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
wait_for_console_pattern(self, 'pass')
wait_for_console_pattern(self, 'Jumping to BL31 (Trusted Firmware-A)')
- def disable_kernel_crypto_selftest(self):
- exec_command_and_wait_for_pattern(self,
- 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
-
def enable_ast2700_pcie2(self):
exec_command_and_wait_for_pattern(self,
'cp 100420000 403000000 900000', '=>')
@@ -71,7 +67,6 @@ def verify_openbmc_boot_start(self, enable_pcie=True):
wait_for_console_pattern(self, 'U-Boot 2023.10')
wait_for_console_pattern(self, 'Hit any key to stop autoboot')
exec_command_and_wait_for_pattern(self, '\012', '=>')
- self.disable_kernel_crypto_selftest()
if enable_pcie:
self.enable_ast2700_pcie2()
else:
diff --git a/tests/functional/aarch64/test_aspeed_ast2700a2.py b/tests/functional/aarch64/test_aspeed_ast2700a2.py
index ed414999f4..5aea0a9dd0 100755
--- a/tests/functional/aarch64/test_aspeed_ast2700a2.py
+++ b/tests/functional/aarch64/test_aspeed_ast2700a2.py
@@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
wait_for_console_pattern(self, 'pass')
wait_for_console_pattern(self, 'Jumping to BL31 (Trusted Firmware-A)')
- def disable_kernel_crypto_selftest(self):
- exec_command_and_wait_for_pattern(self,
- 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
-
def enable_ast2700_pcie2(self):
exec_command_and_wait_for_pattern(self,
'cp 100420000 403000000 900000', '=>')
@@ -71,7 +67,6 @@ def verify_openbmc_boot_start(self, enable_pcie=True):
wait_for_console_pattern(self, 'U-Boot 2023.10')
wait_for_console_pattern(self, 'Hit any key to stop autoboot')
exec_command_and_wait_for_pattern(self, '\012', '=>')
- self.disable_kernel_crypto_selftest()
if enable_pcie:
self.enable_ast2700_pcie2()
else:
diff --git a/tests/functional/aarch64/test_aspeed_ast2700fc.py b/tests/functional/aarch64/test_aspeed_ast2700fc.py
index df889134ed..1648fa9dba 100755
--- a/tests/functional/aarch64/test_aspeed_ast2700fc.py
+++ b/tests/functional/aarch64/test_aspeed_ast2700fc.py
@@ -27,10 +27,6 @@ def do_test_aarch64_aspeed_sdk_start(self, image):
self.vm.launch()
- def disable_kernel_crypto_selftest(self):
- exec_command_and_wait_for_pattern(self,
- 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
-
def enable_ast2700_pcie2(self):
exec_command_and_wait_for_pattern(self,
'cp 100420000 403000000 900000', '=>')
@@ -47,7 +43,6 @@ def verify_openbmc_boot_and_login(self, name):
wait_for_console_pattern(self, 'U-Boot 2023.10')
wait_for_console_pattern(self, 'Hit any key to stop autoboot')
exec_command_and_wait_for_pattern(self, '\012', '=>')
- self.disable_kernel_crypto_selftest()
self.enable_ast2700_pcie2()
wait_for_console_pattern(self, 'Starting kernel ...')
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround
2026-07-15 3:33 ` [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround Jamin Lin
@ 2026-07-20 5:51 ` Cédric Le Goater
2026-07-20 5:57 ` Jamin Lin
0 siblings, 1 reply; 27+ messages in thread
From: Cédric Le Goater @ 2026-07-20 5:51 UTC (permalink / raw)
To: Jamin Lin, Daniel P. Berrangé, Peter Maydell, Steven Lee,
Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, Eric Blake,
Markus Armbruster, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:All patches CC here, open list:ASPEED BMCs
Cc: Troy Lee
On 7/15/26 05:33, Jamin Lin wrote:
> The AST2700 boot tests appended 'cryptomgr.notests=1' to the kernel
> command line to skip the Linux crypto manager self-tests.
>
> Now that the HACE crypto engine emulates the crypto command, the
> self-tests pass, so drop the workaround and let them run. This also
> exercises the HACE crypto emulation during the functional boot tests.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> tests/functional/aarch64/test_aspeed_ast2700a1.py | 5 -----
> tests/functional/aarch64/test_aspeed_ast2700a2.py | 5 -----
> tests/functional/aarch64/test_aspeed_ast2700fc.py | 5 -----
> 3 files changed, 15 deletions(-)
>
> diff --git a/tests/functional/aarch64/test_aspeed_ast2700a1.py b/tests/functional/aarch64/test_aspeed_ast2700a1.py
> index b0c08854da..bc535449b5 100755
> --- a/tests/functional/aarch64/test_aspeed_ast2700a1.py
> +++ b/tests/functional/aarch64/test_aspeed_ast2700a1.py
> @@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
> wait_for_console_pattern(self, 'pass')
> wait_for_console_pattern(self, 'Jumping to BL31 (Trusted Firmware-A)')
>
> - def disable_kernel_crypto_selftest(self):
> - exec_command_and_wait_for_pattern(self,
> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> -
> def enable_ast2700_pcie2(self):
> exec_command_and_wait_for_pattern(self,
> 'cp 100420000 403000000 900000', '=>')
> @@ -71,7 +67,6 @@ def verify_openbmc_boot_start(self, enable_pcie=True):
> wait_for_console_pattern(self, 'U-Boot 2023.10')
> wait_for_console_pattern(self, 'Hit any key to stop autoboot')
> exec_command_and_wait_for_pattern(self, '\012', '=>')
> - self.disable_kernel_crypto_selftest()
> if enable_pcie:
> self.enable_ast2700_pcie2()
> else:
> diff --git a/tests/functional/aarch64/test_aspeed_ast2700a2.py b/tests/functional/aarch64/test_aspeed_ast2700a2.py
> index ed414999f4..5aea0a9dd0 100755
> --- a/tests/functional/aarch64/test_aspeed_ast2700a2.py
> +++ b/tests/functional/aarch64/test_aspeed_ast2700a2.py
> @@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
> wait_for_console_pattern(self, 'pass')
> wait_for_console_pattern(self, 'Jumping to BL31 (Trusted Firmware-A)')
>
> - def disable_kernel_crypto_selftest(self):
> - exec_command_and_wait_for_pattern(self,
> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> -
> def enable_ast2700_pcie2(self):
> exec_command_and_wait_for_pattern(self,
> 'cp 100420000 403000000 900000', '=>')
> @@ -71,7 +67,6 @@ def verify_openbmc_boot_start(self, enable_pcie=True):
> wait_for_console_pattern(self, 'U-Boot 2023.10')
> wait_for_console_pattern(self, 'Hit any key to stop autoboot')
> exec_command_and_wait_for_pattern(self, '\012', '=>')
> - self.disable_kernel_crypto_selftest()
> if enable_pcie:
> self.enable_ast2700_pcie2()
> else:
> diff --git a/tests/functional/aarch64/test_aspeed_ast2700fc.py b/tests/functional/aarch64/test_aspeed_ast2700fc.py
> index df889134ed..1648fa9dba 100755
> --- a/tests/functional/aarch64/test_aspeed_ast2700fc.py
> +++ b/tests/functional/aarch64/test_aspeed_ast2700fc.py
> @@ -27,10 +27,6 @@ def do_test_aarch64_aspeed_sdk_start(self, image):
>
> self.vm.launch()
>
> - def disable_kernel_crypto_selftest(self):
> - exec_command_and_wait_for_pattern(self,
> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> -
> def enable_ast2700_pcie2(self):
> exec_command_and_wait_for_pattern(self,
> 'cp 100420000 403000000 900000', '=>')
> @@ -47,7 +43,6 @@ def verify_openbmc_boot_and_login(self, name):
> wait_for_console_pattern(self, 'U-Boot 2023.10')
> wait_for_console_pattern(self, 'Hit any key to stop autoboot')
> exec_command_and_wait_for_pattern(self, '\012', '=>')
> - self.disable_kernel_crypto_selftest()
> self.enable_ast2700_pcie2()
> wait_for_console_pattern(self, 'Starting kernel ...')
>
There are still crypto tests errors. See below. Is it expected ?
Thanks,
C.
[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd040]
[ 0.000000] Linux version 6.18.3-v00.08.01-g172b7e27a30d (oe-user@oe-host) (aarch64-openbmc-linux-gcc (GCC) 15.1.0, GNU ld (GNU Binutils) 2.44.0.20250429) #1 SMP PREEMPT Wed Feb 18 09:06:34 CST 2026
[ 0.000000] KASLR disabled due to lack of seed
[ 0.000000] Machine model: AST2700 EVB
[ 0.000000] Malformed early option 'earlycon'
[ 0.000000] Reserved memory: created DMA memory pool at 0x000000047ff00000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node xdma0, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x000000047ff00000..0x000000047fffffff (1024 KiB) nomap non-reusable xdma0
[ 0.000000] Reserved memory: created DMA memory pool at 0x000000047fe00000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node xdma1, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x000000047fe00000..0x000000047fefffff (1024 KiB) nomap non-reusable xdma1
[ 0.000000] Reserved memory: created CMA memory pool at 0x000000047de00000, size 32 MiB
[ 0.000000] OF: reserved mem: initialized node video0, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x000000047de00000..0x000000047fdfffff (32768 KiB) map reusable video0
[ 0.000000] Reserved memory: created CMA memory pool at 0x000000047ac00000, size 32 MiB
[ 0.000000] OF: reserved mem: initialized node video1, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x000000047ac00000..0x000000047cbfffff (32768 KiB) map reusable video1
[ 0.000000] Reserved memory: created CMA memory pool at 0x000000047ce00000, size 16 MiB
[ 0.000000] OF: reserved mem: initialized node mcyc0, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x000000047ce00000..0x000000047ddfffff (16384 KiB) map reusable mcyc0
[ 0.000000] OF: reserved mem: 0x0000000430000000..0x000000043007ffff (512 KiB) nomap non-reusable trusted-firmware-a@430000000
[ 0.000000] OF: reserved mem: 0x0000000430080000..0x000000043107ffff (16384 KiB) nomap non-reusable optee-core@430080000
[ 0.000000] OF: reserved mem: 0x0000000428000000..0x000000042bffffff (65536 KiB) nomap non-reusable eadf0-memory@428000000
[ 0.000000] OF: reserved mem: 0x0000000424000000..0x0000000427ffffff (65536 KiB) nomap non-reusable espi0-mmbi-memory@424000000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000423800000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node bmc-dev0-memory@423800000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000423800000..0x00000004238fffff (1024 KiB) nomap non-reusable bmc-dev0-memory@423800000
[ 0.000000] OF: reserved mem: 0x0000000423a00000..0x0000000423bfffff (2048 KiB) nomap non-reusable pcie0-mmbi0-memory@423a00000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000423900000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node bmc-dev1-memory@423900000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000423900000..0x00000004239fffff (1024 KiB) nomap non-reusable bmc-dev1-memory@423900000
[ 0.000000] OF: reserved mem: 0x0000000423c00000..0x0000000423dfffff (2048 KiB) nomap non-reusable pcie1-mmbi4-memory@423c00000
[ 0.000000] OF: reserved mem: 0x0000000423e00000..0x0000000423ffffff (2048 KiB) nomap non-reusable pcie2-mmbi0-memory@423e00000
[ 0.000000] OF: reserved mem: 0x000000042c000000..0x000000042dffffff (32768 KiB) nomap non-reusable ssp-memory@42c000000
[ 0.000000] OF: reserved mem: 0x000000042e000000..0x000000042fffffff (32768 KiB) nomap non-reusable tsp-memory@42e000000
[ 0.000000] OF: reserved mem: 0x0000000431080000..0x000000043187ffff (8192 KiB) nomap non-reusable ipc-ssp-share@431080000
[ 0.000000] OF: reserved mem: 0x0000000431880000..0x0000000431b2ffff (2752 KiB) nomap non-reusable ipc-bootmcu-share@431880000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000431b30000, size 0 MiB
[ 0.000000] OF: reserved mem: initialized node uhci0-reserved@431b30000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000431b30000..0x0000000431b6ffff (256 KiB) nomap non-reusable uhci0-reserved@431b30000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000431b70000, size 0 MiB
[ 0.000000] OF: reserved mem: initialized node uhci1-reserved@431b70000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000431b70000..0x0000000431baffff (256 KiB) nomap non-reusable uhci1-reserved@431b70000
[ 0.000000] OF: reserved mem: 0x0000000431bb0000..0x0000000431bbffff (64 KiB) nomap non-reusable vbios-base0@431bb0000
[ 0.000000] OF: reserved mem: 0x0000000431bc0000..0x0000000431bcffff (64 KiB) nomap non-reusable vbios-base1@431bc0000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000431bd0000, size 0 MiB
[ 0.000000] OF: reserved mem: initialized node mctp0-reserved@431bd0000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000431bd0000..0x0000000431bdffff (64 KiB) nomap non-reusable mctp0-reserved@431bd0000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000431be0000, size 0 MiB
[ 0.000000] OF: reserved mem: initialized node mctp1-reserved@431be0000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000431be0000..0x0000000431beffff (64 KiB) nomap non-reusable mctp1-reserved@431be0000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000431bf0000, size 0 MiB
[ 0.000000] OF: reserved mem: initialized node mctp2-reserved@431bf0000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000431bf0000..0x0000000431bfffff (64 KiB) nomap non-reusable mctp2-reserved@431bf0000
[ 0.000000] NUMA: Faking a node at [mem 0x0000000400000000-0x000000047fffffff]
[ 0.000000] NODE_DATA(0) allocated [mem 0x47a892d40-0x47a89533f]
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000400000000-0x000000047fffffff]
[ 0.000000] DMA32 empty
[ 0.000000] Normal empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000400000000-0x00000004237fffff]
[ 0.000000] node 0: [mem 0x0000000423800000-0x0000000431bfffff]
[ 0.000000] node 0: [mem 0x0000000431c00000-0x000000047fdfffff]
[ 0.000000] node 0: [mem 0x000000047fe00000-0x000000047fffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000400000000-0x000000047fffffff]
[ 0.000000] cma: Reserved 32 MiB at 0x0000000401800000
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: Trusted OS migration not required
[ 0.000000] psci: SMC Calling Convention v1.5
[ 0.000000] percpu: Embedded 31 pages/cpu s88216 r8192 d30568 u126976
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: detected: GICv3 CPU interface
[ 0.000000] alternatives: applying boot alternatives
[ 0.000000] Kernel command line: console=ttyS12,115200n8 root=/dev/ram rw earlycon
[ 0.000000] printk: log buffer data + meta data: 131072 + 458752 = 589824 bytes
[ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 2MB
[ 0.000000] software IO TLB: area num 4.
[ 0.000000] software IO TLB: mapped [mem 0x0000000478300000-0x0000000478500000] (2MB)
[ 0.000000] Fallback order for Node 0: 0
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 524288
[ 0.000000] Policy zone: DMA
[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
[ 0.000000] rcu: RCU event tracing is enabled.
[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=4.
[ 0.000000] Trampoline variant of Tasks RCU enabled.
[ 0.000000] Tracing variant of Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[ 0.000000] RCU Tasks: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
[ 0.000000] RCU Tasks Trace: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[ 0.000000] GICv3: 256 SPIs implemented
[ 0.000000] GICv3: 0 Extended SPIs implemented
[ 0.000000] Root IRQ handler: gic_handle_irq
[ 0.000000] GICv3: GICv3 features: 16 PPIs
[ 0.000000] GICv3: GICD_CTLR.DS=1, SCR_EL3.FIQ=1
[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000012280000
[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[ 0.000000] arch_timer: cp15 timer running at 1600.00MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0x1fffffffffffffff max_cycles: 0x171024fa93b, max_idle_ns: 440795253189 ns
[ 0.000037] sched_clock: 61 bits at 1600MHz, resolution 0ns, wraps every 4398046511103ns
[ 0.006379] Console: colour dummy device 80x25
[ 0.008502] Calibrating delay loop (skipped), value calculated using timer frequency.. 3200.00 BogoMIPS (lpj=6400000)
[ 0.008572] pid_max: default: 32768 minimum: 301
[ 0.010747] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[ 0.010795] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[ 0.037047] rcu: Hierarchical SRCU implementation.
[ 0.037077] rcu: Max phase no-delay instances is 1000.
[ 0.038351] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level
[ 0.041363] ASPEED AST2700 rev A2 (06020103)
[ 0.042677] smp: Bringing up secondary CPUs ...
[ 0.045789] Detected VIPT I-cache on CPU1
[ 0.046337] GICv3: CPU1: found redistributor 1 region 0:0x00000000122a0000
[ 0.046467] CPU1: Booted secondary processor 0x0000000001 [0x411fd040]
[ 0.050519] Detected VIPT I-cache on CPU2
[ 0.050686] GICv3: CPU2: found redistributor 2 region 0:0x00000000122c0000
[ 0.050765] CPU2: Booted secondary processor 0x0000000002 [0x411fd040]
[ 0.052102] Detected VIPT I-cache on CPU3
[ 0.052264] GICv3: CPU3: found redistributor 3 region 0:0x00000000122e0000
[ 0.052345] CPU3: Booted secondary processor 0x0000000003 [0x411fd040]
[ 0.052712] smp: Brought up 1 node, 4 CPUs
[ 0.052729] SMP: Total of 4 processors activated.
[ 0.052743] CPU: All CPU(s) started at EL2
[ 0.052780] CPU features: detected: 32-bit EL0 Support
[ 0.052821] CPU features: detected: CRC32 instructions
[ 0.052910] CPU features: detected: PMUv3
[ 0.059753] alternatives: applying system-wide alternatives
[ 0.070608] Memory: 1673568K/2097152K available (14592K kernel code, 2014K rwdata, 5568K rodata, 1408K init, 524K bss, 303892K reserved, 114688K cma-reserved)
[ 0.088349] devtmpfs: initialized
[ 0.110897] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.111263] posixtimers hash table entries: 2048 (order: 3, 32768 bytes, linear)
[ 0.111895] futex hash table entries: 1024 (65536 bytes on 1 NUMA nodes, total 64 KiB, linear).
[ 0.113861] 26688 pages in range for non-PLT usage
[ 0.114239] 518208 pages in range for PLT usage
[ 0.115151] pinctrl core: initialized pinctrl subsystem
[ 0.135658] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[ 0.144194] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations
[ 0.144873] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[ 0.145400] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[ 0.145718] audit: initializing netlink subsys (disabled)
[ 0.147488] audit: type=2000 audit(0.140:1): state=initialized audit_enabled=0 res=1
[ 0.149211] cpuidle: using governor menu
[ 0.149955] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.150560] ASID allocator initialised with 65536 entries
[ 0.216875] iommu: Default domain type: Translated
[ 0.216907] iommu: DMA domain TLB invalidation policy: strict mode
[ 0.220788] SCSI subsystem initialized
[ 0.221600] usbcore: registered new interface driver usbfs
[ 0.221813] usbcore: registered new interface driver hub
[ 0.221908] usbcore: registered new device driver usb
[ 0.222221] mc: Linux media interface: v0.10
[ 0.222262] videodev: Linux video capture interface: v2.00
[ 0.222358] pps_core: LinuxPPS API ver. 1 registered
[ 0.222364] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.222392] PTP clock support registered
[ 0.222497] EDAC MC: Ver: 3.0.0
[ 0.223354] scmi_core: SCMI protocol bus registered
[ 0.231561] mctp: management component transport protocol core
[ 0.231573] NET: Registered PF_MCTP protocol family
[ 0.232784] vgaarb: loaded
[ 0.235288] clocksource: Switched to clocksource arch_sys_counter
[ 0.237125] VFS: Disk quotas dquot_6.6.0
[ 0.237189] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 0.252368] NET: Registered PF_INET protocol family
[ 0.253271] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)
[ 0.256584] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
[ 0.256622] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.256661] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
[ 0.257174] TCP bind hash table entries: 16384 (order: 7, 524288 bytes, linear)
[ 0.257342] TCP: Hash tables configured (established 16384 bind 16384)
[ 0.258127] UDP hash table entries: 1024 (order: 4, 65536 bytes, linear)
[ 0.258261] UDP-Lite hash table entries: 1024 (order: 4, 65536 bytes, linear)
[ 0.258919] NET: Registered PF_UNIX/PF_LOCAL protocol family
[ 0.259388] PCI: CLS 0 bytes, default 64
[ 0.262222] Trying to unpack rootfs image as initramfs...
[ 0.262737] Initialise system trusted keyrings
[ 0.263942] workingset: timestamp_bits=42 max_order=19 bucket_order=0
[ 0.266013] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.266194] jffs2: version 2.2. (SUMMARY) © 2001-2006 Red Hat, Inc.
[ 0.296367] NET: Registered PF_ALG protocol family
[ 0.296561] Key type asymmetric registered
[ 0.296676] Asymmetric key parser 'x509' registered
[ 0.297006] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
[ 0.297097] io scheduler mq-deadline registered
[ 0.297134] io scheduler kyber registered
[ 0.297360] io scheduler bfq registered
[ 0.310863] aspeed_usb_phy3 12010000.usb-phy3: Probed USB PHY3
[ 0.311709] aspeed_usb_phy3 12020000.usb-phy3: Probed USB PHY3
[ 0.323247] ledtrig-cpu: registered to indicate activity on CPUs
[ 0.324971] ipmi-bt-host 12c19140.pcie-ibt: initialised channel 2 at IO address 0xe4
[ 0.325436] ipmi-bt-host 12c19940.pcie-ibt: initialised channel 3 at IO address 0xe4
[ 0.326029] ipmi-bt-host 14c31140.ibt: initialised channel 0 at IO address 0xe4
[ 0.326393] ipmi-bt-host 14c32140.ibt: initialised channel 1 at IO address 0xe4
[ 0.327619] aspeed-kcs-bmc 12c19024.pcie-kcs: Initialised IPMI client for channel 8
[ 0.327656] aspeed-kcs-bmc 12c19024.pcie-kcs: Initialised channel 8 at IO address 0x3a0
[ 0.328103] aspeed-kcs-bmc 12c19028.pcie-kcs: Initialised IPMI client for channel 9
[ 0.328112] aspeed-kcs-bmc 12c19028.pcie-kcs: Initialised channel 9 at IO address 0x3a8
[ 0.328481] aspeed-kcs-bmc 12c1902c.pcie-kcs: Initialised IPMI client for channel 10
[ 0.328490] aspeed-kcs-bmc 12c1902c.pcie-kcs: Initialised channel 10 at IO address 0x3a2
[ 0.328832] aspeed-kcs-bmc 12c19114.pcie-kcs: Initialised IPMI client for channel 11
[ 0.328841] aspeed-kcs-bmc 12c19114.pcie-kcs: Initialised channel 11 at IO address 0x3a4
[ 0.329240] aspeed-kcs-bmc 12c19824.pcie-kcs: Initialised IPMI client for channel 12
[ 0.329248] aspeed-kcs-bmc 12c19824.pcie-kcs: Initialised channel 12 at IO address 0x3a0
[ 0.329852] aspeed-kcs-bmc 12c19828.pcie-kcs: Initialised IPMI client for channel 13
[ 0.329860] aspeed-kcs-bmc 12c19828.pcie-kcs: Initialised channel 13 at IO address 0x3a8
[ 0.330154] aspeed-kcs-bmc 12c1982c.pcie-kcs: Initialised IPMI client for channel 14
[ 0.330162] aspeed-kcs-bmc 12c1982c.pcie-kcs: Initialised channel 14 at IO address 0x3a2
[ 0.330497] aspeed-kcs-bmc 12c19914.pcie-kcs: Initialised IPMI client for channel 15
[ 0.330506] aspeed-kcs-bmc 12c19914.pcie-kcs: Initialised channel 15 at IO address 0x3a4
[ 0.331245] aspeed-kcs-bmc 14c31024.lpc-kcs: Initialised IPMI client for channel 0
[ 0.331256] aspeed-kcs-bmc 14c31024.lpc-kcs: Initialised channel 0 at IO address 0xca0
[ 0.331599] aspeed-kcs-bmc 14c31028.lpc-kcs: Initialised IPMI client for channel 1
[ 0.331608] aspeed-kcs-bmc 14c31028.lpc-kcs: Initialised channel 1 at IO address 0xca8
[ 0.332047] aspeed-kcs-bmc 14c3102c.lpc-kcs: Initialised IPMI client for channel 2
[ 0.332058] aspeed-kcs-bmc 14c3102c.lpc-kcs: Initialised channel 2 at IO address 0xca2
[ 0.332393] aspeed-kcs-bmc 14c31114.lpc-kcs: Initialised IPMI client for channel 3
[ 0.332402] aspeed-kcs-bmc 14c31114.lpc-kcs: Initialised channel 3 at IO address 0xca4
[ 0.332793] aspeed-kcs-bmc 14c32024.kcs: Initialised IPMI client for channel 4
[ 0.332801] aspeed-kcs-bmc 14c32024.kcs: Initialised channel 4 at IO address 0xca0
[ 0.333107] aspeed-kcs-bmc 14c32028.kcs: Initialised IPMI client for channel 5
[ 0.333115] aspeed-kcs-bmc 14c32028.kcs: Initialised channel 5 at IO address 0xca8
[ 0.333408] aspeed-kcs-bmc 14c3202c.kcs: Initialised IPMI client for channel 6
[ 0.333425] aspeed-kcs-bmc 14c3202c.kcs: Initialised channel 6 at IO address 0xca2
[ 0.333731] aspeed-kcs-bmc 14c32114.kcs: Initialised IPMI client for channel 7
[ 0.333739] aspeed-kcs-bmc 14c32114.kcs: Initialised channel 7 at IO address 0xca4
[ 0.335242] aspeed_bmc_dev 12110000.bmc-dev: reserved memory is beyond device's set DMA address range
[ 0.335287] aspeed_bmc_dev 12110000.bmc-dev: assigned reserved memory node bmc-dev0-memory@423800000
[ 0.336909] aspeed_bmc_dev 12110000.bmc-dev: aspeed bmc device: driver successfully loaded.
[ 0.337060] aspeed_bmc_dev 12120000.bmc-dev: reserved memory is beyond device's set DMA address range
[ 0.337068] aspeed_bmc_dev 12120000.bmc-dev: assigned reserved memory node bmc-dev1-memory@423900000
[ 0.337826] aspeed_bmc_dev 12120000.bmc-dev: aspeed bmc device: driver successfully loaded.
[ 0.343471] aspeed-uart-routing 14c31098.uart-routing: module loaded
[ 0.343602] aspeed-uart-routing 14c32098.uart-routing: module loaded
[ 0.344331] aspeed-xdma 12c04000.xdma: reserved memory is beyond device's set DMA address range
[ 0.344341] aspeed-xdma 12c04000.xdma: assigned reserved memory node xdma0
[ 0.346934] aspeed-xdma 12c05000.xdma: reserved memory is beyond device's set DMA address range
[ 0.346945] aspeed-xdma 12c05000.xdma: assigned reserved memory node xdma1
[ 0.389006] aspeed_usb_phy3 12010000.usb-phy3: Wait phy3 init timed out
[ 0.389059] phy phy-12010000.usb-phy3.3: phy init failed --> -110
[ 0.389134] aspeed_usb_hp soc@10000000:usb3ahp: failed to init usb3 phy
[ 0.389309] aspeed_usb_hp soc@10000000:usb3ahp: probe with driver aspeed_usb_hp failed with error -110
[ 0.402300] aspeed_usb_phy3 12020000.usb-phy3: Wait phy3 init timed out
[ 0.402312] phy phy-12020000.usb-phy3.4: phy init failed --> -110
[ 0.402319] aspeed_usb_hp soc@10000000:usb3bhp: failed to init usb3 phy
[ 0.402325] aspeed_usb_hp soc@10000000:usb3bhp: probe with driver aspeed_usb_hp failed with error -110
[ 0.405370] aspeed_pcie_mmbi 12c21000.e2m-config:pcie0-mmbi@0: ASPEED PCIe MMBI Dev 0: driver successfully loaded.
[ 0.406781] aspeed_pcie_mmbi 12c22000.e2m-config:pcie1-mmbi@4: ASPEED PCIe MMBI Dev 1: driver successfully loaded.
[ 0.408663] aspeed-mctp 12c06000.mctp0: assigned reserved memory node mctp0-reserved@431bd0000
[ 0.412243] aspeed-mctp 12c07000.mctp1: assigned reserved memory node mctp1-reserved@431be0000
[ 0.413541] aspeed-mctp 14c1a000.mctp2: assigned reserved memory node mctp2-reserved@431bf0000
[ 0.415109] ast2700_otp 14c07000.otp: Aspeed OTP driver successfully registered
[ 0.458099] Freeing initrd memory: 1312K
[ 0.489832] aspeed-espi 14c05000.espi: assigned reserved memory node mcyc0
[ 0.495645] aspeed-espi 14c05000.espi: eDAF mode: 0x2
[ 0.496444] aspeed-espi 14c05000.espi: module loaded
[ 0.497026] ast2700-rtc-over-espi 14c3d000.rtc-over_espi: RTC not ready, deferring probe
[ 0.548836] Serial: 8250/16550 driver, 23 ports, IRQ sharing enabled
[ 0.561470] 12c18000.serial: ttyS19 at MMIO 0x12c18000 (irq = 78, base_baud = 25000000) is a ASPEED VUART
[ 0.563500] 12c18100.serial: ttyS20 at MMIO 0x12c18100 (irq = 79, base_baud = 25000000) is a ASPEED VUART
[ 0.564507] 12c18200.serial: ttyS21 at MMIO 0x12c18200 (irq = 80, base_baud = 25000000) is a ASPEED VUART
[ 0.565501] 12c18300.serial: ttyS22 at MMIO 0x12c18300 (irq = 81, base_baud = 25000000) is a ASPEED VUART
[ 0.566848] 14c33200.serial: ttyS2 at MMIO 0x14c33200 (irq = 82, base_baud = 115384) is a 16550A
[ 0.568986] 14c33800.serial: ttyS9 at MMIO 0x14c33800 (irq = 83, base_baud = 115384) is a 16550A
[ 0.570059] 14c33b00.serial: ttyS12 at MMIO 0x14c33b00 (irq = 84, base_baud = 115384) is a 16550A
[ 0.571430] printk: legacy console [ttyS12] enabled
[ 0.599367] DWC_TRNG_DriverSDK_1.00a
[ 0.599866] NIST_TRNG: Hardware rel_num=0x0, ext_ver=0x0, ext_enum=0x0
[ 1.081562] wait_on_: failed timeout: 00000000
[ 1.081679] NIST_TRNG init failed (-21)
[ 1.081882] nist_trng nist_trng: probe with driver nist_trng failed with error -21
[ 1.100031] brd: module loaded
[ 1.108016] loop: module loaded
[ 1.137960] spi-aspeed-smc 14000000.spi: user mode and normal read are used
[ 1.141534] spi-nor spi0.0: supply vcc not found, using dummy regulator
[ 1.162328] spi-aspeed-smc 14000000.spi: CE0 read buswidth: 4 [0x406c0641]
[ 1.162556] spi-aspeed-smc 14000000.spi: CE0 write buswidth: 4 [0x40340602]
[ 1.215999] 5 fixed-partitions partitions found on MTD device bmc
[ 1.216161] Creating 5 MTD partitions on "bmc":
[ 1.216316] 0x000000000000-0x000000400000 : "u-boot"
[ 1.218264] 0x000000400000-0x000000420000 : "u-boot-env"
[ 1.219554] 0x000000420000-0x000000d20000 : "kernel"
[ 1.220982] 0x000000d20000-0x000006000000 : "rofs"
[ 1.222261] 0x000006000000-0x000008000000 : "rwfs"
[ 1.227788] spi-nor spi0.1: supply vcc not found, using dummy regulator
[ 1.228829] spi-aspeed-smc 14000000.spi: Calibration area too uniform
[ 1.229072] spi-aspeed-smc 14000000.spi: CE1 read buswidth: 4 [0x406c0641]
[ 1.229186] spi-aspeed-smc 14000000.spi: CE1 write buswidth: 4 [0x40340602]
[ 1.247107] spi-aspeed-smc 14010000.spi: user mode and normal read are used
[ 1.248480] spi-nor spi1.0: supply vcc not found, using dummy regulator
[ 1.249664] spi-aspeed-smc 14010000.spi: Calibration area too uniform
[ 1.249758] spi-aspeed-smc 14010000.spi: CE0 read buswidth: 2 [0x203c0641]
[ 1.249851] spi-aspeed-smc 14010000.spi: CE0 write buswidth: 1 [0x00120602]
[ 1.259585] spi-aspeed-smc 14020000.spi: user mode and normal read are used
[ 1.260535] spi-nor spi2.0: supply vcc not found, using dummy regulator
[ 1.260863] spi-nor spi2.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00
[ 1.264807] spi_aspeed_txrx 14030000.spi: cs: 0, ctrl_val: 0x00000407
[ 1.279202] CAN device driver interface
[ 2.288754] aspeed_can 14c3e000.can (unnamed net_device) (uninitialized): timed out for config mode
[ 2.289000] aspeed_can 14c3e000.can: probe with driver aspeed_can failed with error -110
[ 2.291357] ftgmac100 14050000.ethernet: Read MAC address 52:54:00:12:34:56 from chip
[ 2.292825] RTL8211E Gigabit Ethernet 14040000.mdio-1:00: attached PHY driver (mii_bus:phy_addr=14040000.mdio-1:00, irq=POLL)
[ 2.312021] ftgmac100 14050000.ethernet eth0: irq 86, mapped at (____ptrval____)
[ 2.312736] ftgmac100 14060000.ethernet: Read MAC address 52:54:00:12:34:57 from chip
[ 2.312994] RTL8211E Gigabit Ethernet 14040008.mdio-1:00: attached PHY driver (mii_bus:phy_addr=14040008.mdio-1:00, irq=POLL)
[ 2.331522] ftgmac100 14060000.ethernet eth1: irq 87, mapped at (____ptrval____)
[ 2.331821] e100: Intel(R) PRO/100 Network Driver
[ 2.331879] e100: Copyright(c) 1999-2006 Intel Corporation
[ 2.332018] e1000: Intel(R) PRO/1000 Network Driver
[ 2.332088] e1000: Copyright (c) 1999-2006 Intel Corporation.
[ 2.332213] e1000e: Intel(R) PRO/1000 Network Driver
[ 2.332303] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[ 2.332431] igb: Intel(R) Gigabit Ethernet Network Driver
[ 2.332511] igb: Copyright (c) 2007-2014 Intel Corporation.
[ 2.332639] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver
[ 2.332726] ixgbe: Copyright (c) 1999-2016 Intel Corporation.
[ 2.333468] MCTP I2C interface driver
[ 2.333816] usbcore: registered new interface driver mctp-usb
[ 2.333952] usbcore: registered new interface driver cdc_ether
[ 2.334071] usbcore: registered new interface driver cdc_eem
[ 2.334194] usbcore: registered new interface driver net1080
[ 2.334317] usbcore: registered new interface driver cdc_subset
[ 2.334434] usbcore: registered new interface driver zaurus
[ 2.334550] usbcore: registered new interface driver cdc_ncm
[ 2.334670] usbcore: registered new interface driver r8153_ecm
[ 2.336620] platform-uhci 14110000.usb: Detected 2 ports from device-tree
[ 2.336765] platform-uhci 14110000.usb: Enabled Aspeed implementation workarounds
[ 2.337202] platform-uhci 14110000.usb: Generic UHCI Host Controller
[ 2.337204] ehci-platform 14123000.usb: EHCI Host Controller
[ 2.337639] ehci-platform 14123000.usb: new USB bus registered, assigned bus number 2
[ 2.337640] platform-uhci 14110000.usb: new USB bus registered, assigned bus number 1
[ 2.338409] platform-uhci 14110000.usb: irq 89, io mem 0x14110000
[ 2.338627] platform-uhci 14110000.usb: Device does not have specific DMA pool
[ 2.339110] ehci-platform 14123000.usb: irq 88, io mem 0x14123000
[ 2.344125] usb usb1: New USB device found, idVendor=1d6b, idProduct=0001, bcdDevice= 6.18
[ 2.344272] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 2.344375] usb usb1: Product: Generic UHCI Host Controller
[ 2.344456] usb usb1: Manufacturer: Linux 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd
[ 2.344560] usb usb1: SerialNumber: 14110000.usb
[ 2.347100] hub 1-0:1.0: USB hub found
[ 2.347598] hub 1-0:1.0: 2 ports detected
[ 2.351199] ehci-platform 14123000.usb: USB 2.0 started, EHCI 1.00
[ 2.351206] usbcore: registered new interface driver cdc_acm
[ 2.351251] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
[ 2.351648] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 6.18
[ 2.351794] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 2.351918] usb usb2: Product: EHCI Host Controller
[ 2.351999] usb usb2: Manufacturer: Linux 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd
[ 2.352005] usbcore: registered new interface driver uas
[ 2.352094] usb usb2: SerialNumber: 14123000.usb
[ 2.352418] usbcore: registered new interface driver usb-storage
[ 2.352828] usbcore: registered new interface driver pl2303
[ 2.352891] hub 2-0:1.0: USB hub found
[ 2.353110] usbserial: USB Serial support registered for pl2303
[ 2.353190] hub 2-0:1.0: 6 ports detected
[ 2.363145] platform-uhci 14110000.usb: Controller not stopped yet!
[ 2.366436] aspeed_vhub 12060000.usb-vhub: PCIe EHCI to vhub
[ 2.368834] aspeed_vhub 12060000.usb-vhub: Initialized virtual hub in USB2 mode
[ 2.379205] aspeed_vhub 12062000.usb-vhub: PCIe EHCI to vhub
[ 2.380707] aspeed_vhub 12062000.usb-vhub: Initialized virtual hub in USB2 mode
[ 2.392449] aspeed_vhub 14120000.usb-vhub: Initialized virtual hub in USB2 mode
[ 2.396382] aspeed-rtc 12c0f000.rtc: registered as rtc0
[ 2.396904] aspeed-rtc 12c0f000.rtc: setting system clock to 1970-01-01T01:01:01 UTC (3661)
[ 2.397557] i2c_dev: i2c /dev entries driver
[ 2.401063] i2c_ast2600 14c0f100.i2c-bus: i2c-bus [0]: adapter [100 KHz] mode [2] version [1]
[ 2.401971] i2c_ast2600 14c0f200.i2c-bus: i2c-bus [1]: adapter [100 KHz] mode [2] version [1]
[ 2.402763] i2c_ast2600 14c0f300.i2c-bus: i2c-bus [2]: adapter [100 KHz] mode [2] version [1]
[ 2.403689] i2c_ast2600 14c0f400.i2c-bus: i2c-bus [3]: adapter [100 KHz] mode [2] version [1]
[ 2.404448] i2c_ast2600 14c0f500.i2c-bus: i2c-bus [4]: adapter [100 KHz] mode [2] version [1]
[ 2.405292] i2c_ast2600 14c0f600.i2c-bus: i2c-bus [5]: adapter [100 KHz] mode [2] version [1]
[ 2.406064] i2c_ast2600 14c0f700.i2c-bus: i2c-bus [6]: adapter [100 KHz] mode [2] version [1]
[ 2.406787] i2c_ast2600 14c0f800.i2c-bus: i2c-bus [7]: adapter [100 KHz] mode [2] version [1]
[ 2.407562] i2c_ast2600 14c0f900.i2c-bus: i2c-bus [8]: adapter [100 KHz] mode [2] version [1]
[ 2.408366] i2c_ast2600 14c0fc00.i2c-bus: i2c-bus [11]: adapter [100 KHz] mode [2] version [1]
[ 2.409112] i2c_ast2600 14c0fd00.i2c-bus: i2c-bus [12]: adapter [100 KHz] mode [2] version [1]
[ 2.409807] i2c_ast2600 14c0fe00.i2c-bus: i2c-bus [13]: adapter [100 KHz] mode [2] version [1]
[ 2.410928] 14c20000.i3c0: MIPI I3C HCI v0.0 r00
[ 2.411100] 14c20000.i3c0: unsupported HCI version
[ 2.411231] mipi-i3c-hci 14c20000.i3c0: probe with driver mipi-i3c-hci failed with error -93
[ 2.411493] 14c21000.i3c1: MIPI I3C HCI v0.0 r00
[ 2.411571] 14c21000.i3c1: unsupported HCI version
[ 2.411636] mipi-i3c-hci 14c21000.i3c1: probe with driver mipi-i3c-hci failed with error -93
[ 2.411863] 14c22000.i3c2: MIPI I3C HCI v0.0 r00
[ 2.411934] 14c22000.i3c2: unsupported HCI version
[ 2.411999] mipi-i3c-hci 14c22000.i3c2: probe with driver mipi-i3c-hci failed with error -93
[ 2.412217] 14c23000.i3c3: MIPI I3C HCI v0.0 r00
[ 2.412290] 14c23000.i3c3: unsupported HCI version
[ 2.412355] mipi-i3c-hci 14c23000.i3c3: probe with driver mipi-i3c-hci failed with error -93
[ 2.412574] 14c24000.i3c4: MIPI I3C HCI v0.0 r00
[ 2.412644] 14c24000.i3c4: unsupported HCI version
[ 2.412710] mipi-i3c-hci 14c24000.i3c4: probe with driver mipi-i3c-hci failed with error -93
[ 2.412927] 14c25000.i3c5: MIPI I3C HCI v0.0 r00
[ 2.412997] 14c25000.i3c5: unsupported HCI version
[ 2.413062] mipi-i3c-hci 14c25000.i3c5: probe with driver mipi-i3c-hci failed with error -93
[ 2.413280] 14c26000.i3c6: MIPI I3C HCI v0.0 r00
[ 2.413350] 14c26000.i3c6: unsupported HCI version
[ 2.413414] mipi-i3c-hci 14c26000.i3c6: probe with driver mipi-i3c-hci failed with error -93
[ 2.413659] 14c27000.i3c7: MIPI I3C HCI v0.0 r00
[ 2.413734] 14c27000.i3c7: unsupported HCI version
[ 2.413798] mipi-i3c-hci 14c27000.i3c7: probe with driver mipi-i3c-hci failed with error -93
[ 2.414017] 14c28000.i3c8: MIPI I3C HCI v0.0 r00
[ 2.414087] 14c28000.i3c8: unsupported HCI version
[ 2.414153] mipi-i3c-hci 14c28000.i3c8: probe with driver mipi-i3c-hci failed with error -93
[ 2.414371] 14c29000.i3c9: MIPI I3C HCI v0.0 r00
[ 2.414442] 14c29000.i3c9: unsupported HCI version
[ 2.414506] mipi-i3c-hci 14c29000.i3c9: probe with driver mipi-i3c-hci failed with error -93
[ 2.414742] 14c2a000.i3c10: MIPI I3C HCI v0.0 r00
[ 2.414817] 14c2a000.i3c10: unsupported HCI version
[ 2.414884] mipi-i3c-hci 14c2a000.i3c10: probe with driver mipi-i3c-hci failed with error -93
[ 2.415160] 14c2b000.i3c11: MIPI I3C HCI v0.0 r00
[ 2.415243] 14c2b000.i3c11: unsupported HCI version
[ 2.415310] mipi-i3c-hci 14c2b000.i3c11: probe with driver mipi-i3c-hci failed with error -93
[ 2.415542] 14c2c000.i3c12: MIPI I3C HCI v0.0 r00
[ 2.415613] 14c2c000.i3c12: unsupported HCI version
[ 2.415679] mipi-i3c-hci 14c2c000.i3c12: probe with driver mipi-i3c-hci failed with error -93
[ 2.415900] 14c2d000.i3c13: MIPI I3C HCI v0.0 r00
[ 2.415973] 14c2d000.i3c13: unsupported HCI version
[ 2.416041] mipi-i3c-hci 14c2d000.i3c13: probe with driver mipi-i3c-hci failed with error -93
[ 2.416267] 14c2e000.i3c14: MIPI I3C HCI v0.0 r00
[ 2.416340] 14c2e000.i3c14: unsupported HCI version
[ 2.416405] mipi-i3c-hci 14c2e000.i3c14: probe with driver mipi-i3c-hci failed with error -93
[ 2.416647] 14c2f000.i3c15: MIPI I3C HCI v0.0 r00
[ 2.416725] 14c2f000.i3c15: unsupported HCI version
[ 2.416790] mipi-i3c-hci 14c2f000.i3c15: probe with driver mipi-i3c-hci failed with error -93
[ 2.418547] aspeed-video 120a0000.video: irq 106
[ 2.418735] aspeed-video 120a0000.video: dvi mode-detection irq 107
[ 2.418985] aspeed-video 120a0000.video: assigned reserved memory node video0
[ 2.432446] aspeed-video 120a0000.video: alloc mem size(18493440) at 0x000000047de00000 for pool
[ 2.435819] aspeed-video 120a0000.video: aspeed-video0 registered as /dev/video0
[ 2.436890] aspeed-video 120a1000.video: irq 108
[ 2.437029] aspeed-video 120a1000.video: assigned reserved memory node video1
[ 2.449658] aspeed-video 120a1000.video: alloc mem size(18493440) at 0x000000047ac00000 for pool
[ 2.450250] aspeed-video 120a1000.video: aspeed-video1 registered as /dev/video1
[ 2.458433] sdhci: Secure Digital Host Controller Interface driver
[ 2.458547] sdhci: Copyright(c) Pierre Ossman
[ 2.458614] sdhci-pltfm: SDHCI platform and OF driver helper
[ 2.461200] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[ 2.462065] sdhci-aspeed 12090100.sdhci: Configured for slot 0
[ 2.463137] aspeed_crypto 12070000.crypto: will run requests pump with realtime priority
[ 2.466408] aspeed_crypto 12070000.crypto: will run requests pump with realtime priority
[ 2.467319] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable to find vdd-hba-supply regulator, assuming enabled
[ 2.467557] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable to find vcc-supply regulator, assuming enabled
[ 2.467743] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable to find vccq-supply regulator, assuming enabled
[ 2.468017] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable to find vccq2-supply regulator, assuming enabled
[ 2.468196] aspeed_crypto 12070000.crypto: cannot find sbc node
[ 2.468648] aspeed_crypto 12070000.crypto: Aspeed Crypto Accelerator successfully registered
[ 2.469278] aspeed-ufshcd 12c08200.ufshc: Command Descriptor Memory allocation failed
[ 2.469443] aspeed-ufshcd 12c08200.ufshc: Memory allocation failed
[ 2.469825] aspeed-ufshcd 12c08200.ufshc: ufshcd_pltfrm_init() failed -12
[ 2.469962] aspeed-ufshcd 12c08200.ufshc: probe with driver aspeed-ufshcd failed with error -12
[ 2.470412] aspeed_rsss 12080000.crypto: will run requests pump with realtime priority
[ 2.471110] aspeed_rsss 12080000.crypto: RSA init failed
[ 2.471245] aspeed_rsss 12080000.crypto: probe with driver aspeed_rsss failed with error -5
[ 2.472595] aspeed_ecdsa 12c1e000.crypto: probe with driver aspeed_ecdsa failed with error -5
[ 2.473678] usbcore: registered new interface driver usbhid
[ 2.473827] usbhid: USB HID core driver
[ 2.485896] hw perfevents: enabled with armv8_cortex_a35 PMU driver, 7 (0,8000003f) counters available
[ 2.487770] optee: probing for conduit method.
I/TC: Reserved shared memory is disabled
I/TC: Dynamic shared memory is enabled
I/TC: Normal World virtualization support is disabled
I/TC: Asynchronous notifications are disabled
[ 2.488394] optee: revision 4.4 (8f645256efc0dc66)
[ 2.489279] watchdog: NMI not fully supported
[ 2.489417] watchdog: Hard watchdog permanently disabled
[ 2.490296] optee: dynamic shared memory is enabled
[ 2.496286] optee: initialized driver
[ 2.499251] mmc0: SDHCI controller on 12090100.sdhci [12090100.sdhci] using ADMA 64-bit
[ 2.499601] pktgen: Packet Generator for packet performance testing. Version: 2.75
[ 2.502051] NET: Registered PF_INET6 protocol family
[ 2.508037] Segment Routing with IPv6
[ 2.508286] In-situ OAM (IOAM) with IPv6
[ 2.508812] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[ 2.510670] NET: Registered PF_PACKET protocol family
[ 2.511122] can: controller area network core
[ 2.511471] NET: Registered PF_CAN protocol family
[ 2.511597] can: raw protocol
[ 2.511791] can: broadcast manager protocol
[ 2.512029] can: netlink gateway - max_hops=1
[ 2.512210] 8021q: 802.1Q VLAN Support v1.8
[ 2.520069] registered taskstats version 1
[ 2.521401] Loading compiled-in X.509 certificates
[ 2.531388] Demotion targets for Node 0: null
[ 2.532261] Key type .fscrypt registered
[ 2.532350] Key type fscrypt-provisioning registered
[ 2.564198] mmc0: Failed to initialize a non-removable card
[ 2.573543] alg: skcipher: aspeed-ctr-des encryption test failed (wrong result) on test vector 0, cfg="in-place (one sglist)"
[ 2.573863] alg: self-tests for ctr(des) using aspeed-ctr-des failed (rc=-22)
[ 2.573938] ------------[ cut here ]------------
[ 2.574155] alg: self-tests for ctr(des) using aspeed-ctr-des failed (rc=-22)
[ 2.574401] WARNING: CPU: 3 PID: 116 at /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
[ 2.574972] Modules linked in:
[ 2.575579] CPU: 3 UID: 0 PID: 116 Comm: cryptomgr_test Not tainted 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
[ 2.575776] Hardware name: AST2700 EVB (DT)
[ 2.575979] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 2.576125] pc : alg_test+0x490/0x5bc
[ 2.576215] lr : alg_test+0x490/0x5bc
[ 2.576286] sp : ffff800081f7bd50
[ 2.576358] x29: ffff800081f7bdf0 x28: 0000000000000004 x27: ffff800080eaa568
[ 2.576584] x26: 0000000000000000 x25: 00000000ffffffff x24: 0000000000000004
[ 2.576809] x23: ffff0000065d1680 x22: 0000000000001085 x21: ffff0000065d1600
[ 2.576981] x20: 00000000ffffffea x19: ffff800080eaa568 x18: 000000000000000a
[ 2.577104] x17: 32322d3d63722820 x16: 64656c6961662073 x15: 0000000000000000
[ 2.577223] x14: 0000000000000000 x13: 00000000ffff0a01 x12: 00000000ffffffea
[ 2.577345] x11: ffff800081f7bab8 x10: 00000000ffffefff x9 : ffff8000815ae3c8
[ 2.577486] x8 : ffff8000815ae420 x7 : 0000000000017fe8 x6 : c0000000ffffefff
[ 2.577609] x5 : 0000000000057fa8 x4 : 0000000000000000 x3 : 0000000000000000
[ 2.577744] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff000006de2400
[ 2.578021] Call trace:
[ 2.578164] alg_test+0x490/0x5bc (P)
[ 2.578302] cryptomgr_test+0x24/0x44
[ 2.578384] kthread+0x140/0x220
[ 2.578455] ret_from_fork+0x10/0x20
[ 2.578604] ---[ end trace 0000000000000000 ]---
[ 2.579215] alg: skcipher: aspeed-ctr-tdes encryption test failed (wrong result) on test vector 0, cfg="in-place (one sglist)"
[ 2.579437] alg: self-tests for ctr(des3_ede) using aspeed-ctr-tdes failed (rc=-22)
[ 2.579445] ------------[ cut here ]------------
[ 2.579673] alg: self-tests for ctr(des3_ede) using aspeed-ctr-tdes failed (rc=-22)
[ 2.580184] WARNING: CPU: 0 PID: 115 at /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
[ 2.580525] Modules linked in:
[ 2.580726] CPU: 0 UID: 0 PID: 115 Comm: cryptomgr_test Tainted: G W 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
[ 2.580940] Tainted: [W]=WARN
[ 2.580992] Hardware name: AST2700 EVB (DT)
[ 2.581058] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 2.581196] pc : alg_test+0x490/0x5bc
[ 2.581261] lr : alg_test+0x490/0x5bc
[ 2.581335] sp : ffff800081f73d50
[ 2.581392] x29: ffff800081f73df0 x28: 0000000000000004 x27: ffff800080eaa568
[ 2.581529] x26: 0000000000000000 x25: 00000000ffffffff x24: 0000000000000004
[ 2.581655] x23: ffff0000065d1880 x22: 0000000000001085 x21: ffff0000065d1800
[ 2.581781] x20: 00000000ffffffea x19: ffff800080eaa568 x18: 0000000000000000
[ 2.581904] x17: 0000000000000000 x16: 00000000e820414d x15: ffff000006de1290
[ 2.582027] x14: 00000000000002e0 x13: 0000000000000001 x12: 0000000000000001
[ 2.582149] x11: 00000000000000c0 x10: 0000000000000b50 x9 : ffff800081f73bc0
[ 2.582281] x8 : ffff000006de1db0 x7 : 0000000000000001 x6 : 0000000000007a4f
[ 2.582408] x5 : ffff0000054541e0 x4 : ffff000006de1200 x3 : ffff000006de5a00
[ 2.582538] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff000006de1200
[ 2.582670] Call trace:
[ 2.582715] alg_test+0x490/0x5bc (P)
[ 2.582782] cryptomgr_test+0x24/0x44
[ 2.582856] kthread+0x140/0x220
[ 2.582921] ret_from_fork+0x10/0x20
[ 2.582989] ---[ end trace 0000000000000000 ]---
[ 2.620920] alg: skcipher: aspeed-ctr-aes encryption test failed (wrong result) on test vector 0, cfg="in-place (one sglist)"
[ 2.621176] alg: self-tests for ctr(aes) using aspeed-ctr-aes failed (rc=-22)
[ 2.621185] ------------[ cut here ]------------
[ 2.621384] alg: self-tests for ctr(aes) using aspeed-ctr-aes failed (rc=-22)
[ 2.621420] WARNING: CPU: 0 PID: 117 at /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
[ 2.621673] Modules linked in:
[ 2.621738] CPU: 0 UID: 0 PID: 117 Comm: cryptomgr_test Tainted: G W 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
[ 2.621925] Tainted: [W]=WARN
[ 2.621975] Hardware name: AST2700 EVB (DT)
[ 2.622044] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 2.622153] pc : alg_test+0x490/0x5bc
[ 2.622218] lr : alg_test+0x490/0x5bc
[ 2.622283] sp : ffff800081f83d50
[ 2.622337] x29: ffff800081f83df0 x28: 0000000000000004 x27: ffff800080eaa568
[ 2.622458] x26: 0000000000000000 x25: 00000000ffffffff x24: 0000000000000004
[ 2.622578] x23: ffff0000065d0e80 x22: 0000000000001085 x21: ffff0000065d0e00
[ 2.622694] x20: 00000000ffffffea x19: ffff800080eaa568 x18: 000000000000000a
[ 2.622811] x17: 32322d3d63722820 x16: 64656c6961662073 x15: 0000000000000000
[ 2.622931] x14: 0000000000000000 x13: 00000000ffff0a01 x12: 00000000ffffffea
[ 2.623061] x11: ffff800081f83ab8 x10: 00000000ffffefff x9 : ffff8000815ae3c8
[ 2.623200] x8 : ffff8000815ae420 x7 : 0000000000017fe8 x6 : c0000000ffffefff
[ 2.623325] x5 : 0000000000057fa8 x4 : 0000000000000000 x3 : 0000000000000000
[ 2.623447] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff000006de3600
[ 2.623570] Call trace:
[ 2.623625] alg_test+0x490/0x5bc (P)
[ 2.623690] cryptomgr_test+0x24/0x44
[ 2.623752] kthread+0x140/0x220
[ 2.623810] ret_from_fork+0x10/0x20
[ 2.623875] ---[ end trace 0000000000000000 ]---
[ 2.653308] aspeed_mbox_client 431880000.mbox-bootmcu-1: TX shmem: phys 0x0x0000000431880000 size 1048576
[ 2.653484] aspeed_mbox_client 431880000.mbox-bootmcu-1: RX shmem: phys 0x0x0000000431980000 size 1048576
[ 2.653616] aspeed_mbox_client 431880000.mbox-bootmcu-1: TX timeout: 10000 ms
^ permalink raw reply [flat|nested] 27+ messages in thread* RE: [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround
2026-07-20 5:51 ` Cédric Le Goater
@ 2026-07-20 5:57 ` Jamin Lin
2026-07-20 6:29 ` Cédric Le Goater
0 siblings, 1 reply; 27+ messages in thread
From: Jamin Lin @ 2026-07-20 5:57 UTC (permalink / raw)
To: Cédric Le Goater, Daniel P. Berrangé, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Troy Lee
Hi Cédric
The GNUTLS backend currently does not support CTR mode. Could you please try using either the GCRYPT or NETTLE backend instead?
I mentioned this issue in the cover letter here:
https://patchwork.kernel.org/project/qemu-devel/cover/20260715033311.1648424-1-jamin_lin@aspeedtech.com/
Note: The GNUTLS crypto backend does not support CTR mode.
If we decide to support CTR mode with the GNUTLS backend, I'll need to investigate whether the underlying GnuTLS library itself supports CTR mode.
If it does, I'll prepare another patch series to add CTR mode support to the GNUTLS backend.
The relevant code is here:
https://github.com/qemu/qemu/blob/master/crypto/cipher-gnutls.c.inc#L26
Thanks,
Jamin
> From: Cédric Le Goater <clg@kaod.org>
> Sent: Monday, July 20, 2026 1:51 PM
> To: Jamin Lin <jamin_lin@aspeedtech.com>; Daniel P. Berrangé
> <berrange@redhat.com>; Peter Maydell <peter.maydell@linaro.org>; Steven
> Lee <steven_lee@aspeedtech.com>; Troy Lee <leetroy@gmail.com>; Kane
> Chen <kane_chen@aspeedtech.com>; Andrew Jeffery
> <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; Eric Blake
> <eblake@redhat.com>; Markus Armbruster <armbru@redhat.com>; Fabiano
> Rosas <farosas@suse.de>; Laurent Vivier <lvivier@redhat.com>; Paolo Bonzini
> <pbonzini@redhat.com>; open list:All patches CC here
> <qemu-devel@nongnu.org>; open list:ASPEED BMCs
> <qemu-arm@nongnu.org>
> Cc: Troy Lee <troy_lee@aspeedtech.com>
> Subject: Re: [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700:
> Drop the AST2700 crypto self-test workaround
>
> On 7/15/26 05:33, Jamin Lin wrote:
> > The AST2700 boot tests appended 'cryptomgr.notests=1' to the kernel
> > command line to skip the Linux crypto manager self-tests.
> >
> > Now that the HACE crypto engine emulates the crypto command, the
> > self-tests pass, so drop the workaround and let them run. This also
> > exercises the HACE crypto emulation during the functional boot tests.
> >
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > ---
> > tests/functional/aarch64/test_aspeed_ast2700a1.py | 5 -----
> > tests/functional/aarch64/test_aspeed_ast2700a2.py | 5 -----
> > tests/functional/aarch64/test_aspeed_ast2700fc.py | 5 -----
> > 3 files changed, 15 deletions(-)
> >
> > diff --git a/tests/functional/aarch64/test_aspeed_ast2700a1.py
> > b/tests/functional/aarch64/test_aspeed_ast2700a1.py
> > index b0c08854da..bc535449b5 100755
> > --- a/tests/functional/aarch64/test_aspeed_ast2700a1.py
> > +++ b/tests/functional/aarch64/test_aspeed_ast2700a1.py
> > @@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
> > wait_for_console_pattern(self, 'pass')
> > wait_for_console_pattern(self, 'Jumping to BL31 (Trusted
> > Firmware-A)')
> >
> > - def disable_kernel_crypto_selftest(self):
> > - exec_command_and_wait_for_pattern(self,
> > - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> > -
> > def enable_ast2700_pcie2(self):
> > exec_command_and_wait_for_pattern(self,
> > 'cp 100420000 403000000 900000', '=>') @@ -71,7 +67,6
> @@
> > def verify_openbmc_boot_start(self, enable_pcie=True):
> > wait_for_console_pattern(self, 'U-Boot 2023.10')
> > wait_for_console_pattern(self, 'Hit any key to stop autoboot')
> > exec_command_and_wait_for_pattern(self, '\012', '=>')
> > - self.disable_kernel_crypto_selftest()
> > if enable_pcie:
> > self.enable_ast2700_pcie2()
> > else:
> > diff --git a/tests/functional/aarch64/test_aspeed_ast2700a2.py
> > b/tests/functional/aarch64/test_aspeed_ast2700a2.py
> > index ed414999f4..5aea0a9dd0 100755
> > --- a/tests/functional/aarch64/test_aspeed_ast2700a2.py
> > +++ b/tests/functional/aarch64/test_aspeed_ast2700a2.py
> > @@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
> > wait_for_console_pattern(self, 'pass')
> > wait_for_console_pattern(self, 'Jumping to BL31 (Trusted
> > Firmware-A)')
> >
> > - def disable_kernel_crypto_selftest(self):
> > - exec_command_and_wait_for_pattern(self,
> > - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> > -
> > def enable_ast2700_pcie2(self):
> > exec_command_and_wait_for_pattern(self,
> > 'cp 100420000 403000000 900000', '=>') @@ -71,7 +67,6
> @@
> > def verify_openbmc_boot_start(self, enable_pcie=True):
> > wait_for_console_pattern(self, 'U-Boot 2023.10')
> > wait_for_console_pattern(self, 'Hit any key to stop autoboot')
> > exec_command_and_wait_for_pattern(self, '\012', '=>')
> > - self.disable_kernel_crypto_selftest()
> > if enable_pcie:
> > self.enable_ast2700_pcie2()
> > else:
> > diff --git a/tests/functional/aarch64/test_aspeed_ast2700fc.py
> > b/tests/functional/aarch64/test_aspeed_ast2700fc.py
> > index df889134ed..1648fa9dba 100755
> > --- a/tests/functional/aarch64/test_aspeed_ast2700fc.py
> > +++ b/tests/functional/aarch64/test_aspeed_ast2700fc.py
> > @@ -27,10 +27,6 @@ def do_test_aarch64_aspeed_sdk_start(self, image):
> >
> > self.vm.launch()
> >
> > - def disable_kernel_crypto_selftest(self):
> > - exec_command_and_wait_for_pattern(self,
> > - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> > -
> > def enable_ast2700_pcie2(self):
> > exec_command_and_wait_for_pattern(self,
> > 'cp 100420000 403000000 900000', '=>') @@ -47,7 +43,6
> @@
> > def verify_openbmc_boot_and_login(self, name):
> > wait_for_console_pattern(self, 'U-Boot 2023.10')
> > wait_for_console_pattern(self, 'Hit any key to stop autoboot')
> > exec_command_and_wait_for_pattern(self, '\012', '=>')
> > - self.disable_kernel_crypto_selftest()
> > self.enable_ast2700_pcie2()
> > wait_for_console_pattern(self, 'Starting kernel ...')
> >
>
>
> There are still crypto tests errors. See below. Is it expected ?
>
> Thanks,
>
> C.
>
>
> [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd040]
> [ 0.000000] Linux version 6.18.3-v00.08.01-g172b7e27a30d
> (oe-user@oe-host) (aarch64-openbmc-linux-gcc (GCC) 15.1.0, GNU ld (GNU
> Binutils) 2.44.0.20250429) #1 SMP PREEMPT Wed Feb 18 09:06:34 CST 2026
> [ 0.000000] KASLR disabled due to lack of seed
> [ 0.000000] Machine model: AST2700 EVB
> [ 0.000000] Malformed early option 'earlycon'
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x000000047ff00000, size 1 MiB
> [ 0.000000] OF: reserved mem: initialized node xdma0, compatible id
> shared-dma-pool
> [ 0.000000] OF: reserved mem: 0x000000047ff00000..0x000000047fffffff
> (1024 KiB) nomap non-reusable xdma0
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x000000047fe00000, size 1 MiB
> [ 0.000000] OF: reserved mem: initialized node xdma1, compatible id
> shared-dma-pool
> [ 0.000000] OF: reserved mem: 0x000000047fe00000..0x000000047fefffff
> (1024 KiB) nomap non-reusable xdma1
> [ 0.000000] Reserved memory: created CMA memory pool at
> 0x000000047de00000, size 32 MiB
> [ 0.000000] OF: reserved mem: initialized node video0, compatible id
> shared-dma-pool
> [ 0.000000] OF: reserved mem: 0x000000047de00000..0x000000047fdfffff
> (32768 KiB) map reusable video0
> [ 0.000000] Reserved memory: created CMA memory pool at
> 0x000000047ac00000, size 32 MiB
> [ 0.000000] OF: reserved mem: initialized node video1, compatible id
> shared-dma-pool
> [ 0.000000] OF: reserved mem: 0x000000047ac00000..0x000000047cbfffff
> (32768 KiB) map reusable video1
> [ 0.000000] Reserved memory: created CMA memory pool at
> 0x000000047ce00000, size 16 MiB
> [ 0.000000] OF: reserved mem: initialized node mcyc0, compatible id
> shared-dma-pool
> [ 0.000000] OF: reserved mem: 0x000000047ce00000..0x000000047ddfffff
> (16384 KiB) map reusable mcyc0
> [ 0.000000] OF: reserved mem:
> 0x0000000430000000..0x000000043007ffff (512 KiB) nomap non-reusable
> trusted-firmware-a@430000000
> [ 0.000000] OF: reserved mem:
> 0x0000000430080000..0x000000043107ffff (16384 KiB) nomap non-reusable
> optee-core@430080000
> [ 0.000000] OF: reserved mem: 0x0000000428000000..0x000000042bffffff
> (65536 KiB) nomap non-reusable eadf0-memory@428000000
> [ 0.000000] OF: reserved mem: 0x0000000424000000..0x0000000427ffffff
> (65536 KiB) nomap non-reusable espi0-mmbi-memory@424000000
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x0000000423800000, size 1 MiB
> [ 0.000000] OF: reserved mem: initialized node
> bmc-dev0-memory@423800000, compatible id shared-dma-pool
> [ 0.000000] OF: reserved mem: 0x0000000423800000..0x00000004238fffff
> (1024 KiB) nomap non-reusable bmc-dev0-memory@423800000
> [ 0.000000] OF: reserved mem: 0x0000000423a00000..0x0000000423bfffff
> (2048 KiB) nomap non-reusable pcie0-mmbi0-memory@423a00000
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x0000000423900000, size 1 MiB
> [ 0.000000] OF: reserved mem: initialized node
> bmc-dev1-memory@423900000, compatible id shared-dma-pool
> [ 0.000000] OF: reserved mem: 0x0000000423900000..0x00000004239fffff
> (1024 KiB) nomap non-reusable bmc-dev1-memory@423900000
> [ 0.000000] OF: reserved mem: 0x0000000423c00000..0x0000000423dfffff
> (2048 KiB) nomap non-reusable pcie1-mmbi4-memory@423c00000
> [ 0.000000] OF: reserved mem: 0x0000000423e00000..0x0000000423ffffff
> (2048 KiB) nomap non-reusable pcie2-mmbi0-memory@423e00000
> [ 0.000000] OF: reserved mem: 0x000000042c000000..0x000000042dffffff
> (32768 KiB) nomap non-reusable ssp-memory@42c000000
> [ 0.000000] OF: reserved mem: 0x000000042e000000..0x000000042fffffff
> (32768 KiB) nomap non-reusable tsp-memory@42e000000
> [ 0.000000] OF: reserved mem:
> 0x0000000431080000..0x000000043187ffff (8192 KiB) nomap non-reusable
> ipc-ssp-share@431080000
> [ 0.000000] OF: reserved mem:
> 0x0000000431880000..0x0000000431b2ffff (2752 KiB) nomap non-reusable
> ipc-bootmcu-share@431880000
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x0000000431b30000, size 0 MiB
> [ 0.000000] OF: reserved mem: initialized node
> uhci0-reserved@431b30000, compatible id shared-dma-pool
> [ 0.000000] OF: reserved mem:
> 0x0000000431b30000..0x0000000431b6ffff (256 KiB) nomap non-reusable
> uhci0-reserved@431b30000
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x0000000431b70000, size 0 MiB
> [ 0.000000] OF: reserved mem: initialized node
> uhci1-reserved@431b70000, compatible id shared-dma-pool
> [ 0.000000] OF: reserved mem:
> 0x0000000431b70000..0x0000000431baffff (256 KiB) nomap non-reusable
> uhci1-reserved@431b70000
> [ 0.000000] OF: reserved mem:
> 0x0000000431bb0000..0x0000000431bbffff (64 KiB) nomap non-reusable
> vbios-base0@431bb0000
> [ 0.000000] OF: reserved mem:
> 0x0000000431bc0000..0x0000000431bcffff (64 KiB) nomap non-reusable
> vbios-base1@431bc0000
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x0000000431bd0000, size 0 MiB
> [ 0.000000] OF: reserved mem: initialized node
> mctp0-reserved@431bd0000, compatible id shared-dma-pool
> [ 0.000000] OF: reserved mem:
> 0x0000000431bd0000..0x0000000431bdffff (64 KiB) nomap non-reusable
> mctp0-reserved@431bd0000
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x0000000431be0000, size 0 MiB
> [ 0.000000] OF: reserved mem: initialized node
> mctp1-reserved@431be0000, compatible id shared-dma-pool
> [ 0.000000] OF: reserved mem:
> 0x0000000431be0000..0x0000000431beffff (64 KiB) nomap non-reusable
> mctp1-reserved@431be0000
> [ 0.000000] Reserved memory: created DMA memory pool at
> 0x0000000431bf0000, size 0 MiB
> [ 0.000000] OF: reserved mem: initialized node
> mctp2-reserved@431bf0000, compatible id shared-dma-pool
> [ 0.000000] OF: reserved mem: 0x0000000431bf0000..0x0000000431bfffff
> (64 KiB) nomap non-reusable mctp2-reserved@431bf0000
> [ 0.000000] NUMA: Faking a node at [mem
> 0x0000000400000000-0x000000047fffffff]
> [ 0.000000] NODE_DATA(0) allocated [mem 0x47a892d40-0x47a89533f]
> [ 0.000000] Zone ranges:
> [ 0.000000] DMA [mem
> 0x0000000400000000-0x000000047fffffff]
> [ 0.000000] DMA32 empty
> [ 0.000000] Normal empty
> [ 0.000000] Movable zone start for each node
> [ 0.000000] Early memory node ranges
> [ 0.000000] node 0: [mem
> 0x0000000400000000-0x00000004237fffff]
> [ 0.000000] node 0: [mem
> 0x0000000423800000-0x0000000431bfffff]
> [ 0.000000] node 0: [mem
> 0x0000000431c00000-0x000000047fdfffff]
> [ 0.000000] node 0: [mem 0x000000047fe00000-0x000000047fffffff]
> [ 0.000000] Initmem setup node 0 [mem
> 0x0000000400000000-0x000000047fffffff]
> [ 0.000000] cma: Reserved 32 MiB at 0x0000000401800000
> [ 0.000000] psci: probing for conduit method from DT.
> [ 0.000000] psci: PSCIv1.1 detected in firmware.
> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
> [ 0.000000] psci: Trusted OS migration not required
> [ 0.000000] psci: SMC Calling Convention v1.5
> [ 0.000000] percpu: Embedded 31 pages/cpu s88216 r8192 d30568
> u126976
> [ 0.000000] Detected VIPT I-cache on CPU0
> [ 0.000000] CPU features: detected: GICv3 CPU interface
> [ 0.000000] alternatives: applying boot alternatives
> [ 0.000000] Kernel command line: console=ttyS12,115200n8
> root=/dev/ram rw earlycon
> [ 0.000000] printk: log buffer data + meta data: 131072 + 458752 =
> 589824 bytes
> [ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152
> bytes, linear)
> [ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576
> bytes, linear)
> [ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 2MB
> [ 0.000000] software IO TLB: area num 4.
> [ 0.000000] software IO TLB: mapped [mem
> 0x0000000478300000-0x0000000478500000] (2MB)
> [ 0.000000] Fallback order for Node 0: 0
> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 524288
> [ 0.000000] Policy zone: DMA
> [ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4,
> Nodes=1
> [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
> [ 0.000000] rcu: RCU event tracing is enabled.
> [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to
> nr_cpu_ids=4.
> [ 0.000000] Trampoline variant of Tasks RCU enabled.
> [ 0.000000] Tracing variant of Tasks RCU enabled.
> [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25
> jiffies.
> [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
> [ 0.000000] RCU Tasks: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1
> rcu_task_cpu_ids=4.
> [ 0.000000] RCU Tasks Trace: Setting shift to 2 and lim to 1
> rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
> [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
> [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
> [ 0.000000] GICv3: 256 SPIs implemented
> [ 0.000000] GICv3: 0 Extended SPIs implemented
> [ 0.000000] Root IRQ handler: gic_handle_irq
> [ 0.000000] GICv3: GICv3 features: 16 PPIs
> [ 0.000000] GICv3: GICD_CTLR.DS=1, SCR_EL3.FIQ=1
> [ 0.000000] GICv3: CPU0: found redistributor 0 region
> 0:0x0000000012280000
> [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
> [ 0.000000] arch_timer: cp15 timer running at 1600.00MHz (phys).
> [ 0.000000] clocksource: arch_sys_counter: mask: 0x1fffffffffffffff
> max_cycles: 0x171024fa93b, max_idle_ns: 440795253189 ns
> [ 0.000037] sched_clock: 61 bits at 1600MHz, resolution 0ns, wraps every
> 4398046511103ns
> [ 0.006379] Console: colour dummy device 80x25
> [ 0.008502] Calibrating delay loop (skipped), value calculated using timer
> frequency.. 3200.00 BogoMIPS (lpj=6400000)
> [ 0.008572] pid_max: default: 32768 minimum: 301
> [ 0.010747] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes,
> linear)
> [ 0.010795] Mountpoint-cache hash table entries: 4096 (order: 3, 32768
> bytes, linear)
> [ 0.037047] rcu: Hierarchical SRCU implementation.
> [ 0.037077] rcu: Max phase no-delay instances is 1000.
> [ 0.038351] Timer migration: 1 hierarchy levels; 8 children per group; 1
> crossnode level
> [ 0.041363] ASPEED AST2700 rev A2 (06020103)
> [ 0.042677] smp: Bringing up secondary CPUs ...
> [ 0.045789] Detected VIPT I-cache on CPU1
> [ 0.046337] GICv3: CPU1: found redistributor 1 region
> 0:0x00000000122a0000
> [ 0.046467] CPU1: Booted secondary processor 0x0000000001
> [0x411fd040]
> [ 0.050519] Detected VIPT I-cache on CPU2
> [ 0.050686] GICv3: CPU2: found redistributor 2 region
> 0:0x00000000122c0000
> [ 0.050765] CPU2: Booted secondary processor 0x0000000002
> [0x411fd040]
> [ 0.052102] Detected VIPT I-cache on CPU3
> [ 0.052264] GICv3: CPU3: found redistributor 3 region
> 0:0x00000000122e0000
> [ 0.052345] CPU3: Booted secondary processor 0x0000000003
> [0x411fd040]
> [ 0.052712] smp: Brought up 1 node, 4 CPUs
> [ 0.052729] SMP: Total of 4 processors activated.
> [ 0.052743] CPU: All CPU(s) started at EL2
> [ 0.052780] CPU features: detected: 32-bit EL0 Support
> [ 0.052821] CPU features: detected: CRC32 instructions
> [ 0.052910] CPU features: detected: PMUv3
> [ 0.059753] alternatives: applying system-wide alternatives
> [ 0.070608] Memory: 1673568K/2097152K available (14592K kernel code,
> 2014K rwdata, 5568K rodata, 1408K init, 524K bss, 303892K reserved, 114688K
> cma-reserved)
> [ 0.088349] devtmpfs: initialized
> [ 0.110897] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff,
> max_idle_ns: 7645041785100000 ns
> [ 0.111263] posixtimers hash table entries: 2048 (order: 3, 32768 bytes,
> linear)
> [ 0.111895] futex hash table entries: 1024 (65536 bytes on 1 NUMA nodes,
> total 64 KiB, linear).
> [ 0.113861] 26688 pages in range for non-PLT usage
> [ 0.114239] 518208 pages in range for PLT usage
> [ 0.115151] pinctrl core: initialized pinctrl subsystem
> [ 0.135658] NET: Registered PF_NETLINK/PF_ROUTE protocol family
> [ 0.144194] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic
> allocations
> [ 0.144873] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for
> atomic allocations
> [ 0.145400] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for
> atomic allocations
> [ 0.145718] audit: initializing netlink subsys (disabled)
> [ 0.147488] audit: type=2000 audit(0.140:1): state=initialized
> audit_enabled=0 res=1
> [ 0.149211] cpuidle: using governor menu
> [ 0.149955] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
> [ 0.150560] ASID allocator initialised with 65536 entries
> [ 0.216875] iommu: Default domain type: Translated
> [ 0.216907] iommu: DMA domain TLB invalidation policy: strict mode
> [ 0.220788] SCSI subsystem initialized
> [ 0.221600] usbcore: registered new interface driver usbfs
> [ 0.221813] usbcore: registered new interface driver hub
> [ 0.221908] usbcore: registered new device driver usb
> [ 0.222221] mc: Linux media interface: v0.10
> [ 0.222262] videodev: Linux video capture interface: v2.00
> [ 0.222358] pps_core: LinuxPPS API ver. 1 registered
> [ 0.222364] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo
> Giometti <giometti@linux.it>
> [ 0.222392] PTP clock support registered
> [ 0.222497] EDAC MC: Ver: 3.0.0
> [ 0.223354] scmi_core: SCMI protocol bus registered
> [ 0.231561] mctp: management component transport protocol core
> [ 0.231573] NET: Registered PF_MCTP protocol family
> [ 0.232784] vgaarb: loaded
> [ 0.235288] clocksource: Switched to clocksource arch_sys_counter
> [ 0.237125] VFS: Disk quotas dquot_6.6.0
> [ 0.237189] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
> [ 0.252368] NET: Registered PF_INET protocol family
> [ 0.253271] IP idents hash table entries: 32768 (order: 6, 262144 bytes,
> linear)
> [ 0.256584] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2,
> 16384 bytes, linear)
> [ 0.256622] Table-perturb hash table entries: 65536 (order: 6, 262144
> bytes, linear)
> [ 0.256661] TCP established hash table entries: 16384 (order: 5, 131072
> bytes, linear)
> [ 0.257174] TCP bind hash table entries: 16384 (order: 7, 524288 bytes,
> linear)
> [ 0.257342] TCP: Hash tables configured (established 16384 bind 16384)
> [ 0.258127] UDP hash table entries: 1024 (order: 4, 65536 bytes, linear)
> [ 0.258261] UDP-Lite hash table entries: 1024 (order: 4, 65536 bytes,
> linear)
> [ 0.258919] NET: Registered PF_UNIX/PF_LOCAL protocol family
> [ 0.259388] PCI: CLS 0 bytes, default 64
> [ 0.262222] Trying to unpack rootfs image as initramfs...
> [ 0.262737] Initialise system trusted keyrings
> [ 0.263942] workingset: timestamp_bits=42 max_order=19
> bucket_order=0
> [ 0.266013] squashfs: version 4.0 (2009/01/31) Phillip Lougher
> [ 0.266194] jffs2: version 2.2. (SUMMARY) © 2001-2006 Red Hat, Inc.
> [ 0.296367] NET: Registered PF_ALG protocol family
> [ 0.296561] Key type asymmetric registered
> [ 0.296676] Asymmetric key parser 'x509' registered
> [ 0.297006] Block layer SCSI generic (bsg) driver version 0.4 loaded (major
> 243)
> [ 0.297097] io scheduler mq-deadline registered
> [ 0.297134] io scheduler kyber registered
> [ 0.297360] io scheduler bfq registered
> [ 0.310863] aspeed_usb_phy3 12010000.usb-phy3: Probed USB PHY3
> [ 0.311709] aspeed_usb_phy3 12020000.usb-phy3: Probed USB PHY3
> [ 0.323247] ledtrig-cpu: registered to indicate activity on CPUs
> [ 0.324971] ipmi-bt-host 12c19140.pcie-ibt: initialised channel 2 at IO
> address 0xe4
> [ 0.325436] ipmi-bt-host 12c19940.pcie-ibt: initialised channel 3 at IO
> address 0xe4
> [ 0.326029] ipmi-bt-host 14c31140.ibt: initialised channel 0 at IO address
> 0xe4
> [ 0.326393] ipmi-bt-host 14c32140.ibt: initialised channel 1 at IO address
> 0xe4
> [ 0.327619] aspeed-kcs-bmc 12c19024.pcie-kcs: Initialised IPMI client for
> channel 8
> [ 0.327656] aspeed-kcs-bmc 12c19024.pcie-kcs: Initialised channel 8 at IO
> address 0x3a0
> [ 0.328103] aspeed-kcs-bmc 12c19028.pcie-kcs: Initialised IPMI client for
> channel 9
> [ 0.328112] aspeed-kcs-bmc 12c19028.pcie-kcs: Initialised channel 9 at IO
> address 0x3a8
> [ 0.328481] aspeed-kcs-bmc 12c1902c.pcie-kcs: Initialised IPMI client for
> channel 10
> [ 0.328490] aspeed-kcs-bmc 12c1902c.pcie-kcs: Initialised channel 10 at
> IO address 0x3a2
> [ 0.328832] aspeed-kcs-bmc 12c19114.pcie-kcs: Initialised IPMI client for
> channel 11
> [ 0.328841] aspeed-kcs-bmc 12c19114.pcie-kcs: Initialised channel 11 at
> IO address 0x3a4
> [ 0.329240] aspeed-kcs-bmc 12c19824.pcie-kcs: Initialised IPMI client for
> channel 12
> [ 0.329248] aspeed-kcs-bmc 12c19824.pcie-kcs: Initialised channel 12 at
> IO address 0x3a0
> [ 0.329852] aspeed-kcs-bmc 12c19828.pcie-kcs: Initialised IPMI client for
> channel 13
> [ 0.329860] aspeed-kcs-bmc 12c19828.pcie-kcs: Initialised channel 13 at
> IO address 0x3a8
> [ 0.330154] aspeed-kcs-bmc 12c1982c.pcie-kcs: Initialised IPMI client for
> channel 14
> [ 0.330162] aspeed-kcs-bmc 12c1982c.pcie-kcs: Initialised channel 14 at
> IO address 0x3a2
> [ 0.330497] aspeed-kcs-bmc 12c19914.pcie-kcs: Initialised IPMI client for
> channel 15
> [ 0.330506] aspeed-kcs-bmc 12c19914.pcie-kcs: Initialised channel 15 at
> IO address 0x3a4
> [ 0.331245] aspeed-kcs-bmc 14c31024.lpc-kcs: Initialised IPMI client for
> channel 0
> [ 0.331256] aspeed-kcs-bmc 14c31024.lpc-kcs: Initialised channel 0 at IO
> address 0xca0
> [ 0.331599] aspeed-kcs-bmc 14c31028.lpc-kcs: Initialised IPMI client for
> channel 1
> [ 0.331608] aspeed-kcs-bmc 14c31028.lpc-kcs: Initialised channel 1 at IO
> address 0xca8
> [ 0.332047] aspeed-kcs-bmc 14c3102c.lpc-kcs: Initialised IPMI client for
> channel 2
> [ 0.332058] aspeed-kcs-bmc 14c3102c.lpc-kcs: Initialised channel 2 at IO
> address 0xca2
> [ 0.332393] aspeed-kcs-bmc 14c31114.lpc-kcs: Initialised IPMI client for
> channel 3
> [ 0.332402] aspeed-kcs-bmc 14c31114.lpc-kcs: Initialised channel 3 at IO
> address 0xca4
> [ 0.332793] aspeed-kcs-bmc 14c32024.kcs: Initialised IPMI client for
> channel 4
> [ 0.332801] aspeed-kcs-bmc 14c32024.kcs: Initialised channel 4 at IO
> address 0xca0
> [ 0.333107] aspeed-kcs-bmc 14c32028.kcs: Initialised IPMI client for
> channel 5
> [ 0.333115] aspeed-kcs-bmc 14c32028.kcs: Initialised channel 5 at IO
> address 0xca8
> [ 0.333408] aspeed-kcs-bmc 14c3202c.kcs: Initialised IPMI client for
> channel 6
> [ 0.333425] aspeed-kcs-bmc 14c3202c.kcs: Initialised channel 6 at IO
> address 0xca2
> [ 0.333731] aspeed-kcs-bmc 14c32114.kcs: Initialised IPMI client for
> channel 7
> [ 0.333739] aspeed-kcs-bmc 14c32114.kcs: Initialised channel 7 at IO
> address 0xca4
> [ 0.335242] aspeed_bmc_dev 12110000.bmc-dev: reserved memory is
> beyond device's set DMA address range
> [ 0.335287] aspeed_bmc_dev 12110000.bmc-dev: assigned reserved
> memory node bmc-dev0-memory@423800000
> [ 0.336909] aspeed_bmc_dev 12110000.bmc-dev: aspeed bmc device:
> driver successfully loaded.
> [ 0.337060] aspeed_bmc_dev 12120000.bmc-dev: reserved memory is
> beyond device's set DMA address range
> [ 0.337068] aspeed_bmc_dev 12120000.bmc-dev: assigned reserved
> memory node bmc-dev1-memory@423900000
> [ 0.337826] aspeed_bmc_dev 12120000.bmc-dev: aspeed bmc device:
> driver successfully loaded.
> [ 0.343471] aspeed-uart-routing 14c31098.uart-routing: module loaded
> [ 0.343602] aspeed-uart-routing 14c32098.uart-routing: module loaded
> [ 0.344331] aspeed-xdma 12c04000.xdma: reserved memory is beyond
> device's set DMA address range
> [ 0.344341] aspeed-xdma 12c04000.xdma: assigned reserved memory
> node xdma0
> [ 0.346934] aspeed-xdma 12c05000.xdma: reserved memory is beyond
> device's set DMA address range
> [ 0.346945] aspeed-xdma 12c05000.xdma: assigned reserved memory
> node xdma1
> [ 0.389006] aspeed_usb_phy3 12010000.usb-phy3: Wait phy3 init timed
> out
> [ 0.389059] phy phy-12010000.usb-phy3.3: phy init failed --> -110
> [ 0.389134] aspeed_usb_hp soc@10000000:usb3ahp: failed to init usb3
> phy
> [ 0.389309] aspeed_usb_hp soc@10000000:usb3ahp: probe with driver
> aspeed_usb_hp failed with error -110
> [ 0.402300] aspeed_usb_phy3 12020000.usb-phy3: Wait phy3 init timed
> out
> [ 0.402312] phy phy-12020000.usb-phy3.4: phy init failed --> -110
> [ 0.402319] aspeed_usb_hp soc@10000000:usb3bhp: failed to init usb3
> phy
> [ 0.402325] aspeed_usb_hp soc@10000000:usb3bhp: probe with driver
> aspeed_usb_hp failed with error -110
> [ 0.405370] aspeed_pcie_mmbi 12c21000.e2m-config:pcie0-mmbi@0:
> ASPEED PCIe MMBI Dev 0: driver successfully loaded.
> [ 0.406781] aspeed_pcie_mmbi 12c22000.e2m-config:pcie1-mmbi@4:
> ASPEED PCIe MMBI Dev 1: driver successfully loaded.
> [ 0.408663] aspeed-mctp 12c06000.mctp0: assigned reserved memory
> node mctp0-reserved@431bd0000
> [ 0.412243] aspeed-mctp 12c07000.mctp1: assigned reserved memory
> node mctp1-reserved@431be0000
> [ 0.413541] aspeed-mctp 14c1a000.mctp2: assigned reserved memory
> node mctp2-reserved@431bf0000
> [ 0.415109] ast2700_otp 14c07000.otp: Aspeed OTP driver successfully
> registered
> [ 0.458099] Freeing initrd memory: 1312K
> [ 0.489832] aspeed-espi 14c05000.espi: assigned reserved memory node
> mcyc0
> [ 0.495645] aspeed-espi 14c05000.espi: eDAF mode: 0x2
> [ 0.496444] aspeed-espi 14c05000.espi: module loaded
> [ 0.497026] ast2700-rtc-over-espi 14c3d000.rtc-over_espi: RTC not ready,
> deferring probe
> [ 0.548836] Serial: 8250/16550 driver, 23 ports, IRQ sharing enabled
> [ 0.561470] 12c18000.serial: ttyS19 at MMIO 0x12c18000 (irq = 78,
> base_baud = 25000000) is a ASPEED VUART
> [ 0.563500] 12c18100.serial: ttyS20 at MMIO 0x12c18100 (irq = 79,
> base_baud = 25000000) is a ASPEED VUART
> [ 0.564507] 12c18200.serial: ttyS21 at MMIO 0x12c18200 (irq = 80,
> base_baud = 25000000) is a ASPEED VUART
> [ 0.565501] 12c18300.serial: ttyS22 at MMIO 0x12c18300 (irq = 81,
> base_baud = 25000000) is a ASPEED VUART
> [ 0.566848] 14c33200.serial: ttyS2 at MMIO 0x14c33200 (irq = 82,
> base_baud = 115384) is a 16550A
> [ 0.568986] 14c33800.serial: ttyS9 at MMIO 0x14c33800 (irq = 83,
> base_baud = 115384) is a 16550A
> [ 0.570059] 14c33b00.serial: ttyS12 at MMIO 0x14c33b00 (irq = 84,
> base_baud = 115384) is a 16550A
> [ 0.571430] printk: legacy console [ttyS12] enabled
> [ 0.599367] DWC_TRNG_DriverSDK_1.00a
> [ 0.599866] NIST_TRNG: Hardware rel_num=0x0, ext_ver=0x0,
> ext_enum=0x0
> [ 1.081562] wait_on_: failed timeout: 00000000
> [ 1.081679] NIST_TRNG init failed (-21)
> [ 1.081882] nist_trng nist_trng: probe with driver nist_trng failed with
> error -21
> [ 1.100031] brd: module loaded
> [ 1.108016] loop: module loaded
> [ 1.137960] spi-aspeed-smc 14000000.spi: user mode and normal read are
> used
> [ 1.141534] spi-nor spi0.0: supply vcc not found, using dummy regulator
> [ 1.162328] spi-aspeed-smc 14000000.spi: CE0 read buswidth: 4
> [0x406c0641]
> [ 1.162556] spi-aspeed-smc 14000000.spi: CE0 write buswidth: 4
> [0x40340602]
> [ 1.215999] 5 fixed-partitions partitions found on MTD device bmc
> [ 1.216161] Creating 5 MTD partitions on "bmc":
> [ 1.216316] 0x000000000000-0x000000400000 : "u-boot"
> [ 1.218264] 0x000000400000-0x000000420000 : "u-boot-env"
> [ 1.219554] 0x000000420000-0x000000d20000 : "kernel"
> [ 1.220982] 0x000000d20000-0x000006000000 : "rofs"
> [ 1.222261] 0x000006000000-0x000008000000 : "rwfs"
> [ 1.227788] spi-nor spi0.1: supply vcc not found, using dummy regulator
> [ 1.228829] spi-aspeed-smc 14000000.spi: Calibration area too uniform
> [ 1.229072] spi-aspeed-smc 14000000.spi: CE1 read buswidth: 4
> [0x406c0641]
> [ 1.229186] spi-aspeed-smc 14000000.spi: CE1 write buswidth: 4
> [0x40340602]
> [ 1.247107] spi-aspeed-smc 14010000.spi: user mode and normal read are
> used
> [ 1.248480] spi-nor spi1.0: supply vcc not found, using dummy regulator
> [ 1.249664] spi-aspeed-smc 14010000.spi: Calibration area too uniform
> [ 1.249758] spi-aspeed-smc 14010000.spi: CE0 read buswidth: 2
> [0x203c0641]
> [ 1.249851] spi-aspeed-smc 14010000.spi: CE0 write buswidth: 1
> [0x00120602]
> [ 1.259585] spi-aspeed-smc 14020000.spi: user mode and normal read are
> used
> [ 1.260535] spi-nor spi2.0: supply vcc not found, using dummy regulator
> [ 1.260863] spi-nor spi2.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00
> [ 1.264807] spi_aspeed_txrx 14030000.spi: cs: 0, ctrl_val: 0x00000407
> [ 1.279202] CAN device driver interface
> [ 2.288754] aspeed_can 14c3e000.can (unnamed net_device)
> (uninitialized): timed out for config mode
> [ 2.289000] aspeed_can 14c3e000.can: probe with driver aspeed_can
> failed with error -110
> [ 2.291357] ftgmac100 14050000.ethernet: Read MAC address
> 52:54:00:12:34:56 from chip
> [ 2.292825] RTL8211E Gigabit Ethernet 14040000.mdio-1:00: attached PHY
> driver (mii_bus:phy_addr=14040000.mdio-1:00, irq=POLL)
> [ 2.312021] ftgmac100 14050000.ethernet eth0: irq 86, mapped at
> (____ptrval____)
> [ 2.312736] ftgmac100 14060000.ethernet: Read MAC address
> 52:54:00:12:34:57 from chip
> [ 2.312994] RTL8211E Gigabit Ethernet 14040008.mdio-1:00: attached PHY
> driver (mii_bus:phy_addr=14040008.mdio-1:00, irq=POLL)
> [ 2.331522] ftgmac100 14060000.ethernet eth1: irq 87, mapped at
> (____ptrval____)
> [ 2.331821] e100: Intel(R) PRO/100 Network Driver
> [ 2.331879] e100: Copyright(c) 1999-2006 Intel Corporation
> [ 2.332018] e1000: Intel(R) PRO/1000 Network Driver
> [ 2.332088] e1000: Copyright (c) 1999-2006 Intel Corporation.
> [ 2.332213] e1000e: Intel(R) PRO/1000 Network Driver
> [ 2.332303] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
> [ 2.332431] igb: Intel(R) Gigabit Ethernet Network Driver
> [ 2.332511] igb: Copyright (c) 2007-2014 Intel Corporation.
> [ 2.332639] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver
> [ 2.332726] ixgbe: Copyright (c) 1999-2016 Intel Corporation.
> [ 2.333468] MCTP I2C interface driver
> [ 2.333816] usbcore: registered new interface driver mctp-usb
> [ 2.333952] usbcore: registered new interface driver cdc_ether
> [ 2.334071] usbcore: registered new interface driver cdc_eem
> [ 2.334194] usbcore: registered new interface driver net1080
> [ 2.334317] usbcore: registered new interface driver cdc_subset
> [ 2.334434] usbcore: registered new interface driver zaurus
> [ 2.334550] usbcore: registered new interface driver cdc_ncm
> [ 2.334670] usbcore: registered new interface driver r8153_ecm
> [ 2.336620] platform-uhci 14110000.usb: Detected 2 ports from
> device-tree
> [ 2.336765] platform-uhci 14110000.usb: Enabled Aspeed implementation
> workarounds
> [ 2.337202] platform-uhci 14110000.usb: Generic UHCI Host Controller
> [ 2.337204] ehci-platform 14123000.usb: EHCI Host Controller
> [ 2.337639] ehci-platform 14123000.usb: new USB bus registered, assigned
> bus number 2
> [ 2.337640] platform-uhci 14110000.usb: new USB bus registered, assigned
> bus number 1
> [ 2.338409] platform-uhci 14110000.usb: irq 89, io mem 0x14110000
> [ 2.338627] platform-uhci 14110000.usb: Device does not have specific
> DMA pool
> [ 2.339110] ehci-platform 14123000.usb: irq 88, io mem 0x14123000
> [ 2.344125] usb usb1: New USB device found, idVendor=1d6b,
> idProduct=0001, bcdDevice= 6.18
> [ 2.344272] usb usb1: New USB device strings: Mfr=3, Product=2,
> SerialNumber=1
> [ 2.344375] usb usb1: Product: Generic UHCI Host Controller
> [ 2.344456] usb usb1: Manufacturer: Linux
> 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd
> [ 2.344560] usb usb1: SerialNumber: 14110000.usb
> [ 2.347100] hub 1-0:1.0: USB hub found
> [ 2.347598] hub 1-0:1.0: 2 ports detected
> [ 2.351199] ehci-platform 14123000.usb: USB 2.0 started, EHCI 1.00
> [ 2.351206] usbcore: registered new interface driver cdc_acm
> [ 2.351251] cdc_acm: USB Abstract Control Model driver for USB modems
> and ISDN adapters
> [ 2.351648] usb usb2: New USB device found, idVendor=1d6b,
> idProduct=0002, bcdDevice= 6.18
> [ 2.351794] usb usb2: New USB device strings: Mfr=3, Product=2,
> SerialNumber=1
> [ 2.351918] usb usb2: Product: EHCI Host Controller
> [ 2.351999] usb usb2: Manufacturer: Linux
> 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd
> [ 2.352005] usbcore: registered new interface driver uas
> [ 2.352094] usb usb2: SerialNumber: 14123000.usb
> [ 2.352418] usbcore: registered new interface driver usb-storage
> [ 2.352828] usbcore: registered new interface driver pl2303
> [ 2.352891] hub 2-0:1.0: USB hub found
> [ 2.353110] usbserial: USB Serial support registered for pl2303
> [ 2.353190] hub 2-0:1.0: 6 ports detected
> [ 2.363145] platform-uhci 14110000.usb: Controller not stopped yet!
> [ 2.366436] aspeed_vhub 12060000.usb-vhub: PCIe EHCI to vhub
> [ 2.368834] aspeed_vhub 12060000.usb-vhub: Initialized virtual hub in
> USB2 mode
> [ 2.379205] aspeed_vhub 12062000.usb-vhub: PCIe EHCI to vhub
> [ 2.380707] aspeed_vhub 12062000.usb-vhub: Initialized virtual hub in
> USB2 mode
> [ 2.392449] aspeed_vhub 14120000.usb-vhub: Initialized virtual hub in
> USB2 mode
> [ 2.396382] aspeed-rtc 12c0f000.rtc: registered as rtc0
> [ 2.396904] aspeed-rtc 12c0f000.rtc: setting system clock to
> 1970-01-01T01:01:01 UTC (3661)
> [ 2.397557] i2c_dev: i2c /dev entries driver
> [ 2.401063] i2c_ast2600 14c0f100.i2c-bus: i2c-bus [0]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.401971] i2c_ast2600 14c0f200.i2c-bus: i2c-bus [1]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.402763] i2c_ast2600 14c0f300.i2c-bus: i2c-bus [2]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.403689] i2c_ast2600 14c0f400.i2c-bus: i2c-bus [3]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.404448] i2c_ast2600 14c0f500.i2c-bus: i2c-bus [4]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.405292] i2c_ast2600 14c0f600.i2c-bus: i2c-bus [5]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.406064] i2c_ast2600 14c0f700.i2c-bus: i2c-bus [6]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.406787] i2c_ast2600 14c0f800.i2c-bus: i2c-bus [7]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.407562] i2c_ast2600 14c0f900.i2c-bus: i2c-bus [8]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.408366] i2c_ast2600 14c0fc00.i2c-bus: i2c-bus [11]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.409112] i2c_ast2600 14c0fd00.i2c-bus: i2c-bus [12]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.409807] i2c_ast2600 14c0fe00.i2c-bus: i2c-bus [13]: adapter [100 KHz]
> mode [2] version [1]
> [ 2.410928] 14c20000.i3c0: MIPI I3C HCI v0.0 r00
> [ 2.411100] 14c20000.i3c0: unsupported HCI version
> [ 2.411231] mipi-i3c-hci 14c20000.i3c0: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.411493] 14c21000.i3c1: MIPI I3C HCI v0.0 r00
> [ 2.411571] 14c21000.i3c1: unsupported HCI version
> [ 2.411636] mipi-i3c-hci 14c21000.i3c1: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.411863] 14c22000.i3c2: MIPI I3C HCI v0.0 r00
> [ 2.411934] 14c22000.i3c2: unsupported HCI version
> [ 2.411999] mipi-i3c-hci 14c22000.i3c2: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.412217] 14c23000.i3c3: MIPI I3C HCI v0.0 r00
> [ 2.412290] 14c23000.i3c3: unsupported HCI version
> [ 2.412355] mipi-i3c-hci 14c23000.i3c3: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.412574] 14c24000.i3c4: MIPI I3C HCI v0.0 r00
> [ 2.412644] 14c24000.i3c4: unsupported HCI version
> [ 2.412710] mipi-i3c-hci 14c24000.i3c4: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.412927] 14c25000.i3c5: MIPI I3C HCI v0.0 r00
> [ 2.412997] 14c25000.i3c5: unsupported HCI version
> [ 2.413062] mipi-i3c-hci 14c25000.i3c5: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.413280] 14c26000.i3c6: MIPI I3C HCI v0.0 r00
> [ 2.413350] 14c26000.i3c6: unsupported HCI version
> [ 2.413414] mipi-i3c-hci 14c26000.i3c6: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.413659] 14c27000.i3c7: MIPI I3C HCI v0.0 r00
> [ 2.413734] 14c27000.i3c7: unsupported HCI version
> [ 2.413798] mipi-i3c-hci 14c27000.i3c7: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.414017] 14c28000.i3c8: MIPI I3C HCI v0.0 r00
> [ 2.414087] 14c28000.i3c8: unsupported HCI version
> [ 2.414153] mipi-i3c-hci 14c28000.i3c8: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.414371] 14c29000.i3c9: MIPI I3C HCI v0.0 r00
> [ 2.414442] 14c29000.i3c9: unsupported HCI version
> [ 2.414506] mipi-i3c-hci 14c29000.i3c9: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.414742] 14c2a000.i3c10: MIPI I3C HCI v0.0 r00
> [ 2.414817] 14c2a000.i3c10: unsupported HCI version
> [ 2.414884] mipi-i3c-hci 14c2a000.i3c10: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.415160] 14c2b000.i3c11: MIPI I3C HCI v0.0 r00
> [ 2.415243] 14c2b000.i3c11: unsupported HCI version
> [ 2.415310] mipi-i3c-hci 14c2b000.i3c11: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.415542] 14c2c000.i3c12: MIPI I3C HCI v0.0 r00
> [ 2.415613] 14c2c000.i3c12: unsupported HCI version
> [ 2.415679] mipi-i3c-hci 14c2c000.i3c12: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.415900] 14c2d000.i3c13: MIPI I3C HCI v0.0 r00
> [ 2.415973] 14c2d000.i3c13: unsupported HCI version
> [ 2.416041] mipi-i3c-hci 14c2d000.i3c13: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.416267] 14c2e000.i3c14: MIPI I3C HCI v0.0 r00
> [ 2.416340] 14c2e000.i3c14: unsupported HCI version
> [ 2.416405] mipi-i3c-hci 14c2e000.i3c14: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.416647] 14c2f000.i3c15: MIPI I3C HCI v0.0 r00
> [ 2.416725] 14c2f000.i3c15: unsupported HCI version
> [ 2.416790] mipi-i3c-hci 14c2f000.i3c15: probe with driver mipi-i3c-hci
> failed with error -93
> [ 2.418547] aspeed-video 120a0000.video: irq 106
> [ 2.418735] aspeed-video 120a0000.video: dvi mode-detection irq 107
> [ 2.418985] aspeed-video 120a0000.video: assigned reserved memory
> node video0
> [ 2.432446] aspeed-video 120a0000.video: alloc mem size(18493440) at
> 0x000000047de00000 for pool
> [ 2.435819] aspeed-video 120a0000.video: aspeed-video0 registered as
> /dev/video0
> [ 2.436890] aspeed-video 120a1000.video: irq 108
> [ 2.437029] aspeed-video 120a1000.video: assigned reserved memory
> node video1
> [ 2.449658] aspeed-video 120a1000.video: alloc mem size(18493440) at
> 0x000000047ac00000 for pool
> [ 2.450250] aspeed-video 120a1000.video: aspeed-video1 registered as
> /dev/video1
> [ 2.458433] sdhci: Secure Digital Host Controller Interface driver
> [ 2.458547] sdhci: Copyright(c) Pierre Ossman
> [ 2.458614] sdhci-pltfm: SDHCI platform and OF driver helper
> [ 2.461200] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
> [ 2.462065] sdhci-aspeed 12090100.sdhci: Configured for slot 0
> [ 2.463137] aspeed_crypto 12070000.crypto: will run requests pump with
> realtime priority
> [ 2.466408] aspeed_crypto 12070000.crypto: will run requests pump with
> realtime priority
> [ 2.467319] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable
> to find vdd-hba-supply regulator, assuming enabled
> [ 2.467557] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable
> to find vcc-supply regulator, assuming enabled
> [ 2.467743] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable
> to find vccq-supply regulator, assuming enabled
> [ 2.468017] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable
> to find vccq2-supply regulator, assuming enabled
> [ 2.468196] aspeed_crypto 12070000.crypto: cannot find sbc node
> [ 2.468648] aspeed_crypto 12070000.crypto: Aspeed Crypto Accelerator
> successfully registered
> [ 2.469278] aspeed-ufshcd 12c08200.ufshc: Command Descriptor Memory
> allocation failed
> [ 2.469443] aspeed-ufshcd 12c08200.ufshc: Memory allocation failed
> [ 2.469825] aspeed-ufshcd 12c08200.ufshc: ufshcd_pltfrm_init() failed -12
> [ 2.469962] aspeed-ufshcd 12c08200.ufshc: probe with driver
> aspeed-ufshcd failed with error -12
> [ 2.470412] aspeed_rsss 12080000.crypto: will run requests pump with
> realtime priority
> [ 2.471110] aspeed_rsss 12080000.crypto: RSA init failed
> [ 2.471245] aspeed_rsss 12080000.crypto: probe with driver aspeed_rsss
> failed with error -5
> [ 2.472595] aspeed_ecdsa 12c1e000.crypto: probe with driver
> aspeed_ecdsa failed with error -5
> [ 2.473678] usbcore: registered new interface driver usbhid
> [ 2.473827] usbhid: USB HID core driver
> [ 2.485896] hw perfevents: enabled with armv8_cortex_a35 PMU driver, 7
> (0,8000003f) counters available
> [ 2.487770] optee: probing for conduit method.
> I/TC: Reserved shared memory is disabled
> I/TC: Dynamic shared memory is enabled
> I/TC: Normal World virtualization support is disabled
> I/TC: Asynchronous notifications are disabled
> [ 2.488394] optee: revision 4.4 (8f645256efc0dc66)
> [ 2.489279] watchdog: NMI not fully supported
> [ 2.489417] watchdog: Hard watchdog permanently disabled
> [ 2.490296] optee: dynamic shared memory is enabled
> [ 2.496286] optee: initialized driver
> [ 2.499251] mmc0: SDHCI controller on 12090100.sdhci [12090100.sdhci]
> using ADMA 64-bit
> [ 2.499601] pktgen: Packet Generator for packet performance testing.
> Version: 2.75
> [ 2.502051] NET: Registered PF_INET6 protocol family
> [ 2.508037] Segment Routing with IPv6
> [ 2.508286] In-situ OAM (IOAM) with IPv6
> [ 2.508812] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
> [ 2.510670] NET: Registered PF_PACKET protocol family
> [ 2.511122] can: controller area network core
> [ 2.511471] NET: Registered PF_CAN protocol family
> [ 2.511597] can: raw protocol
> [ 2.511791] can: broadcast manager protocol
> [ 2.512029] can: netlink gateway - max_hops=1
> [ 2.512210] 8021q: 802.1Q VLAN Support v1.8
> [ 2.520069] registered taskstats version 1
> [ 2.521401] Loading compiled-in X.509 certificates
> [ 2.531388] Demotion targets for Node 0: null
> [ 2.532261] Key type .fscrypt registered
> [ 2.532350] Key type fscrypt-provisioning registered
> [ 2.564198] mmc0: Failed to initialize a non-removable card
> [ 2.573543] alg: skcipher: aspeed-ctr-des encryption test failed (wrong
> result) on test vector 0, cfg="in-place (one sglist)"
> [ 2.573863] alg: self-tests for ctr(des) using aspeed-ctr-des failed (rc=-22)
> [ 2.573938] ------------[ cut here ]------------
> [ 2.574155] alg: self-tests for ctr(des) using aspeed-ctr-des failed (rc=-22)
> [ 2.574401] WARNING: CPU: 3 PID: 116 at
> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
> [ 2.574972] Modules linked in:
> [ 2.575579] CPU: 3 UID: 0 PID: 116 Comm: cryptomgr_test Not tainted
> 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
> [ 2.575776] Hardware name: AST2700 EVB (DT)
> [ 2.575979] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
> BTYPE=--)
> [ 2.576125] pc : alg_test+0x490/0x5bc
> [ 2.576215] lr : alg_test+0x490/0x5bc
> [ 2.576286] sp : ffff800081f7bd50
> [ 2.576358] x29: ffff800081f7bdf0 x28: 0000000000000004 x27:
> ffff800080eaa568
> [ 2.576584] x26: 0000000000000000 x25: 00000000ffffffff x24:
> 0000000000000004
> [ 2.576809] x23: ffff0000065d1680 x22: 0000000000001085 x21:
> ffff0000065d1600
> [ 2.576981] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
> 000000000000000a
> [ 2.577104] x17: 32322d3d63722820 x16: 64656c6961662073 x15:
> 0000000000000000
> [ 2.577223] x14: 0000000000000000 x13: 00000000ffff0a01 x12:
> 00000000ffffffea
> [ 2.577345] x11: ffff800081f7bab8 x10: 00000000ffffefff x9 :
> ffff8000815ae3c8
> [ 2.577486] x8 : ffff8000815ae420 x7 : 0000000000017fe8 x6 :
> c0000000ffffefff
> [ 2.577609] x5 : 0000000000057fa8 x4 : 0000000000000000 x3 :
> 0000000000000000
> [ 2.577744] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
> ffff000006de2400
> [ 2.578021] Call trace:
> [ 2.578164] alg_test+0x490/0x5bc (P)
> [ 2.578302] cryptomgr_test+0x24/0x44
> [ 2.578384] kthread+0x140/0x220
> [ 2.578455] ret_from_fork+0x10/0x20
> [ 2.578604] ---[ end trace 0000000000000000 ]---
> [ 2.579215] alg: skcipher: aspeed-ctr-tdes encryption test failed (wrong
> result) on test vector 0, cfg="in-place (one sglist)"
> [ 2.579437] alg: self-tests for ctr(des3_ede) using aspeed-ctr-tdes failed
> (rc=-22)
> [ 2.579445] ------------[ cut here ]------------
> [ 2.579673] alg: self-tests for ctr(des3_ede) using aspeed-ctr-tdes failed
> (rc=-22)
> [ 2.580184] WARNING: CPU: 0 PID: 115 at
> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
> [ 2.580525] Modules linked in:
> [ 2.580726] CPU: 0 UID: 0 PID: 115 Comm: cryptomgr_test Tainted: G
> W 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
> [ 2.580940] Tainted: [W]=WARN
> [ 2.580992] Hardware name: AST2700 EVB (DT)
> [ 2.581058] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
> BTYPE=--)
> [ 2.581196] pc : alg_test+0x490/0x5bc
> [ 2.581261] lr : alg_test+0x490/0x5bc
> [ 2.581335] sp : ffff800081f73d50
> [ 2.581392] x29: ffff800081f73df0 x28: 0000000000000004 x27:
> ffff800080eaa568
> [ 2.581529] x26: 0000000000000000 x25: 00000000ffffffff x24:
> 0000000000000004
> [ 2.581655] x23: ffff0000065d1880 x22: 0000000000001085 x21:
> ffff0000065d1800
> [ 2.581781] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
> 0000000000000000
> [ 2.581904] x17: 0000000000000000 x16: 00000000e820414d x15:
> ffff000006de1290
> [ 2.582027] x14: 00000000000002e0 x13: 0000000000000001 x12:
> 0000000000000001
> [ 2.582149] x11: 00000000000000c0 x10: 0000000000000b50 x9 :
> ffff800081f73bc0
> [ 2.582281] x8 : ffff000006de1db0 x7 : 0000000000000001 x6 :
> 0000000000007a4f
> [ 2.582408] x5 : ffff0000054541e0 x4 : ffff000006de1200 x3 :
> ffff000006de5a00
> [ 2.582538] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
> ffff000006de1200
> [ 2.582670] Call trace:
> [ 2.582715] alg_test+0x490/0x5bc (P)
> [ 2.582782] cryptomgr_test+0x24/0x44
> [ 2.582856] kthread+0x140/0x220
> [ 2.582921] ret_from_fork+0x10/0x20
> [ 2.582989] ---[ end trace 0000000000000000 ]---
> [ 2.620920] alg: skcipher: aspeed-ctr-aes encryption test failed (wrong
> result) on test vector 0, cfg="in-place (one sglist)"
> [ 2.621176] alg: self-tests for ctr(aes) using aspeed-ctr-aes failed (rc=-22)
> [ 2.621185] ------------[ cut here ]------------
> [ 2.621384] alg: self-tests for ctr(aes) using aspeed-ctr-aes failed (rc=-22)
> [ 2.621420] WARNING: CPU: 0 PID: 117 at
> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
> [ 2.621673] Modules linked in:
> [ 2.621738] CPU: 0 UID: 0 PID: 117 Comm: cryptomgr_test Tainted: G
> W 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
> [ 2.621925] Tainted: [W]=WARN
> [ 2.621975] Hardware name: AST2700 EVB (DT)
> [ 2.622044] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
> BTYPE=--)
> [ 2.622153] pc : alg_test+0x490/0x5bc
> [ 2.622218] lr : alg_test+0x490/0x5bc
> [ 2.622283] sp : ffff800081f83d50
> [ 2.622337] x29: ffff800081f83df0 x28: 0000000000000004 x27:
> ffff800080eaa568
> [ 2.622458] x26: 0000000000000000 x25: 00000000ffffffff x24:
> 0000000000000004
> [ 2.622578] x23: ffff0000065d0e80 x22: 0000000000001085 x21:
> ffff0000065d0e00
> [ 2.622694] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
> 000000000000000a
> [ 2.622811] x17: 32322d3d63722820 x16: 64656c6961662073 x15:
> 0000000000000000
> [ 2.622931] x14: 0000000000000000 x13: 00000000ffff0a01 x12:
> 00000000ffffffea
> [ 2.623061] x11: ffff800081f83ab8 x10: 00000000ffffefff x9 :
> ffff8000815ae3c8
> [ 2.623200] x8 : ffff8000815ae420 x7 : 0000000000017fe8 x6 :
> c0000000ffffefff
> [ 2.623325] x5 : 0000000000057fa8 x4 : 0000000000000000 x3 :
> 0000000000000000
> [ 2.623447] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
> ffff000006de3600
> [ 2.623570] Call trace:
> [ 2.623625] alg_test+0x490/0x5bc (P)
> [ 2.623690] cryptomgr_test+0x24/0x44
> [ 2.623752] kthread+0x140/0x220
> [ 2.623810] ret_from_fork+0x10/0x20
> [ 2.623875] ---[ end trace 0000000000000000 ]---
> [ 2.653308] aspeed_mbox_client 431880000.mbox-bootmcu-1: TX shmem:
> phys 0x0x0000000431880000 size 1048576
> [ 2.653484] aspeed_mbox_client 431880000.mbox-bootmcu-1: RX shmem:
> phys 0x0x0000000431980000 size 1048576
> [ 2.653616] aspeed_mbox_client 431880000.mbox-bootmcu-1: TX timeout:
> 10000 ms
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround
2026-07-20 5:57 ` Jamin Lin
@ 2026-07-20 6:29 ` Cédric Le Goater
2026-07-20 7:33 ` Jamin Lin
0 siblings, 1 reply; 27+ messages in thread
From: Cédric Le Goater @ 2026-07-20 6:29 UTC (permalink / raw)
To: Jamin Lin, Daniel P. Berrangé, Peter Maydell, Steven Lee,
Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, Eric Blake,
Markus Armbruster, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:All patches CC here, open list:ASPEED BMCs
Cc: Troy Lee
On 7/20/26 07:57, Jamin Lin wrote:
> Hi Cédric
>
> The GNUTLS backend currently does not support CTR mode. Could you please try using either the GCRYPT or NETTLE backend instead?
>
> I mentioned this issue in the cover letter here:
> https://patchwork.kernel.org/project/qemu-devel/cover/20260715033311.1648424-1-jamin_lin@aspeedtech.com/
>
> Note: The GNUTLS crypto backend does not support CTR mode.
>
> If we decide to support CTR mode with the GNUTLS backend, I'll need to investigate whether the underlying GnuTLS library itself supports CTR mode.
> If it does, I'll prepare another patch series to add CTR mode support to the GNUTLS backend.
ok
> The relevant code is here:
> https://github.com/qemu/qemu/blob/master/crypto/cipher-gnutls.c.inc#L26
we should remove "cryptomgr.notests=1" when all tests pass then.
Thanks,
C.
>
> Thanks,
> Jamin
>
>> From: Cédric Le Goater <clg@kaod.org>
>> Sent: Monday, July 20, 2026 1:51 PM
>> To: Jamin Lin <jamin_lin@aspeedtech.com>; Daniel P. Berrangé
>> <berrange@redhat.com>; Peter Maydell <peter.maydell@linaro.org>; Steven
>> Lee <steven_lee@aspeedtech.com>; Troy Lee <leetroy@gmail.com>; Kane
>> Chen <kane_chen@aspeedtech.com>; Andrew Jeffery
>> <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; Eric Blake
>> <eblake@redhat.com>; Markus Armbruster <armbru@redhat.com>; Fabiano
>> Rosas <farosas@suse.de>; Laurent Vivier <lvivier@redhat.com>; Paolo Bonzini
>> <pbonzini@redhat.com>; open list:All patches CC here
>> <qemu-devel@nongnu.org>; open list:ASPEED BMCs
>> <qemu-arm@nongnu.org>
>> Cc: Troy Lee <troy_lee@aspeedtech.com>
>> Subject: Re: [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700:
>> Drop the AST2700 crypto self-test workaround
>>
>> On 7/15/26 05:33, Jamin Lin wrote:
>>> The AST2700 boot tests appended 'cryptomgr.notests=1' to the kernel
>>> command line to skip the Linux crypto manager self-tests.
>>>
>>> Now that the HACE crypto engine emulates the crypto command, the
>>> self-tests pass, so drop the workaround and let them run. This also
>>> exercises the HACE crypto emulation during the functional boot tests.
>>>
>>> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
>>> ---
>>> tests/functional/aarch64/test_aspeed_ast2700a1.py | 5 -----
>>> tests/functional/aarch64/test_aspeed_ast2700a2.py | 5 -----
>>> tests/functional/aarch64/test_aspeed_ast2700fc.py | 5 -----
>>> 3 files changed, 15 deletions(-)
>>>
>>> diff --git a/tests/functional/aarch64/test_aspeed_ast2700a1.py
>>> b/tests/functional/aarch64/test_aspeed_ast2700a1.py
>>> index b0c08854da..bc535449b5 100755
>>> --- a/tests/functional/aarch64/test_aspeed_ast2700a1.py
>>> +++ b/tests/functional/aarch64/test_aspeed_ast2700a1.py
>>> @@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
>>> wait_for_console_pattern(self, 'pass')
>>> wait_for_console_pattern(self, 'Jumping to BL31 (Trusted
>>> Firmware-A)')
>>>
>>> - def disable_kernel_crypto_selftest(self):
>>> - exec_command_and_wait_for_pattern(self,
>>> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
>>> -
>>> def enable_ast2700_pcie2(self):
>>> exec_command_and_wait_for_pattern(self,
>>> 'cp 100420000 403000000 900000', '=>') @@ -71,7 +67,6
>> @@
>>> def verify_openbmc_boot_start(self, enable_pcie=True):
>>> wait_for_console_pattern(self, 'U-Boot 2023.10')
>>> wait_for_console_pattern(self, 'Hit any key to stop autoboot')
>>> exec_command_and_wait_for_pattern(self, '\012', '=>')
>>> - self.disable_kernel_crypto_selftest()
>>> if enable_pcie:
>>> self.enable_ast2700_pcie2()
>>> else:
>>> diff --git a/tests/functional/aarch64/test_aspeed_ast2700a2.py
>>> b/tests/functional/aarch64/test_aspeed_ast2700a2.py
>>> index ed414999f4..5aea0a9dd0 100755
>>> --- a/tests/functional/aarch64/test_aspeed_ast2700a2.py
>>> +++ b/tests/functional/aarch64/test_aspeed_ast2700a2.py
>>> @@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
>>> wait_for_console_pattern(self, 'pass')
>>> wait_for_console_pattern(self, 'Jumping to BL31 (Trusted
>>> Firmware-A)')
>>>
>>> - def disable_kernel_crypto_selftest(self):
>>> - exec_command_and_wait_for_pattern(self,
>>> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
>>> -
>>> def enable_ast2700_pcie2(self):
>>> exec_command_and_wait_for_pattern(self,
>>> 'cp 100420000 403000000 900000', '=>') @@ -71,7 +67,6
>> @@
>>> def verify_openbmc_boot_start(self, enable_pcie=True):
>>> wait_for_console_pattern(self, 'U-Boot 2023.10')
>>> wait_for_console_pattern(self, 'Hit any key to stop autoboot')
>>> exec_command_and_wait_for_pattern(self, '\012', '=>')
>>> - self.disable_kernel_crypto_selftest()
>>> if enable_pcie:
>>> self.enable_ast2700_pcie2()
>>> else:
>>> diff --git a/tests/functional/aarch64/test_aspeed_ast2700fc.py
>>> b/tests/functional/aarch64/test_aspeed_ast2700fc.py
>>> index df889134ed..1648fa9dba 100755
>>> --- a/tests/functional/aarch64/test_aspeed_ast2700fc.py
>>> +++ b/tests/functional/aarch64/test_aspeed_ast2700fc.py
>>> @@ -27,10 +27,6 @@ def do_test_aarch64_aspeed_sdk_start(self, image):
>>>
>>> self.vm.launch()
>>>
>>> - def disable_kernel_crypto_selftest(self):
>>> - exec_command_and_wait_for_pattern(self,
>>> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
>>> -
>>> def enable_ast2700_pcie2(self):
>>> exec_command_and_wait_for_pattern(self,
>>> 'cp 100420000 403000000 900000', '=>') @@ -47,7 +43,6
>> @@
>>> def verify_openbmc_boot_and_login(self, name):
>>> wait_for_console_pattern(self, 'U-Boot 2023.10')
>>> wait_for_console_pattern(self, 'Hit any key to stop autoboot')
>>> exec_command_and_wait_for_pattern(self, '\012', '=>')
>>> - self.disable_kernel_crypto_selftest()
>>> self.enable_ast2700_pcie2()
>>> wait_for_console_pattern(self, 'Starting kernel ...')
>>>
>>
>>
>> There are still crypto tests errors. See below. Is it expected ?
>>
>> Thanks,
>>
>> C.
>>
>>
>> [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd040]
>> [ 0.000000] Linux version 6.18.3-v00.08.01-g172b7e27a30d
>> (oe-user@oe-host) (aarch64-openbmc-linux-gcc (GCC) 15.1.0, GNU ld (GNU
>> Binutils) 2.44.0.20250429) #1 SMP PREEMPT Wed Feb 18 09:06:34 CST 2026
>> [ 0.000000] KASLR disabled due to lack of seed
>> [ 0.000000] Machine model: AST2700 EVB
>> [ 0.000000] Malformed early option 'earlycon'
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x000000047ff00000, size 1 MiB
>> [ 0.000000] OF: reserved mem: initialized node xdma0, compatible id
>> shared-dma-pool
>> [ 0.000000] OF: reserved mem: 0x000000047ff00000..0x000000047fffffff
>> (1024 KiB) nomap non-reusable xdma0
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x000000047fe00000, size 1 MiB
>> [ 0.000000] OF: reserved mem: initialized node xdma1, compatible id
>> shared-dma-pool
>> [ 0.000000] OF: reserved mem: 0x000000047fe00000..0x000000047fefffff
>> (1024 KiB) nomap non-reusable xdma1
>> [ 0.000000] Reserved memory: created CMA memory pool at
>> 0x000000047de00000, size 32 MiB
>> [ 0.000000] OF: reserved mem: initialized node video0, compatible id
>> shared-dma-pool
>> [ 0.000000] OF: reserved mem: 0x000000047de00000..0x000000047fdfffff
>> (32768 KiB) map reusable video0
>> [ 0.000000] Reserved memory: created CMA memory pool at
>> 0x000000047ac00000, size 32 MiB
>> [ 0.000000] OF: reserved mem: initialized node video1, compatible id
>> shared-dma-pool
>> [ 0.000000] OF: reserved mem: 0x000000047ac00000..0x000000047cbfffff
>> (32768 KiB) map reusable video1
>> [ 0.000000] Reserved memory: created CMA memory pool at
>> 0x000000047ce00000, size 16 MiB
>> [ 0.000000] OF: reserved mem: initialized node mcyc0, compatible id
>> shared-dma-pool
>> [ 0.000000] OF: reserved mem: 0x000000047ce00000..0x000000047ddfffff
>> (16384 KiB) map reusable mcyc0
>> [ 0.000000] OF: reserved mem:
>> 0x0000000430000000..0x000000043007ffff (512 KiB) nomap non-reusable
>> trusted-firmware-a@430000000
>> [ 0.000000] OF: reserved mem:
>> 0x0000000430080000..0x000000043107ffff (16384 KiB) nomap non-reusable
>> optee-core@430080000
>> [ 0.000000] OF: reserved mem: 0x0000000428000000..0x000000042bffffff
>> (65536 KiB) nomap non-reusable eadf0-memory@428000000
>> [ 0.000000] OF: reserved mem: 0x0000000424000000..0x0000000427ffffff
>> (65536 KiB) nomap non-reusable espi0-mmbi-memory@424000000
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x0000000423800000, size 1 MiB
>> [ 0.000000] OF: reserved mem: initialized node
>> bmc-dev0-memory@423800000, compatible id shared-dma-pool
>> [ 0.000000] OF: reserved mem: 0x0000000423800000..0x00000004238fffff
>> (1024 KiB) nomap non-reusable bmc-dev0-memory@423800000
>> [ 0.000000] OF: reserved mem: 0x0000000423a00000..0x0000000423bfffff
>> (2048 KiB) nomap non-reusable pcie0-mmbi0-memory@423a00000
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x0000000423900000, size 1 MiB
>> [ 0.000000] OF: reserved mem: initialized node
>> bmc-dev1-memory@423900000, compatible id shared-dma-pool
>> [ 0.000000] OF: reserved mem: 0x0000000423900000..0x00000004239fffff
>> (1024 KiB) nomap non-reusable bmc-dev1-memory@423900000
>> [ 0.000000] OF: reserved mem: 0x0000000423c00000..0x0000000423dfffff
>> (2048 KiB) nomap non-reusable pcie1-mmbi4-memory@423c00000
>> [ 0.000000] OF: reserved mem: 0x0000000423e00000..0x0000000423ffffff
>> (2048 KiB) nomap non-reusable pcie2-mmbi0-memory@423e00000
>> [ 0.000000] OF: reserved mem: 0x000000042c000000..0x000000042dffffff
>> (32768 KiB) nomap non-reusable ssp-memory@42c000000
>> [ 0.000000] OF: reserved mem: 0x000000042e000000..0x000000042fffffff
>> (32768 KiB) nomap non-reusable tsp-memory@42e000000
>> [ 0.000000] OF: reserved mem:
>> 0x0000000431080000..0x000000043187ffff (8192 KiB) nomap non-reusable
>> ipc-ssp-share@431080000
>> [ 0.000000] OF: reserved mem:
>> 0x0000000431880000..0x0000000431b2ffff (2752 KiB) nomap non-reusable
>> ipc-bootmcu-share@431880000
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x0000000431b30000, size 0 MiB
>> [ 0.000000] OF: reserved mem: initialized node
>> uhci0-reserved@431b30000, compatible id shared-dma-pool
>> [ 0.000000] OF: reserved mem:
>> 0x0000000431b30000..0x0000000431b6ffff (256 KiB) nomap non-reusable
>> uhci0-reserved@431b30000
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x0000000431b70000, size 0 MiB
>> [ 0.000000] OF: reserved mem: initialized node
>> uhci1-reserved@431b70000, compatible id shared-dma-pool
>> [ 0.000000] OF: reserved mem:
>> 0x0000000431b70000..0x0000000431baffff (256 KiB) nomap non-reusable
>> uhci1-reserved@431b70000
>> [ 0.000000] OF: reserved mem:
>> 0x0000000431bb0000..0x0000000431bbffff (64 KiB) nomap non-reusable
>> vbios-base0@431bb0000
>> [ 0.000000] OF: reserved mem:
>> 0x0000000431bc0000..0x0000000431bcffff (64 KiB) nomap non-reusable
>> vbios-base1@431bc0000
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x0000000431bd0000, size 0 MiB
>> [ 0.000000] OF: reserved mem: initialized node
>> mctp0-reserved@431bd0000, compatible id shared-dma-pool
>> [ 0.000000] OF: reserved mem:
>> 0x0000000431bd0000..0x0000000431bdffff (64 KiB) nomap non-reusable
>> mctp0-reserved@431bd0000
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x0000000431be0000, size 0 MiB
>> [ 0.000000] OF: reserved mem: initialized node
>> mctp1-reserved@431be0000, compatible id shared-dma-pool
>> [ 0.000000] OF: reserved mem:
>> 0x0000000431be0000..0x0000000431beffff (64 KiB) nomap non-reusable
>> mctp1-reserved@431be0000
>> [ 0.000000] Reserved memory: created DMA memory pool at
>> 0x0000000431bf0000, size 0 MiB
>> [ 0.000000] OF: reserved mem: initialized node
>> mctp2-reserved@431bf0000, compatible id shared-dma-pool
>> [ 0.000000] OF: reserved mem: 0x0000000431bf0000..0x0000000431bfffff
>> (64 KiB) nomap non-reusable mctp2-reserved@431bf0000
>> [ 0.000000] NUMA: Faking a node at [mem
>> 0x0000000400000000-0x000000047fffffff]
>> [ 0.000000] NODE_DATA(0) allocated [mem 0x47a892d40-0x47a89533f]
>> [ 0.000000] Zone ranges:
>> [ 0.000000] DMA [mem
>> 0x0000000400000000-0x000000047fffffff]
>> [ 0.000000] DMA32 empty
>> [ 0.000000] Normal empty
>> [ 0.000000] Movable zone start for each node
>> [ 0.000000] Early memory node ranges
>> [ 0.000000] node 0: [mem
>> 0x0000000400000000-0x00000004237fffff]
>> [ 0.000000] node 0: [mem
>> 0x0000000423800000-0x0000000431bfffff]
>> [ 0.000000] node 0: [mem
>> 0x0000000431c00000-0x000000047fdfffff]
>> [ 0.000000] node 0: [mem 0x000000047fe00000-0x000000047fffffff]
>> [ 0.000000] Initmem setup node 0 [mem
>> 0x0000000400000000-0x000000047fffffff]
>> [ 0.000000] cma: Reserved 32 MiB at 0x0000000401800000
>> [ 0.000000] psci: probing for conduit method from DT.
>> [ 0.000000] psci: PSCIv1.1 detected in firmware.
>> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
>> [ 0.000000] psci: Trusted OS migration not required
>> [ 0.000000] psci: SMC Calling Convention v1.5
>> [ 0.000000] percpu: Embedded 31 pages/cpu s88216 r8192 d30568
>> u126976
>> [ 0.000000] Detected VIPT I-cache on CPU0
>> [ 0.000000] CPU features: detected: GICv3 CPU interface
>> [ 0.000000] alternatives: applying boot alternatives
>> [ 0.000000] Kernel command line: console=ttyS12,115200n8
>> root=/dev/ram rw earlycon
>> [ 0.000000] printk: log buffer data + meta data: 131072 + 458752 =
>> 589824 bytes
>> [ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152
>> bytes, linear)
>> [ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576
>> bytes, linear)
>> [ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 2MB
>> [ 0.000000] software IO TLB: area num 4.
>> [ 0.000000] software IO TLB: mapped [mem
>> 0x0000000478300000-0x0000000478500000] (2MB)
>> [ 0.000000] Fallback order for Node 0: 0
>> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 524288
>> [ 0.000000] Policy zone: DMA
>> [ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
>> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4,
>> Nodes=1
>> [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
>> [ 0.000000] rcu: RCU event tracing is enabled.
>> [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to
>> nr_cpu_ids=4.
>> [ 0.000000] Trampoline variant of Tasks RCU enabled.
>> [ 0.000000] Tracing variant of Tasks RCU enabled.
>> [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25
>> jiffies.
>> [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
>> [ 0.000000] RCU Tasks: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1
>> rcu_task_cpu_ids=4.
>> [ 0.000000] RCU Tasks Trace: Setting shift to 2 and lim to 1
>> rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
>> [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
>> [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
>> [ 0.000000] GICv3: 256 SPIs implemented
>> [ 0.000000] GICv3: 0 Extended SPIs implemented
>> [ 0.000000] Root IRQ handler: gic_handle_irq
>> [ 0.000000] GICv3: GICv3 features: 16 PPIs
>> [ 0.000000] GICv3: GICD_CTLR.DS=1, SCR_EL3.FIQ=1
>> [ 0.000000] GICv3: CPU0: found redistributor 0 region
>> 0:0x0000000012280000
>> [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
>> [ 0.000000] arch_timer: cp15 timer running at 1600.00MHz (phys).
>> [ 0.000000] clocksource: arch_sys_counter: mask: 0x1fffffffffffffff
>> max_cycles: 0x171024fa93b, max_idle_ns: 440795253189 ns
>> [ 0.000037] sched_clock: 61 bits at 1600MHz, resolution 0ns, wraps every
>> 4398046511103ns
>> [ 0.006379] Console: colour dummy device 80x25
>> [ 0.008502] Calibrating delay loop (skipped), value calculated using timer
>> frequency.. 3200.00 BogoMIPS (lpj=6400000)
>> [ 0.008572] pid_max: default: 32768 minimum: 301
>> [ 0.010747] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes,
>> linear)
>> [ 0.010795] Mountpoint-cache hash table entries: 4096 (order: 3, 32768
>> bytes, linear)
>> [ 0.037047] rcu: Hierarchical SRCU implementation.
>> [ 0.037077] rcu: Max phase no-delay instances is 1000.
>> [ 0.038351] Timer migration: 1 hierarchy levels; 8 children per group; 1
>> crossnode level
>> [ 0.041363] ASPEED AST2700 rev A2 (06020103)
>> [ 0.042677] smp: Bringing up secondary CPUs ...
>> [ 0.045789] Detected VIPT I-cache on CPU1
>> [ 0.046337] GICv3: CPU1: found redistributor 1 region
>> 0:0x00000000122a0000
>> [ 0.046467] CPU1: Booted secondary processor 0x0000000001
>> [0x411fd040]
>> [ 0.050519] Detected VIPT I-cache on CPU2
>> [ 0.050686] GICv3: CPU2: found redistributor 2 region
>> 0:0x00000000122c0000
>> [ 0.050765] CPU2: Booted secondary processor 0x0000000002
>> [0x411fd040]
>> [ 0.052102] Detected VIPT I-cache on CPU3
>> [ 0.052264] GICv3: CPU3: found redistributor 3 region
>> 0:0x00000000122e0000
>> [ 0.052345] CPU3: Booted secondary processor 0x0000000003
>> [0x411fd040]
>> [ 0.052712] smp: Brought up 1 node, 4 CPUs
>> [ 0.052729] SMP: Total of 4 processors activated.
>> [ 0.052743] CPU: All CPU(s) started at EL2
>> [ 0.052780] CPU features: detected: 32-bit EL0 Support
>> [ 0.052821] CPU features: detected: CRC32 instructions
>> [ 0.052910] CPU features: detected: PMUv3
>> [ 0.059753] alternatives: applying system-wide alternatives
>> [ 0.070608] Memory: 1673568K/2097152K available (14592K kernel code,
>> 2014K rwdata, 5568K rodata, 1408K init, 524K bss, 303892K reserved, 114688K
>> cma-reserved)
>> [ 0.088349] devtmpfs: initialized
>> [ 0.110897] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff,
>> max_idle_ns: 7645041785100000 ns
>> [ 0.111263] posixtimers hash table entries: 2048 (order: 3, 32768 bytes,
>> linear)
>> [ 0.111895] futex hash table entries: 1024 (65536 bytes on 1 NUMA nodes,
>> total 64 KiB, linear).
>> [ 0.113861] 26688 pages in range for non-PLT usage
>> [ 0.114239] 518208 pages in range for PLT usage
>> [ 0.115151] pinctrl core: initialized pinctrl subsystem
>> [ 0.135658] NET: Registered PF_NETLINK/PF_ROUTE protocol family
>> [ 0.144194] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic
>> allocations
>> [ 0.144873] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for
>> atomic allocations
>> [ 0.145400] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for
>> atomic allocations
>> [ 0.145718] audit: initializing netlink subsys (disabled)
>> [ 0.147488] audit: type=2000 audit(0.140:1): state=initialized
>> audit_enabled=0 res=1
>> [ 0.149211] cpuidle: using governor menu
>> [ 0.149955] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
>> [ 0.150560] ASID allocator initialised with 65536 entries
>> [ 0.216875] iommu: Default domain type: Translated
>> [ 0.216907] iommu: DMA domain TLB invalidation policy: strict mode
>> [ 0.220788] SCSI subsystem initialized
>> [ 0.221600] usbcore: registered new interface driver usbfs
>> [ 0.221813] usbcore: registered new interface driver hub
>> [ 0.221908] usbcore: registered new device driver usb
>> [ 0.222221] mc: Linux media interface: v0.10
>> [ 0.222262] videodev: Linux video capture interface: v2.00
>> [ 0.222358] pps_core: LinuxPPS API ver. 1 registered
>> [ 0.222364] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo
>> Giometti <giometti@linux.it>
>> [ 0.222392] PTP clock support registered
>> [ 0.222497] EDAC MC: Ver: 3.0.0
>> [ 0.223354] scmi_core: SCMI protocol bus registered
>> [ 0.231561] mctp: management component transport protocol core
>> [ 0.231573] NET: Registered PF_MCTP protocol family
>> [ 0.232784] vgaarb: loaded
>> [ 0.235288] clocksource: Switched to clocksource arch_sys_counter
>> [ 0.237125] VFS: Disk quotas dquot_6.6.0
>> [ 0.237189] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>> [ 0.252368] NET: Registered PF_INET protocol family
>> [ 0.253271] IP idents hash table entries: 32768 (order: 6, 262144 bytes,
>> linear)
>> [ 0.256584] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2,
>> 16384 bytes, linear)
>> [ 0.256622] Table-perturb hash table entries: 65536 (order: 6, 262144
>> bytes, linear)
>> [ 0.256661] TCP established hash table entries: 16384 (order: 5, 131072
>> bytes, linear)
>> [ 0.257174] TCP bind hash table entries: 16384 (order: 7, 524288 bytes,
>> linear)
>> [ 0.257342] TCP: Hash tables configured (established 16384 bind 16384)
>> [ 0.258127] UDP hash table entries: 1024 (order: 4, 65536 bytes, linear)
>> [ 0.258261] UDP-Lite hash table entries: 1024 (order: 4, 65536 bytes,
>> linear)
>> [ 0.258919] NET: Registered PF_UNIX/PF_LOCAL protocol family
>> [ 0.259388] PCI: CLS 0 bytes, default 64
>> [ 0.262222] Trying to unpack rootfs image as initramfs...
>> [ 0.262737] Initialise system trusted keyrings
>> [ 0.263942] workingset: timestamp_bits=42 max_order=19
>> bucket_order=0
>> [ 0.266013] squashfs: version 4.0 (2009/01/31) Phillip Lougher
>> [ 0.266194] jffs2: version 2.2. (SUMMARY) © 2001-2006 Red Hat, Inc.
>> [ 0.296367] NET: Registered PF_ALG protocol family
>> [ 0.296561] Key type asymmetric registered
>> [ 0.296676] Asymmetric key parser 'x509' registered
>> [ 0.297006] Block layer SCSI generic (bsg) driver version 0.4 loaded (major
>> 243)
>> [ 0.297097] io scheduler mq-deadline registered
>> [ 0.297134] io scheduler kyber registered
>> [ 0.297360] io scheduler bfq registered
>> [ 0.310863] aspeed_usb_phy3 12010000.usb-phy3: Probed USB PHY3
>> [ 0.311709] aspeed_usb_phy3 12020000.usb-phy3: Probed USB PHY3
>> [ 0.323247] ledtrig-cpu: registered to indicate activity on CPUs
>> [ 0.324971] ipmi-bt-host 12c19140.pcie-ibt: initialised channel 2 at IO
>> address 0xe4
>> [ 0.325436] ipmi-bt-host 12c19940.pcie-ibt: initialised channel 3 at IO
>> address 0xe4
>> [ 0.326029] ipmi-bt-host 14c31140.ibt: initialised channel 0 at IO address
>> 0xe4
>> [ 0.326393] ipmi-bt-host 14c32140.ibt: initialised channel 1 at IO address
>> 0xe4
>> [ 0.327619] aspeed-kcs-bmc 12c19024.pcie-kcs: Initialised IPMI client for
>> channel 8
>> [ 0.327656] aspeed-kcs-bmc 12c19024.pcie-kcs: Initialised channel 8 at IO
>> address 0x3a0
>> [ 0.328103] aspeed-kcs-bmc 12c19028.pcie-kcs: Initialised IPMI client for
>> channel 9
>> [ 0.328112] aspeed-kcs-bmc 12c19028.pcie-kcs: Initialised channel 9 at IO
>> address 0x3a8
>> [ 0.328481] aspeed-kcs-bmc 12c1902c.pcie-kcs: Initialised IPMI client for
>> channel 10
>> [ 0.328490] aspeed-kcs-bmc 12c1902c.pcie-kcs: Initialised channel 10 at
>> IO address 0x3a2
>> [ 0.328832] aspeed-kcs-bmc 12c19114.pcie-kcs: Initialised IPMI client for
>> channel 11
>> [ 0.328841] aspeed-kcs-bmc 12c19114.pcie-kcs: Initialised channel 11 at
>> IO address 0x3a4
>> [ 0.329240] aspeed-kcs-bmc 12c19824.pcie-kcs: Initialised IPMI client for
>> channel 12
>> [ 0.329248] aspeed-kcs-bmc 12c19824.pcie-kcs: Initialised channel 12 at
>> IO address 0x3a0
>> [ 0.329852] aspeed-kcs-bmc 12c19828.pcie-kcs: Initialised IPMI client for
>> channel 13
>> [ 0.329860] aspeed-kcs-bmc 12c19828.pcie-kcs: Initialised channel 13 at
>> IO address 0x3a8
>> [ 0.330154] aspeed-kcs-bmc 12c1982c.pcie-kcs: Initialised IPMI client for
>> channel 14
>> [ 0.330162] aspeed-kcs-bmc 12c1982c.pcie-kcs: Initialised channel 14 at
>> IO address 0x3a2
>> [ 0.330497] aspeed-kcs-bmc 12c19914.pcie-kcs: Initialised IPMI client for
>> channel 15
>> [ 0.330506] aspeed-kcs-bmc 12c19914.pcie-kcs: Initialised channel 15 at
>> IO address 0x3a4
>> [ 0.331245] aspeed-kcs-bmc 14c31024.lpc-kcs: Initialised IPMI client for
>> channel 0
>> [ 0.331256] aspeed-kcs-bmc 14c31024.lpc-kcs: Initialised channel 0 at IO
>> address 0xca0
>> [ 0.331599] aspeed-kcs-bmc 14c31028.lpc-kcs: Initialised IPMI client for
>> channel 1
>> [ 0.331608] aspeed-kcs-bmc 14c31028.lpc-kcs: Initialised channel 1 at IO
>> address 0xca8
>> [ 0.332047] aspeed-kcs-bmc 14c3102c.lpc-kcs: Initialised IPMI client for
>> channel 2
>> [ 0.332058] aspeed-kcs-bmc 14c3102c.lpc-kcs: Initialised channel 2 at IO
>> address 0xca2
>> [ 0.332393] aspeed-kcs-bmc 14c31114.lpc-kcs: Initialised IPMI client for
>> channel 3
>> [ 0.332402] aspeed-kcs-bmc 14c31114.lpc-kcs: Initialised channel 3 at IO
>> address 0xca4
>> [ 0.332793] aspeed-kcs-bmc 14c32024.kcs: Initialised IPMI client for
>> channel 4
>> [ 0.332801] aspeed-kcs-bmc 14c32024.kcs: Initialised channel 4 at IO
>> address 0xca0
>> [ 0.333107] aspeed-kcs-bmc 14c32028.kcs: Initialised IPMI client for
>> channel 5
>> [ 0.333115] aspeed-kcs-bmc 14c32028.kcs: Initialised channel 5 at IO
>> address 0xca8
>> [ 0.333408] aspeed-kcs-bmc 14c3202c.kcs: Initialised IPMI client for
>> channel 6
>> [ 0.333425] aspeed-kcs-bmc 14c3202c.kcs: Initialised channel 6 at IO
>> address 0xca2
>> [ 0.333731] aspeed-kcs-bmc 14c32114.kcs: Initialised IPMI client for
>> channel 7
>> [ 0.333739] aspeed-kcs-bmc 14c32114.kcs: Initialised channel 7 at IO
>> address 0xca4
>> [ 0.335242] aspeed_bmc_dev 12110000.bmc-dev: reserved memory is
>> beyond device's set DMA address range
>> [ 0.335287] aspeed_bmc_dev 12110000.bmc-dev: assigned reserved
>> memory node bmc-dev0-memory@423800000
>> [ 0.336909] aspeed_bmc_dev 12110000.bmc-dev: aspeed bmc device:
>> driver successfully loaded.
>> [ 0.337060] aspeed_bmc_dev 12120000.bmc-dev: reserved memory is
>> beyond device's set DMA address range
>> [ 0.337068] aspeed_bmc_dev 12120000.bmc-dev: assigned reserved
>> memory node bmc-dev1-memory@423900000
>> [ 0.337826] aspeed_bmc_dev 12120000.bmc-dev: aspeed bmc device:
>> driver successfully loaded.
>> [ 0.343471] aspeed-uart-routing 14c31098.uart-routing: module loaded
>> [ 0.343602] aspeed-uart-routing 14c32098.uart-routing: module loaded
>> [ 0.344331] aspeed-xdma 12c04000.xdma: reserved memory is beyond
>> device's set DMA address range
>> [ 0.344341] aspeed-xdma 12c04000.xdma: assigned reserved memory
>> node xdma0
>> [ 0.346934] aspeed-xdma 12c05000.xdma: reserved memory is beyond
>> device's set DMA address range
>> [ 0.346945] aspeed-xdma 12c05000.xdma: assigned reserved memory
>> node xdma1
>> [ 0.389006] aspeed_usb_phy3 12010000.usb-phy3: Wait phy3 init timed
>> out
>> [ 0.389059] phy phy-12010000.usb-phy3.3: phy init failed --> -110
>> [ 0.389134] aspeed_usb_hp soc@10000000:usb3ahp: failed to init usb3
>> phy
>> [ 0.389309] aspeed_usb_hp soc@10000000:usb3ahp: probe with driver
>> aspeed_usb_hp failed with error -110
>> [ 0.402300] aspeed_usb_phy3 12020000.usb-phy3: Wait phy3 init timed
>> out
>> [ 0.402312] phy phy-12020000.usb-phy3.4: phy init failed --> -110
>> [ 0.402319] aspeed_usb_hp soc@10000000:usb3bhp: failed to init usb3
>> phy
>> [ 0.402325] aspeed_usb_hp soc@10000000:usb3bhp: probe with driver
>> aspeed_usb_hp failed with error -110
>> [ 0.405370] aspeed_pcie_mmbi 12c21000.e2m-config:pcie0-mmbi@0:
>> ASPEED PCIe MMBI Dev 0: driver successfully loaded.
>> [ 0.406781] aspeed_pcie_mmbi 12c22000.e2m-config:pcie1-mmbi@4:
>> ASPEED PCIe MMBI Dev 1: driver successfully loaded.
>> [ 0.408663] aspeed-mctp 12c06000.mctp0: assigned reserved memory
>> node mctp0-reserved@431bd0000
>> [ 0.412243] aspeed-mctp 12c07000.mctp1: assigned reserved memory
>> node mctp1-reserved@431be0000
>> [ 0.413541] aspeed-mctp 14c1a000.mctp2: assigned reserved memory
>> node mctp2-reserved@431bf0000
>> [ 0.415109] ast2700_otp 14c07000.otp: Aspeed OTP driver successfully
>> registered
>> [ 0.458099] Freeing initrd memory: 1312K
>> [ 0.489832] aspeed-espi 14c05000.espi: assigned reserved memory node
>> mcyc0
>> [ 0.495645] aspeed-espi 14c05000.espi: eDAF mode: 0x2
>> [ 0.496444] aspeed-espi 14c05000.espi: module loaded
>> [ 0.497026] ast2700-rtc-over-espi 14c3d000.rtc-over_espi: RTC not ready,
>> deferring probe
>> [ 0.548836] Serial: 8250/16550 driver, 23 ports, IRQ sharing enabled
>> [ 0.561470] 12c18000.serial: ttyS19 at MMIO 0x12c18000 (irq = 78,
>> base_baud = 25000000) is a ASPEED VUART
>> [ 0.563500] 12c18100.serial: ttyS20 at MMIO 0x12c18100 (irq = 79,
>> base_baud = 25000000) is a ASPEED VUART
>> [ 0.564507] 12c18200.serial: ttyS21 at MMIO 0x12c18200 (irq = 80,
>> base_baud = 25000000) is a ASPEED VUART
>> [ 0.565501] 12c18300.serial: ttyS22 at MMIO 0x12c18300 (irq = 81,
>> base_baud = 25000000) is a ASPEED VUART
>> [ 0.566848] 14c33200.serial: ttyS2 at MMIO 0x14c33200 (irq = 82,
>> base_baud = 115384) is a 16550A
>> [ 0.568986] 14c33800.serial: ttyS9 at MMIO 0x14c33800 (irq = 83,
>> base_baud = 115384) is a 16550A
>> [ 0.570059] 14c33b00.serial: ttyS12 at MMIO 0x14c33b00 (irq = 84,
>> base_baud = 115384) is a 16550A
>> [ 0.571430] printk: legacy console [ttyS12] enabled
>> [ 0.599367] DWC_TRNG_DriverSDK_1.00a
>> [ 0.599866] NIST_TRNG: Hardware rel_num=0x0, ext_ver=0x0,
>> ext_enum=0x0
>> [ 1.081562] wait_on_: failed timeout: 00000000
>> [ 1.081679] NIST_TRNG init failed (-21)
>> [ 1.081882] nist_trng nist_trng: probe with driver nist_trng failed with
>> error -21
>> [ 1.100031] brd: module loaded
>> [ 1.108016] loop: module loaded
>> [ 1.137960] spi-aspeed-smc 14000000.spi: user mode and normal read are
>> used
>> [ 1.141534] spi-nor spi0.0: supply vcc not found, using dummy regulator
>> [ 1.162328] spi-aspeed-smc 14000000.spi: CE0 read buswidth: 4
>> [0x406c0641]
>> [ 1.162556] spi-aspeed-smc 14000000.spi: CE0 write buswidth: 4
>> [0x40340602]
>> [ 1.215999] 5 fixed-partitions partitions found on MTD device bmc
>> [ 1.216161] Creating 5 MTD partitions on "bmc":
>> [ 1.216316] 0x000000000000-0x000000400000 : "u-boot"
>> [ 1.218264] 0x000000400000-0x000000420000 : "u-boot-env"
>> [ 1.219554] 0x000000420000-0x000000d20000 : "kernel"
>> [ 1.220982] 0x000000d20000-0x000006000000 : "rofs"
>> [ 1.222261] 0x000006000000-0x000008000000 : "rwfs"
>> [ 1.227788] spi-nor spi0.1: supply vcc not found, using dummy regulator
>> [ 1.228829] spi-aspeed-smc 14000000.spi: Calibration area too uniform
>> [ 1.229072] spi-aspeed-smc 14000000.spi: CE1 read buswidth: 4
>> [0x406c0641]
>> [ 1.229186] spi-aspeed-smc 14000000.spi: CE1 write buswidth: 4
>> [0x40340602]
>> [ 1.247107] spi-aspeed-smc 14010000.spi: user mode and normal read are
>> used
>> [ 1.248480] spi-nor spi1.0: supply vcc not found, using dummy regulator
>> [ 1.249664] spi-aspeed-smc 14010000.spi: Calibration area too uniform
>> [ 1.249758] spi-aspeed-smc 14010000.spi: CE0 read buswidth: 2
>> [0x203c0641]
>> [ 1.249851] spi-aspeed-smc 14010000.spi: CE0 write buswidth: 1
>> [0x00120602]
>> [ 1.259585] spi-aspeed-smc 14020000.spi: user mode and normal read are
>> used
>> [ 1.260535] spi-nor spi2.0: supply vcc not found, using dummy regulator
>> [ 1.260863] spi-nor spi2.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00
>> [ 1.264807] spi_aspeed_txrx 14030000.spi: cs: 0, ctrl_val: 0x00000407
>> [ 1.279202] CAN device driver interface
>> [ 2.288754] aspeed_can 14c3e000.can (unnamed net_device)
>> (uninitialized): timed out for config mode
>> [ 2.289000] aspeed_can 14c3e000.can: probe with driver aspeed_can
>> failed with error -110
>> [ 2.291357] ftgmac100 14050000.ethernet: Read MAC address
>> 52:54:00:12:34:56 from chip
>> [ 2.292825] RTL8211E Gigabit Ethernet 14040000.mdio-1:00: attached PHY
>> driver (mii_bus:phy_addr=14040000.mdio-1:00, irq=POLL)
>> [ 2.312021] ftgmac100 14050000.ethernet eth0: irq 86, mapped at
>> (____ptrval____)
>> [ 2.312736] ftgmac100 14060000.ethernet: Read MAC address
>> 52:54:00:12:34:57 from chip
>> [ 2.312994] RTL8211E Gigabit Ethernet 14040008.mdio-1:00: attached PHY
>> driver (mii_bus:phy_addr=14040008.mdio-1:00, irq=POLL)
>> [ 2.331522] ftgmac100 14060000.ethernet eth1: irq 87, mapped at
>> (____ptrval____)
>> [ 2.331821] e100: Intel(R) PRO/100 Network Driver
>> [ 2.331879] e100: Copyright(c) 1999-2006 Intel Corporation
>> [ 2.332018] e1000: Intel(R) PRO/1000 Network Driver
>> [ 2.332088] e1000: Copyright (c) 1999-2006 Intel Corporation.
>> [ 2.332213] e1000e: Intel(R) PRO/1000 Network Driver
>> [ 2.332303] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
>> [ 2.332431] igb: Intel(R) Gigabit Ethernet Network Driver
>> [ 2.332511] igb: Copyright (c) 2007-2014 Intel Corporation.
>> [ 2.332639] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver
>> [ 2.332726] ixgbe: Copyright (c) 1999-2016 Intel Corporation.
>> [ 2.333468] MCTP I2C interface driver
>> [ 2.333816] usbcore: registered new interface driver mctp-usb
>> [ 2.333952] usbcore: registered new interface driver cdc_ether
>> [ 2.334071] usbcore: registered new interface driver cdc_eem
>> [ 2.334194] usbcore: registered new interface driver net1080
>> [ 2.334317] usbcore: registered new interface driver cdc_subset
>> [ 2.334434] usbcore: registered new interface driver zaurus
>> [ 2.334550] usbcore: registered new interface driver cdc_ncm
>> [ 2.334670] usbcore: registered new interface driver r8153_ecm
>> [ 2.336620] platform-uhci 14110000.usb: Detected 2 ports from
>> device-tree
>> [ 2.336765] platform-uhci 14110000.usb: Enabled Aspeed implementation
>> workarounds
>> [ 2.337202] platform-uhci 14110000.usb: Generic UHCI Host Controller
>> [ 2.337204] ehci-platform 14123000.usb: EHCI Host Controller
>> [ 2.337639] ehci-platform 14123000.usb: new USB bus registered, assigned
>> bus number 2
>> [ 2.337640] platform-uhci 14110000.usb: new USB bus registered, assigned
>> bus number 1
>> [ 2.338409] platform-uhci 14110000.usb: irq 89, io mem 0x14110000
>> [ 2.338627] platform-uhci 14110000.usb: Device does not have specific
>> DMA pool
>> [ 2.339110] ehci-platform 14123000.usb: irq 88, io mem 0x14123000
>> [ 2.344125] usb usb1: New USB device found, idVendor=1d6b,
>> idProduct=0001, bcdDevice= 6.18
>> [ 2.344272] usb usb1: New USB device strings: Mfr=3, Product=2,
>> SerialNumber=1
>> [ 2.344375] usb usb1: Product: Generic UHCI Host Controller
>> [ 2.344456] usb usb1: Manufacturer: Linux
>> 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd
>> [ 2.344560] usb usb1: SerialNumber: 14110000.usb
>> [ 2.347100] hub 1-0:1.0: USB hub found
>> [ 2.347598] hub 1-0:1.0: 2 ports detected
>> [ 2.351199] ehci-platform 14123000.usb: USB 2.0 started, EHCI 1.00
>> [ 2.351206] usbcore: registered new interface driver cdc_acm
>> [ 2.351251] cdc_acm: USB Abstract Control Model driver for USB modems
>> and ISDN adapters
>> [ 2.351648] usb usb2: New USB device found, idVendor=1d6b,
>> idProduct=0002, bcdDevice= 6.18
>> [ 2.351794] usb usb2: New USB device strings: Mfr=3, Product=2,
>> SerialNumber=1
>> [ 2.351918] usb usb2: Product: EHCI Host Controller
>> [ 2.351999] usb usb2: Manufacturer: Linux
>> 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd
>> [ 2.352005] usbcore: registered new interface driver uas
>> [ 2.352094] usb usb2: SerialNumber: 14123000.usb
>> [ 2.352418] usbcore: registered new interface driver usb-storage
>> [ 2.352828] usbcore: registered new interface driver pl2303
>> [ 2.352891] hub 2-0:1.0: USB hub found
>> [ 2.353110] usbserial: USB Serial support registered for pl2303
>> [ 2.353190] hub 2-0:1.0: 6 ports detected
>> [ 2.363145] platform-uhci 14110000.usb: Controller not stopped yet!
>> [ 2.366436] aspeed_vhub 12060000.usb-vhub: PCIe EHCI to vhub
>> [ 2.368834] aspeed_vhub 12060000.usb-vhub: Initialized virtual hub in
>> USB2 mode
>> [ 2.379205] aspeed_vhub 12062000.usb-vhub: PCIe EHCI to vhub
>> [ 2.380707] aspeed_vhub 12062000.usb-vhub: Initialized virtual hub in
>> USB2 mode
>> [ 2.392449] aspeed_vhub 14120000.usb-vhub: Initialized virtual hub in
>> USB2 mode
>> [ 2.396382] aspeed-rtc 12c0f000.rtc: registered as rtc0
>> [ 2.396904] aspeed-rtc 12c0f000.rtc: setting system clock to
>> 1970-01-01T01:01:01 UTC (3661)
>> [ 2.397557] i2c_dev: i2c /dev entries driver
>> [ 2.401063] i2c_ast2600 14c0f100.i2c-bus: i2c-bus [0]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.401971] i2c_ast2600 14c0f200.i2c-bus: i2c-bus [1]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.402763] i2c_ast2600 14c0f300.i2c-bus: i2c-bus [2]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.403689] i2c_ast2600 14c0f400.i2c-bus: i2c-bus [3]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.404448] i2c_ast2600 14c0f500.i2c-bus: i2c-bus [4]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.405292] i2c_ast2600 14c0f600.i2c-bus: i2c-bus [5]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.406064] i2c_ast2600 14c0f700.i2c-bus: i2c-bus [6]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.406787] i2c_ast2600 14c0f800.i2c-bus: i2c-bus [7]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.407562] i2c_ast2600 14c0f900.i2c-bus: i2c-bus [8]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.408366] i2c_ast2600 14c0fc00.i2c-bus: i2c-bus [11]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.409112] i2c_ast2600 14c0fd00.i2c-bus: i2c-bus [12]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.409807] i2c_ast2600 14c0fe00.i2c-bus: i2c-bus [13]: adapter [100 KHz]
>> mode [2] version [1]
>> [ 2.410928] 14c20000.i3c0: MIPI I3C HCI v0.0 r00
>> [ 2.411100] 14c20000.i3c0: unsupported HCI version
>> [ 2.411231] mipi-i3c-hci 14c20000.i3c0: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.411493] 14c21000.i3c1: MIPI I3C HCI v0.0 r00
>> [ 2.411571] 14c21000.i3c1: unsupported HCI version
>> [ 2.411636] mipi-i3c-hci 14c21000.i3c1: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.411863] 14c22000.i3c2: MIPI I3C HCI v0.0 r00
>> [ 2.411934] 14c22000.i3c2: unsupported HCI version
>> [ 2.411999] mipi-i3c-hci 14c22000.i3c2: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.412217] 14c23000.i3c3: MIPI I3C HCI v0.0 r00
>> [ 2.412290] 14c23000.i3c3: unsupported HCI version
>> [ 2.412355] mipi-i3c-hci 14c23000.i3c3: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.412574] 14c24000.i3c4: MIPI I3C HCI v0.0 r00
>> [ 2.412644] 14c24000.i3c4: unsupported HCI version
>> [ 2.412710] mipi-i3c-hci 14c24000.i3c4: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.412927] 14c25000.i3c5: MIPI I3C HCI v0.0 r00
>> [ 2.412997] 14c25000.i3c5: unsupported HCI version
>> [ 2.413062] mipi-i3c-hci 14c25000.i3c5: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.413280] 14c26000.i3c6: MIPI I3C HCI v0.0 r00
>> [ 2.413350] 14c26000.i3c6: unsupported HCI version
>> [ 2.413414] mipi-i3c-hci 14c26000.i3c6: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.413659] 14c27000.i3c7: MIPI I3C HCI v0.0 r00
>> [ 2.413734] 14c27000.i3c7: unsupported HCI version
>> [ 2.413798] mipi-i3c-hci 14c27000.i3c7: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.414017] 14c28000.i3c8: MIPI I3C HCI v0.0 r00
>> [ 2.414087] 14c28000.i3c8: unsupported HCI version
>> [ 2.414153] mipi-i3c-hci 14c28000.i3c8: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.414371] 14c29000.i3c9: MIPI I3C HCI v0.0 r00
>> [ 2.414442] 14c29000.i3c9: unsupported HCI version
>> [ 2.414506] mipi-i3c-hci 14c29000.i3c9: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.414742] 14c2a000.i3c10: MIPI I3C HCI v0.0 r00
>> [ 2.414817] 14c2a000.i3c10: unsupported HCI version
>> [ 2.414884] mipi-i3c-hci 14c2a000.i3c10: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.415160] 14c2b000.i3c11: MIPI I3C HCI v0.0 r00
>> [ 2.415243] 14c2b000.i3c11: unsupported HCI version
>> [ 2.415310] mipi-i3c-hci 14c2b000.i3c11: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.415542] 14c2c000.i3c12: MIPI I3C HCI v0.0 r00
>> [ 2.415613] 14c2c000.i3c12: unsupported HCI version
>> [ 2.415679] mipi-i3c-hci 14c2c000.i3c12: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.415900] 14c2d000.i3c13: MIPI I3C HCI v0.0 r00
>> [ 2.415973] 14c2d000.i3c13: unsupported HCI version
>> [ 2.416041] mipi-i3c-hci 14c2d000.i3c13: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.416267] 14c2e000.i3c14: MIPI I3C HCI v0.0 r00
>> [ 2.416340] 14c2e000.i3c14: unsupported HCI version
>> [ 2.416405] mipi-i3c-hci 14c2e000.i3c14: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.416647] 14c2f000.i3c15: MIPI I3C HCI v0.0 r00
>> [ 2.416725] 14c2f000.i3c15: unsupported HCI version
>> [ 2.416790] mipi-i3c-hci 14c2f000.i3c15: probe with driver mipi-i3c-hci
>> failed with error -93
>> [ 2.418547] aspeed-video 120a0000.video: irq 106
>> [ 2.418735] aspeed-video 120a0000.video: dvi mode-detection irq 107
>> [ 2.418985] aspeed-video 120a0000.video: assigned reserved memory
>> node video0
>> [ 2.432446] aspeed-video 120a0000.video: alloc mem size(18493440) at
>> 0x000000047de00000 for pool
>> [ 2.435819] aspeed-video 120a0000.video: aspeed-video0 registered as
>> /dev/video0
>> [ 2.436890] aspeed-video 120a1000.video: irq 108
>> [ 2.437029] aspeed-video 120a1000.video: assigned reserved memory
>> node video1
>> [ 2.449658] aspeed-video 120a1000.video: alloc mem size(18493440) at
>> 0x000000047ac00000 for pool
>> [ 2.450250] aspeed-video 120a1000.video: aspeed-video1 registered as
>> /dev/video1
>> [ 2.458433] sdhci: Secure Digital Host Controller Interface driver
>> [ 2.458547] sdhci: Copyright(c) Pierre Ossman
>> [ 2.458614] sdhci-pltfm: SDHCI platform and OF driver helper
>> [ 2.461200] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
>> [ 2.462065] sdhci-aspeed 12090100.sdhci: Configured for slot 0
>> [ 2.463137] aspeed_crypto 12070000.crypto: will run requests pump with
>> realtime priority
>> [ 2.466408] aspeed_crypto 12070000.crypto: will run requests pump with
>> realtime priority
>> [ 2.467319] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable
>> to find vdd-hba-supply regulator, assuming enabled
>> [ 2.467557] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable
>> to find vcc-supply regulator, assuming enabled
>> [ 2.467743] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable
>> to find vccq-supply regulator, assuming enabled
>> [ 2.468017] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg: Unable
>> to find vccq2-supply regulator, assuming enabled
>> [ 2.468196] aspeed_crypto 12070000.crypto: cannot find sbc node
>> [ 2.468648] aspeed_crypto 12070000.crypto: Aspeed Crypto Accelerator
>> successfully registered
>> [ 2.469278] aspeed-ufshcd 12c08200.ufshc: Command Descriptor Memory
>> allocation failed
>> [ 2.469443] aspeed-ufshcd 12c08200.ufshc: Memory allocation failed
>> [ 2.469825] aspeed-ufshcd 12c08200.ufshc: ufshcd_pltfrm_init() failed -12
>> [ 2.469962] aspeed-ufshcd 12c08200.ufshc: probe with driver
>> aspeed-ufshcd failed with error -12
>> [ 2.470412] aspeed_rsss 12080000.crypto: will run requests pump with
>> realtime priority
>> [ 2.471110] aspeed_rsss 12080000.crypto: RSA init failed
>> [ 2.471245] aspeed_rsss 12080000.crypto: probe with driver aspeed_rsss
>> failed with error -5
>> [ 2.472595] aspeed_ecdsa 12c1e000.crypto: probe with driver
>> aspeed_ecdsa failed with error -5
>> [ 2.473678] usbcore: registered new interface driver usbhid
>> [ 2.473827] usbhid: USB HID core driver
>> [ 2.485896] hw perfevents: enabled with armv8_cortex_a35 PMU driver, 7
>> (0,8000003f) counters available
>> [ 2.487770] optee: probing for conduit method.
>> I/TC: Reserved shared memory is disabled
>> I/TC: Dynamic shared memory is enabled
>> I/TC: Normal World virtualization support is disabled
>> I/TC: Asynchronous notifications are disabled
>> [ 2.488394] optee: revision 4.4 (8f645256efc0dc66)
>> [ 2.489279] watchdog: NMI not fully supported
>> [ 2.489417] watchdog: Hard watchdog permanently disabled
>> [ 2.490296] optee: dynamic shared memory is enabled
>> [ 2.496286] optee: initialized driver
>> [ 2.499251] mmc0: SDHCI controller on 12090100.sdhci [12090100.sdhci]
>> using ADMA 64-bit
>> [ 2.499601] pktgen: Packet Generator for packet performance testing.
>> Version: 2.75
>> [ 2.502051] NET: Registered PF_INET6 protocol family
>> [ 2.508037] Segment Routing with IPv6
>> [ 2.508286] In-situ OAM (IOAM) with IPv6
>> [ 2.508812] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
>> [ 2.510670] NET: Registered PF_PACKET protocol family
>> [ 2.511122] can: controller area network core
>> [ 2.511471] NET: Registered PF_CAN protocol family
>> [ 2.511597] can: raw protocol
>> [ 2.511791] can: broadcast manager protocol
>> [ 2.512029] can: netlink gateway - max_hops=1
>> [ 2.512210] 8021q: 802.1Q VLAN Support v1.8
>> [ 2.520069] registered taskstats version 1
>> [ 2.521401] Loading compiled-in X.509 certificates
>> [ 2.531388] Demotion targets for Node 0: null
>> [ 2.532261] Key type .fscrypt registered
>> [ 2.532350] Key type fscrypt-provisioning registered
>> [ 2.564198] mmc0: Failed to initialize a non-removable card
>> [ 2.573543] alg: skcipher: aspeed-ctr-des encryption test failed (wrong
>> result) on test vector 0, cfg="in-place (one sglist)"
>> [ 2.573863] alg: self-tests for ctr(des) using aspeed-ctr-des failed (rc=-22)
>> [ 2.573938] ------------[ cut here ]------------
>> [ 2.574155] alg: self-tests for ctr(des) using aspeed-ctr-des failed (rc=-22)
>> [ 2.574401] WARNING: CPU: 3 PID: 116 at
>> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
>> [ 2.574972] Modules linked in:
>> [ 2.575579] CPU: 3 UID: 0 PID: 116 Comm: cryptomgr_test Not tainted
>> 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
>> [ 2.575776] Hardware name: AST2700 EVB (DT)
>> [ 2.575979] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
>> BTYPE=--)
>> [ 2.576125] pc : alg_test+0x490/0x5bc
>> [ 2.576215] lr : alg_test+0x490/0x5bc
>> [ 2.576286] sp : ffff800081f7bd50
>> [ 2.576358] x29: ffff800081f7bdf0 x28: 0000000000000004 x27:
>> ffff800080eaa568
>> [ 2.576584] x26: 0000000000000000 x25: 00000000ffffffff x24:
>> 0000000000000004
>> [ 2.576809] x23: ffff0000065d1680 x22: 0000000000001085 x21:
>> ffff0000065d1600
>> [ 2.576981] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
>> 000000000000000a
>> [ 2.577104] x17: 32322d3d63722820 x16: 64656c6961662073 x15:
>> 0000000000000000
>> [ 2.577223] x14: 0000000000000000 x13: 00000000ffff0a01 x12:
>> 00000000ffffffea
>> [ 2.577345] x11: ffff800081f7bab8 x10: 00000000ffffefff x9 :
>> ffff8000815ae3c8
>> [ 2.577486] x8 : ffff8000815ae420 x7 : 0000000000017fe8 x6 :
>> c0000000ffffefff
>> [ 2.577609] x5 : 0000000000057fa8 x4 : 0000000000000000 x3 :
>> 0000000000000000
>> [ 2.577744] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
>> ffff000006de2400
>> [ 2.578021] Call trace:
>> [ 2.578164] alg_test+0x490/0x5bc (P)
>> [ 2.578302] cryptomgr_test+0x24/0x44
>> [ 2.578384] kthread+0x140/0x220
>> [ 2.578455] ret_from_fork+0x10/0x20
>> [ 2.578604] ---[ end trace 0000000000000000 ]---
>> [ 2.579215] alg: skcipher: aspeed-ctr-tdes encryption test failed (wrong
>> result) on test vector 0, cfg="in-place (one sglist)"
>> [ 2.579437] alg: self-tests for ctr(des3_ede) using aspeed-ctr-tdes failed
>> (rc=-22)
>> [ 2.579445] ------------[ cut here ]------------
>> [ 2.579673] alg: self-tests for ctr(des3_ede) using aspeed-ctr-tdes failed
>> (rc=-22)
>> [ 2.580184] WARNING: CPU: 0 PID: 115 at
>> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
>> [ 2.580525] Modules linked in:
>> [ 2.580726] CPU: 0 UID: 0 PID: 115 Comm: cryptomgr_test Tainted: G
>> W 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
>> [ 2.580940] Tainted: [W]=WARN
>> [ 2.580992] Hardware name: AST2700 EVB (DT)
>> [ 2.581058] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
>> BTYPE=--)
>> [ 2.581196] pc : alg_test+0x490/0x5bc
>> [ 2.581261] lr : alg_test+0x490/0x5bc
>> [ 2.581335] sp : ffff800081f73d50
>> [ 2.581392] x29: ffff800081f73df0 x28: 0000000000000004 x27:
>> ffff800080eaa568
>> [ 2.581529] x26: 0000000000000000 x25: 00000000ffffffff x24:
>> 0000000000000004
>> [ 2.581655] x23: ffff0000065d1880 x22: 0000000000001085 x21:
>> ffff0000065d1800
>> [ 2.581781] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
>> 0000000000000000
>> [ 2.581904] x17: 0000000000000000 x16: 00000000e820414d x15:
>> ffff000006de1290
>> [ 2.582027] x14: 00000000000002e0 x13: 0000000000000001 x12:
>> 0000000000000001
>> [ 2.582149] x11: 00000000000000c0 x10: 0000000000000b50 x9 :
>> ffff800081f73bc0
>> [ 2.582281] x8 : ffff000006de1db0 x7 : 0000000000000001 x6 :
>> 0000000000007a4f
>> [ 2.582408] x5 : ffff0000054541e0 x4 : ffff000006de1200 x3 :
>> ffff000006de5a00
>> [ 2.582538] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
>> ffff000006de1200
>> [ 2.582670] Call trace:
>> [ 2.582715] alg_test+0x490/0x5bc (P)
>> [ 2.582782] cryptomgr_test+0x24/0x44
>> [ 2.582856] kthread+0x140/0x220
>> [ 2.582921] ret_from_fork+0x10/0x20
>> [ 2.582989] ---[ end trace 0000000000000000 ]---
>> [ 2.620920] alg: skcipher: aspeed-ctr-aes encryption test failed (wrong
>> result) on test vector 0, cfg="in-place (one sglist)"
>> [ 2.621176] alg: self-tests for ctr(aes) using aspeed-ctr-aes failed (rc=-22)
>> [ 2.621185] ------------[ cut here ]------------
>> [ 2.621384] alg: self-tests for ctr(aes) using aspeed-ctr-aes failed (rc=-22)
>> [ 2.621420] WARNING: CPU: 0 PID: 117 at
>> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
>> [ 2.621673] Modules linked in:
>> [ 2.621738] CPU: 0 UID: 0 PID: 117 Comm: cryptomgr_test Tainted: G
>> W 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
>> [ 2.621925] Tainted: [W]=WARN
>> [ 2.621975] Hardware name: AST2700 EVB (DT)
>> [ 2.622044] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
>> BTYPE=--)
>> [ 2.622153] pc : alg_test+0x490/0x5bc
>> [ 2.622218] lr : alg_test+0x490/0x5bc
>> [ 2.622283] sp : ffff800081f83d50
>> [ 2.622337] x29: ffff800081f83df0 x28: 0000000000000004 x27:
>> ffff800080eaa568
>> [ 2.622458] x26: 0000000000000000 x25: 00000000ffffffff x24:
>> 0000000000000004
>> [ 2.622578] x23: ffff0000065d0e80 x22: 0000000000001085 x21:
>> ffff0000065d0e00
>> [ 2.622694] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
>> 000000000000000a
>> [ 2.622811] x17: 32322d3d63722820 x16: 64656c6961662073 x15:
>> 0000000000000000
>> [ 2.622931] x14: 0000000000000000 x13: 00000000ffff0a01 x12:
>> 00000000ffffffea
>> [ 2.623061] x11: ffff800081f83ab8 x10: 00000000ffffefff x9 :
>> ffff8000815ae3c8
>> [ 2.623200] x8 : ffff8000815ae420 x7 : 0000000000017fe8 x6 :
>> c0000000ffffefff
>> [ 2.623325] x5 : 0000000000057fa8 x4 : 0000000000000000 x3 :
>> 0000000000000000
>> [ 2.623447] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
>> ffff000006de3600
>> [ 2.623570] Call trace:
>> [ 2.623625] alg_test+0x490/0x5bc (P)
>> [ 2.623690] cryptomgr_test+0x24/0x44
>> [ 2.623752] kthread+0x140/0x220
>> [ 2.623810] ret_from_fork+0x10/0x20
>> [ 2.623875] ---[ end trace 0000000000000000 ]---
>> [ 2.653308] aspeed_mbox_client 431880000.mbox-bootmcu-1: TX shmem:
>> phys 0x0x0000000431880000 size 1048576
>> [ 2.653484] aspeed_mbox_client 431880000.mbox-bootmcu-1: RX shmem:
>> phys 0x0x0000000431980000 size 1048576
>> [ 2.653616] aspeed_mbox_client 431880000.mbox-bootmcu-1: TX timeout:
>> 10000 ms
>
^ permalink raw reply [flat|nested] 27+ messages in thread* RE: [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700: Drop the AST2700 crypto self-test workaround
2026-07-20 6:29 ` Cédric Le Goater
@ 2026-07-20 7:33 ` Jamin Lin
0 siblings, 0 replies; 27+ messages in thread
From: Jamin Lin @ 2026-07-20 7:33 UTC (permalink / raw)
To: Cédric Le Goater, Daniel P. Berrangé, Peter Maydell,
Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley,
Eric Blake, Markus Armbruster, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:All patches CC here,
open list:ASPEED BMCs
Cc: Troy Lee
Hi Cédric
> Subject: Re: [PATCH v2 17/17] tests/functional/aarch64/test_aspeed_ast2700:
> Drop the AST2700 crypto self-test workaround
>
> On 7/20/26 07:57, Jamin Lin wrote:
> > Hi Cédric
> >
> > The GNUTLS backend currently does not support CTR mode. Could you please
> try using either the GCRYPT or NETTLE backend instead?
> >
> > I mentioned this issue in the cover letter here:
> >
> https://patchwork.kernel.org/project/qemu-devel/cover/20260715033311.164
> 8424-1-jamin_lin@aspeedtech.com/
> >
> > Note: The GNUTLS crypto backend does not support CTR mode.
> >
> > If we decide to support CTR mode with the GNUTLS backend, I'll need to
> investigate whether the underlying GnuTLS library itself supports CTR mode.
> > If it does, I'll prepare another patch series to add CTR mode support to the
> GNUTLS backend.
>
> ok
>
> > The relevant code is here:
> > https://github.com/qemu/qemu/blob/master/crypto/cipher-gnutls.c.inc#L26
>
> we should remove "cryptomgr.notests=1" when all tests pass then.
>
Unfortunately the gnutls library does not support AES-CTR mode: its
gnutls_cipher_algorithm_t enum has no AES-CTR (the only CTR entries are
GOST Magma/Kuznyechik CTR-ACPKM). See:
https://github.com/gnutls/gnutls/blob/master/lib/includes/gnutls/gnutls.h.in#L91
So I will not modify the qcrypto cipher API to support it. It is a gnutls library limitation.
Conclusion: I think this patch can be dropped.
Thanks,
Jamin
/**
* gnutls_cipher_algorithm_t:
* @GNUTLS_CIPHER_UNKNOWN: Value to identify an unknown/unsupported algorithm.
* @GNUTLS_CIPHER_NULL: The NULL (identity) encryption algorithm.
* @GNUTLS_CIPHER_ARCFOUR_128: ARCFOUR stream cipher with 128-bit keys.
* @GNUTLS_CIPHER_3DES_CBC: 3DES in CBC mode.
* @GNUTLS_CIPHER_AES_128_CBC: AES in CBC mode with 128-bit keys.
* @GNUTLS_CIPHER_AES_192_CBC: AES in CBC mode with 192-bit keys.
* @GNUTLS_CIPHER_AES_256_CBC: AES in CBC mode with 256-bit keys.
* @GNUTLS_CIPHER_AES_128_CFB8: AES in CFB8 mode with 128-bit keys.
* @GNUTLS_CIPHER_AES_192_CFB8: AES in CFB8 mode with 192-bit keys.
* @GNUTLS_CIPHER_AES_256_CFB8: AES in CFB8 mode with 256-bit keys.
* @GNUTLS_CIPHER_ARCFOUR_40: ARCFOUR stream cipher with 40-bit keys.
* @GNUTLS_CIPHER_CAMELLIA_128_CBC: Camellia in CBC mode with 128-bit keys.
* @GNUTLS_CIPHER_CAMELLIA_192_CBC: Camellia in CBC mode with 192-bit keys.
* @GNUTLS_CIPHER_CAMELLIA_256_CBC: Camellia in CBC mode with 256-bit keys.
* @GNUTLS_CIPHER_RC2_40_CBC: RC2 in CBC mode with 40-bit keys.
* @GNUTLS_CIPHER_DES_CBC: DES in CBC mode (56-bit keys).
* @GNUTLS_CIPHER_AES_128_GCM: AES in GCM mode with 128-bit keys (AEAD).
* @GNUTLS_CIPHER_AES_256_GCM: AES in GCM mode with 256-bit keys (AEAD).
* @GNUTLS_CIPHER_AES_128_CCM: AES in CCM mode with 128-bit keys (AEAD).
* @GNUTLS_CIPHER_AES_256_CCM: AES in CCM mode with 256-bit keys (AEAD).
* @GNUTLS_CIPHER_AES_128_CCM_8: AES in CCM mode with 64-bit tag and 128-bit keys (AEAD).
* @GNUTLS_CIPHER_AES_256_CCM_8: AES in CCM mode with 64-bit tag and 256-bit keys (AEAD).
* @GNUTLS_CIPHER_CAMELLIA_128_GCM: CAMELLIA in GCM mode with 128-bit keys (AEAD).
* @GNUTLS_CIPHER_CAMELLIA_256_GCM: CAMELLIA in GCM mode with 256-bit keys (AEAD).
* @GNUTLS_CIPHER_SALSA20_256: Salsa20 with 256-bit keys.
* @GNUTLS_CIPHER_ESTREAM_SALSA20_256: Estream's Salsa20 variant with 256-bit keys.
* @GNUTLS_CIPHER_CHACHA20_32: Chacha20 cipher with 96-bit nonces and 32-bit block counters.
* @GNUTLS_CIPHER_CHACHA20_64: Chacha20 cipher with 64-bit nonces and 64-bit block counters.
* @GNUTLS_CIPHER_CHACHA20_POLY1305: The Chacha20 cipher with the Poly1305 authenticator (AEAD).
* @GNUTLS_CIPHER_GOST28147_TC26Z_CFB: GOST 28147-89 (Magma) cipher in CFB mode with TC26 Z S-box.
* @GNUTLS_CIPHER_GOST28147_CPA_CFB: GOST 28147-89 (Magma) cipher in CFB mode with CryptoPro A S-box.
* @GNUTLS_CIPHER_GOST28147_CPB_CFB: GOST 28147-89 (Magma) cipher in CFB mode with CryptoPro B S-box.
* @GNUTLS_CIPHER_GOST28147_CPC_CFB: GOST 28147-89 (Magma) cipher in CFB mode with CryptoPro C S-box.
* @GNUTLS_CIPHER_GOST28147_CPD_CFB: GOST 28147-89 (Magma) cipher in CFB mode with CryptoPro D S-box.
* @GNUTLS_CIPHER_AES_128_XTS: AES in XTS mode with 128-bit key + 128bit tweak key.
* @GNUTLS_CIPHER_AES_256_XTS: AES in XTS mode with 256-bit key + 256bit tweak key.
* Note that the XTS ciphers are message oriented.
* The whole message needs to be provided with a single call, because
* cipher-stealing requires to know where the message actually terminates
* in order to be able to compute where the stealing occurs.
* @GNUTLS_CIPHER_GOST28147_TC26Z_CNT: GOST 28147-89 (Magma) cipher in CNT mode with TC26 Z S-box.
* @GNUTLS_CIPHER_MAGMA_CTR_ACPKM: GOST R 34.12-2015 (Magma) cipher in CTR-ACPKM mode.
* @GNUTLS_CIPHER_KUZNYECHIK_CTR_ACPKM: GOST R 34.12-2015 (Kuznyechik) cipher in CTR-ACPKM mode.
* @GNUTLS_CIPHER_IDEA_PGP_CFB: IDEA in CFB mode (placeholder - unsupported).
* @GNUTLS_CIPHER_3DES_PGP_CFB: 3DES in CFB mode (placeholder - unsupported).
* @GNUTLS_CIPHER_CAST5_PGP_CFB: CAST5 in CFB mode (placeholder - unsupported).
* @GNUTLS_CIPHER_BLOWFISH_PGP_CFB: Blowfish in CFB mode (placeholder - unsupported).
* @GNUTLS_CIPHER_SAFER_SK128_PGP_CFB: Safer-SK in CFB mode with 128-bit keys (placeholder - unsupported).
* @GNUTLS_CIPHER_AES128_PGP_CFB: AES in CFB mode with 128-bit keys (placeholder - unsupported).
* @GNUTLS_CIPHER_AES192_PGP_CFB: AES in CFB mode with 192-bit keys (placeholder - unsupported).
* @GNUTLS_CIPHER_AES256_PGP_CFB: AES in CFB mode with 256-bit keys (placeholder - unsupported).
* @GNUTLS_CIPHER_TWOFISH_PGP_CFB: Twofish in CFB mode (placeholder - unsupported).
* @GNUTLS_CIPHER_AES_128_SIV: AES in SIV mode with 128-bit key.
* @GNUTLS_CIPHER_AES_256_SIV: AES in SIV mode with 256-bit key.
* Note that the SIV ciphers can only be used with
* the AEAD interface, and the IV plays a role as
* the authentication tag while it is prepended to
* the cipher text.
* @GNUTLS_CIPHER_AES_192_GCM: AES in GCM mode with 192-bit keys (AEAD).
* @GNUTLS_CIPHER_AES_128_SIV_GCM: AES in SIV-GCM mode with 128-bit key.
* @GNUTLS_CIPHER_AES_256_SIV_GCM: AES in SIV-GCM mode with 256-bit key.
* @GNUTLS_CIPHER_AES_128_CFB: AES in CFB mode with 128-bit keys.
* @GNUTLS_CIPHER_AES_192_CFB: AES in CFB mode with 192-bit keys.
* @GNUTLS_CIPHER_AES_256_CFB: AES in CFB mode with 256-bit keys.
*
* Enumeration of different symmetric encryption algorithms.
*/
> Thanks,
>
> C.
>
>
> >
> > Thanks,
> > Jamin
> >
> >> From: Cédric Le Goater <clg@kaod.org>
> >> Sent: Monday, July 20, 2026 1:51 PM
> >> To: Jamin Lin <jamin_lin@aspeedtech.com>; Daniel P. Berrangé
> >> <berrange@redhat.com>; Peter Maydell <peter.maydell@linaro.org>;
> Steven
> >> Lee <steven_lee@aspeedtech.com>; Troy Lee <leetroy@gmail.com>; Kane
> >> Chen <kane_chen@aspeedtech.com>; Andrew Jeffery
> >> <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; Eric
> Blake
> >> <eblake@redhat.com>; Markus Armbruster <armbru@redhat.com>;
> Fabiano
> >> Rosas <farosas@suse.de>; Laurent Vivier <lvivier@redhat.com>; Paolo
> Bonzini
> >> <pbonzini@redhat.com>; open list:All patches CC here
> >> <qemu-devel@nongnu.org>; open list:ASPEED BMCs
> >> <qemu-arm@nongnu.org>
> >> Cc: Troy Lee <troy_lee@aspeedtech.com>
> >> Subject: Re: [PATCH v2 17/17]
> tests/functional/aarch64/test_aspeed_ast2700:
> >> Drop the AST2700 crypto self-test workaround
> >>
> >> On 7/15/26 05:33, Jamin Lin wrote:
> >>> The AST2700 boot tests appended 'cryptomgr.notests=1' to the kernel
> >>> command line to skip the Linux crypto manager self-tests.
> >>>
> >>> Now that the HACE crypto engine emulates the crypto command, the
> >>> self-tests pass, so drop the workaround and let them run. This also
> >>> exercises the HACE crypto emulation during the functional boot tests.
> >>>
> >>> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> >>> ---
> >>> tests/functional/aarch64/test_aspeed_ast2700a1.py | 5 -----
> >>> tests/functional/aarch64/test_aspeed_ast2700a2.py | 5 -----
> >>> tests/functional/aarch64/test_aspeed_ast2700fc.py | 5 -----
> >>> 3 files changed, 15 deletions(-)
> >>>
> >>> diff --git a/tests/functional/aarch64/test_aspeed_ast2700a1.py
> >>> b/tests/functional/aarch64/test_aspeed_ast2700a1.py
> >>> index b0c08854da..bc535449b5 100755
> >>> --- a/tests/functional/aarch64/test_aspeed_ast2700a1.py
> >>> +++ b/tests/functional/aarch64/test_aspeed_ast2700a1.py
> >>> @@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
> >>> wait_for_console_pattern(self, 'pass')
> >>> wait_for_console_pattern(self, 'Jumping to BL31 (Trusted
> >>> Firmware-A)')
> >>>
> >>> - def disable_kernel_crypto_selftest(self):
> >>> - exec_command_and_wait_for_pattern(self,
> >>> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> >>> -
> >>> def enable_ast2700_pcie2(self):
> >>> exec_command_and_wait_for_pattern(self,
> >>> 'cp 100420000 403000000 900000', '=>') @@ -71,7
> +67,6
> >> @@
> >>> def verify_openbmc_boot_start(self, enable_pcie=True):
> >>> wait_for_console_pattern(self, 'U-Boot 2023.10')
> >>> wait_for_console_pattern(self, 'Hit any key to stop
> autoboot')
> >>> exec_command_and_wait_for_pattern(self, '\012', '=>')
> >>> - self.disable_kernel_crypto_selftest()
> >>> if enable_pcie:
> >>> self.enable_ast2700_pcie2()
> >>> else:
> >>> diff --git a/tests/functional/aarch64/test_aspeed_ast2700a2.py
> >>> b/tests/functional/aarch64/test_aspeed_ast2700a2.py
> >>> index ed414999f4..5aea0a9dd0 100755
> >>> --- a/tests/functional/aarch64/test_aspeed_ast2700a2.py
> >>> +++ b/tests/functional/aarch64/test_aspeed_ast2700a2.py
> >>> @@ -51,10 +51,6 @@ def verify_vbootrom_firmware_flow(self):
> >>> wait_for_console_pattern(self, 'pass')
> >>> wait_for_console_pattern(self, 'Jumping to BL31 (Trusted
> >>> Firmware-A)')
> >>>
> >>> - def disable_kernel_crypto_selftest(self):
> >>> - exec_command_and_wait_for_pattern(self,
> >>> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> >>> -
> >>> def enable_ast2700_pcie2(self):
> >>> exec_command_and_wait_for_pattern(self,
> >>> 'cp 100420000 403000000 900000', '=>') @@ -71,7
> +67,6
> >> @@
> >>> def verify_openbmc_boot_start(self, enable_pcie=True):
> >>> wait_for_console_pattern(self, 'U-Boot 2023.10')
> >>> wait_for_console_pattern(self, 'Hit any key to stop
> autoboot')
> >>> exec_command_and_wait_for_pattern(self, '\012', '=>')
> >>> - self.disable_kernel_crypto_selftest()
> >>> if enable_pcie:
> >>> self.enable_ast2700_pcie2()
> >>> else:
> >>> diff --git a/tests/functional/aarch64/test_aspeed_ast2700fc.py
> >>> b/tests/functional/aarch64/test_aspeed_ast2700fc.py
> >>> index df889134ed..1648fa9dba 100755
> >>> --- a/tests/functional/aarch64/test_aspeed_ast2700fc.py
> >>> +++ b/tests/functional/aarch64/test_aspeed_ast2700fc.py
> >>> @@ -27,10 +27,6 @@ def do_test_aarch64_aspeed_sdk_start(self,
> image):
> >>>
> >>> self.vm.launch()
> >>>
> >>> - def disable_kernel_crypto_selftest(self):
> >>> - exec_command_and_wait_for_pattern(self,
> >>> - 'setenv bootargs "${bootargs} cryptomgr.notests=1"', '=>')
> >>> -
> >>> def enable_ast2700_pcie2(self):
> >>> exec_command_and_wait_for_pattern(self,
> >>> 'cp 100420000 403000000 900000', '=>') @@ -47,7
> +43,6
> >> @@
> >>> def verify_openbmc_boot_and_login(self, name):
> >>> wait_for_console_pattern(self, 'U-Boot 2023.10')
> >>> wait_for_console_pattern(self, 'Hit any key to stop
> autoboot')
> >>> exec_command_and_wait_for_pattern(self, '\012', '=>')
> >>> - self.disable_kernel_crypto_selftest()
> >>> self.enable_ast2700_pcie2()
> >>> wait_for_console_pattern(self, 'Starting kernel ...')
> >>>
> >>
> >>
> >> There are still crypto tests errors. See below. Is it expected ?
> >>
> >> Thanks,
> >>
> >> C.
> >>
> >>
> >> [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd040]
> >> [ 0.000000] Linux version 6.18.3-v00.08.01-g172b7e27a30d
> >> (oe-user@oe-host) (aarch64-openbmc-linux-gcc (GCC) 15.1.0, GNU ld (GNU
> >> Binutils) 2.44.0.20250429) #1 SMP PREEMPT Wed Feb 18 09:06:34 CST
> 2026
> >> [ 0.000000] KASLR disabled due to lack of seed
> >> [ 0.000000] Machine model: AST2700 EVB
> >> [ 0.000000] Malformed early option 'earlycon'
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x000000047ff00000, size 1 MiB
> >> [ 0.000000] OF: reserved mem: initialized node xdma0, compatible id
> >> shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> 0x000000047ff00000..0x000000047fffffff
> >> (1024 KiB) nomap non-reusable xdma0
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x000000047fe00000, size 1 MiB
> >> [ 0.000000] OF: reserved mem: initialized node xdma1, compatible id
> >> shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> 0x000000047fe00000..0x000000047fefffff
> >> (1024 KiB) nomap non-reusable xdma1
> >> [ 0.000000] Reserved memory: created CMA memory pool at
> >> 0x000000047de00000, size 32 MiB
> >> [ 0.000000] OF: reserved mem: initialized node video0, compatible id
> >> shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> 0x000000047de00000..0x000000047fdfffff
> >> (32768 KiB) map reusable video0
> >> [ 0.000000] Reserved memory: created CMA memory pool at
> >> 0x000000047ac00000, size 32 MiB
> >> [ 0.000000] OF: reserved mem: initialized node video1, compatible id
> >> shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> 0x000000047ac00000..0x000000047cbfffff
> >> (32768 KiB) map reusable video1
> >> [ 0.000000] Reserved memory: created CMA memory pool at
> >> 0x000000047ce00000, size 16 MiB
> >> [ 0.000000] OF: reserved mem: initialized node mcyc0, compatible id
> >> shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> 0x000000047ce00000..0x000000047ddfffff
> >> (16384 KiB) map reusable mcyc0
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000430000000..0x000000043007ffff (512 KiB) nomap non-reusable
> >> trusted-firmware-a@430000000
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000430080000..0x000000043107ffff (16384 KiB) nomap
> non-reusable
> >> optee-core@430080000
> >> [ 0.000000] OF: reserved mem:
> 0x0000000428000000..0x000000042bffffff
> >> (65536 KiB) nomap non-reusable eadf0-memory@428000000
> >> [ 0.000000] OF: reserved mem:
> 0x0000000424000000..0x0000000427ffffff
> >> (65536 KiB) nomap non-reusable espi0-mmbi-memory@424000000
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x0000000423800000, size 1 MiB
> >> [ 0.000000] OF: reserved mem: initialized node
> >> bmc-dev0-memory@423800000, compatible id shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> 0x0000000423800000..0x00000004238fffff
> >> (1024 KiB) nomap non-reusable bmc-dev0-memory@423800000
> >> [ 0.000000] OF: reserved mem:
> 0x0000000423a00000..0x0000000423bfffff
> >> (2048 KiB) nomap non-reusable pcie0-mmbi0-memory@423a00000
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x0000000423900000, size 1 MiB
> >> [ 0.000000] OF: reserved mem: initialized node
> >> bmc-dev1-memory@423900000, compatible id shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> 0x0000000423900000..0x00000004239fffff
> >> (1024 KiB) nomap non-reusable bmc-dev1-memory@423900000
> >> [ 0.000000] OF: reserved mem:
> 0x0000000423c00000..0x0000000423dfffff
> >> (2048 KiB) nomap non-reusable pcie1-mmbi4-memory@423c00000
> >> [ 0.000000] OF: reserved mem:
> 0x0000000423e00000..0x0000000423ffffff
> >> (2048 KiB) nomap non-reusable pcie2-mmbi0-memory@423e00000
> >> [ 0.000000] OF: reserved mem:
> 0x000000042c000000..0x000000042dffffff
> >> (32768 KiB) nomap non-reusable ssp-memory@42c000000
> >> [ 0.000000] OF: reserved mem:
> 0x000000042e000000..0x000000042fffffff
> >> (32768 KiB) nomap non-reusable tsp-memory@42e000000
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000431080000..0x000000043187ffff (8192 KiB) nomap non-reusable
> >> ipc-ssp-share@431080000
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000431880000..0x0000000431b2ffff (2752 KiB) nomap non-reusable
> >> ipc-bootmcu-share@431880000
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x0000000431b30000, size 0 MiB
> >> [ 0.000000] OF: reserved mem: initialized node
> >> uhci0-reserved@431b30000, compatible id shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000431b30000..0x0000000431b6ffff (256 KiB) nomap non-reusable
> >> uhci0-reserved@431b30000
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x0000000431b70000, size 0 MiB
> >> [ 0.000000] OF: reserved mem: initialized node
> >> uhci1-reserved@431b70000, compatible id shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000431b70000..0x0000000431baffff (256 KiB) nomap non-reusable
> >> uhci1-reserved@431b70000
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000431bb0000..0x0000000431bbffff (64 KiB) nomap non-reusable
> >> vbios-base0@431bb0000
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000431bc0000..0x0000000431bcffff (64 KiB) nomap non-reusable
> >> vbios-base1@431bc0000
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x0000000431bd0000, size 0 MiB
> >> [ 0.000000] OF: reserved mem: initialized node
> >> mctp0-reserved@431bd0000, compatible id shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000431bd0000..0x0000000431bdffff (64 KiB) nomap non-reusable
> >> mctp0-reserved@431bd0000
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x0000000431be0000, size 0 MiB
> >> [ 0.000000] OF: reserved mem: initialized node
> >> mctp1-reserved@431be0000, compatible id shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> >> 0x0000000431be0000..0x0000000431beffff (64 KiB) nomap non-reusable
> >> mctp1-reserved@431be0000
> >> [ 0.000000] Reserved memory: created DMA memory pool at
> >> 0x0000000431bf0000, size 0 MiB
> >> [ 0.000000] OF: reserved mem: initialized node
> >> mctp2-reserved@431bf0000, compatible id shared-dma-pool
> >> [ 0.000000] OF: reserved mem:
> 0x0000000431bf0000..0x0000000431bfffff
> >> (64 KiB) nomap non-reusable mctp2-reserved@431bf0000
> >> [ 0.000000] NUMA: Faking a node at [mem
> >> 0x0000000400000000-0x000000047fffffff]
> >> [ 0.000000] NODE_DATA(0) allocated [mem
> 0x47a892d40-0x47a89533f]
> >> [ 0.000000] Zone ranges:
> >> [ 0.000000] DMA [mem
> >> 0x0000000400000000-0x000000047fffffff]
> >> [ 0.000000] DMA32 empty
> >> [ 0.000000] Normal empty
> >> [ 0.000000] Movable zone start for each node
> >> [ 0.000000] Early memory node ranges
> >> [ 0.000000] node 0: [mem
> >> 0x0000000400000000-0x00000004237fffff]
> >> [ 0.000000] node 0: [mem
> >> 0x0000000423800000-0x0000000431bfffff]
> >> [ 0.000000] node 0: [mem
> >> 0x0000000431c00000-0x000000047fdfffff]
> >> [ 0.000000] node 0: [mem
> 0x000000047fe00000-0x000000047fffffff]
> >> [ 0.000000] Initmem setup node 0 [mem
> >> 0x0000000400000000-0x000000047fffffff]
> >> [ 0.000000] cma: Reserved 32 MiB at 0x0000000401800000
> >> [ 0.000000] psci: probing for conduit method from DT.
> >> [ 0.000000] psci: PSCIv1.1 detected in firmware.
> >> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
> >> [ 0.000000] psci: Trusted OS migration not required
> >> [ 0.000000] psci: SMC Calling Convention v1.5
> >> [ 0.000000] percpu: Embedded 31 pages/cpu s88216 r8192 d30568
> >> u126976
> >> [ 0.000000] Detected VIPT I-cache on CPU0
> >> [ 0.000000] CPU features: detected: GICv3 CPU interface
> >> [ 0.000000] alternatives: applying boot alternatives
> >> [ 0.000000] Kernel command line: console=ttyS12,115200n8
> >> root=/dev/ram rw earlycon
> >> [ 0.000000] printk: log buffer data + meta data: 131072 + 458752 =
> >> 589824 bytes
> >> [ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152
> >> bytes, linear)
> >> [ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576
> >> bytes, linear)
> >> [ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to
> 2MB
> >> [ 0.000000] software IO TLB: area num 4.
> >> [ 0.000000] software IO TLB: mapped [mem
> >> 0x0000000478300000-0x0000000478500000] (2MB)
> >> [ 0.000000] Fallback order for Node 0: 0
> >> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages:
> 524288
> >> [ 0.000000] Policy zone: DMA
> >> [ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
> >> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4,
> >> Nodes=1
> >> [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
> >> [ 0.000000] rcu: RCU event tracing is enabled.
> >> [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to
> >> nr_cpu_ids=4.
> >> [ 0.000000] Trampoline variant of Tasks RCU enabled.
> >> [ 0.000000] Tracing variant of Tasks RCU enabled.
> >> [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is
> 25
> >> jiffies.
> >> [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16,
> nr_cpu_ids=4
> >> [ 0.000000] RCU Tasks: Setting shift to 2 and lim to 1
> rcu_task_cb_adjust=1
> >> rcu_task_cpu_ids=4.
> >> [ 0.000000] RCU Tasks Trace: Setting shift to 2 and lim to 1
> >> rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
> >> [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
> >> [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
> >> [ 0.000000] GICv3: 256 SPIs implemented
> >> [ 0.000000] GICv3: 0 Extended SPIs implemented
> >> [ 0.000000] Root IRQ handler: gic_handle_irq
> >> [ 0.000000] GICv3: GICv3 features: 16 PPIs
> >> [ 0.000000] GICv3: GICD_CTLR.DS=1, SCR_EL3.FIQ=1
> >> [ 0.000000] GICv3: CPU0: found redistributor 0 region
> >> 0:0x0000000012280000
> >> [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
> >> [ 0.000000] arch_timer: cp15 timer running at 1600.00MHz (phys).
> >> [ 0.000000] clocksource: arch_sys_counter: mask: 0x1fffffffffffffff
> >> max_cycles: 0x171024fa93b, max_idle_ns: 440795253189 ns
> >> [ 0.000037] sched_clock: 61 bits at 1600MHz, resolution 0ns, wraps
> every
> >> 4398046511103ns
> >> [ 0.006379] Console: colour dummy device 80x25
> >> [ 0.008502] Calibrating delay loop (skipped), value calculated using
> timer
> >> frequency.. 3200.00 BogoMIPS (lpj=6400000)
> >> [ 0.008572] pid_max: default: 32768 minimum: 301
> >> [ 0.010747] Mount-cache hash table entries: 4096 (order: 3, 32768
> bytes,
> >> linear)
> >> [ 0.010795] Mountpoint-cache hash table entries: 4096 (order: 3, 32768
> >> bytes, linear)
> >> [ 0.037047] rcu: Hierarchical SRCU implementation.
> >> [ 0.037077] rcu: Max phase no-delay instances is 1000.
> >> [ 0.038351] Timer migration: 1 hierarchy levels; 8 children per group; 1
> >> crossnode level
> >> [ 0.041363] ASPEED AST2700 rev A2 (06020103)
> >> [ 0.042677] smp: Bringing up secondary CPUs ...
> >> [ 0.045789] Detected VIPT I-cache on CPU1
> >> [ 0.046337] GICv3: CPU1: found redistributor 1 region
> >> 0:0x00000000122a0000
> >> [ 0.046467] CPU1: Booted secondary processor 0x0000000001
> >> [0x411fd040]
> >> [ 0.050519] Detected VIPT I-cache on CPU2
> >> [ 0.050686] GICv3: CPU2: found redistributor 2 region
> >> 0:0x00000000122c0000
> >> [ 0.050765] CPU2: Booted secondary processor 0x0000000002
> >> [0x411fd040]
> >> [ 0.052102] Detected VIPT I-cache on CPU3
> >> [ 0.052264] GICv3: CPU3: found redistributor 3 region
> >> 0:0x00000000122e0000
> >> [ 0.052345] CPU3: Booted secondary processor 0x0000000003
> >> [0x411fd040]
> >> [ 0.052712] smp: Brought up 1 node, 4 CPUs
> >> [ 0.052729] SMP: Total of 4 processors activated.
> >> [ 0.052743] CPU: All CPU(s) started at EL2
> >> [ 0.052780] CPU features: detected: 32-bit EL0 Support
> >> [ 0.052821] CPU features: detected: CRC32 instructions
> >> [ 0.052910] CPU features: detected: PMUv3
> >> [ 0.059753] alternatives: applying system-wide alternatives
> >> [ 0.070608] Memory: 1673568K/2097152K available (14592K kernel
> code,
> >> 2014K rwdata, 5568K rodata, 1408K init, 524K bss, 303892K reserved,
> 114688K
> >> cma-reserved)
> >> [ 0.088349] devtmpfs: initialized
> >> [ 0.110897] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff,
> >> max_idle_ns: 7645041785100000 ns
> >> [ 0.111263] posixtimers hash table entries: 2048 (order: 3, 32768 bytes,
> >> linear)
> >> [ 0.111895] futex hash table entries: 1024 (65536 bytes on 1 NUMA
> nodes,
> >> total 64 KiB, linear).
> >> [ 0.113861] 26688 pages in range for non-PLT usage
> >> [ 0.114239] 518208 pages in range for PLT usage
> >> [ 0.115151] pinctrl core: initialized pinctrl subsystem
> >> [ 0.135658] NET: Registered PF_NETLINK/PF_ROUTE protocol family
> >> [ 0.144194] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic
> >> allocations
> >> [ 0.144873] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool
> for
> >> atomic allocations
> >> [ 0.145400] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool
> for
> >> atomic allocations
> >> [ 0.145718] audit: initializing netlink subsys (disabled)
> >> [ 0.147488] audit: type=2000 audit(0.140:1): state=initialized
> >> audit_enabled=0 res=1
> >> [ 0.149211] cpuidle: using governor menu
> >> [ 0.149955] hw-breakpoint: found 6 breakpoint and 4 watchpoint
> registers.
> >> [ 0.150560] ASID allocator initialised with 65536 entries
> >> [ 0.216875] iommu: Default domain type: Translated
> >> [ 0.216907] iommu: DMA domain TLB invalidation policy: strict mode
> >> [ 0.220788] SCSI subsystem initialized
> >> [ 0.221600] usbcore: registered new interface driver usbfs
> >> [ 0.221813] usbcore: registered new interface driver hub
> >> [ 0.221908] usbcore: registered new device driver usb
> >> [ 0.222221] mc: Linux media interface: v0.10
> >> [ 0.222262] videodev: Linux video capture interface: v2.00
> >> [ 0.222358] pps_core: LinuxPPS API ver. 1 registered
> >> [ 0.222364] pps_core: Software ver. 5.3.6 - Copyright 2005-2007
> Rodolfo
> >> Giometti <giometti@linux.it>
> >> [ 0.222392] PTP clock support registered
> >> [ 0.222497] EDAC MC: Ver: 3.0.0
> >> [ 0.223354] scmi_core: SCMI protocol bus registered
> >> [ 0.231561] mctp: management component transport protocol core
> >> [ 0.231573] NET: Registered PF_MCTP protocol family
> >> [ 0.232784] vgaarb: loaded
> >> [ 0.235288] clocksource: Switched to clocksource arch_sys_counter
> >> [ 0.237125] VFS: Disk quotas dquot_6.6.0
> >> [ 0.237189] VFS: Dquot-cache hash table entries: 512 (order 0, 4096
> bytes)
> >> [ 0.252368] NET: Registered PF_INET protocol family
> >> [ 0.253271] IP idents hash table entries: 32768 (order: 6, 262144 bytes,
> >> linear)
> >> [ 0.256584] tcp_listen_portaddr_hash hash table entries: 1024 (order:
> 2,
> >> 16384 bytes, linear)
> >> [ 0.256622] Table-perturb hash table entries: 65536 (order: 6, 262144
> >> bytes, linear)
> >> [ 0.256661] TCP established hash table entries: 16384 (order: 5, 131072
> >> bytes, linear)
> >> [ 0.257174] TCP bind hash table entries: 16384 (order: 7, 524288 bytes,
> >> linear)
> >> [ 0.257342] TCP: Hash tables configured (established 16384 bind 16384)
> >> [ 0.258127] UDP hash table entries: 1024 (order: 4, 65536 bytes, linear)
> >> [ 0.258261] UDP-Lite hash table entries: 1024 (order: 4, 65536 bytes,
> >> linear)
> >> [ 0.258919] NET: Registered PF_UNIX/PF_LOCAL protocol family
> >> [ 0.259388] PCI: CLS 0 bytes, default 64
> >> [ 0.262222] Trying to unpack rootfs image as initramfs...
> >> [ 0.262737] Initialise system trusted keyrings
> >> [ 0.263942] workingset: timestamp_bits=42 max_order=19
> >> bucket_order=0
> >> [ 0.266013] squashfs: version 4.0 (2009/01/31) Phillip Lougher
> >> [ 0.266194] jffs2: version 2.2. (SUMMARY) © 2001-2006 Red Hat, Inc.
> >> [ 0.296367] NET: Registered PF_ALG protocol family
> >> [ 0.296561] Key type asymmetric registered
> >> [ 0.296676] Asymmetric key parser 'x509' registered
> >> [ 0.297006] Block layer SCSI generic (bsg) driver version 0.4 loaded
> (major
> >> 243)
> >> [ 0.297097] io scheduler mq-deadline registered
> >> [ 0.297134] io scheduler kyber registered
> >> [ 0.297360] io scheduler bfq registered
> >> [ 0.310863] aspeed_usb_phy3 12010000.usb-phy3: Probed USB PHY3
> >> [ 0.311709] aspeed_usb_phy3 12020000.usb-phy3: Probed USB PHY3
> >> [ 0.323247] ledtrig-cpu: registered to indicate activity on CPUs
> >> [ 0.324971] ipmi-bt-host 12c19140.pcie-ibt: initialised channel 2 at IO
> >> address 0xe4
> >> [ 0.325436] ipmi-bt-host 12c19940.pcie-ibt: initialised channel 3 at IO
> >> address 0xe4
> >> [ 0.326029] ipmi-bt-host 14c31140.ibt: initialised channel 0 at IO
> address
> >> 0xe4
> >> [ 0.326393] ipmi-bt-host 14c32140.ibt: initialised channel 1 at IO
> address
> >> 0xe4
> >> [ 0.327619] aspeed-kcs-bmc 12c19024.pcie-kcs: Initialised IPMI client
> for
> >> channel 8
> >> [ 0.327656] aspeed-kcs-bmc 12c19024.pcie-kcs: Initialised channel 8 at
> IO
> >> address 0x3a0
> >> [ 0.328103] aspeed-kcs-bmc 12c19028.pcie-kcs: Initialised IPMI client
> for
> >> channel 9
> >> [ 0.328112] aspeed-kcs-bmc 12c19028.pcie-kcs: Initialised channel 9 at
> IO
> >> address 0x3a8
> >> [ 0.328481] aspeed-kcs-bmc 12c1902c.pcie-kcs: Initialised IPMI client
> for
> >> channel 10
> >> [ 0.328490] aspeed-kcs-bmc 12c1902c.pcie-kcs: Initialised channel 10
> at
> >> IO address 0x3a2
> >> [ 0.328832] aspeed-kcs-bmc 12c19114.pcie-kcs: Initialised IPMI client
> for
> >> channel 11
> >> [ 0.328841] aspeed-kcs-bmc 12c19114.pcie-kcs: Initialised channel 11
> at
> >> IO address 0x3a4
> >> [ 0.329240] aspeed-kcs-bmc 12c19824.pcie-kcs: Initialised IPMI client
> for
> >> channel 12
> >> [ 0.329248] aspeed-kcs-bmc 12c19824.pcie-kcs: Initialised channel 12
> at
> >> IO address 0x3a0
> >> [ 0.329852] aspeed-kcs-bmc 12c19828.pcie-kcs: Initialised IPMI client
> for
> >> channel 13
> >> [ 0.329860] aspeed-kcs-bmc 12c19828.pcie-kcs: Initialised channel 13
> at
> >> IO address 0x3a8
> >> [ 0.330154] aspeed-kcs-bmc 12c1982c.pcie-kcs: Initialised IPMI client
> for
> >> channel 14
> >> [ 0.330162] aspeed-kcs-bmc 12c1982c.pcie-kcs: Initialised channel 14
> at
> >> IO address 0x3a2
> >> [ 0.330497] aspeed-kcs-bmc 12c19914.pcie-kcs: Initialised IPMI client
> for
> >> channel 15
> >> [ 0.330506] aspeed-kcs-bmc 12c19914.pcie-kcs: Initialised channel 15
> at
> >> IO address 0x3a4
> >> [ 0.331245] aspeed-kcs-bmc 14c31024.lpc-kcs: Initialised IPMI client for
> >> channel 0
> >> [ 0.331256] aspeed-kcs-bmc 14c31024.lpc-kcs: Initialised channel 0 at
> IO
> >> address 0xca0
> >> [ 0.331599] aspeed-kcs-bmc 14c31028.lpc-kcs: Initialised IPMI client for
> >> channel 1
> >> [ 0.331608] aspeed-kcs-bmc 14c31028.lpc-kcs: Initialised channel 1 at
> IO
> >> address 0xca8
> >> [ 0.332047] aspeed-kcs-bmc 14c3102c.lpc-kcs: Initialised IPMI client for
> >> channel 2
> >> [ 0.332058] aspeed-kcs-bmc 14c3102c.lpc-kcs: Initialised channel 2 at
> IO
> >> address 0xca2
> >> [ 0.332393] aspeed-kcs-bmc 14c31114.lpc-kcs: Initialised IPMI client for
> >> channel 3
> >> [ 0.332402] aspeed-kcs-bmc 14c31114.lpc-kcs: Initialised channel 3 at
> IO
> >> address 0xca4
> >> [ 0.332793] aspeed-kcs-bmc 14c32024.kcs: Initialised IPMI client for
> >> channel 4
> >> [ 0.332801] aspeed-kcs-bmc 14c32024.kcs: Initialised channel 4 at IO
> >> address 0xca0
> >> [ 0.333107] aspeed-kcs-bmc 14c32028.kcs: Initialised IPMI client for
> >> channel 5
> >> [ 0.333115] aspeed-kcs-bmc 14c32028.kcs: Initialised channel 5 at IO
> >> address 0xca8
> >> [ 0.333408] aspeed-kcs-bmc 14c3202c.kcs: Initialised IPMI client for
> >> channel 6
> >> [ 0.333425] aspeed-kcs-bmc 14c3202c.kcs: Initialised channel 6 at IO
> >> address 0xca2
> >> [ 0.333731] aspeed-kcs-bmc 14c32114.kcs: Initialised IPMI client for
> >> channel 7
> >> [ 0.333739] aspeed-kcs-bmc 14c32114.kcs: Initialised channel 7 at IO
> >> address 0xca4
> >> [ 0.335242] aspeed_bmc_dev 12110000.bmc-dev: reserved memory is
> >> beyond device's set DMA address range
> >> [ 0.335287] aspeed_bmc_dev 12110000.bmc-dev: assigned reserved
> >> memory node bmc-dev0-memory@423800000
> >> [ 0.336909] aspeed_bmc_dev 12110000.bmc-dev: aspeed bmc device:
> >> driver successfully loaded.
> >> [ 0.337060] aspeed_bmc_dev 12120000.bmc-dev: reserved memory is
> >> beyond device's set DMA address range
> >> [ 0.337068] aspeed_bmc_dev 12120000.bmc-dev: assigned reserved
> >> memory node bmc-dev1-memory@423900000
> >> [ 0.337826] aspeed_bmc_dev 12120000.bmc-dev: aspeed bmc device:
> >> driver successfully loaded.
> >> [ 0.343471] aspeed-uart-routing 14c31098.uart-routing: module loaded
> >> [ 0.343602] aspeed-uart-routing 14c32098.uart-routing: module loaded
> >> [ 0.344331] aspeed-xdma 12c04000.xdma: reserved memory is beyond
> >> device's set DMA address range
> >> [ 0.344341] aspeed-xdma 12c04000.xdma: assigned reserved memory
> >> node xdma0
> >> [ 0.346934] aspeed-xdma 12c05000.xdma: reserved memory is beyond
> >> device's set DMA address range
> >> [ 0.346945] aspeed-xdma 12c05000.xdma: assigned reserved memory
> >> node xdma1
> >> [ 0.389006] aspeed_usb_phy3 12010000.usb-phy3: Wait phy3 init timed
> >> out
> >> [ 0.389059] phy phy-12010000.usb-phy3.3: phy init failed --> -110
> >> [ 0.389134] aspeed_usb_hp soc@10000000:usb3ahp: failed to init usb3
> >> phy
> >> [ 0.389309] aspeed_usb_hp soc@10000000:usb3ahp: probe with driver
> >> aspeed_usb_hp failed with error -110
> >> [ 0.402300] aspeed_usb_phy3 12020000.usb-phy3: Wait phy3 init timed
> >> out
> >> [ 0.402312] phy phy-12020000.usb-phy3.4: phy init failed --> -110
> >> [ 0.402319] aspeed_usb_hp soc@10000000:usb3bhp: failed to init usb3
> >> phy
> >> [ 0.402325] aspeed_usb_hp soc@10000000:usb3bhp: probe with driver
> >> aspeed_usb_hp failed with error -110
> >> [ 0.405370] aspeed_pcie_mmbi 12c21000.e2m-config:pcie0-mmbi@0:
> >> ASPEED PCIe MMBI Dev 0: driver successfully loaded.
> >> [ 0.406781] aspeed_pcie_mmbi 12c22000.e2m-config:pcie1-mmbi@4:
> >> ASPEED PCIe MMBI Dev 1: driver successfully loaded.
> >> [ 0.408663] aspeed-mctp 12c06000.mctp0: assigned reserved memory
> >> node mctp0-reserved@431bd0000
> >> [ 0.412243] aspeed-mctp 12c07000.mctp1: assigned reserved memory
> >> node mctp1-reserved@431be0000
> >> [ 0.413541] aspeed-mctp 14c1a000.mctp2: assigned reserved memory
> >> node mctp2-reserved@431bf0000
> >> [ 0.415109] ast2700_otp 14c07000.otp: Aspeed OTP driver successfully
> >> registered
> >> [ 0.458099] Freeing initrd memory: 1312K
> >> [ 0.489832] aspeed-espi 14c05000.espi: assigned reserved memory
> node
> >> mcyc0
> >> [ 0.495645] aspeed-espi 14c05000.espi: eDAF mode: 0x2
> >> [ 0.496444] aspeed-espi 14c05000.espi: module loaded
> >> [ 0.497026] ast2700-rtc-over-espi 14c3d000.rtc-over_espi: RTC not
> ready,
> >> deferring probe
> >> [ 0.548836] Serial: 8250/16550 driver, 23 ports, IRQ sharing enabled
> >> [ 0.561470] 12c18000.serial: ttyS19 at MMIO 0x12c18000 (irq = 78,
> >> base_baud = 25000000) is a ASPEED VUART
> >> [ 0.563500] 12c18100.serial: ttyS20 at MMIO 0x12c18100 (irq = 79,
> >> base_baud = 25000000) is a ASPEED VUART
> >> [ 0.564507] 12c18200.serial: ttyS21 at MMIO 0x12c18200 (irq = 80,
> >> base_baud = 25000000) is a ASPEED VUART
> >> [ 0.565501] 12c18300.serial: ttyS22 at MMIO 0x12c18300 (irq = 81,
> >> base_baud = 25000000) is a ASPEED VUART
> >> [ 0.566848] 14c33200.serial: ttyS2 at MMIO 0x14c33200 (irq = 82,
> >> base_baud = 115384) is a 16550A
> >> [ 0.568986] 14c33800.serial: ttyS9 at MMIO 0x14c33800 (irq = 83,
> >> base_baud = 115384) is a 16550A
> >> [ 0.570059] 14c33b00.serial: ttyS12 at MMIO 0x14c33b00 (irq = 84,
> >> base_baud = 115384) is a 16550A
> >> [ 0.571430] printk: legacy console [ttyS12] enabled
> >> [ 0.599367] DWC_TRNG_DriverSDK_1.00a
> >> [ 0.599866] NIST_TRNG: Hardware rel_num=0x0, ext_ver=0x0,
> >> ext_enum=0x0
> >> [ 1.081562] wait_on_: failed timeout: 00000000
> >> [ 1.081679] NIST_TRNG init failed (-21)
> >> [ 1.081882] nist_trng nist_trng: probe with driver nist_trng failed with
> >> error -21
> >> [ 1.100031] brd: module loaded
> >> [ 1.108016] loop: module loaded
> >> [ 1.137960] spi-aspeed-smc 14000000.spi: user mode and normal read
> are
> >> used
> >> [ 1.141534] spi-nor spi0.0: supply vcc not found, using dummy regulator
> >> [ 1.162328] spi-aspeed-smc 14000000.spi: CE0 read buswidth: 4
> >> [0x406c0641]
> >> [ 1.162556] spi-aspeed-smc 14000000.spi: CE0 write buswidth: 4
> >> [0x40340602]
> >> [ 1.215999] 5 fixed-partitions partitions found on MTD device bmc
> >> [ 1.216161] Creating 5 MTD partitions on "bmc":
> >> [ 1.216316] 0x000000000000-0x000000400000 : "u-boot"
> >> [ 1.218264] 0x000000400000-0x000000420000 : "u-boot-env"
> >> [ 1.219554] 0x000000420000-0x000000d20000 : "kernel"
> >> [ 1.220982] 0x000000d20000-0x000006000000 : "rofs"
> >> [ 1.222261] 0x000006000000-0x000008000000 : "rwfs"
> >> [ 1.227788] spi-nor spi0.1: supply vcc not found, using dummy regulator
> >> [ 1.228829] spi-aspeed-smc 14000000.spi: Calibration area too uniform
> >> [ 1.229072] spi-aspeed-smc 14000000.spi: CE1 read buswidth: 4
> >> [0x406c0641]
> >> [ 1.229186] spi-aspeed-smc 14000000.spi: CE1 write buswidth: 4
> >> [0x40340602]
> >> [ 1.247107] spi-aspeed-smc 14010000.spi: user mode and normal read
> are
> >> used
> >> [ 1.248480] spi-nor spi1.0: supply vcc not found, using dummy regulator
> >> [ 1.249664] spi-aspeed-smc 14010000.spi: Calibration area too uniform
> >> [ 1.249758] spi-aspeed-smc 14010000.spi: CE0 read buswidth: 2
> >> [0x203c0641]
> >> [ 1.249851] spi-aspeed-smc 14010000.spi: CE0 write buswidth: 1
> >> [0x00120602]
> >> [ 1.259585] spi-aspeed-smc 14020000.spi: user mode and normal read
> are
> >> used
> >> [ 1.260535] spi-nor spi2.0: supply vcc not found, using dummy regulator
> >> [ 1.260863] spi-nor spi2.0: unrecognized JEDEC id bytes: 00 00 00 00 00
> 00
> >> [ 1.264807] spi_aspeed_txrx 14030000.spi: cs: 0, ctrl_val: 0x00000407
> >> [ 1.279202] CAN device driver interface
> >> [ 2.288754] aspeed_can 14c3e000.can (unnamed net_device)
> >> (uninitialized): timed out for config mode
> >> [ 2.289000] aspeed_can 14c3e000.can: probe with driver aspeed_can
> >> failed with error -110
> >> [ 2.291357] ftgmac100 14050000.ethernet: Read MAC address
> >> 52:54:00:12:34:56 from chip
> >> [ 2.292825] RTL8211E Gigabit Ethernet 14040000.mdio-1:00: attached
> PHY
> >> driver (mii_bus:phy_addr=14040000.mdio-1:00, irq=POLL)
> >> [ 2.312021] ftgmac100 14050000.ethernet eth0: irq 86, mapped at
> >> (____ptrval____)
> >> [ 2.312736] ftgmac100 14060000.ethernet: Read MAC address
> >> 52:54:00:12:34:57 from chip
> >> [ 2.312994] RTL8211E Gigabit Ethernet 14040008.mdio-1:00: attached
> PHY
> >> driver (mii_bus:phy_addr=14040008.mdio-1:00, irq=POLL)
> >> [ 2.331522] ftgmac100 14060000.ethernet eth1: irq 87, mapped at
> >> (____ptrval____)
> >> [ 2.331821] e100: Intel(R) PRO/100 Network Driver
> >> [ 2.331879] e100: Copyright(c) 1999-2006 Intel Corporation
> >> [ 2.332018] e1000: Intel(R) PRO/1000 Network Driver
> >> [ 2.332088] e1000: Copyright (c) 1999-2006 Intel Corporation.
> >> [ 2.332213] e1000e: Intel(R) PRO/1000 Network Driver
> >> [ 2.332303] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
> >> [ 2.332431] igb: Intel(R) Gigabit Ethernet Network Driver
> >> [ 2.332511] igb: Copyright (c) 2007-2014 Intel Corporation.
> >> [ 2.332639] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver
> >> [ 2.332726] ixgbe: Copyright (c) 1999-2016 Intel Corporation.
> >> [ 2.333468] MCTP I2C interface driver
> >> [ 2.333816] usbcore: registered new interface driver mctp-usb
> >> [ 2.333952] usbcore: registered new interface driver cdc_ether
> >> [ 2.334071] usbcore: registered new interface driver cdc_eem
> >> [ 2.334194] usbcore: registered new interface driver net1080
> >> [ 2.334317] usbcore: registered new interface driver cdc_subset
> >> [ 2.334434] usbcore: registered new interface driver zaurus
> >> [ 2.334550] usbcore: registered new interface driver cdc_ncm
> >> [ 2.334670] usbcore: registered new interface driver r8153_ecm
> >> [ 2.336620] platform-uhci 14110000.usb: Detected 2 ports from
> >> device-tree
> >> [ 2.336765] platform-uhci 14110000.usb: Enabled Aspeed
> implementation
> >> workarounds
> >> [ 2.337202] platform-uhci 14110000.usb: Generic UHCI Host Controller
> >> [ 2.337204] ehci-platform 14123000.usb: EHCI Host Controller
> >> [ 2.337639] ehci-platform 14123000.usb: new USB bus registered,
> assigned
> >> bus number 2
> >> [ 2.337640] platform-uhci 14110000.usb: new USB bus registered,
> assigned
> >> bus number 1
> >> [ 2.338409] platform-uhci 14110000.usb: irq 89, io mem 0x14110000
> >> [ 2.338627] platform-uhci 14110000.usb: Device does not have specific
> >> DMA pool
> >> [ 2.339110] ehci-platform 14123000.usb: irq 88, io mem 0x14123000
> >> [ 2.344125] usb usb1: New USB device found, idVendor=1d6b,
> >> idProduct=0001, bcdDevice= 6.18
> >> [ 2.344272] usb usb1: New USB device strings: Mfr=3, Product=2,
> >> SerialNumber=1
> >> [ 2.344375] usb usb1: Product: Generic UHCI Host Controller
> >> [ 2.344456] usb usb1: Manufacturer: Linux
> >> 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd
> >> [ 2.344560] usb usb1: SerialNumber: 14110000.usb
> >> [ 2.347100] hub 1-0:1.0: USB hub found
> >> [ 2.347598] hub 1-0:1.0: 2 ports detected
> >> [ 2.351199] ehci-platform 14123000.usb: USB 2.0 started, EHCI 1.00
> >> [ 2.351206] usbcore: registered new interface driver cdc_acm
> >> [ 2.351251] cdc_acm: USB Abstract Control Model driver for USB
> modems
> >> and ISDN adapters
> >> [ 2.351648] usb usb2: New USB device found, idVendor=1d6b,
> >> idProduct=0002, bcdDevice= 6.18
> >> [ 2.351794] usb usb2: New USB device strings: Mfr=3, Product=2,
> >> SerialNumber=1
> >> [ 2.351918] usb usb2: Product: EHCI Host Controller
> >> [ 2.351999] usb usb2: Manufacturer: Linux
> >> 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd
> >> [ 2.352005] usbcore: registered new interface driver uas
> >> [ 2.352094] usb usb2: SerialNumber: 14123000.usb
> >> [ 2.352418] usbcore: registered new interface driver usb-storage
> >> [ 2.352828] usbcore: registered new interface driver pl2303
> >> [ 2.352891] hub 2-0:1.0: USB hub found
> >> [ 2.353110] usbserial: USB Serial support registered for pl2303
> >> [ 2.353190] hub 2-0:1.0: 6 ports detected
> >> [ 2.363145] platform-uhci 14110000.usb: Controller not stopped yet!
> >> [ 2.366436] aspeed_vhub 12060000.usb-vhub: PCIe EHCI to vhub
> >> [ 2.368834] aspeed_vhub 12060000.usb-vhub: Initialized virtual hub in
> >> USB2 mode
> >> [ 2.379205] aspeed_vhub 12062000.usb-vhub: PCIe EHCI to vhub
> >> [ 2.380707] aspeed_vhub 12062000.usb-vhub: Initialized virtual hub in
> >> USB2 mode
> >> [ 2.392449] aspeed_vhub 14120000.usb-vhub: Initialized virtual hub in
> >> USB2 mode
> >> [ 2.396382] aspeed-rtc 12c0f000.rtc: registered as rtc0
> >> [ 2.396904] aspeed-rtc 12c0f000.rtc: setting system clock to
> >> 1970-01-01T01:01:01 UTC (3661)
> >> [ 2.397557] i2c_dev: i2c /dev entries driver
> >> [ 2.401063] i2c_ast2600 14c0f100.i2c-bus: i2c-bus [0]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.401971] i2c_ast2600 14c0f200.i2c-bus: i2c-bus [1]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.402763] i2c_ast2600 14c0f300.i2c-bus: i2c-bus [2]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.403689] i2c_ast2600 14c0f400.i2c-bus: i2c-bus [3]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.404448] i2c_ast2600 14c0f500.i2c-bus: i2c-bus [4]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.405292] i2c_ast2600 14c0f600.i2c-bus: i2c-bus [5]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.406064] i2c_ast2600 14c0f700.i2c-bus: i2c-bus [6]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.406787] i2c_ast2600 14c0f800.i2c-bus: i2c-bus [7]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.407562] i2c_ast2600 14c0f900.i2c-bus: i2c-bus [8]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.408366] i2c_ast2600 14c0fc00.i2c-bus: i2c-bus [11]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.409112] i2c_ast2600 14c0fd00.i2c-bus: i2c-bus [12]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.409807] i2c_ast2600 14c0fe00.i2c-bus: i2c-bus [13]: adapter [100
> KHz]
> >> mode [2] version [1]
> >> [ 2.410928] 14c20000.i3c0: MIPI I3C HCI v0.0 r00
> >> [ 2.411100] 14c20000.i3c0: unsupported HCI version
> >> [ 2.411231] mipi-i3c-hci 14c20000.i3c0: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.411493] 14c21000.i3c1: MIPI I3C HCI v0.0 r00
> >> [ 2.411571] 14c21000.i3c1: unsupported HCI version
> >> [ 2.411636] mipi-i3c-hci 14c21000.i3c1: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.411863] 14c22000.i3c2: MIPI I3C HCI v0.0 r00
> >> [ 2.411934] 14c22000.i3c2: unsupported HCI version
> >> [ 2.411999] mipi-i3c-hci 14c22000.i3c2: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.412217] 14c23000.i3c3: MIPI I3C HCI v0.0 r00
> >> [ 2.412290] 14c23000.i3c3: unsupported HCI version
> >> [ 2.412355] mipi-i3c-hci 14c23000.i3c3: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.412574] 14c24000.i3c4: MIPI I3C HCI v0.0 r00
> >> [ 2.412644] 14c24000.i3c4: unsupported HCI version
> >> [ 2.412710] mipi-i3c-hci 14c24000.i3c4: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.412927] 14c25000.i3c5: MIPI I3C HCI v0.0 r00
> >> [ 2.412997] 14c25000.i3c5: unsupported HCI version
> >> [ 2.413062] mipi-i3c-hci 14c25000.i3c5: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.413280] 14c26000.i3c6: MIPI I3C HCI v0.0 r00
> >> [ 2.413350] 14c26000.i3c6: unsupported HCI version
> >> [ 2.413414] mipi-i3c-hci 14c26000.i3c6: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.413659] 14c27000.i3c7: MIPI I3C HCI v0.0 r00
> >> [ 2.413734] 14c27000.i3c7: unsupported HCI version
> >> [ 2.413798] mipi-i3c-hci 14c27000.i3c7: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.414017] 14c28000.i3c8: MIPI I3C HCI v0.0 r00
> >> [ 2.414087] 14c28000.i3c8: unsupported HCI version
> >> [ 2.414153] mipi-i3c-hci 14c28000.i3c8: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.414371] 14c29000.i3c9: MIPI I3C HCI v0.0 r00
> >> [ 2.414442] 14c29000.i3c9: unsupported HCI version
> >> [ 2.414506] mipi-i3c-hci 14c29000.i3c9: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.414742] 14c2a000.i3c10: MIPI I3C HCI v0.0 r00
> >> [ 2.414817] 14c2a000.i3c10: unsupported HCI version
> >> [ 2.414884] mipi-i3c-hci 14c2a000.i3c10: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.415160] 14c2b000.i3c11: MIPI I3C HCI v0.0 r00
> >> [ 2.415243] 14c2b000.i3c11: unsupported HCI version
> >> [ 2.415310] mipi-i3c-hci 14c2b000.i3c11: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.415542] 14c2c000.i3c12: MIPI I3C HCI v0.0 r00
> >> [ 2.415613] 14c2c000.i3c12: unsupported HCI version
> >> [ 2.415679] mipi-i3c-hci 14c2c000.i3c12: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.415900] 14c2d000.i3c13: MIPI I3C HCI v0.0 r00
> >> [ 2.415973] 14c2d000.i3c13: unsupported HCI version
> >> [ 2.416041] mipi-i3c-hci 14c2d000.i3c13: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.416267] 14c2e000.i3c14: MIPI I3C HCI v0.0 r00
> >> [ 2.416340] 14c2e000.i3c14: unsupported HCI version
> >> [ 2.416405] mipi-i3c-hci 14c2e000.i3c14: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.416647] 14c2f000.i3c15: MIPI I3C HCI v0.0 r00
> >> [ 2.416725] 14c2f000.i3c15: unsupported HCI version
> >> [ 2.416790] mipi-i3c-hci 14c2f000.i3c15: probe with driver mipi-i3c-hci
> >> failed with error -93
> >> [ 2.418547] aspeed-video 120a0000.video: irq 106
> >> [ 2.418735] aspeed-video 120a0000.video: dvi mode-detection irq 107
> >> [ 2.418985] aspeed-video 120a0000.video: assigned reserved memory
> >> node video0
> >> [ 2.432446] aspeed-video 120a0000.video: alloc mem size(18493440)
> at
> >> 0x000000047de00000 for pool
> >> [ 2.435819] aspeed-video 120a0000.video: aspeed-video0 registered as
> >> /dev/video0
> >> [ 2.436890] aspeed-video 120a1000.video: irq 108
> >> [ 2.437029] aspeed-video 120a1000.video: assigned reserved memory
> >> node video1
> >> [ 2.449658] aspeed-video 120a1000.video: alloc mem size(18493440)
> at
> >> 0x000000047ac00000 for pool
> >> [ 2.450250] aspeed-video 120a1000.video: aspeed-video1 registered as
> >> /dev/video1
> >> [ 2.458433] sdhci: Secure Digital Host Controller Interface driver
> >> [ 2.458547] sdhci: Copyright(c) Pierre Ossman
> >> [ 2.458614] sdhci-pltfm: SDHCI platform and OF driver helper
> >> [ 2.461200] SMCCC: SOC_ID: ARCH_SOC_ID not implemented,
> skipping ....
> >> [ 2.462065] sdhci-aspeed 12090100.sdhci: Configured for slot 0
> >> [ 2.463137] aspeed_crypto 12070000.crypto: will run requests pump
> with
> >> realtime priority
> >> [ 2.466408] aspeed_crypto 12070000.crypto: will run requests pump
> with
> >> realtime priority
> >> [ 2.467319] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg:
> Unable
> >> to find vdd-hba-supply regulator, assuming enabled
> >> [ 2.467557] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg:
> Unable
> >> to find vcc-supply regulator, assuming enabled
> >> [ 2.467743] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg:
> Unable
> >> to find vccq-supply regulator, assuming enabled
> >> [ 2.468017] aspeed-ufshcd 12c08200.ufshc: ufshcd_populate_vreg:
> Unable
> >> to find vccq2-supply regulator, assuming enabled
> >> [ 2.468196] aspeed_crypto 12070000.crypto: cannot find sbc node
> >> [ 2.468648] aspeed_crypto 12070000.crypto: Aspeed Crypto
> Accelerator
> >> successfully registered
> >> [ 2.469278] aspeed-ufshcd 12c08200.ufshc: Command Descriptor
> Memory
> >> allocation failed
> >> [ 2.469443] aspeed-ufshcd 12c08200.ufshc: Memory allocation failed
> >> [ 2.469825] aspeed-ufshcd 12c08200.ufshc: ufshcd_pltfrm_init() failed
> -12
> >> [ 2.469962] aspeed-ufshcd 12c08200.ufshc: probe with driver
> >> aspeed-ufshcd failed with error -12
> >> [ 2.470412] aspeed_rsss 12080000.crypto: will run requests pump with
> >> realtime priority
> >> [ 2.471110] aspeed_rsss 12080000.crypto: RSA init failed
> >> [ 2.471245] aspeed_rsss 12080000.crypto: probe with driver
> aspeed_rsss
> >> failed with error -5
> >> [ 2.472595] aspeed_ecdsa 12c1e000.crypto: probe with driver
> >> aspeed_ecdsa failed with error -5
> >> [ 2.473678] usbcore: registered new interface driver usbhid
> >> [ 2.473827] usbhid: USB HID core driver
> >> [ 2.485896] hw perfevents: enabled with armv8_cortex_a35 PMU driver,
> 7
> >> (0,8000003f) counters available
> >> [ 2.487770] optee: probing for conduit method.
> >> I/TC: Reserved shared memory is disabled
> >> I/TC: Dynamic shared memory is enabled
> >> I/TC: Normal World virtualization support is disabled
> >> I/TC: Asynchronous notifications are disabled
> >> [ 2.488394] optee: revision 4.4 (8f645256efc0dc66)
> >> [ 2.489279] watchdog: NMI not fully supported
> >> [ 2.489417] watchdog: Hard watchdog permanently disabled
> >> [ 2.490296] optee: dynamic shared memory is enabled
> >> [ 2.496286] optee: initialized driver
> >> [ 2.499251] mmc0: SDHCI controller on 12090100.sdhci
> [12090100.sdhci]
> >> using ADMA 64-bit
> >> [ 2.499601] pktgen: Packet Generator for packet performance testing.
> >> Version: 2.75
> >> [ 2.502051] NET: Registered PF_INET6 protocol family
> >> [ 2.508037] Segment Routing with IPv6
> >> [ 2.508286] In-situ OAM (IOAM) with IPv6
> >> [ 2.508812] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
> >> [ 2.510670] NET: Registered PF_PACKET protocol family
> >> [ 2.511122] can: controller area network core
> >> [ 2.511471] NET: Registered PF_CAN protocol family
> >> [ 2.511597] can: raw protocol
> >> [ 2.511791] can: broadcast manager protocol
> >> [ 2.512029] can: netlink gateway - max_hops=1
> >> [ 2.512210] 8021q: 802.1Q VLAN Support v1.8
> >> [ 2.520069] registered taskstats version 1
> >> [ 2.521401] Loading compiled-in X.509 certificates
> >> [ 2.531388] Demotion targets for Node 0: null
> >> [ 2.532261] Key type .fscrypt registered
> >> [ 2.532350] Key type fscrypt-provisioning registered
> >> [ 2.564198] mmc0: Failed to initialize a non-removable card
> >> [ 2.573543] alg: skcipher: aspeed-ctr-des encryption test failed (wrong
> >> result) on test vector 0, cfg="in-place (one sglist)"
> >> [ 2.573863] alg: self-tests for ctr(des) using aspeed-ctr-des failed
> (rc=-22)
> >> [ 2.573938] ------------[ cut here ]------------
> >> [ 2.574155] alg: self-tests for ctr(des) using aspeed-ctr-des failed
> (rc=-22)
> >> [ 2.574401] WARNING: CPU: 3 PID: 116 at
> >> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
> >> [ 2.574972] Modules linked in:
> >> [ 2.575579] CPU: 3 UID: 0 PID: 116 Comm: cryptomgr_test Not tainted
> >> 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
> >> [ 2.575776] Hardware name: AST2700 EVB (DT)
> >> [ 2.575979] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
> >> BTYPE=--)
> >> [ 2.576125] pc : alg_test+0x490/0x5bc
> >> [ 2.576215] lr : alg_test+0x490/0x5bc
> >> [ 2.576286] sp : ffff800081f7bd50
> >> [ 2.576358] x29: ffff800081f7bdf0 x28: 0000000000000004 x27:
> >> ffff800080eaa568
> >> [ 2.576584] x26: 0000000000000000 x25: 00000000ffffffff x24:
> >> 0000000000000004
> >> [ 2.576809] x23: ffff0000065d1680 x22: 0000000000001085 x21:
> >> ffff0000065d1600
> >> [ 2.576981] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
> >> 000000000000000a
> >> [ 2.577104] x17: 32322d3d63722820 x16: 64656c6961662073 x15:
> >> 0000000000000000
> >> [ 2.577223] x14: 0000000000000000 x13: 00000000ffff0a01 x12:
> >> 00000000ffffffea
> >> [ 2.577345] x11: ffff800081f7bab8 x10: 00000000ffffefff x9 :
> >> ffff8000815ae3c8
> >> [ 2.577486] x8 : ffff8000815ae420 x7 : 0000000000017fe8 x6 :
> >> c0000000ffffefff
> >> [ 2.577609] x5 : 0000000000057fa8 x4 : 0000000000000000 x3 :
> >> 0000000000000000
> >> [ 2.577744] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
> >> ffff000006de2400
> >> [ 2.578021] Call trace:
> >> [ 2.578164] alg_test+0x490/0x5bc (P)
> >> [ 2.578302] cryptomgr_test+0x24/0x44
> >> [ 2.578384] kthread+0x140/0x220
> >> [ 2.578455] ret_from_fork+0x10/0x20
> >> [ 2.578604] ---[ end trace 0000000000000000 ]---
> >> [ 2.579215] alg: skcipher: aspeed-ctr-tdes encryption test failed (wrong
> >> result) on test vector 0, cfg="in-place (one sglist)"
> >> [ 2.579437] alg: self-tests for ctr(des3_ede) using aspeed-ctr-tdes failed
> >> (rc=-22)
> >> [ 2.579445] ------------[ cut here ]------------
> >> [ 2.579673] alg: self-tests for ctr(des3_ede) using aspeed-ctr-tdes failed
> >> (rc=-22)
> >> [ 2.580184] WARNING: CPU: 0 PID: 115 at
> >> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
> >> [ 2.580525] Modules linked in:
> >> [ 2.580726] CPU: 0 UID: 0 PID: 115 Comm: cryptomgr_test Tainted: G
> >> W 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
> >> [ 2.580940] Tainted: [W]=WARN
> >> [ 2.580992] Hardware name: AST2700 EVB (DT)
> >> [ 2.581058] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
> >> BTYPE=--)
> >> [ 2.581196] pc : alg_test+0x490/0x5bc
> >> [ 2.581261] lr : alg_test+0x490/0x5bc
> >> [ 2.581335] sp : ffff800081f73d50
> >> [ 2.581392] x29: ffff800081f73df0 x28: 0000000000000004 x27:
> >> ffff800080eaa568
> >> [ 2.581529] x26: 0000000000000000 x25: 00000000ffffffff x24:
> >> 0000000000000004
> >> [ 2.581655] x23: ffff0000065d1880 x22: 0000000000001085 x21:
> >> ffff0000065d1800
> >> [ 2.581781] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
> >> 0000000000000000
> >> [ 2.581904] x17: 0000000000000000 x16: 00000000e820414d x15:
> >> ffff000006de1290
> >> [ 2.582027] x14: 00000000000002e0 x13: 0000000000000001 x12:
> >> 0000000000000001
> >> [ 2.582149] x11: 00000000000000c0 x10: 0000000000000b50 x9 :
> >> ffff800081f73bc0
> >> [ 2.582281] x8 : ffff000006de1db0 x7 : 0000000000000001 x6 :
> >> 0000000000007a4f
> >> [ 2.582408] x5 : ffff0000054541e0 x4 : ffff000006de1200 x3 :
> >> ffff000006de5a00
> >> [ 2.582538] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
> >> ffff000006de1200
> >> [ 2.582670] Call trace:
> >> [ 2.582715] alg_test+0x490/0x5bc (P)
> >> [ 2.582782] cryptomgr_test+0x24/0x44
> >> [ 2.582856] kthread+0x140/0x220
> >> [ 2.582921] ret_from_fork+0x10/0x20
> >> [ 2.582989] ---[ end trace 0000000000000000 ]---
> >> [ 2.620920] alg: skcipher: aspeed-ctr-aes encryption test failed (wrong
> >> result) on test vector 0, cfg="in-place (one sglist)"
> >> [ 2.621176] alg: self-tests for ctr(aes) using aspeed-ctr-aes failed
> (rc=-22)
> >> [ 2.621185] ------------[ cut here ]------------
> >> [ 2.621384] alg: self-tests for ctr(aes) using aspeed-ctr-aes failed
> (rc=-22)
> >> [ 2.621420] WARNING: CPU: 0 PID: 117 at
> >> /usr/src/kernel/crypto/testmgr.c:5829 alg_test+0x490/0x5bc
> >> [ 2.621673] Modules linked in:
> >> [ 2.621738] CPU: 0 UID: 0 PID: 117 Comm: cryptomgr_test Tainted: G
> >> W 6.18.3-v00.08.01-g172b7e27a30d #1 PREEMPT
> >> [ 2.621925] Tainted: [W]=WARN
> >> [ 2.621975] Hardware name: AST2700 EVB (DT)
> >> [ 2.622044] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
> >> BTYPE=--)
> >> [ 2.622153] pc : alg_test+0x490/0x5bc
> >> [ 2.622218] lr : alg_test+0x490/0x5bc
> >> [ 2.622283] sp : ffff800081f83d50
> >> [ 2.622337] x29: ffff800081f83df0 x28: 0000000000000004 x27:
> >> ffff800080eaa568
> >> [ 2.622458] x26: 0000000000000000 x25: 00000000ffffffff x24:
> >> 0000000000000004
> >> [ 2.622578] x23: ffff0000065d0e80 x22: 0000000000001085 x21:
> >> ffff0000065d0e00
> >> [ 2.622694] x20: 00000000ffffffea x19: ffff800080eaa568 x18:
> >> 000000000000000a
> >> [ 2.622811] x17: 32322d3d63722820 x16: 64656c6961662073 x15:
> >> 0000000000000000
> >> [ 2.622931] x14: 0000000000000000 x13: 00000000ffff0a01 x12:
> >> 00000000ffffffea
> >> [ 2.623061] x11: ffff800081f83ab8 x10: 00000000ffffefff x9 :
> >> ffff8000815ae3c8
> >> [ 2.623200] x8 : ffff8000815ae420 x7 : 0000000000017fe8 x6 :
> >> c0000000ffffefff
> >> [ 2.623325] x5 : 0000000000057fa8 x4 : 0000000000000000 x3 :
> >> 0000000000000000
> >> [ 2.623447] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
> >> ffff000006de3600
> >> [ 2.623570] Call trace:
> >> [ 2.623625] alg_test+0x490/0x5bc (P)
> >> [ 2.623690] cryptomgr_test+0x24/0x44
> >> [ 2.623752] kthread+0x140/0x220
> >> [ 2.623810] ret_from_fork+0x10/0x20
> >> [ 2.623875] ---[ end trace 0000000000000000 ]---
> >> [ 2.653308] aspeed_mbox_client 431880000.mbox-bootmcu-1: TX
> shmem:
> >> phys 0x0x0000000431880000 size 1048576
> >> [ 2.653484] aspeed_mbox_client 431880000.mbox-bootmcu-1: RX
> shmem:
> >> phys 0x0x0000000431980000 size 1048576
> >> [ 2.653616] aspeed_mbox_client 431880000.mbox-bootmcu-1: TX
> timeout:
> >> 10000 ms
> >
^ permalink raw reply [flat|nested] 27+ messages in thread