From: Wayne Lin <Wayne.Lin@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Harry Wentland <harry.wentland@amd.com>,
Leo Li <sunpeng.li@amd.com>,
Aurabindo Pillai <aurabindo.pillai@amd.com>,
Roman Li <roman.li@amd.com>, Wayne Lin <wayne.lin@amd.com>,
Tom Chung <chiahsuan.chung@amd.com>,
"Fangzhi Zuo" <jerry.zuo@amd.com>,
Dan Wheeler <daniel.wheeler@amd.com>, Ray Wu <Ray.Wu@amd.com>,
Ivan Lipski <ivan.lipski@amd.com>, Alex Hung <alex.hung@amd.com>,
James Lin <PingLei.Lin@amd.com>,
Chenyu Chen <Chen-Yu.Chen@amd.com>,
Tony Cheng <tony.cheng@amd.com>, Jun Lei <jun.lei@amd.com>
Subject: [PATCH 29/74] drm/amd/display: Read accelerated mode through a query builder
Date: Wed, 11 Nov 2026 09:28:35 +0800 [thread overview]
Message-ID: <20261111014100.3596072-30-Wayne.Lin@amd.com> (raw)
In-Reply-To: <20261111014100.3596072-1-Wayne.Lin@amd.com>
From: Tony Cheng <tony.cheng@amd.com>
[Why]
DC2 read the VBIOS accelerated-mode bit with a direct BIOS call. The
core layer must not access hardware.
[How]
Add a query builder that emits one accelerated-mode read into an output
target. The core layer builds and executes it in place before it accepts
a commit or an update.
Cc: Jun Lei <jun.lei@amd.com>
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
---
.../amd/display/dc/bls_builder/bls_builder.h | 2 +
.../dc/bls_builder/dcn401_init_builder.c | 32 +++++++++++
.../gpu/drm/amd/display/dc/core2/dc_core2.c | 53 +++++++++++++------
3 files changed, 72 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/bls_builder/bls_builder.h b/drivers/gpu/drm/amd/display/dc/bls_builder/bls_builder.h
index 954adc590ed4..9a3907bf950a 100644
--- a/drivers/gpu/drm/amd/display/dc/bls_builder/bls_builder.h
+++ b/drivers/gpu/drm/amd/display/dc/bls_builder/bls_builder.h
@@ -26,6 +26,7 @@ enum bls_builder_name {
DCN_DECL_INITIALIZATION_LEGACY,
DCN_DECL_NON_SEAMLESS_COMMIT,
DCN_DECL_SEAMLESS_UPDATE,
+ DCN_DECL_QUERY_ACCELERATED_MODE,
BLS_BUILDER_NAME_COUNT,
};
@@ -51,6 +52,7 @@ struct bls_builder_output_targets {
union {
struct bls_builder_output_init *DCN_DECL_INITIALIZATION;
struct bls_builder_legacy_hw_init_info *DCN_DECL_INITIALIZATION_LEGACY;
+ bool *DCN_DECL_QUERY_ACCELERATED_MODE;
};
};
diff --git a/drivers/gpu/drm/amd/display/dc/bls_builder/dcn401_init_builder.c b/drivers/gpu/drm/amd/display/dc/bls_builder/dcn401_init_builder.c
index 75fd4be3690a..1dc502c0839c 100644
--- a/drivers/gpu/drm/amd/display/dc/bls_builder/dcn401_init_builder.c
+++ b/drivers/gpu/drm/amd/display/dc/bls_builder/dcn401_init_builder.c
@@ -386,6 +386,31 @@ static enum bls_builder_result dcn401_build_initialization(
return BLS_BUILD_ERROR_UNSUPPORTED_STATE_UPDATE;
}
+/* Reads the VBIOS accelerated-mode bit into the caller's out-target. */
+static enum bls_builder_result dcn401_build_accelerated_mode_query(
+ struct bls_builder_declarative_params *params)
+{
+ union block_sequence_params bls_params = {0};
+ struct block_sequence_state sequence;
+ struct dc_bios *dcb;
+
+ if (!params || !params->dc || !params->dc->ctx || !params->out_targets ||
+ !params->out_targets->DCN_DECL_QUERY_ACCELERATED_MODE)
+ return BLS_BUILD_ERROR_RESOURCE_MAPPING;
+ dcb = params->dc->ctx->dc_bios;
+ if (!dcb || !dcb->funcs || !dcb->funcs->is_accelerated_mode)
+ return BLS_BUILD_ERROR_RESOURCE_MAPPING;
+
+ sequence.steps = params->head_sequence;
+ sequence.num_steps = ¶ms->head_num_steps;
+ bls_params.bios_is_accelerated_mode_params.dcb = dcb;
+ bls_params.bios_is_accelerated_mode_params.out_accelerated_mode =
+ params->out_targets->DCN_DECL_QUERY_ACCELERATED_MODE;
+ if (!bls_append(&sequence, BIOS_IS_ACCELERATED_MODE, &bls_params))
+ return BLS_BUILD_ERROR_RESOURCE_MAPPING;
+ return BLS_BUILD_SUCCESS;
+}
+
const struct bls_builder *dcn401_bls_builder_create(
enum bls_builder_name name)
{
@@ -401,6 +426,11 @@ const struct bls_builder *dcn401_bls_builder_create(
.check_capability = dcn401_dc1_initialization_check_capability,
.build.declarative = dcn401_build_dc1_initialization,
};
+ static const struct bls_builder accelerated_mode_query_builder = {
+ .name = DCN_DECL_QUERY_ACCELERATED_MODE,
+ .kind = BLS_BUILDER_DECLARATIVE,
+ .build.declarative = dcn401_build_accelerated_mode_query,
+ };
switch (name) {
case DCN_DECL_INITIALIZATION:
@@ -411,6 +441,8 @@ const struct bls_builder *dcn401_bls_builder_create(
return dcn401_non_seamless_commit_builder();
case DCN_DECL_SEAMLESS_UPDATE:
return dcn401_seamless_update_builder();
+ case DCN_DECL_QUERY_ACCELERATED_MODE:
+ return &accelerated_mode_query_builder;
default:
return NULL;
}
diff --git a/drivers/gpu/drm/amd/display/dc/core2/dc_core2.c b/drivers/gpu/drm/amd/display/dc/core2/dc_core2.c
index 052f29df1797..295d2d8b277e 100644
--- a/drivers/gpu/drm/amd/display/dc/core2/dc_core2.c
+++ b/drivers/gpu/drm/amd/display/dc/core2/dc_core2.c
@@ -53,20 +53,6 @@ void core2_destruct(struct dc *dc)
(void)dc;
}
-/*
- * The VBIOS scratch read legacy_commit_state_hw makes
- * before it enables accelerated mode. The commit has no accelerated-mode
- * entries, so it runs only after init has left VBIOS mode. Remove when a
- * BLC exposes the accelerated-mode bit.
- */
-static bool core2_is_accelerated_mode(struct dc *dc)
-{
- struct dc_bios *dcb = dc->ctx->dc_bios;
-
- return dcb && dcb->funcs && dcb->funcs->is_accelerated_mode &&
- dcb->funcs->is_accelerated_mode(dcb);
-}
-
static struct pipe_ctx *core2_otg_master(struct dc_state *state)
{
unsigned int i;
@@ -105,6 +91,43 @@ static bool core2_run_commit_sequence(struct dc *dc,
result == DC2_BLS_EXEC_CONTINUED_ON_ERROR;
}
+/*
+ * legacy_commit_state_hw reads this bit before it enables accelerated
+ * mode. The commit and the update have no accelerated-mode entries, so
+ * they run only after init has left VBIOS mode.
+ */
+static bool core2_query_accelerated_mode(struct dc *dc)
+{
+ const struct bls_builder *builder =
+ TO_DC2(dc)->builders[DCN_DECL_QUERY_ACCELERATED_MODE];
+ const struct workaround_manager *wam = dc2_workaround_manager_get();
+ struct bls_builder_output_targets out_targets = {0};
+ struct bls_builder_declarative_params *params;
+ bool accelerated_mode = false;
+
+ if (!builder || builder->kind != BLS_BUILDER_DECLARATIVE ||
+ !builder->build.declarative || !wam)
+ return false;
+
+ /* 256 block-sequence entries; keep them off the kernel stack. */
+ params = kvzalloc(sizeof(*params), GFP_KERNEL);
+ if (!params)
+ return false;
+ params->dc = dc;
+ params->current_state = dc->current_state;
+ out_targets.DCN_DECL_QUERY_ACCELERATED_MODE = &accelerated_mode;
+ params->out_targets = &out_targets;
+
+ if (builder->build.declarative(params) != BLS_BUILD_SUCCESS ||
+ params->tail_num_steps ||
+ !core2_run_commit_sequence(dc, builder, wam,
+ params->head_sequence, ¶ms->head_num_steps))
+ accelerated_mode = false;
+
+ kvfree(params);
+ return accelerated_mode;
+}
+
/*
* dcn401_prepare_bandwidth's optimized_required writes. The Executor ORs
* in the watermark and arbiter results.
@@ -196,7 +219,7 @@ static bool core2_builder_supports(struct dc *dc, enum bls_builder_name name,
builder->build.declarative &&
dc2_workaround_manager_get() &&
builder->check_capability(&check) &&
- core2_is_accelerated_mode(dc);
+ core2_query_accelerated_mode(dc);
}
/* Never falls back to legacy_commit_state_hw: DC2 must not call DC1. */
--
2.43.0
next prev parent reply other threads:[~2026-11-11 1:44 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-11 1:28 [PATCH 00/74] DC Patches November 16, 2026 Wayne Lin
2026-11-11 1:28 ` [PATCH 01/74] drm/amd/display: Fix elapsed time indentation Wayne Lin
2026-11-11 1:28 ` [PATCH 02/74] drm/amd/display: Correct the forced YCbCr420 comment Wayne Lin
2026-11-11 1:28 ` [PATCH 03/74] drm/amd/display: Remove duplicate block sequence leftovers Wayne Lin
2026-11-11 1:28 ` [PATCH 04/74] drm/amd/display: Skip UPSP programming when UPSP regs are absent Wayne Lin
2026-11-11 1:28 ` [PATCH 05/74] drm/amd/display: Dispatch commit_state_hw through dc2_funcs Wayne Lin
2026-11-11 1:28 ` [PATCH 06/74] drm/amd/display: Add leaf BLS entries for a virtual commit Wayne Lin
2026-11-11 1:28 ` [PATCH 07/74] drm/amd/display: Build the dcn401 virtual commit natively Wayne Lin
2026-11-11 1:28 ` [PATCH 08/74] drm/amd/display: Move HDMI FRL Polling Outside dc_lock Wayne Lin
2026-11-11 1:28 ` [PATCH 09/74] drm/amd/display: Extend the IOMMU mismatch workaround to DCN42B Wayne Lin
2026-11-11 1:28 ` [PATCH 10/74] drm/amd/display: Stop HDMI FRL status polling on fini Wayne Lin
2026-11-12 8:51 ` Eren Özen
2026-11-13 3:19 ` Wayne Lin
2026-11-11 1:28 ` [PATCH 11/74] drm/amd/display: Relax stutter constraints for DRR streams Wayne Lin
2026-11-11 1:28 ` [PATCH 12/74] drm/amd/display: Include Ramless Idle in stutter relaxation Wayne Lin
2026-11-11 1:28 ` [PATCH 13/74] drm/amd/display: Initialize DMUB LSDMA ring buffer Wayne Lin
2026-11-11 1:28 ` [PATCH 14/74] drm/amd/display: Fix FFE test automation link rate change Wayne Lin
2026-11-11 1:28 ` [PATCH 15/74] drm/amd/display: Update indicate pstate enable sequence Wayne Lin
2026-11-11 1:28 ` [PATCH 16/74] drm/amd/display: HWSS Refactor - Watermarks Wayne Lin
2026-11-11 1:28 ` [PATCH 17/74] drm/amd/display: Resolve clk_mgr DPP DTO targets when the sequence is built Wayne Lin
2026-11-11 1:28 ` [PATCH 18/74] drm/amd/display: Resolve clk_mgr DTBCLK " Wayne Lin
2026-11-11 1:28 ` [PATCH 19/74] drm/amd/display: Resolve the DCN401 DENTIST divider " Wayne Lin
2026-11-11 1:28 ` [PATCH 20/74] drm/amd/display: Update default VCO frequency Wayne Lin
2026-11-11 1:28 ` [PATCH 21/74] drm/amd/display: commit validated target when minimal transition cannot be built Wayne Lin
2026-11-11 1:28 ` [PATCH 22/74] drm/amd/display: Update DP HPO to use correct APG instance Wayne Lin
2026-11-11 1:28 ` [PATCH 23/74] drm/amd/display: cleanup tiling and address formats Wayne Lin
2026-11-11 1:28 ` [PATCH 24/74] drm/amd/display: Enable SST PCON FRL DSC passthrough Wayne Lin
2026-11-11 1:28 ` [PATCH 25/74] drm/amd/display: Don't let HPD IRQ handler take dc_lock in reset Wayne Lin
2026-11-11 1:28 ` [PATCH 26/74] drm/amd/display: Skip visual confirm color programming when FW owns it Wayne Lin
2026-11-11 1:28 ` [PATCH 27/74] drm/amd/display: Fix Stage Optimizer Parameter Naming Wayne Lin
2026-11-11 1:28 ` [PATCH 28/74] drm/amd/display: Build the dcn401 seamless update in DC2 Wayne Lin
2026-11-11 1:28 ` Wayne Lin [this message]
2026-11-11 1:28 ` [PATCH 30/74] drm/amd/display: Ensure exit IPS before checking flip status Wayne Lin
2026-11-11 1:28 ` [PATCH 31/74] drm/amd/display: Updating missing assignments for DCN6 Wayne Lin
2026-11-11 1:28 ` [PATCH 32/74] drm/amd/display: update dcn42b based on dcn42 Wayne Lin
2026-11-11 1:28 ` [PATCH 33/74] drm/amd/display: Build the kept-plane surface update in DC2 Wayne Lin
2026-11-11 1:28 ` [PATCH 34/74] drm/amd/display: Skip first-enable steps on a kept plane Wayne Lin
2026-11-11 1:28 ` [PATCH 35/74] drm/amd/display: Enable DRR stutter constraint relaxation on DCN42 Wayne Lin
2026-11-11 1:28 ` [PATCH 36/74] drm/amd/display: detect static screen state and propagate Wayne Lin
2026-11-11 1:28 ` [PATCH 37/74] drm/amd/display: Allow DC_PSR_MASK to enable PSR without DMUB PSR cap Wayne Lin
2026-11-11 1:28 ` [PATCH 38/74] drm/amd/display: Fix DSC teardown gating in post-unlock BLS sequence Wayne Lin
2026-11-11 1:28 ` [PATCH 39/74] drm/amd/display: Enable HDCP on DCN6 Wayne Lin
2026-11-11 1:28 ` [PATCH 40/74] drm/amd/display: enable DF C-state vote on DCN42B Wayne Lin
2026-11-11 1:28 ` [PATCH 41/74] drm/amd/display: Increase the DCN42 DDR5 stutter latency Wayne Lin
2026-11-11 1:28 ` [PATCH 42/74] drm/amd/display: [FW Promotion] Release 0.1.83.0 Wayne Lin
2026-11-11 1:28 ` [PATCH 43/74] drm/amd/display: Promote DC to 3.2.406 Wayne Lin
2026-11-11 1:28 ` [PATCH 44/74] drm/amd/display: Fix KUnit tiled EDID size Wayne Lin
2026-11-12 7:17 ` Eren Özen
2026-11-11 1:28 ` [PATCH 45/74] drm/amd/display: fix hubbub read state logging Wayne Lin
2026-11-11 1:28 ` [PATCH 46/74] drm/amd/display: Keep panel power across link-loss retrain Wayne Lin
2026-11-11 1:28 ` [PATCH 47/74] drm/amd/display: Don't shrink zero-area recout in full viewport visual confirm Wayne Lin
2026-11-11 1:28 ` [PATCH 48/74] drm/amd/display: Keep patched HDMI panels on FRL across detect Wayne Lin
2026-11-11 1:28 ` [PATCH 49/74] drm/amd/display: Use expanded DMUB-provided SoC BB and IP caps Wayne Lin
2026-11-11 1:28 ` [PATCH 50/74] drm/amd/display: Only force P-State on first plane if TTU is below WM Wayne Lin
2026-11-11 1:28 ` [PATCH 51/74] drm/amd/display: Program the kept-plane scaler in DC2 Wayne Lin
2026-11-11 1:28 ` [PATCH 52/74] drm/amd/display: Add and remove two MPO planes " Wayne Lin
2026-11-11 1:28 ` [PATCH 53/74] drm/amd/display: Add DC2 state facts and split the builders Wayne Lin
2026-11-11 1:29 ` [PATCH 54/74] drm/amd/display: Program DC2 commit stereo once Wayne Lin
2026-11-11 1:29 ` [PATCH 55/74] drm/amd/display: Read DCN6 SOP constraints from the idle row Wayne Lin
2026-11-11 1:29 ` [PATCH 56/74] drm/amd/display: Use soc_bb hostvm fraction instead of hardcoded value Wayne Lin
2026-11-11 1:29 ` [PATCH 57/74] drm/amd/display: Increase state if dcfclk deep sleep needed exceeds dcfclk Wayne Lin
2026-11-11 1:29 ` [PATCH 58/74] drm/amd/display: Flip dml2_core_utils_get_segment_horizontal_contiguous() Inputs Wayne Lin
2026-11-11 1:29 ` [PATCH 59/74] drm/amd/display: Update DCN6 Calcs Wayne Lin
2026-11-11 1:29 ` [PATCH 60/74] drm/amd/display: Add effective_number_of_dpp parameter Wayne Lin
2026-11-11 1:29 ` [PATCH 61/74] drm/amd/display: Read DRAM channel width from SMU init table Wayne Lin
2026-11-11 1:29 ` [PATCH 62/74] drm/amd/display: Update DCN42B stutter latency to match DCN42 Wayne Lin
2026-11-11 1:29 ` [PATCH 63/74] drm/amd/display: Expect VRAM|GTT for the DMUB framebuffer Wayne Lin
2026-11-12 7:17 ` Eren Özen
2026-11-11 1:29 ` [PATCH 64/74] drm/amd/display: Report QoS latency bounds and request Wayne Lin
2026-11-11 1:29 ` [PATCH 65/74] drm/amd/display: Bypass chroma upsampling without the DPP cap Wayne Lin
2026-11-11 1:29 ` [PATCH 66/74] drm/amd/display: Limit VRAM aperture retrieval to DCN6 Wayne Lin
2026-11-11 1:29 ` [PATCH 67/74] drm/amd/display: Make DPP_PG_CONTROL and HUBP_PG_CONTROL BLS compliant Wayne Lin
2026-11-11 1:29 ` [PATCH 68/74] drm/amd/display: Seed boot clocks to avoid lowering pre-OS display clocks Wayne Lin
2026-11-11 1:29 ` [PATCH 69/74] drm/amd/display: Account for split pipe overlap in alt channel copy size Wayne Lin
2026-11-11 1:29 ` [PATCH 70/74] drm/amd/display: Get OPP heads and DPP pipes by stream in dc_resource Wayne Lin
2026-11-11 1:29 ` [PATCH 71/74] drm/amd/display: Program ODM 2:1 and 3:1 on one stream in DC2 Wayne Lin
2026-11-11 1:29 ` [PATCH 72/74] drm/amd/display: Enable Replay timing sync by default Wayne Lin
2026-11-11 1:29 ` [PATCH 73/74] drm/amd/display: [FW Promotion] Release 0.1.84.0 Wayne Lin
2026-11-11 1:29 ` [PATCH 74/74] drm/amd/display: Promote DC to 3.2.407 Wayne Lin
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