[PATCH 37/74] drm/amd/display: Allow DC_PSR_MASK to enable PSR without DMUB PSR cap

[Wayne Lin <Wayne.Lin@amd.com>]

From: Ray Wu <ray.wu@amd.com>

[Why]
amdgpu_dm_set_psr_caps() requires dc->caps.dmub_caps.psr, which is only
populated on DCN IPs that query DMUB feature caps in init_hw. DCN 1.x,
2.x and 3.0.1 never do, so PSR can no longer be enabled there even with
amdgpu.dcfeaturemask=0x8.

[How]
Skip the DMUB PSR cap check when DC_PSR_MASK is set, and add a KUnit
case for this path.

Tested-by: Hugo Sales <hugo@hsal.es>
Cc: ChiaHsuan Chung <chiahsuan.chung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
---
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c |  3 +-
 .../amdgpu_dm/tests/amdgpu_dm_psr_test.c      | 35 ++++++++++++++++++-
 2 files changed, 36 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
index dbad0a6d3a2b..295b1c307fa3 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
@@ -111,7 +111,8 @@ bool amdgpu_dm_set_psr_caps(struct dc_link *link, struct amdgpu_dm_connector *ac
 	/* Reset psr version first */
 	link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED;
 
-	if (!dc->caps.dmub_caps.psr)
+	/* DCN IPs that never query DMUB feature caps rely on DC_PSR_MASK to opt in */
+	if (!dc->caps.dmub_caps.psr && !(amdgpu_dc_feature_mask & DC_PSR_MASK))
 		return false;
 
 	if (!(link->connector_signal & SIGNAL_TYPE_EDP))
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
index 0a484ea7c0e8..c084e4f85f95 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
@@ -230,15 +230,47 @@ static void dm_test_set_psr_caps_no_dmub_psr(struct kunit *test)
 {
 	struct dc_link *link = alloc_test_psr_caps_link(test);
 	struct amdgpu_dm_connector *aconnector = alloc_test_aconnector(test);
+	unsigned int old_feature_mask;
+	bool ret;
 
 	link->psr_settings.psr_version = DC_PSR_VERSION_1;
 	link->ctx->dc->caps.dmub_caps.psr = false;
 
-	KUNIT_EXPECT_FALSE(test, amdgpu_dm_set_psr_caps(link, aconnector));
+	old_feature_mask = amdgpu_dm_psr_get_dc_feature_mask();
+	amdgpu_dm_psr_set_dc_feature_mask(old_feature_mask & ~DC_PSR_MASK);
+
+	ret = amdgpu_dm_set_psr_caps(link, aconnector);
+	amdgpu_dm_psr_set_dc_feature_mask(old_feature_mask);
+
+	KUNIT_EXPECT_FALSE(test, ret);
 	KUNIT_EXPECT_EQ(test, link->psr_settings.psr_version,
 			DC_PSR_VERSION_UNSUPPORTED);
 }
 
+/**
+ * dm_test_set_psr_caps_feature_mask_no_dmub_psr() - DC_PSR_MASK opts in without DMUB PSR cap.
+ * @test: KUnit test context.
+ */
+static void dm_test_set_psr_caps_feature_mask_no_dmub_psr(struct kunit *test)
+{
+	struct dc_link *link = alloc_test_psr_caps_link(test);
+	struct amdgpu_dm_connector *aconnector = alloc_test_aconnector(test);
+	unsigned int old_feature_mask;
+	bool ret;
+
+	link->ctx->dc->caps.dmub_caps.psr = false;
+
+	old_feature_mask = amdgpu_dm_psr_get_dc_feature_mask();
+	amdgpu_dm_psr_set_dc_feature_mask(old_feature_mask | DC_PSR_MASK);
+
+	ret = amdgpu_dm_set_psr_caps(link, aconnector);
+	amdgpu_dm_psr_set_dc_feature_mask(old_feature_mask);
+
+	KUNIT_EXPECT_TRUE(test, ret);
+	KUNIT_EXPECT_NE(test, link->psr_settings.psr_version,
+			DC_PSR_VERSION_UNSUPPORTED);
+}
+
 /**
  * dm_test_set_psr_caps_non_edp() - Only eDP links can enable PSR.
  * @test: KUnit test context.
@@ -712,6 +744,7 @@ static struct kunit_case dm_psr_test_cases[] = {
 	KUNIT_CASE(dm_test_set_psr_caps_null_link),
 	KUNIT_CASE(dm_test_set_psr_caps_null_connector),
 	KUNIT_CASE(dm_test_set_psr_caps_no_dmub_psr),
+	KUNIT_CASE(dm_test_set_psr_caps_feature_mask_no_dmub_psr),
 	KUNIT_CASE(dm_test_set_psr_caps_non_edp),
 	KUNIT_CASE(dm_test_set_psr_caps_disconnected),
 	KUNIT_CASE(dm_test_set_psr_caps_no_dpcd_psr),
-- 
2.43.0